1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include <linux/delay.h>
9 #include <linux/module.h>
10 #include <linux/printk.h>
11 #include <linux/spi/spi.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/phylink.h>
16 #include <linux/of_net.h>
17 #include <linux/of_mdio.h>
18 #include <linux/of_device.h>
19 #include <linux/netdev_features.h>
20 #include <linux/netdevice.h>
21 #include <linux/if_bridge.h>
22 #include <linux/if_ether.h>
23 #include <linux/dsa/8021q.h>
25 #include "sja1105_tas.h"
27 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
28 unsigned int startup_delay)
30 gpiod_set_value_cansleep(gpio, 1);
31 /* Wait for minimum reset pulse length */
33 gpiod_set_value_cansleep(gpio, 0);
34 /* Wait until chip is ready after reset */
35 msleep(startup_delay);
39 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
40 int from, int to, bool allow)
43 l2_fwd[from].bc_domain |= BIT(to);
44 l2_fwd[from].reach_port |= BIT(to);
45 l2_fwd[from].fl_domain |= BIT(to);
47 l2_fwd[from].bc_domain &= ~BIT(to);
48 l2_fwd[from].reach_port &= ~BIT(to);
49 l2_fwd[from].fl_domain &= ~BIT(to);
53 /* Structure used to temporarily transport device tree
54 * settings into sja1105_setup
56 struct sja1105_dt_port {
57 phy_interface_t phy_mode;
58 sja1105_mii_role_t role;
61 static int sja1105_init_mac_settings(struct sja1105_private *priv)
63 struct sja1105_mac_config_entry default_mac = {
64 /* Enable all 8 priority queues on egress.
65 * Every queue i holds top[i] - base[i] frames.
66 * Sum of top[i] - base[i] is 511 (max hardware limit).
68 .top = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
69 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
70 .enabled = {true, true, true, true, true, true, true, true},
71 /* Keep standard IFG of 12 bytes on egress. */
73 /* Always put the MAC speed in automatic mode, where it can be
74 * adjusted at runtime by PHYLINK.
76 .speed = SJA1105_SPEED_AUTO,
77 /* No static correction for 1-step 1588 events */
80 /* Disable aging for critical TTEthernet traffic */
82 /* Internal VLAN (pvid) to apply to untagged ingress */
87 /* Don't drop traffic with other EtherType than ETH_P_IP */
89 /* Don't drop double-tagged traffic */
91 /* Don't drop untagged traffic */
93 /* Don't retag 802.1p (VID 0) traffic with the pvid */
95 /* Disable learning and I/O on user ports by default -
102 struct sja1105_mac_config_entry *mac;
103 struct sja1105_table *table;
106 table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
108 /* Discard previous MAC Configuration Table */
109 if (table->entry_count) {
110 kfree(table->entries);
111 table->entry_count = 0;
114 table->entries = kcalloc(SJA1105_NUM_PORTS,
115 table->ops->unpacked_entry_size, GFP_KERNEL);
119 table->entry_count = SJA1105_NUM_PORTS;
121 mac = table->entries;
123 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
124 mac[i] = default_mac;
125 if (i == dsa_upstream_port(priv->ds, i)) {
126 /* STP doesn't get called for CPU port, so we need to
127 * set the I/O parameters statically.
129 mac[i].dyn_learn = true;
130 mac[i].ingress = true;
131 mac[i].egress = true;
138 static int sja1105_init_mii_settings(struct sja1105_private *priv,
139 struct sja1105_dt_port *ports)
141 struct device *dev = &priv->spidev->dev;
142 struct sja1105_xmii_params_entry *mii;
143 struct sja1105_table *table;
146 table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
148 /* Discard previous xMII Mode Parameters Table */
149 if (table->entry_count) {
150 kfree(table->entries);
151 table->entry_count = 0;
154 table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT,
155 table->ops->unpacked_entry_size, GFP_KERNEL);
159 /* Override table based on PHYLINK DT bindings */
160 table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT;
162 mii = table->entries;
164 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
165 switch (ports[i].phy_mode) {
166 case PHY_INTERFACE_MODE_MII:
167 mii->xmii_mode[i] = XMII_MODE_MII;
169 case PHY_INTERFACE_MODE_RMII:
170 mii->xmii_mode[i] = XMII_MODE_RMII;
172 case PHY_INTERFACE_MODE_RGMII:
173 case PHY_INTERFACE_MODE_RGMII_ID:
174 case PHY_INTERFACE_MODE_RGMII_RXID:
175 case PHY_INTERFACE_MODE_RGMII_TXID:
176 mii->xmii_mode[i] = XMII_MODE_RGMII;
179 dev_err(dev, "Unsupported PHY mode %s!\n",
180 phy_modes(ports[i].phy_mode));
183 mii->phy_mac[i] = ports[i].role;
188 static int sja1105_init_static_fdb(struct sja1105_private *priv)
190 struct sja1105_table *table;
192 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
194 /* We only populate the FDB table through dynamic
195 * L2 Address Lookup entries
197 if (table->entry_count) {
198 kfree(table->entries);
199 table->entry_count = 0;
204 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
206 struct sja1105_table *table;
207 u64 max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / SJA1105_NUM_PORTS;
208 struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
209 /* Learned FDB entries are forgotten after 300 seconds */
210 .maxage = SJA1105_AGEING_TIME_MS(300000),
211 /* All entries within a FDB bin are available for learning */
212 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
213 /* And the P/Q/R/S equivalent setting: */
215 .maxaddrp = {max_fdb_entries, max_fdb_entries, max_fdb_entries,
216 max_fdb_entries, max_fdb_entries, },
217 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
219 /* This selects between Independent VLAN Learning (IVL) and
220 * Shared VLAN Learning (SVL)
222 .shared_learn = true,
223 /* Don't discard management traffic based on ENFPORT -
224 * we don't perform SMAC port enforcement anyway, so
225 * what we are setting here doesn't matter.
227 .no_enf_hostprt = false,
228 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
229 * Maybe correlate with no_linklocal_learn from bridge driver?
231 .no_mgmt_learn = true,
234 /* Dynamically learned FDB entries can overwrite other (older)
235 * dynamic FDB entries
241 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
243 if (table->entry_count) {
244 kfree(table->entries);
245 table->entry_count = 0;
248 table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,
249 table->ops->unpacked_entry_size, GFP_KERNEL);
253 table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT;
255 /* This table only has a single entry */
256 ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
257 default_l2_lookup_params;
262 static int sja1105_init_static_vlan(struct sja1105_private *priv)
264 struct sja1105_table *table;
265 struct sja1105_vlan_lookup_entry pvid = {
275 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
277 /* The static VLAN table will only contain the initial pvid of 1.
278 * All other VLANs are to be configured through dynamic entries,
279 * and kept in the static configuration table as backing memory.
281 if (table->entry_count) {
282 kfree(table->entries);
283 table->entry_count = 0;
286 table->entries = kcalloc(1, table->ops->unpacked_entry_size,
291 table->entry_count = 1;
293 /* VLAN 1: all DT-defined ports are members; no restrictions on
294 * forwarding; always transmit priority-tagged frames as untagged.
296 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
297 pvid.vmemb_port |= BIT(i);
298 pvid.vlan_bc |= BIT(i);
299 pvid.tag_port &= ~BIT(i);
302 ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
306 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
308 struct sja1105_l2_forwarding_entry *l2fwd;
309 struct sja1105_table *table;
312 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
314 if (table->entry_count) {
315 kfree(table->entries);
316 table->entry_count = 0;
319 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT,
320 table->ops->unpacked_entry_size, GFP_KERNEL);
324 table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT;
326 l2fwd = table->entries;
328 /* First 5 entries define the forwarding rules */
329 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
330 unsigned int upstream = dsa_upstream_port(priv->ds, i);
332 for (j = 0; j < SJA1105_NUM_TC; j++)
333 l2fwd[i].vlan_pmap[j] = j;
338 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
339 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
341 /* Next 8 entries define VLAN PCP mapping from ingress to egress.
342 * Create a one-to-one mapping.
344 for (i = 0; i < SJA1105_NUM_TC; i++)
345 for (j = 0; j < SJA1105_NUM_PORTS; j++)
346 l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i;
351 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
353 struct sja1105_l2_forwarding_params_entry default_l2fwd_params = {
354 /* Disallow dynamic reconfiguration of vlan_pmap */
356 /* Use a single memory partition for all ingress queues */
357 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 },
359 struct sja1105_table *table;
361 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
363 if (table->entry_count) {
364 kfree(table->entries);
365 table->entry_count = 0;
368 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,
369 table->ops->unpacked_entry_size, GFP_KERNEL);
373 table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT;
375 /* This table only has a single entry */
376 ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] =
377 default_l2fwd_params;
382 static int sja1105_init_general_params(struct sja1105_private *priv)
384 struct sja1105_general_params_entry default_general_params = {
385 /* Disallow dynamic changing of the mirror port */
387 .switchid = priv->ds->index,
388 /* Priority queue for link-local management frames
389 * (both ingress to and egress from CPU - PTP, STP etc)
392 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
393 .mac_flt1 = SJA1105_LINKLOCAL_FILTER_A_MASK,
394 .incl_srcpt1 = false,
396 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
397 .mac_flt0 = SJA1105_LINKLOCAL_FILTER_B_MASK,
398 .incl_srcpt0 = false,
400 /* The destination for traffic matching mac_fltres1 and
401 * mac_fltres0 on all ports except host_port. Such traffic
402 * receieved on host_port itself would be dropped, except
403 * by installing a temporary 'management route'
405 .host_port = dsa_upstream_port(priv->ds, 0),
406 /* Same as host port */
407 .mirr_port = dsa_upstream_port(priv->ds, 0),
408 /* Link-local traffic received on casc_port will be forwarded
409 * to host_port without embedding the source port and device ID
410 * info in the destination MAC address (presumably because it
411 * is a cascaded port and a downstream SJA switch already did
412 * that). Default to an invalid port (to disable the feature)
413 * and overwrite this if we find any DSA (cascaded) ports.
415 .casc_port = SJA1105_NUM_PORTS,
420 /* Only update correctionField for 1-step PTP (L2 transport) */
422 /* Forcefully disable VLAN filtering by telling
423 * the switch that VLAN has a different EtherType.
425 .tpid = ETH_P_SJA1105,
426 .tpid2 = ETH_P_SJA1105,
428 struct sja1105_table *table;
431 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
432 if (dsa_is_dsa_port(priv->ds, i))
433 default_general_params.casc_port = i;
434 else if (dsa_is_user_port(priv->ds, i))
435 priv->ports[i].mgmt_slot = k++;
438 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
440 if (table->entry_count) {
441 kfree(table->entries);
442 table->entry_count = 0;
445 table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT,
446 table->ops->unpacked_entry_size, GFP_KERNEL);
450 table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT;
452 /* This table only has a single entry */
453 ((struct sja1105_general_params_entry *)table->entries)[0] =
454 default_general_params;
459 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
462 sja1105_setup_policer(struct sja1105_l2_policing_entry *policing,
465 policing[index].sharindx = index;
466 policing[index].smax = 65535; /* Burst size in bytes */
467 policing[index].rate = SJA1105_RATE_MBPS(1000);
468 policing[index].maxlen = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
469 policing[index].partition = 0;
472 static int sja1105_init_l2_policing(struct sja1105_private *priv)
474 struct sja1105_l2_policing_entry *policing;
475 struct sja1105_table *table;
478 table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
480 /* Discard previous L2 Policing Table */
481 if (table->entry_count) {
482 kfree(table->entries);
483 table->entry_count = 0;
486 table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT,
487 table->ops->unpacked_entry_size, GFP_KERNEL);
491 table->entry_count = SJA1105_MAX_L2_POLICING_COUNT;
493 policing = table->entries;
495 /* k sweeps through all unicast policers (0-39).
496 * bcast sweeps through policers 40-44.
498 for (i = 0, k = 0; i < SJA1105_NUM_PORTS; i++) {
499 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + i;
501 for (j = 0; j < SJA1105_NUM_TC; j++, k++)
502 sja1105_setup_policer(policing, k);
504 /* Set up this port's policer for broadcast traffic */
505 sja1105_setup_policer(policing, bcast);
510 static int sja1105_init_avb_params(struct sja1105_private *priv,
513 struct sja1105_avb_params_entry *avb;
514 struct sja1105_table *table;
516 table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
518 /* Discard previous AVB Parameters Table */
519 if (table->entry_count) {
520 kfree(table->entries);
521 table->entry_count = 0;
524 /* Configure the reception of meta frames only if requested */
528 table->entries = kcalloc(SJA1105_MAX_AVB_PARAMS_COUNT,
529 table->ops->unpacked_entry_size, GFP_KERNEL);
533 table->entry_count = SJA1105_MAX_AVB_PARAMS_COUNT;
535 avb = table->entries;
537 avb->destmeta = SJA1105_META_DMAC;
538 avb->srcmeta = SJA1105_META_SMAC;
543 static int sja1105_static_config_load(struct sja1105_private *priv,
544 struct sja1105_dt_port *ports)
548 sja1105_static_config_free(&priv->static_config);
549 rc = sja1105_static_config_init(&priv->static_config,
550 priv->info->static_ops,
551 priv->info->device_id);
555 /* Build static configuration */
556 rc = sja1105_init_mac_settings(priv);
559 rc = sja1105_init_mii_settings(priv, ports);
562 rc = sja1105_init_static_fdb(priv);
565 rc = sja1105_init_static_vlan(priv);
568 rc = sja1105_init_l2_lookup_params(priv);
571 rc = sja1105_init_l2_forwarding(priv);
574 rc = sja1105_init_l2_forwarding_params(priv);
577 rc = sja1105_init_l2_policing(priv);
580 rc = sja1105_init_general_params(priv);
583 rc = sja1105_init_avb_params(priv, false);
587 /* Send initial configuration to hardware via SPI */
588 return sja1105_static_config_upload(priv);
591 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv,
592 const struct sja1105_dt_port *ports)
596 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
597 if (ports->role == XMII_MAC)
600 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||
601 ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
602 priv->rgmii_rx_delay[i] = true;
604 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||
605 ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
606 priv->rgmii_tx_delay[i] = true;
608 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) &&
609 !priv->info->setup_rgmii_delay)
615 static int sja1105_parse_ports_node(struct sja1105_private *priv,
616 struct sja1105_dt_port *ports,
617 struct device_node *ports_node)
619 struct device *dev = &priv->spidev->dev;
620 struct device_node *child;
622 for_each_child_of_node(ports_node, child) {
623 struct device_node *phy_node;
627 /* Get switch port number from DT */
628 if (of_property_read_u32(child, "reg", &index) < 0) {
629 dev_err(dev, "Port number not defined in device tree "
630 "(property \"reg\")\n");
635 /* Get PHY mode from DT */
636 phy_mode = of_get_phy_mode(child);
638 dev_err(dev, "Failed to read phy-mode or "
639 "phy-interface-type property for port %d\n",
644 ports[index].phy_mode = phy_mode;
646 phy_node = of_parse_phandle(child, "phy-handle", 0);
648 if (!of_phy_is_fixed_link(child)) {
649 dev_err(dev, "phy-handle or fixed-link "
650 "properties missing!\n");
654 /* phy-handle is missing, but fixed-link isn't.
655 * So it's a fixed link. Default to PHY role.
657 ports[index].role = XMII_PHY;
659 /* phy-handle present => put port in MAC role */
660 ports[index].role = XMII_MAC;
661 of_node_put(phy_node);
664 /* The MAC/PHY role can be overridden with explicit bindings */
665 if (of_property_read_bool(child, "sja1105,role-mac"))
666 ports[index].role = XMII_MAC;
667 else if (of_property_read_bool(child, "sja1105,role-phy"))
668 ports[index].role = XMII_PHY;
674 static int sja1105_parse_dt(struct sja1105_private *priv,
675 struct sja1105_dt_port *ports)
677 struct device *dev = &priv->spidev->dev;
678 struct device_node *switch_node = dev->of_node;
679 struct device_node *ports_node;
682 ports_node = of_get_child_by_name(switch_node, "ports");
684 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
688 rc = sja1105_parse_ports_node(priv, ports, ports_node);
689 of_node_put(ports_node);
694 /* Convert link speed from SJA1105 to ethtool encoding */
695 static int sja1105_speed[] = {
696 [SJA1105_SPEED_AUTO] = SPEED_UNKNOWN,
697 [SJA1105_SPEED_10MBPS] = SPEED_10,
698 [SJA1105_SPEED_100MBPS] = SPEED_100,
699 [SJA1105_SPEED_1000MBPS] = SPEED_1000,
702 /* Set link speed in the MAC configuration for a specific port. */
703 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
706 struct sja1105_xmii_params_entry *mii;
707 struct sja1105_mac_config_entry *mac;
708 struct device *dev = priv->ds->dev;
709 sja1105_phy_interface_t phy_mode;
710 sja1105_speed_t speed;
713 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
714 * tables. On E/T, MAC reconfig tables are not readable, only writable.
715 * We have to *know* what the MAC looks like. For the sake of keeping
716 * the code common, we'll use the static configuration tables as a
717 * reasonable approximation for both E/T and P/Q/R/S.
719 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
720 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
722 switch (speed_mbps) {
724 /* PHYLINK called sja1105_mac_config() to inform us about
725 * the state->interface, but AN has not completed and the
726 * speed is not yet valid. UM10944.pdf says that setting
727 * SJA1105_SPEED_AUTO at runtime disables the port, so that is
728 * ok for power consumption in case AN will never complete -
729 * otherwise PHYLINK should come back with a new update.
731 speed = SJA1105_SPEED_AUTO;
734 speed = SJA1105_SPEED_10MBPS;
737 speed = SJA1105_SPEED_100MBPS;
740 speed = SJA1105_SPEED_1000MBPS;
743 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
747 /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
748 * table, since this will be used for the clocking setup, and we no
749 * longer need to store it in the static config (already told hardware
750 * we want auto during upload phase).
752 mac[port].speed = speed;
754 /* Write to the dynamic reconfiguration tables */
755 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
758 dev_err(dev, "Failed to write MAC config: %d\n", rc);
762 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
763 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
764 * RMII no change of the clock setup is required. Actually, changing
765 * the clock setup does interrupt the clock signal for a certain time
766 * which causes trouble for all PHYs relying on this signal.
768 phy_mode = mii->xmii_mode[port];
769 if (phy_mode != XMII_MODE_RGMII)
772 return sja1105_clocking_setup_port(priv, port);
775 /* The SJA1105 MAC programming model is through the static config (the xMII
776 * Mode table cannot be dynamically reconfigured), and we have to program
777 * that early (earlier than PHYLINK calls us, anyway).
778 * So just error out in case the connected PHY attempts to change the initial
779 * system interface MII protocol from what is defined in the DT, at least for
782 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
783 phy_interface_t interface)
785 struct sja1105_xmii_params_entry *mii;
786 sja1105_phy_interface_t phy_mode;
788 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
789 phy_mode = mii->xmii_mode[port];
792 case PHY_INTERFACE_MODE_MII:
793 return (phy_mode != XMII_MODE_MII);
794 case PHY_INTERFACE_MODE_RMII:
795 return (phy_mode != XMII_MODE_RMII);
796 case PHY_INTERFACE_MODE_RGMII:
797 case PHY_INTERFACE_MODE_RGMII_ID:
798 case PHY_INTERFACE_MODE_RGMII_RXID:
799 case PHY_INTERFACE_MODE_RGMII_TXID:
800 return (phy_mode != XMII_MODE_RGMII);
806 static void sja1105_mac_config(struct dsa_switch *ds, int port,
807 unsigned int link_an_mode,
808 const struct phylink_link_state *state)
810 struct sja1105_private *priv = ds->priv;
812 if (sja1105_phy_mode_mismatch(priv, port, state->interface))
815 if (link_an_mode == MLO_AN_INBAND) {
816 dev_err(ds->dev, "In-band AN not supported!\n");
820 sja1105_adjust_port_config(priv, port, state->speed);
823 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
825 phy_interface_t interface)
827 sja1105_inhibit_tx(ds->priv, BIT(port), true);
830 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
832 phy_interface_t interface,
833 struct phy_device *phydev)
835 sja1105_inhibit_tx(ds->priv, BIT(port), false);
838 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
839 unsigned long *supported,
840 struct phylink_link_state *state)
842 /* Construct a new mask which exhaustively contains all link features
843 * supported by the MAC, and then apply that (logical AND) to what will
844 * be sent to the PHY for "marketing".
846 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
847 struct sja1105_private *priv = ds->priv;
848 struct sja1105_xmii_params_entry *mii;
850 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
852 /* include/linux/phylink.h says:
853 * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
854 * expects the MAC driver to return all supported link modes.
856 if (state->interface != PHY_INTERFACE_MODE_NA &&
857 sja1105_phy_mode_mismatch(priv, port, state->interface)) {
858 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
862 /* The MAC does not support pause frames, and also doesn't
863 * support half-duplex traffic modes.
865 phylink_set(mask, Autoneg);
866 phylink_set(mask, MII);
867 phylink_set(mask, 10baseT_Full);
868 phylink_set(mask, 100baseT_Full);
869 if (mii->xmii_mode[port] == XMII_MODE_RGMII)
870 phylink_set(mask, 1000baseT_Full);
872 bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
873 bitmap_and(state->advertising, state->advertising, mask,
874 __ETHTOOL_LINK_MODE_MASK_NBITS);
878 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
879 const struct sja1105_l2_lookup_entry *requested)
881 struct sja1105_l2_lookup_entry *l2_lookup;
882 struct sja1105_table *table;
885 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
886 l2_lookup = table->entries;
888 for (i = 0; i < table->entry_count; i++)
889 if (l2_lookup[i].macaddr == requested->macaddr &&
890 l2_lookup[i].vlanid == requested->vlanid &&
891 l2_lookup[i].destports & BIT(port))
897 /* We want FDB entries added statically through the bridge command to persist
898 * across switch resets, which are a common thing during normal SJA1105
899 * operation. So we have to back them up in the static configuration tables
900 * and hence apply them on next static config upload... yay!
903 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
904 const struct sja1105_l2_lookup_entry *requested,
907 struct sja1105_l2_lookup_entry *l2_lookup;
908 struct sja1105_table *table;
911 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
913 match = sja1105_find_static_fdb_entry(priv, port, requested);
915 /* Can't delete a missing entry. */
919 /* No match => new entry */
920 rc = sja1105_table_resize(table, table->entry_count + 1);
924 match = table->entry_count - 1;
927 /* Assign pointer after the resize (it may be new memory) */
928 l2_lookup = table->entries;
931 * If the job was to add this FDB entry, it's already done (mostly
932 * anyway, since the port forwarding mask may have changed, case in
933 * which we update it).
934 * Otherwise we have to delete it.
937 l2_lookup[match] = *requested;
941 /* To remove, the strategy is to overwrite the element with
942 * the last one, and then reduce the array size by 1
944 l2_lookup[match] = l2_lookup[table->entry_count - 1];
945 return sja1105_table_resize(table, table->entry_count - 1);
948 /* First-generation switches have a 4-way set associative TCAM that
949 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
950 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
951 * For the placement of a newly learnt FDB entry, the switch selects the bin
952 * based on a hash function, and the way within that bin incrementally.
954 static inline int sja1105et_fdb_index(int bin, int way)
956 return bin * SJA1105ET_FDB_BIN_SIZE + way;
959 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
960 const u8 *addr, u16 vid,
961 struct sja1105_l2_lookup_entry *match,
966 for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
967 struct sja1105_l2_lookup_entry l2_lookup = {0};
968 int index = sja1105et_fdb_index(bin, way);
970 /* Skip unused entries, optionally marking them
971 * into the return value
973 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
974 index, &l2_lookup)) {
980 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
981 l2_lookup.vlanid == vid) {
987 /* Return an invalid entry index if not found */
991 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
992 const unsigned char *addr, u16 vid)
994 struct sja1105_l2_lookup_entry l2_lookup = {0};
995 struct sja1105_private *priv = ds->priv;
996 struct device *dev = ds->dev;
997 int last_unused = -1;
1000 bin = sja1105et_fdb_hash(priv, addr, vid);
1002 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1003 &l2_lookup, &last_unused);
1005 /* We have an FDB entry. Is our port in the destination
1006 * mask? If yes, we need to do nothing. If not, we need
1007 * to rewrite the entry by adding this port to it.
1009 if (l2_lookup.destports & BIT(port))
1011 l2_lookup.destports |= BIT(port);
1013 int index = sja1105et_fdb_index(bin, way);
1015 /* We don't have an FDB entry. We construct a new one and
1016 * try to find a place for it within the FDB table.
1018 l2_lookup.macaddr = ether_addr_to_u64(addr);
1019 l2_lookup.destports = BIT(port);
1020 l2_lookup.vlanid = vid;
1022 if (last_unused >= 0) {
1025 /* Bin is full, need to evict somebody.
1026 * Choose victim at random. If you get these messages
1027 * often, you may need to consider changing the
1028 * distribution function:
1029 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1031 get_random_bytes(&way, sizeof(u8));
1032 way %= SJA1105ET_FDB_BIN_SIZE;
1033 dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1036 sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1037 index, NULL, false);
1040 l2_lookup.index = sja1105et_fdb_index(bin, way);
1042 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1043 l2_lookup.index, &l2_lookup,
1048 return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1051 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1052 const unsigned char *addr, u16 vid)
1054 struct sja1105_l2_lookup_entry l2_lookup = {0};
1055 struct sja1105_private *priv = ds->priv;
1056 int index, bin, way, rc;
1059 bin = sja1105et_fdb_hash(priv, addr, vid);
1060 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1064 index = sja1105et_fdb_index(bin, way);
1066 /* We have an FDB entry. Is our port in the destination mask? If yes,
1067 * we need to remove it. If the resulting port mask becomes empty, we
1068 * need to completely evict the FDB entry.
1069 * Otherwise we just write it back.
1071 l2_lookup.destports &= ~BIT(port);
1073 if (l2_lookup.destports)
1078 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1079 index, &l2_lookup, keep);
1083 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1086 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1087 const unsigned char *addr, u16 vid)
1089 struct sja1105_l2_lookup_entry l2_lookup = {0};
1090 struct sja1105_private *priv = ds->priv;
1093 /* Search for an existing entry in the FDB table */
1094 l2_lookup.macaddr = ether_addr_to_u64(addr);
1095 l2_lookup.vlanid = vid;
1096 l2_lookup.iotag = SJA1105_S_TAG;
1097 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1098 if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
1099 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1100 l2_lookup.mask_iotag = BIT(0);
1102 l2_lookup.mask_vlanid = 0;
1103 l2_lookup.mask_iotag = 0;
1105 l2_lookup.destports = BIT(port);
1107 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1108 SJA1105_SEARCH, &l2_lookup);
1110 /* Found and this port is already in the entry's
1111 * port mask => job done
1113 if (l2_lookup.destports & BIT(port))
1115 /* l2_lookup.index is populated by the switch in case it
1118 l2_lookup.destports |= BIT(port);
1119 goto skip_finding_an_index;
1122 /* Not found, so try to find an unused spot in the FDB.
1123 * This is slightly inefficient because the strategy is knock-knock at
1124 * every possible position from 0 to 1023.
1126 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1127 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1132 if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1133 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1136 l2_lookup.lockeds = true;
1137 l2_lookup.index = i;
1139 skip_finding_an_index:
1140 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1141 l2_lookup.index, &l2_lookup,
1146 return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1149 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1150 const unsigned char *addr, u16 vid)
1152 struct sja1105_l2_lookup_entry l2_lookup = {0};
1153 struct sja1105_private *priv = ds->priv;
1157 l2_lookup.macaddr = ether_addr_to_u64(addr);
1158 l2_lookup.vlanid = vid;
1159 l2_lookup.iotag = SJA1105_S_TAG;
1160 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1161 if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
1162 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1163 l2_lookup.mask_iotag = BIT(0);
1165 l2_lookup.mask_vlanid = 0;
1166 l2_lookup.mask_iotag = 0;
1168 l2_lookup.destports = BIT(port);
1170 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1171 SJA1105_SEARCH, &l2_lookup);
1175 l2_lookup.destports &= ~BIT(port);
1177 /* Decide whether we remove just this port from the FDB entry,
1178 * or if we remove it completely.
1180 if (l2_lookup.destports)
1185 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1186 l2_lookup.index, &l2_lookup, keep);
1190 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1193 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1194 const unsigned char *addr, u16 vid)
1196 struct sja1105_private *priv = ds->priv;
1198 /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1199 * so the switch still does some VLAN processing internally.
1200 * But Shared VLAN Learning (SVL) is also active, and it will take
1201 * care of autonomous forwarding between the unique pvid's of each
1202 * port. Here we just make sure that users can't add duplicate FDB
1203 * entries when in this mode - the actual VID doesn't matter except
1204 * for what gets printed in 'bridge fdb show'. In the case of zero,
1205 * no VID gets printed at all.
1207 if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1210 return priv->info->fdb_add_cmd(ds, port, addr, vid);
1213 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1214 const unsigned char *addr, u16 vid)
1216 struct sja1105_private *priv = ds->priv;
1218 if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1221 return priv->info->fdb_del_cmd(ds, port, addr, vid);
1224 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1225 dsa_fdb_dump_cb_t *cb, void *data)
1227 struct sja1105_private *priv = ds->priv;
1228 struct device *dev = ds->dev;
1231 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1232 struct sja1105_l2_lookup_entry l2_lookup = {0};
1233 u8 macaddr[ETH_ALEN];
1236 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1238 /* No fdb entry at i, not an issue */
1242 dev_err(dev, "Failed to dump FDB: %d\n", rc);
1246 /* FDB dump callback is per port. This means we have to
1247 * disregard a valid entry if it's not for this port, even if
1248 * only to revisit it later. This is inefficient because the
1249 * 1024-sized FDB table needs to be traversed 4 times through
1250 * SPI during a 'bridge fdb show' command.
1252 if (!(l2_lookup.destports & BIT(port)))
1254 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1256 /* We need to hide the dsa_8021q VLANs from the user. */
1257 if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1258 l2_lookup.vlanid = 0;
1259 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1264 /* This callback needs to be present */
1265 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port,
1266 const struct switchdev_obj_port_mdb *mdb)
1271 static void sja1105_mdb_add(struct dsa_switch *ds, int port,
1272 const struct switchdev_obj_port_mdb *mdb)
1274 sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1277 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1278 const struct switchdev_obj_port_mdb *mdb)
1280 return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1283 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1284 struct net_device *br, bool member)
1286 struct sja1105_l2_forwarding_entry *l2_fwd;
1287 struct sja1105_private *priv = ds->priv;
1290 l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1292 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1293 /* Add this port to the forwarding matrix of the
1294 * other ports in the same bridge, and viceversa.
1296 if (!dsa_is_user_port(ds, i))
1298 /* For the ports already under the bridge, only one thing needs
1299 * to be done, and that is to add this port to their
1300 * reachability domain. So we can perform the SPI write for
1301 * them immediately. However, for this port itself (the one
1302 * that is new to the bridge), we need to add all other ports
1303 * to its reachability domain. So we do that incrementally in
1304 * this loop, and perform the SPI write only at the end, once
1305 * the domain contains all other bridge ports.
1309 if (dsa_to_port(ds, i)->bridge_dev != br)
1311 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1312 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1314 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1315 i, &l2_fwd[i], true);
1320 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1321 port, &l2_fwd[port], true);
1324 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1327 struct sja1105_private *priv = ds->priv;
1328 struct sja1105_mac_config_entry *mac;
1330 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1333 case BR_STATE_DISABLED:
1334 case BR_STATE_BLOCKING:
1335 /* From UM10944 description of DRPDTAG (why put this there?):
1336 * "Management traffic flows to the port regardless of the state
1337 * of the INGRESS flag". So BPDUs are still be allowed to pass.
1338 * At the moment no difference between DISABLED and BLOCKING.
1340 mac[port].ingress = false;
1341 mac[port].egress = false;
1342 mac[port].dyn_learn = false;
1344 case BR_STATE_LISTENING:
1345 mac[port].ingress = true;
1346 mac[port].egress = false;
1347 mac[port].dyn_learn = false;
1349 case BR_STATE_LEARNING:
1350 mac[port].ingress = true;
1351 mac[port].egress = false;
1352 mac[port].dyn_learn = true;
1354 case BR_STATE_FORWARDING:
1355 mac[port].ingress = true;
1356 mac[port].egress = true;
1357 mac[port].dyn_learn = true;
1360 dev_err(ds->dev, "invalid STP state: %d\n", state);
1364 sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1368 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1369 struct net_device *br)
1371 return sja1105_bridge_member(ds, port, br, true);
1374 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1375 struct net_device *br)
1377 sja1105_bridge_member(ds, port, br, false);
1380 /* For situations where we need to change a setting at runtime that is only
1381 * available through the static configuration, resetting the switch in order
1382 * to upload the new static config is unavoidable. Back up the settings we
1383 * modify at runtime (currently only MAC) and restore them after uploading,
1384 * such that this operation is relatively seamless.
1386 int sja1105_static_config_reload(struct sja1105_private *priv)
1388 struct sja1105_mac_config_entry *mac;
1389 int speed_mbps[SJA1105_NUM_PORTS];
1392 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1394 /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1395 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1396 * switch wants to see in the static config in order to allow us to
1397 * change it through the dynamic interface later.
1399 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1400 speed_mbps[i] = sja1105_speed[mac[i].speed];
1401 mac[i].speed = SJA1105_SPEED_AUTO;
1404 /* Reset switch and send updated static configuration */
1405 rc = sja1105_static_config_upload(priv);
1409 /* Configure the CGU (PLLs) for MII and RMII PHYs.
1410 * For these interfaces there is no dynamic configuration
1411 * needed, since PLLs have same settings at all speeds.
1413 rc = sja1105_clocking_setup(priv);
1417 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1418 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1426 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1428 struct sja1105_mac_config_entry *mac;
1430 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1432 mac[port].vlanid = pvid;
1434 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1438 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
1440 struct sja1105_vlan_lookup_entry *vlan;
1443 vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
1444 count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
1446 for (i = 0; i < count; i++)
1447 if (vlan[i].vlanid == vid)
1450 /* Return an invalid entry index if not found */
1454 static int sja1105_vlan_apply(struct sja1105_private *priv, int port, u16 vid,
1455 bool enabled, bool untagged)
1457 struct sja1105_vlan_lookup_entry *vlan;
1458 struct sja1105_table *table;
1462 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
1464 match = sja1105_is_vlan_configured(priv, vid);
1466 /* Can't delete a missing entry. */
1469 rc = sja1105_table_resize(table, table->entry_count + 1);
1472 match = table->entry_count - 1;
1474 /* Assign pointer after the resize (it's new memory) */
1475 vlan = table->entries;
1476 vlan[match].vlanid = vid;
1478 vlan[match].vlan_bc |= BIT(port);
1479 vlan[match].vmemb_port |= BIT(port);
1481 vlan[match].vlan_bc &= ~BIT(port);
1482 vlan[match].vmemb_port &= ~BIT(port);
1484 /* Also unset tag_port if removing this VLAN was requested,
1485 * just so we don't have a confusing bitmap (no practical purpose).
1487 if (untagged || !enabled)
1488 vlan[match].tag_port &= ~BIT(port);
1490 vlan[match].tag_port |= BIT(port);
1491 /* If there's no port left as member of this VLAN,
1492 * it's time for it to go.
1494 if (!vlan[match].vmemb_port)
1497 dev_dbg(priv->ds->dev,
1498 "%s: port %d, vid %llu, broadcast domain 0x%llx, "
1499 "port members 0x%llx, tagged ports 0x%llx, keep %d\n",
1500 __func__, port, vlan[match].vlanid, vlan[match].vlan_bc,
1501 vlan[match].vmemb_port, vlan[match].tag_port, keep);
1503 rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,
1504 &vlan[match], keep);
1509 return sja1105_table_delete_entry(table, match);
1514 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
1518 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1519 rc = dsa_port_setup_8021q_tagging(ds, i, enabled);
1521 dev_err(ds->dev, "Failed to setup VLAN tagging for port %d: %d\n",
1526 dev_info(ds->dev, "%s switch tagging\n",
1527 enabled ? "Enabled" : "Disabled");
1531 static enum dsa_tag_protocol
1532 sja1105_get_tag_protocol(struct dsa_switch *ds, int port)
1534 return DSA_TAG_PROTO_SJA1105;
1537 /* This callback needs to be present */
1538 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port,
1539 const struct switchdev_obj_port_vlan *vlan)
1544 /* The TPID setting belongs to the General Parameters table,
1545 * which can only be partially reconfigured at runtime (and not the TPID).
1546 * So a switch reset is required.
1548 static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
1550 struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1551 struct sja1105_general_params_entry *general_params;
1552 struct sja1105_private *priv = ds->priv;
1553 struct sja1105_table *table;
1558 /* Enable VLAN filtering. */
1559 tpid = ETH_P_8021AD;
1560 tpid2 = ETH_P_8021Q;
1562 /* Disable VLAN filtering. */
1563 tpid = ETH_P_SJA1105;
1564 tpid2 = ETH_P_SJA1105;
1567 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1568 general_params = table->entries;
1569 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
1570 general_params->tpid = tpid;
1571 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
1572 general_params->tpid2 = tpid2;
1573 /* When VLAN filtering is on, we need to at least be able to
1574 * decode management traffic through the "backup plan".
1576 general_params->incl_srcpt1 = enabled;
1577 general_params->incl_srcpt0 = enabled;
1579 /* VLAN filtering => independent VLAN learning.
1580 * No VLAN filtering => shared VLAN learning.
1582 * In shared VLAN learning mode, untagged traffic still gets
1583 * pvid-tagged, and the FDB table gets populated with entries
1584 * containing the "real" (pvid or from VLAN tag) VLAN ID.
1585 * However the switch performs a masked L2 lookup in the FDB,
1586 * effectively only looking up a frame's DMAC (and not VID) for the
1587 * forwarding decision.
1589 * This is extremely convenient for us, because in modes with
1590 * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
1591 * each front panel port. This is good for identification but breaks
1592 * learning badly - the VID of the learnt FDB entry is unique, aka
1593 * no frames coming from any other port are going to have it. So
1594 * for forwarding purposes, this is as though learning was broken
1595 * (all frames get flooded).
1597 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1598 l2_lookup_params = table->entries;
1599 l2_lookup_params->shared_learn = !enabled;
1601 rc = sja1105_static_config_reload(priv);
1603 dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
1605 /* Switch port identification based on 802.1Q is only passable
1606 * if we are not under a vlan_filtering bridge. So make sure
1607 * the two configurations are mutually exclusive.
1609 return sja1105_setup_8021q_tagging(ds, !enabled);
1612 static void sja1105_vlan_add(struct dsa_switch *ds, int port,
1613 const struct switchdev_obj_port_vlan *vlan)
1615 struct sja1105_private *priv = ds->priv;
1619 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1620 rc = sja1105_vlan_apply(priv, port, vid, true, vlan->flags &
1621 BRIDGE_VLAN_INFO_UNTAGGED);
1623 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
1627 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) {
1628 rc = sja1105_pvid_apply(ds->priv, port, vid);
1630 dev_err(ds->dev, "Failed to set pvid %d on port %d: %d\n",
1638 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
1639 const struct switchdev_obj_port_vlan *vlan)
1641 struct sja1105_private *priv = ds->priv;
1645 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1646 rc = sja1105_vlan_apply(priv, port, vid, false, vlan->flags &
1647 BRIDGE_VLAN_INFO_UNTAGGED);
1649 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
1657 /* The programming model for the SJA1105 switch is "all-at-once" via static
1658 * configuration tables. Some of these can be dynamically modified at runtime,
1659 * but not the xMII mode parameters table.
1660 * Furthermode, some PHYs may not have crystals for generating their clocks
1661 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
1662 * ref_clk pin. So port clocking needs to be initialized early, before
1663 * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
1664 * Setting correct PHY link speed does not matter now.
1665 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
1666 * bindings are not yet parsed by DSA core. We need to parse early so that we
1667 * can populate the xMII mode parameters table.
1669 static int sja1105_setup(struct dsa_switch *ds)
1671 struct sja1105_dt_port ports[SJA1105_NUM_PORTS];
1672 struct sja1105_private *priv = ds->priv;
1675 rc = sja1105_parse_dt(priv, ports);
1677 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
1681 /* Error out early if internal delays are required through DT
1682 * and we can't apply them.
1684 rc = sja1105_parse_rgmii_delays(priv, ports);
1686 dev_err(ds->dev, "RGMII delay not supported\n");
1690 rc = sja1105_ptp_clock_register(priv);
1692 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
1695 /* Create and send configuration down to device */
1696 rc = sja1105_static_config_load(priv, ports);
1698 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
1701 /* Configure the CGU (PHY link modes and speeds) */
1702 rc = sja1105_clocking_setup(priv);
1704 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc);
1707 /* On SJA1105, VLAN filtering per se is always enabled in hardware.
1708 * The only thing we can do to disable it is lie about what the 802.1Q
1710 * So it will still try to apply VLAN filtering, but all ingress
1711 * traffic (except frames received with EtherType of ETH_P_SJA1105)
1712 * will be internally tagged with a distorted VLAN header where the
1713 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
1715 ds->vlan_filtering_is_global = true;
1717 /* Advertise the 8 egress queues */
1718 ds->num_tx_queues = SJA1105_NUM_TC;
1720 /* The DSA/switchdev model brings up switch ports in standalone mode by
1721 * default, and that means vlan_filtering is 0 since they're not under
1722 * a bridge, so it's safe to set up switch tagging at this time.
1724 return sja1105_setup_8021q_tagging(ds, true);
1727 static void sja1105_teardown(struct dsa_switch *ds)
1729 struct sja1105_private *priv = ds->priv;
1731 sja1105_tas_teardown(ds);
1732 cancel_work_sync(&priv->tagger_data.rxtstamp_work);
1733 skb_queue_purge(&priv->tagger_data.skb_rxtstamp_queue);
1734 sja1105_ptp_clock_unregister(priv);
1735 sja1105_static_config_free(&priv->static_config);
1738 static int sja1105_port_enable(struct dsa_switch *ds, int port,
1739 struct phy_device *phy)
1741 struct net_device *slave;
1743 if (!dsa_is_user_port(ds, port))
1746 slave = ds->ports[port].slave;
1748 slave->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
1753 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
1754 struct sk_buff *skb, bool takets)
1756 struct sja1105_mgmt_entry mgmt_route = {0};
1757 struct sja1105_private *priv = ds->priv;
1764 mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
1765 mgmt_route.destports = BIT(port);
1766 mgmt_route.enfport = 1;
1767 mgmt_route.tsreg = 0;
1768 mgmt_route.takets = takets;
1770 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1771 slot, &mgmt_route, true);
1777 /* Transfer skb to the host port. */
1778 dsa_enqueue_skb(skb, ds->ports[port].slave);
1780 /* Wait until the switch has processed the frame */
1782 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
1785 dev_err_ratelimited(priv->ds->dev,
1786 "failed to poll for mgmt route\n");
1790 /* UM10944: The ENFPORT flag of the respective entry is
1791 * cleared when a match is found. The host can use this
1792 * flag as an acknowledgment.
1795 } while (mgmt_route.enfport && --timeout);
1798 /* Clean up the management route so that a follow-up
1799 * frame may not match on it by mistake.
1800 * This is only hardware supported on P/Q/R/S - on E/T it is
1801 * a no-op and we are silently discarding the -EOPNOTSUPP.
1803 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1804 slot, &mgmt_route, false);
1805 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
1808 return NETDEV_TX_OK;
1811 /* Deferred work is unfortunately necessary because setting up the management
1812 * route cannot be done from atomit context (SPI transfer takes a sleepable
1815 static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port,
1816 struct sk_buff *skb)
1818 struct sja1105_private *priv = ds->priv;
1819 struct sja1105_port *sp = &priv->ports[port];
1820 struct skb_shared_hwtstamps shwt = {0};
1821 int slot = sp->mgmt_slot;
1822 struct sk_buff *clone;
1826 /* The tragic fact about the switch having 4x2 slots for installing
1827 * management routes is that all of them except one are actually
1829 * If 2 slots are simultaneously configured for two BPDUs sent to the
1830 * same (multicast) DMAC but on different egress ports, the switch
1831 * would confuse them and redirect first frame it receives on the CPU
1832 * port towards the port configured on the numerically first slot
1833 * (therefore wrong port), then second received frame on second slot
1834 * (also wrong port).
1835 * So for all practical purposes, there needs to be a lock that
1836 * prevents that from happening. The slot used here is utterly useless
1837 * (could have simply been 0 just as fine), but we are doing it
1838 * nonetheless, in case a smarter idea ever comes up in the future.
1840 mutex_lock(&priv->mgmt_lock);
1842 /* The clone, if there, was made by dsa_skb_tx_timestamp */
1843 clone = DSA_SKB_CB(skb)->clone;
1845 sja1105_mgmt_xmit(ds, port, slot, skb, !!clone);
1850 skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
1852 mutex_lock(&priv->ptp_lock);
1854 now = priv->tstamp_cc.read(&priv->tstamp_cc);
1856 rc = sja1105_ptpegr_ts_poll(priv, slot, &ts);
1858 dev_err(ds->dev, "xmit: timed out polling for tstamp\n");
1860 goto out_unlock_ptp;
1863 ts = sja1105_tstamp_reconstruct(priv, now, ts);
1864 ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
1866 shwt.hwtstamp = ns_to_ktime(ts);
1867 skb_complete_tx_timestamp(clone, &shwt);
1870 mutex_unlock(&priv->ptp_lock);
1872 mutex_unlock(&priv->mgmt_lock);
1873 return NETDEV_TX_OK;
1876 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
1877 * which cannot be reconfigured at runtime. So a switch reset is required.
1879 static int sja1105_set_ageing_time(struct dsa_switch *ds,
1880 unsigned int ageing_time)
1882 struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1883 struct sja1105_private *priv = ds->priv;
1884 struct sja1105_table *table;
1885 unsigned int maxage;
1887 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1888 l2_lookup_params = table->entries;
1890 maxage = SJA1105_AGEING_TIME_MS(ageing_time);
1892 if (l2_lookup_params->maxage == maxage)
1895 l2_lookup_params->maxage = maxage;
1897 return sja1105_static_config_reload(priv);
1900 /* Caller must hold priv->tagger_data.meta_lock */
1901 static int sja1105_change_rxtstamping(struct sja1105_private *priv,
1904 struct sja1105_general_params_entry *general_params;
1905 struct sja1105_table *table;
1908 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1909 general_params = table->entries;
1910 general_params->send_meta1 = on;
1911 general_params->send_meta0 = on;
1913 rc = sja1105_init_avb_params(priv, on);
1917 /* Initialize the meta state machine to a known state */
1918 if (priv->tagger_data.stampable_skb) {
1919 kfree_skb(priv->tagger_data.stampable_skb);
1920 priv->tagger_data.stampable_skb = NULL;
1923 return sja1105_static_config_reload(priv);
1926 static int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,
1929 struct sja1105_private *priv = ds->priv;
1930 struct hwtstamp_config config;
1934 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1937 switch (config.tx_type) {
1938 case HWTSTAMP_TX_OFF:
1939 priv->ports[port].hwts_tx_en = false;
1941 case HWTSTAMP_TX_ON:
1942 priv->ports[port].hwts_tx_en = true;
1948 switch (config.rx_filter) {
1949 case HWTSTAMP_FILTER_NONE:
1957 if (rx_on != priv->tagger_data.hwts_rx_en) {
1958 spin_lock(&priv->tagger_data.meta_lock);
1959 rc = sja1105_change_rxtstamping(priv, rx_on);
1960 spin_unlock(&priv->tagger_data.meta_lock);
1963 "Failed to change RX timestamping: %d\n", rc);
1966 priv->tagger_data.hwts_rx_en = rx_on;
1969 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
1974 static int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,
1977 struct sja1105_private *priv = ds->priv;
1978 struct hwtstamp_config config;
1981 if (priv->ports[port].hwts_tx_en)
1982 config.tx_type = HWTSTAMP_TX_ON;
1984 config.tx_type = HWTSTAMP_TX_OFF;
1985 if (priv->tagger_data.hwts_rx_en)
1986 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
1988 config.rx_filter = HWTSTAMP_FILTER_NONE;
1990 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1994 #define to_tagger(d) \
1995 container_of((d), struct sja1105_tagger_data, rxtstamp_work)
1996 #define to_sja1105(d) \
1997 container_of((d), struct sja1105_private, tagger_data)
1999 static void sja1105_rxtstamp_work(struct work_struct *work)
2001 struct sja1105_tagger_data *data = to_tagger(work);
2002 struct sja1105_private *priv = to_sja1105(data);
2003 struct sk_buff *skb;
2006 mutex_lock(&priv->ptp_lock);
2008 while ((skb = skb_dequeue(&data->skb_rxtstamp_queue)) != NULL) {
2009 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
2012 now = priv->tstamp_cc.read(&priv->tstamp_cc);
2014 *shwt = (struct skb_shared_hwtstamps) {0};
2016 ts = SJA1105_SKB_CB(skb)->meta_tstamp;
2017 ts = sja1105_tstamp_reconstruct(priv, now, ts);
2018 ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
2020 shwt->hwtstamp = ns_to_ktime(ts);
2024 mutex_unlock(&priv->ptp_lock);
2027 /* Called from dsa_skb_defer_rx_timestamp */
2028 static bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,
2029 struct sk_buff *skb, unsigned int type)
2031 struct sja1105_private *priv = ds->priv;
2032 struct sja1105_tagger_data *data = &priv->tagger_data;
2034 if (!data->hwts_rx_en)
2037 /* We need to read the full PTP clock to reconstruct the Rx
2038 * timestamp. For that we need a sleepable context.
2040 skb_queue_tail(&data->skb_rxtstamp_queue, skb);
2041 schedule_work(&data->rxtstamp_work);
2045 /* Called from dsa_skb_tx_timestamp. This callback is just to make DSA clone
2046 * the skb and have it available in DSA_SKB_CB in the .port_deferred_xmit
2047 * callback, where we will timestamp it synchronously.
2049 static bool sja1105_port_txtstamp(struct dsa_switch *ds, int port,
2050 struct sk_buff *skb, unsigned int type)
2052 struct sja1105_private *priv = ds->priv;
2053 struct sja1105_port *sp = &priv->ports[port];
2055 if (!sp->hwts_tx_en)
2061 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
2062 enum tc_setup_type type,
2066 case TC_SETUP_QDISC_TAPRIO:
2067 return sja1105_setup_tc_taprio(ds, port, type_data);
2073 static const struct dsa_switch_ops sja1105_switch_ops = {
2074 .get_tag_protocol = sja1105_get_tag_protocol,
2075 .setup = sja1105_setup,
2076 .teardown = sja1105_teardown,
2077 .set_ageing_time = sja1105_set_ageing_time,
2078 .phylink_validate = sja1105_phylink_validate,
2079 .phylink_mac_config = sja1105_mac_config,
2080 .phylink_mac_link_up = sja1105_mac_link_up,
2081 .phylink_mac_link_down = sja1105_mac_link_down,
2082 .get_strings = sja1105_get_strings,
2083 .get_ethtool_stats = sja1105_get_ethtool_stats,
2084 .get_sset_count = sja1105_get_sset_count,
2085 .get_ts_info = sja1105_get_ts_info,
2086 .port_enable = sja1105_port_enable,
2087 .port_fdb_dump = sja1105_fdb_dump,
2088 .port_fdb_add = sja1105_fdb_add,
2089 .port_fdb_del = sja1105_fdb_del,
2090 .port_bridge_join = sja1105_bridge_join,
2091 .port_bridge_leave = sja1105_bridge_leave,
2092 .port_stp_state_set = sja1105_bridge_stp_state_set,
2093 .port_vlan_prepare = sja1105_vlan_prepare,
2094 .port_vlan_filtering = sja1105_vlan_filtering,
2095 .port_vlan_add = sja1105_vlan_add,
2096 .port_vlan_del = sja1105_vlan_del,
2097 .port_mdb_prepare = sja1105_mdb_prepare,
2098 .port_mdb_add = sja1105_mdb_add,
2099 .port_mdb_del = sja1105_mdb_del,
2100 .port_deferred_xmit = sja1105_port_deferred_xmit,
2101 .port_hwtstamp_get = sja1105_hwtstamp_get,
2102 .port_hwtstamp_set = sja1105_hwtstamp_set,
2103 .port_rxtstamp = sja1105_port_rxtstamp,
2104 .port_txtstamp = sja1105_port_txtstamp,
2105 .port_setup_tc = sja1105_port_setup_tc,
2108 static int sja1105_check_device_id(struct sja1105_private *priv)
2110 const struct sja1105_regs *regs = priv->info->regs;
2111 u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
2112 struct device *dev = &priv->spidev->dev;
2117 rc = sja1105_spi_send_int(priv, SPI_READ, regs->device_id,
2118 &device_id, SJA1105_SIZE_DEVICE_ID);
2122 if (device_id != priv->info->device_id) {
2123 dev_err(dev, "Expected device ID 0x%llx but read 0x%llx\n",
2124 priv->info->device_id, device_id);
2128 rc = sja1105_spi_send_packed_buf(priv, SPI_READ, regs->prod_id,
2129 prod_id, SJA1105_SIZE_DEVICE_ID);
2133 sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
2135 if (part_no != priv->info->part_no) {
2136 dev_err(dev, "Expected part number 0x%llx but read 0x%llx\n",
2137 priv->info->part_no, part_no);
2144 static int sja1105_probe(struct spi_device *spi)
2146 struct sja1105_tagger_data *tagger_data;
2147 struct device *dev = &spi->dev;
2148 struct sja1105_private *priv;
2149 struct dsa_switch *ds;
2152 if (!dev->of_node) {
2153 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
2157 priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
2161 /* Configure the optional reset pin and bring up switch */
2162 priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
2163 if (IS_ERR(priv->reset_gpio))
2164 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
2166 sja1105_hw_reset(priv->reset_gpio, 1, 1);
2168 /* Populate our driver private structure (priv) based on
2169 * the device tree node that was probed (spi)
2172 spi_set_drvdata(spi, priv);
2174 /* Configure the SPI bus */
2175 spi->bits_per_word = 8;
2176 rc = spi_setup(spi);
2178 dev_err(dev, "Could not init SPI\n");
2182 priv->info = of_device_get_match_data(dev);
2184 /* Detect hardware device */
2185 rc = sja1105_check_device_id(priv);
2187 dev_err(dev, "Device ID check failed: %d\n", rc);
2191 dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
2193 ds = dsa_switch_alloc(dev, SJA1105_NUM_PORTS);
2197 ds->ops = &sja1105_switch_ops;
2201 tagger_data = &priv->tagger_data;
2202 skb_queue_head_init(&tagger_data->skb_rxtstamp_queue);
2203 INIT_WORK(&tagger_data->rxtstamp_work, sja1105_rxtstamp_work);
2204 spin_lock_init(&tagger_data->meta_lock);
2206 /* Connections between dsa_port and sja1105_port */
2207 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
2208 struct sja1105_port *sp = &priv->ports[i];
2210 ds->ports[i].priv = sp;
2211 sp->dp = &ds->ports[i];
2212 sp->data = tagger_data;
2214 mutex_init(&priv->mgmt_lock);
2216 sja1105_tas_setup(ds);
2218 return dsa_register_switch(priv->ds);
2221 static int sja1105_remove(struct spi_device *spi)
2223 struct sja1105_private *priv = spi_get_drvdata(spi);
2225 dsa_unregister_switch(priv->ds);
2229 static const struct of_device_id sja1105_dt_ids[] = {
2230 { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
2231 { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
2232 { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
2233 { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
2234 { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
2235 { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
2238 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
2240 static struct spi_driver sja1105_driver = {
2243 .owner = THIS_MODULE,
2244 .of_match_table = of_match_ptr(sja1105_dt_ids),
2246 .probe = sja1105_probe,
2247 .remove = sja1105_remove,
2250 module_spi_driver(sja1105_driver);
2252 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
2253 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
2254 MODULE_DESCRIPTION("SJA1105 Driver");
2255 MODULE_LICENSE("GPL v2");