1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019-2021 NXP
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
8 #include <uapi/linux/if_bridge.h>
9 #include <soc/mscc/ocelot_vcap.h>
10 #include <soc/mscc/ocelot_qsys.h>
11 #include <soc/mscc/ocelot_sys.h>
12 #include <soc/mscc/ocelot_dev.h>
13 #include <soc/mscc/ocelot_ana.h>
14 #include <soc/mscc/ocelot_ptp.h>
15 #include <soc/mscc/ocelot.h>
16 #include <linux/dsa/8021q.h>
17 #include <linux/dsa/ocelot.h>
18 #include <linux/platform_device.h>
19 #include <linux/ptp_classify.h>
20 #include <linux/module.h>
21 #include <linux/of_net.h>
22 #include <linux/pci.h>
24 #include <net/pkt_sched.h>
28 /* Translate the DSA database API into the ocelot switch library API,
29 * which uses VID 0 for all ports that aren't part of a bridge,
30 * and expects the bridge_dev to be NULL in that case.
32 static struct net_device *felix_classify_db(struct dsa_db db)
41 return ERR_PTR(-EOPNOTSUPP);
45 /* We are called before felix_npi_port_init(), so ocelot->npi is -1. */
46 static int felix_migrate_fdbs_to_npi_port(struct dsa_switch *ds, int port,
47 const unsigned char *addr, u16 vid,
50 struct net_device *bridge_dev = felix_classify_db(db);
51 struct ocelot *ocelot = ds->priv;
52 int cpu = ocelot->num_phys_ports;
55 err = ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
59 return ocelot_fdb_add(ocelot, cpu, addr, vid, bridge_dev);
62 static int felix_migrate_mdbs_to_npi_port(struct dsa_switch *ds, int port,
63 const unsigned char *addr, u16 vid,
66 struct net_device *bridge_dev = felix_classify_db(db);
67 struct switchdev_obj_port_mdb mdb;
68 struct ocelot *ocelot = ds->priv;
69 int cpu = ocelot->num_phys_ports;
72 memset(&mdb, 0, sizeof(mdb));
73 ether_addr_copy(mdb.addr, addr);
76 err = ocelot_port_mdb_del(ocelot, port, &mdb, bridge_dev);
80 return ocelot_port_mdb_add(ocelot, cpu, &mdb, bridge_dev);
83 static void felix_migrate_pgid_bit(struct dsa_switch *ds, int from, int to,
86 struct ocelot *ocelot = ds->priv;
90 val = ocelot_read_rix(ocelot, ANA_PGID_PGID, pgid);
91 on = !!(val & BIT(from));
98 ocelot_write_rix(ocelot, val, ANA_PGID_PGID, pgid);
101 static void felix_migrate_flood_to_npi_port(struct dsa_switch *ds, int port)
103 struct ocelot *ocelot = ds->priv;
105 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_UC);
106 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_MC);
107 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_BC);
111 felix_migrate_flood_to_tag_8021q_port(struct dsa_switch *ds, int port)
113 struct ocelot *ocelot = ds->priv;
115 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_UC);
116 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_MC);
117 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_BC);
120 /* ocelot->npi was already set to -1 by felix_npi_port_deinit, so
121 * ocelot_fdb_add() will not redirect FDB entries towards the
122 * CPU port module here, which is what we want.
125 felix_migrate_fdbs_to_tag_8021q_port(struct dsa_switch *ds, int port,
126 const unsigned char *addr, u16 vid,
129 struct net_device *bridge_dev = felix_classify_db(db);
130 struct ocelot *ocelot = ds->priv;
131 int cpu = ocelot->num_phys_ports;
134 err = ocelot_fdb_del(ocelot, cpu, addr, vid, bridge_dev);
138 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
142 felix_migrate_mdbs_to_tag_8021q_port(struct dsa_switch *ds, int port,
143 const unsigned char *addr, u16 vid,
146 struct net_device *bridge_dev = felix_classify_db(db);
147 struct switchdev_obj_port_mdb mdb;
148 struct ocelot *ocelot = ds->priv;
149 int cpu = ocelot->num_phys_ports;
152 memset(&mdb, 0, sizeof(mdb));
153 ether_addr_copy(mdb.addr, addr);
156 err = ocelot_port_mdb_del(ocelot, cpu, &mdb, bridge_dev);
160 return ocelot_port_mdb_add(ocelot, port, &mdb, bridge_dev);
163 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
164 * the tagger can perform RX source port identification.
166 static int felix_tag_8021q_vlan_add_rx(struct felix *felix, int port, u16 vid)
168 struct ocelot_vcap_filter *outer_tagging_rule;
169 struct ocelot *ocelot = &felix->ocelot;
170 struct dsa_switch *ds = felix->ds;
171 int key_length, upstream, err;
173 key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
174 upstream = dsa_upstream_port(ds, port);
176 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
178 if (!outer_tagging_rule)
181 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
182 outer_tagging_rule->prio = 1;
183 outer_tagging_rule->id.cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port);
184 outer_tagging_rule->id.tc_offload = false;
185 outer_tagging_rule->block_id = VCAP_ES0;
186 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
187 outer_tagging_rule->lookup = 0;
188 outer_tagging_rule->ingress_port.value = port;
189 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
190 outer_tagging_rule->egress_port.value = upstream;
191 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
192 outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
193 outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
194 outer_tagging_rule->action.tag_a_vid_sel = 1;
195 outer_tagging_rule->action.vid_a_val = vid;
197 err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
199 kfree(outer_tagging_rule);
204 static int felix_tag_8021q_vlan_del_rx(struct felix *felix, int port, u16 vid)
206 struct ocelot_vcap_filter *outer_tagging_rule;
207 struct ocelot_vcap_block *block_vcap_es0;
208 struct ocelot *ocelot = &felix->ocelot;
210 block_vcap_es0 = &ocelot->block[VCAP_ES0];
212 outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
214 if (!outer_tagging_rule)
217 return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
220 /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
221 * rules for steering those tagged packets towards the correct destination port
223 static int felix_tag_8021q_vlan_add_tx(struct felix *felix, int port, u16 vid)
225 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
226 struct ocelot *ocelot = &felix->ocelot;
227 struct dsa_switch *ds = felix->ds;
230 untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
234 redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
235 if (!redirect_rule) {
236 kfree(untagging_rule);
240 upstream = dsa_upstream_port(ds, port);
242 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
243 untagging_rule->ingress_port_mask = BIT(upstream);
244 untagging_rule->vlan.vid.value = vid;
245 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
246 untagging_rule->prio = 1;
247 untagging_rule->id.cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
248 untagging_rule->id.tc_offload = false;
249 untagging_rule->block_id = VCAP_IS1;
250 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
251 untagging_rule->lookup = 0;
252 untagging_rule->action.vlan_pop_cnt_ena = true;
253 untagging_rule->action.vlan_pop_cnt = 1;
254 untagging_rule->action.pag_override_mask = 0xff;
255 untagging_rule->action.pag_val = port;
257 err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
259 kfree(untagging_rule);
260 kfree(redirect_rule);
264 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
265 redirect_rule->ingress_port_mask = BIT(upstream);
266 redirect_rule->pag = port;
267 redirect_rule->prio = 1;
268 redirect_rule->id.cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
269 redirect_rule->id.tc_offload = false;
270 redirect_rule->block_id = VCAP_IS2;
271 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
272 redirect_rule->lookup = 0;
273 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
274 redirect_rule->action.port_mask = BIT(port);
276 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
278 ocelot_vcap_filter_del(ocelot, untagging_rule);
279 kfree(redirect_rule);
286 static int felix_tag_8021q_vlan_del_tx(struct felix *felix, int port, u16 vid)
288 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
289 struct ocelot_vcap_block *block_vcap_is1;
290 struct ocelot_vcap_block *block_vcap_is2;
291 struct ocelot *ocelot = &felix->ocelot;
294 block_vcap_is1 = &ocelot->block[VCAP_IS1];
295 block_vcap_is2 = &ocelot->block[VCAP_IS2];
297 untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
302 err = ocelot_vcap_filter_del(ocelot, untagging_rule);
306 redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
311 return ocelot_vcap_filter_del(ocelot, redirect_rule);
314 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
317 struct ocelot *ocelot = ds->priv;
320 /* tag_8021q.c assumes we are implementing this via port VLAN
321 * membership, which we aren't. So we don't need to add any VCAP filter
324 if (!dsa_is_user_port(ds, port))
327 err = felix_tag_8021q_vlan_add_rx(ocelot_to_felix(ocelot), port, vid);
331 err = felix_tag_8021q_vlan_add_tx(ocelot_to_felix(ocelot), port, vid);
333 felix_tag_8021q_vlan_del_rx(ocelot_to_felix(ocelot), port, vid);
340 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
342 struct ocelot *ocelot = ds->priv;
345 if (!dsa_is_user_port(ds, port))
348 err = felix_tag_8021q_vlan_del_rx(ocelot_to_felix(ocelot), port, vid);
352 err = felix_tag_8021q_vlan_del_tx(ocelot_to_felix(ocelot), port, vid);
354 felix_tag_8021q_vlan_add_rx(ocelot_to_felix(ocelot), port, vid);
361 /* Alternatively to using the NPI functionality, that same hardware MAC
362 * connected internally to the enetc or fman DSA master can be configured to
363 * use the software-defined tag_8021q frame format. As far as the hardware is
364 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
365 * module are now disconnected from it, but can still be accessed through
366 * register-based MMIO.
368 static void felix_8021q_cpu_port_init(struct ocelot *ocelot, int port)
370 mutex_lock(&ocelot->fwd_domain_lock);
372 ocelot_port_set_dsa_8021q_cpu(ocelot, port);
374 /* Overwrite PGID_CPU with the non-tagging port */
375 ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, PGID_CPU);
377 ocelot_apply_bridge_fwd_mask(ocelot, true);
379 mutex_unlock(&ocelot->fwd_domain_lock);
382 static void felix_8021q_cpu_port_deinit(struct ocelot *ocelot, int port)
384 mutex_lock(&ocelot->fwd_domain_lock);
386 ocelot->ports[port]->is_dsa_8021q_cpu = false;
387 ocelot_port_unset_dsa_8021q_cpu(ocelot, port);
389 /* Restore PGID_CPU */
390 ocelot_write_rix(ocelot, BIT(ocelot->num_phys_ports), ANA_PGID_PGID,
393 ocelot_apply_bridge_fwd_mask(ocelot, true);
395 mutex_unlock(&ocelot->fwd_domain_lock);
398 /* On switches with no extraction IRQ wired, trapped packets need to be
399 * replicated over Ethernet as well, otherwise we'd get no notification of
400 * their arrival when using the ocelot-8021q tagging protocol.
402 static int felix_update_trapping_destinations(struct dsa_switch *ds,
403 bool using_tag_8021q)
405 struct ocelot *ocelot = ds->priv;
406 struct felix *felix = ocelot_to_felix(ocelot);
407 struct ocelot_vcap_filter *trap;
408 enum ocelot_mask_mode mask_mode;
409 unsigned long port_mask;
414 if (!felix->info->quirk_no_xtr_irq)
417 /* Figure out the current CPU port */
418 dsa_switch_for_each_cpu_port(dp, ds) {
423 /* We are sure that "cpu" was found, otherwise
424 * dsa_tree_setup_default_cpu() would have failed earlier.
427 /* Make sure all traps are set up for that destination */
428 list_for_each_entry(trap, &ocelot->traps, trap_list) {
429 /* Figure out the current trapping destination */
430 if (using_tag_8021q) {
431 /* Redirect to the tag_8021q CPU port. If timestamps
432 * are necessary, also copy trapped packets to the CPU
435 mask_mode = OCELOT_MASK_MODE_REDIRECT;
436 port_mask = BIT(cpu);
437 cpu_copy_ena = !!trap->take_ts;
439 /* Trap packets only to the CPU port module, which is
440 * redirected to the NPI port (the DSA CPU port)
442 mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
447 if (trap->action.mask_mode == mask_mode &&
448 trap->action.port_mask == port_mask &&
449 trap->action.cpu_copy_ena == cpu_copy_ena)
452 trap->action.mask_mode = mask_mode;
453 trap->action.port_mask = port_mask;
454 trap->action.cpu_copy_ena = cpu_copy_ena;
456 err = ocelot_vcap_filter_replace(ocelot, trap);
464 static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu, bool change)
466 struct ocelot *ocelot = ds->priv;
470 felix_8021q_cpu_port_init(ocelot, cpu);
472 dsa_switch_for_each_available_port(dp, ds) {
473 /* This overwrites ocelot_init():
474 * Do not forward BPDU frames to the CPU port module,
476 * - When these packets are injected from the tag_8021q
477 * CPU port, we want them to go out, not loop back
479 * - STP traffic ingressing on a user port should go to
480 * the tag_8021q CPU port, not to the hardware CPU
483 ocelot_write_gix(ocelot,
484 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
485 ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
488 err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
493 err = dsa_port_walk_fdbs(ds, cpu,
494 felix_migrate_fdbs_to_tag_8021q_port);
496 goto out_tag_8021q_unregister;
498 err = dsa_port_walk_mdbs(ds, cpu,
499 felix_migrate_mdbs_to_tag_8021q_port);
501 goto out_migrate_fdbs;
503 felix_migrate_flood_to_tag_8021q_port(ds, cpu);
506 err = felix_update_trapping_destinations(ds, true);
508 goto out_migrate_flood;
510 /* The ownership of the CPU port module's queues might have just been
511 * transferred to the tag_8021q tagger from the NPI-based tagger.
512 * So there might still be all sorts of crap in the queues. On the
513 * other hand, the MMIO-based matching of PTP frames is very brittle,
514 * so we need to be careful that there are no extra frames to be
515 * dequeued over MMIO, since we would never know to discard them.
517 ocelot_drain_cpu_queue(ocelot, 0);
523 felix_migrate_flood_to_npi_port(ds, cpu);
525 dsa_port_walk_mdbs(ds, cpu, felix_migrate_mdbs_to_npi_port);
528 dsa_port_walk_fdbs(ds, cpu, felix_migrate_fdbs_to_npi_port);
529 out_tag_8021q_unregister:
530 dsa_tag_8021q_unregister(ds);
534 static void felix_teardown_tag_8021q(struct dsa_switch *ds, int cpu)
536 struct ocelot *ocelot = ds->priv;
540 err = felix_update_trapping_destinations(ds, false);
542 dev_err(ds->dev, "felix_teardown_mmio_filtering returned %d",
545 dsa_tag_8021q_unregister(ds);
547 dsa_switch_for_each_available_port(dp, ds) {
548 /* Restore the logic from ocelot_init:
549 * do not forward BPDU frames to the front ports.
551 ocelot_write_gix(ocelot,
552 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
553 ANA_PORT_CPU_FWD_BPDU_CFG,
557 felix_8021q_cpu_port_deinit(ocelot, cpu);
560 /* The CPU port module is connected to the Node Processor Interface (NPI). This
561 * is the mode through which frames can be injected from and extracted to an
562 * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
563 * running Linux, and this forms a DSA setup together with the enetc or fman
566 static void felix_npi_port_init(struct ocelot *ocelot, int port)
570 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
571 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
574 /* NPI port Injection/Extraction configuration */
575 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
576 ocelot->npi_xtr_prefix);
577 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
578 ocelot->npi_inj_prefix);
580 /* Disable transmission of pause frames */
581 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
584 static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
586 /* Restore hardware defaults */
587 int unused_port = ocelot->num_phys_ports + 2;
591 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
594 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
595 OCELOT_TAG_PREFIX_DISABLED);
596 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
597 OCELOT_TAG_PREFIX_DISABLED);
599 /* Enable transmission of pause frames */
600 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
603 static int felix_setup_tag_npi(struct dsa_switch *ds, int cpu, bool change)
605 struct ocelot *ocelot = ds->priv;
609 err = dsa_port_walk_fdbs(ds, cpu,
610 felix_migrate_fdbs_to_npi_port);
614 err = dsa_port_walk_mdbs(ds, cpu,
615 felix_migrate_mdbs_to_npi_port);
617 goto out_migrate_fdbs;
619 felix_migrate_flood_to_npi_port(ds, cpu);
622 felix_npi_port_init(ocelot, cpu);
628 dsa_port_walk_fdbs(ds, cpu,
629 felix_migrate_fdbs_to_tag_8021q_port);
634 static void felix_teardown_tag_npi(struct dsa_switch *ds, int cpu)
636 struct ocelot *ocelot = ds->priv;
638 felix_npi_port_deinit(ocelot, cpu);
641 static int felix_set_tag_protocol(struct dsa_switch *ds, int cpu,
642 enum dsa_tag_protocol proto, bool change)
647 case DSA_TAG_PROTO_SEVILLE:
648 case DSA_TAG_PROTO_OCELOT:
649 err = felix_setup_tag_npi(ds, cpu, change);
651 case DSA_TAG_PROTO_OCELOT_8021Q:
652 err = felix_setup_tag_8021q(ds, cpu, change);
655 err = -EPROTONOSUPPORT;
661 static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu,
662 enum dsa_tag_protocol proto)
665 case DSA_TAG_PROTO_SEVILLE:
666 case DSA_TAG_PROTO_OCELOT:
667 felix_teardown_tag_npi(ds, cpu);
669 case DSA_TAG_PROTO_OCELOT_8021Q:
670 felix_teardown_tag_8021q(ds, cpu);
677 /* This always leaves the switch in a consistent state, because although the
678 * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
679 * or the restoration is guaranteed to work.
681 static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu,
682 enum dsa_tag_protocol proto)
684 struct ocelot *ocelot = ds->priv;
685 struct felix *felix = ocelot_to_felix(ocelot);
686 enum dsa_tag_protocol old_proto = felix->tag_proto;
689 if (proto != DSA_TAG_PROTO_SEVILLE &&
690 proto != DSA_TAG_PROTO_OCELOT &&
691 proto != DSA_TAG_PROTO_OCELOT_8021Q)
692 return -EPROTONOSUPPORT;
694 felix_del_tag_protocol(ds, cpu, old_proto);
696 err = felix_set_tag_protocol(ds, cpu, proto, true);
698 felix_set_tag_protocol(ds, cpu, old_proto, true);
702 felix->tag_proto = proto;
707 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
709 enum dsa_tag_protocol mp)
711 struct ocelot *ocelot = ds->priv;
712 struct felix *felix = ocelot_to_felix(ocelot);
714 return felix->tag_proto;
717 static int felix_set_ageing_time(struct dsa_switch *ds,
718 unsigned int ageing_time)
720 struct ocelot *ocelot = ds->priv;
722 ocelot_set_ageing_time(ocelot, ageing_time);
727 static void felix_port_fast_age(struct dsa_switch *ds, int port)
729 struct ocelot *ocelot = ds->priv;
732 err = ocelot_mact_flush(ocelot, port);
734 dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
738 static int felix_fdb_dump(struct dsa_switch *ds, int port,
739 dsa_fdb_dump_cb_t *cb, void *data)
741 struct ocelot *ocelot = ds->priv;
743 return ocelot_fdb_dump(ocelot, port, cb, data);
746 static int felix_fdb_add(struct dsa_switch *ds, int port,
747 const unsigned char *addr, u16 vid,
750 struct net_device *bridge_dev = felix_classify_db(db);
751 struct ocelot *ocelot = ds->priv;
753 if (IS_ERR(bridge_dev))
754 return PTR_ERR(bridge_dev);
756 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
759 static int felix_fdb_del(struct dsa_switch *ds, int port,
760 const unsigned char *addr, u16 vid,
763 struct net_device *bridge_dev = felix_classify_db(db);
764 struct ocelot *ocelot = ds->priv;
766 if (IS_ERR(bridge_dev))
767 return PTR_ERR(bridge_dev);
769 return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
772 static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
773 const unsigned char *addr, u16 vid,
776 struct net_device *bridge_dev = felix_classify_db(db);
777 struct ocelot *ocelot = ds->priv;
779 if (IS_ERR(bridge_dev))
780 return PTR_ERR(bridge_dev);
782 return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
785 static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
786 const unsigned char *addr, u16 vid,
789 struct net_device *bridge_dev = felix_classify_db(db);
790 struct ocelot *ocelot = ds->priv;
792 if (IS_ERR(bridge_dev))
793 return PTR_ERR(bridge_dev);
795 return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
798 static int felix_mdb_add(struct dsa_switch *ds, int port,
799 const struct switchdev_obj_port_mdb *mdb,
802 struct net_device *bridge_dev = felix_classify_db(db);
803 struct ocelot *ocelot = ds->priv;
805 if (IS_ERR(bridge_dev))
806 return PTR_ERR(bridge_dev);
808 return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
811 static int felix_mdb_del(struct dsa_switch *ds, int port,
812 const struct switchdev_obj_port_mdb *mdb,
815 struct net_device *bridge_dev = felix_classify_db(db);
816 struct ocelot *ocelot = ds->priv;
818 if (IS_ERR(bridge_dev))
819 return PTR_ERR(bridge_dev);
821 return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
824 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
827 struct ocelot *ocelot = ds->priv;
829 return ocelot_bridge_stp_state_set(ocelot, port, state);
832 static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
833 struct switchdev_brport_flags val,
834 struct netlink_ext_ack *extack)
836 struct ocelot *ocelot = ds->priv;
838 return ocelot_port_pre_bridge_flags(ocelot, port, val);
841 static int felix_bridge_flags(struct dsa_switch *ds, int port,
842 struct switchdev_brport_flags val,
843 struct netlink_ext_ack *extack)
845 struct ocelot *ocelot = ds->priv;
847 ocelot_port_bridge_flags(ocelot, port, val);
852 static int felix_bridge_join(struct dsa_switch *ds, int port,
853 struct dsa_bridge bridge, bool *tx_fwd_offload,
854 struct netlink_ext_ack *extack)
856 struct ocelot *ocelot = ds->priv;
858 return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
862 static void felix_bridge_leave(struct dsa_switch *ds, int port,
863 struct dsa_bridge bridge)
865 struct ocelot *ocelot = ds->priv;
867 ocelot_port_bridge_leave(ocelot, port, bridge.dev);
870 static int felix_lag_join(struct dsa_switch *ds, int port,
872 struct netdev_lag_upper_info *info)
874 struct ocelot *ocelot = ds->priv;
876 return ocelot_port_lag_join(ocelot, port, lag.dev, info);
879 static int felix_lag_leave(struct dsa_switch *ds, int port,
882 struct ocelot *ocelot = ds->priv;
884 ocelot_port_lag_leave(ocelot, port, lag.dev);
889 static int felix_lag_change(struct dsa_switch *ds, int port)
891 struct dsa_port *dp = dsa_to_port(ds, port);
892 struct ocelot *ocelot = ds->priv;
894 ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
899 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
900 const struct switchdev_obj_port_vlan *vlan,
901 struct netlink_ext_ack *extack)
903 struct ocelot *ocelot = ds->priv;
904 u16 flags = vlan->flags;
906 /* Ocelot switches copy frames as-is to the CPU, so the flags:
907 * egress-untagged or not, pvid or not, make no difference. This
908 * behavior is already better than what DSA just tries to approximate
909 * when it installs the VLAN with the same flags on the CPU port.
910 * Just accept any configuration, and don't let ocelot deny installing
911 * multiple native VLANs on the NPI port, because the switch doesn't
912 * look at the port tag settings towards the NPI interface anyway.
914 if (port == ocelot->npi)
917 return ocelot_vlan_prepare(ocelot, port, vlan->vid,
918 flags & BRIDGE_VLAN_INFO_PVID,
919 flags & BRIDGE_VLAN_INFO_UNTAGGED,
923 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
924 struct netlink_ext_ack *extack)
926 struct ocelot *ocelot = ds->priv;
928 return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
931 static int felix_vlan_add(struct dsa_switch *ds, int port,
932 const struct switchdev_obj_port_vlan *vlan,
933 struct netlink_ext_ack *extack)
935 struct ocelot *ocelot = ds->priv;
936 u16 flags = vlan->flags;
939 err = felix_vlan_prepare(ds, port, vlan, extack);
943 return ocelot_vlan_add(ocelot, port, vlan->vid,
944 flags & BRIDGE_VLAN_INFO_PVID,
945 flags & BRIDGE_VLAN_INFO_UNTAGGED);
948 static int felix_vlan_del(struct dsa_switch *ds, int port,
949 const struct switchdev_obj_port_vlan *vlan)
951 struct ocelot *ocelot = ds->priv;
953 return ocelot_vlan_del(ocelot, port, vlan->vid);
956 static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
957 struct phylink_config *config)
959 struct ocelot *ocelot = ds->priv;
961 /* This driver does not make use of the speed, duplex, pause or the
962 * advertisement in its mac_config, so it is safe to mark this driver
965 config->legacy_pre_march2020 = false;
967 __set_bit(ocelot->ports[port]->phy_mode,
968 config->supported_interfaces);
971 static void felix_phylink_validate(struct dsa_switch *ds, int port,
972 unsigned long *supported,
973 struct phylink_link_state *state)
975 struct ocelot *ocelot = ds->priv;
976 struct felix *felix = ocelot_to_felix(ocelot);
978 if (felix->info->phylink_validate)
979 felix->info->phylink_validate(ocelot, port, supported, state);
982 static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
984 phy_interface_t iface)
986 struct ocelot *ocelot = ds->priv;
987 struct felix *felix = ocelot_to_felix(ocelot);
988 struct phylink_pcs *pcs = NULL;
990 if (felix->pcs && felix->pcs[port])
991 pcs = felix->pcs[port];
996 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
997 unsigned int link_an_mode,
998 phy_interface_t interface)
1000 struct ocelot *ocelot = ds->priv;
1002 ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
1006 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
1007 unsigned int link_an_mode,
1008 phy_interface_t interface,
1009 struct phy_device *phydev,
1010 int speed, int duplex,
1011 bool tx_pause, bool rx_pause)
1013 struct ocelot *ocelot = ds->priv;
1014 struct felix *felix = ocelot_to_felix(ocelot);
1016 ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
1017 interface, speed, duplex, tx_pause, rx_pause,
1020 if (felix->info->port_sched_speed_set)
1021 felix->info->port_sched_speed_set(ocelot, port, speed);
1024 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
1028 ocelot_rmw_gix(ocelot,
1029 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1030 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1034 for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
1035 ocelot_rmw_ix(ocelot,
1036 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
1037 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
1038 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
1039 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
1040 ANA_PORT_PCP_DEI_MAP,
1045 static void felix_get_strings(struct dsa_switch *ds, int port,
1046 u32 stringset, u8 *data)
1048 struct ocelot *ocelot = ds->priv;
1050 return ocelot_get_strings(ocelot, port, stringset, data);
1053 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
1055 struct ocelot *ocelot = ds->priv;
1057 ocelot_get_ethtool_stats(ocelot, port, data);
1060 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
1062 struct ocelot *ocelot = ds->priv;
1064 return ocelot_get_sset_count(ocelot, port, sset);
1067 static int felix_get_ts_info(struct dsa_switch *ds, int port,
1068 struct ethtool_ts_info *info)
1070 struct ocelot *ocelot = ds->priv;
1072 return ocelot_get_ts_info(ocelot, port, info);
1075 static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
1076 [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
1077 [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
1078 [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
1079 [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
1080 [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
1083 static int felix_validate_phy_mode(struct felix *felix, int port,
1084 phy_interface_t phy_mode)
1086 u32 modes = felix->info->port_modes[port];
1088 if (felix_phy_match_table[phy_mode] & modes)
1093 static int felix_parse_ports_node(struct felix *felix,
1094 struct device_node *ports_node,
1095 phy_interface_t *port_phy_modes)
1097 struct device *dev = felix->ocelot.dev;
1098 struct device_node *child;
1100 for_each_available_child_of_node(ports_node, child) {
1101 phy_interface_t phy_mode;
1105 /* Get switch port number from DT */
1106 if (of_property_read_u32(child, "reg", &port) < 0) {
1107 dev_err(dev, "Port number not defined in device tree "
1108 "(property \"reg\")\n");
1113 /* Get PHY mode from DT */
1114 err = of_get_phy_mode(child, &phy_mode);
1116 dev_err(dev, "Failed to read phy-mode or "
1117 "phy-interface-type property for port %d\n",
1123 err = felix_validate_phy_mode(felix, port, phy_mode);
1125 dev_err(dev, "Unsupported PHY mode %s on port %d\n",
1126 phy_modes(phy_mode), port);
1131 port_phy_modes[port] = phy_mode;
1137 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
1139 struct device *dev = felix->ocelot.dev;
1140 struct device_node *switch_node;
1141 struct device_node *ports_node;
1144 switch_node = dev->of_node;
1146 ports_node = of_get_child_by_name(switch_node, "ports");
1148 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1150 dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
1154 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
1155 of_node_put(ports_node);
1160 static int felix_init_structs(struct felix *felix, int num_phys_ports)
1162 struct ocelot *ocelot = &felix->ocelot;
1163 phy_interface_t *port_phy_modes;
1164 struct resource res;
1167 ocelot->num_phys_ports = num_phys_ports;
1168 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
1169 sizeof(struct ocelot_port *), GFP_KERNEL);
1173 ocelot->map = felix->info->map;
1174 ocelot->stats_layout = felix->info->stats_layout;
1175 ocelot->num_stats = felix->info->num_stats;
1176 ocelot->num_mact_rows = felix->info->num_mact_rows;
1177 ocelot->vcap = felix->info->vcap;
1178 ocelot->vcap_pol.base = felix->info->vcap_pol_base;
1179 ocelot->vcap_pol.max = felix->info->vcap_pol_max;
1180 ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
1181 ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
1182 ocelot->ops = felix->info->ops;
1183 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
1184 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
1185 ocelot->devlink = felix->ds->devlink;
1187 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1189 if (!port_phy_modes)
1192 err = felix_parse_dt(felix, port_phy_modes);
1194 kfree(port_phy_modes);
1198 for (i = 0; i < TARGET_MAX; i++) {
1199 struct regmap *target;
1201 if (!felix->info->target_io_res[i].name)
1204 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
1205 res.flags = IORESOURCE_MEM;
1206 res.start += felix->switch_base;
1207 res.end += felix->switch_base;
1209 target = felix->info->init_regmap(ocelot, &res);
1210 if (IS_ERR(target)) {
1211 dev_err(ocelot->dev,
1212 "Failed to map device memory space\n");
1213 kfree(port_phy_modes);
1214 return PTR_ERR(target);
1217 ocelot->targets[i] = target;
1220 err = ocelot_regfields_init(ocelot, felix->info->regfields);
1222 dev_err(ocelot->dev, "failed to init reg fields map\n");
1223 kfree(port_phy_modes);
1227 for (port = 0; port < num_phys_ports; port++) {
1228 struct ocelot_port *ocelot_port;
1229 struct regmap *target;
1231 ocelot_port = devm_kzalloc(ocelot->dev,
1232 sizeof(struct ocelot_port),
1235 dev_err(ocelot->dev,
1236 "failed to allocate port memory\n");
1237 kfree(port_phy_modes);
1241 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
1242 res.flags = IORESOURCE_MEM;
1243 res.start += felix->switch_base;
1244 res.end += felix->switch_base;
1246 target = felix->info->init_regmap(ocelot, &res);
1247 if (IS_ERR(target)) {
1248 dev_err(ocelot->dev,
1249 "Failed to map memory space for port %d\n",
1251 kfree(port_phy_modes);
1252 return PTR_ERR(target);
1255 ocelot_port->phy_mode = port_phy_modes[port];
1256 ocelot_port->ocelot = ocelot;
1257 ocelot_port->target = target;
1258 ocelot->ports[port] = ocelot_port;
1261 kfree(port_phy_modes);
1263 if (felix->info->mdio_bus_alloc) {
1264 err = felix->info->mdio_bus_alloc(ocelot);
1272 static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
1273 struct sk_buff *skb)
1275 struct ocelot_port *ocelot_port = ocelot->ports[port];
1276 struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
1277 struct sk_buff *skb_match = NULL, *skb_tmp;
1278 unsigned long flags;
1283 spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
1285 skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
1288 __skb_unlink(skb, &ocelot_port->tx_skbs);
1293 spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
1295 WARN_ONCE(!skb_match,
1296 "Could not find skb clone in TX timestamping list\n");
1299 #define work_to_xmit_work(w) \
1300 container_of((w), struct felix_deferred_xmit_work, work)
1302 static void felix_port_deferred_xmit(struct kthread_work *work)
1304 struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
1305 struct dsa_switch *ds = xmit_work->dp->ds;
1306 struct sk_buff *skb = xmit_work->skb;
1307 u32 rew_op = ocelot_ptp_rew_op(skb);
1308 struct ocelot *ocelot = ds->priv;
1309 int port = xmit_work->dp->index;
1313 if (ocelot_can_inject(ocelot, 0))
1317 } while (--retries);
1320 dev_err(ocelot->dev, "port %d failed to inject skb\n",
1322 ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
1327 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1333 static int felix_connect_tag_protocol(struct dsa_switch *ds,
1334 enum dsa_tag_protocol proto)
1336 struct ocelot_8021q_tagger_data *tagger_data;
1339 case DSA_TAG_PROTO_OCELOT_8021Q:
1340 tagger_data = ocelot_8021q_tagger_data(ds);
1341 tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1343 case DSA_TAG_PROTO_OCELOT:
1344 case DSA_TAG_PROTO_SEVILLE:
1347 return -EPROTONOSUPPORT;
1351 /* Hardware initialization done here so that we can allocate structures with
1352 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1353 * us to allocate structures twice (leak memory) and map PCI memory twice
1354 * (which will not work).
1356 static int felix_setup(struct dsa_switch *ds)
1358 struct ocelot *ocelot = ds->priv;
1359 struct felix *felix = ocelot_to_felix(ocelot);
1360 struct dsa_port *dp;
1363 err = felix_init_structs(felix, ds->num_ports);
1367 err = ocelot_init(ocelot);
1369 goto out_mdiobus_free;
1372 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1374 dev_err(ocelot->dev,
1375 "Timestamp initialization failed\n");
1380 dsa_switch_for_each_available_port(dp, ds) {
1381 ocelot_init_port(ocelot, dp->index);
1383 /* Set the default QoS Classification based on PCP and DEI
1386 felix_port_qos_map_init(ocelot, dp->index);
1389 err = ocelot_devlink_sb_register(ocelot);
1391 goto out_deinit_ports;
1393 dsa_switch_for_each_cpu_port(dp, ds) {
1394 /* The initial tag protocol is NPI which always returns 0, so
1395 * there's no real point in checking for errors.
1397 felix_set_tag_protocol(ds, dp->index, felix->tag_proto, false);
1401 ds->mtu_enforcement_ingress = true;
1402 ds->assisted_learning_on_cpu_port = true;
1403 ds->fdb_isolation = true;
1404 ds->max_num_bridges = ds->num_ports;
1409 dsa_switch_for_each_available_port(dp, ds)
1410 ocelot_deinit_port(ocelot, dp->index);
1412 ocelot_deinit_timestamp(ocelot);
1413 ocelot_deinit(ocelot);
1416 if (felix->info->mdio_bus_free)
1417 felix->info->mdio_bus_free(ocelot);
1422 static void felix_teardown(struct dsa_switch *ds)
1424 struct ocelot *ocelot = ds->priv;
1425 struct felix *felix = ocelot_to_felix(ocelot);
1426 struct dsa_port *dp;
1428 dsa_switch_for_each_cpu_port(dp, ds) {
1429 felix_del_tag_protocol(ds, dp->index, felix->tag_proto);
1433 dsa_switch_for_each_available_port(dp, ds)
1434 ocelot_deinit_port(ocelot, dp->index);
1436 ocelot_devlink_sb_unregister(ocelot);
1437 ocelot_deinit_timestamp(ocelot);
1438 ocelot_deinit(ocelot);
1440 if (felix->info->mdio_bus_free)
1441 felix->info->mdio_bus_free(ocelot);
1444 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
1447 struct ocelot *ocelot = ds->priv;
1449 return ocelot_hwstamp_get(ocelot, port, ifr);
1452 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
1455 struct ocelot *ocelot = ds->priv;
1456 struct felix *felix = ocelot_to_felix(ocelot);
1457 bool using_tag_8021q;
1460 err = ocelot_hwstamp_set(ocelot, port, ifr);
1464 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1466 return felix_update_trapping_destinations(ds, using_tag_8021q);
1469 static bool felix_check_xtr_pkt(struct ocelot *ocelot)
1471 struct felix *felix = ocelot_to_felix(ocelot);
1474 if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
1477 if (!felix->info->quirk_no_xtr_irq)
1480 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
1481 struct sk_buff *skb;
1484 err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
1488 /* We trap to the CPU port module all PTP frames, but
1489 * felix_rxtstamp() only gets called for event frames.
1490 * So we need to avoid sending duplicate general
1491 * message frames by running a second BPF classifier
1492 * here and dropping those.
1494 __skb_push(skb, ETH_HLEN);
1496 type = ptp_classify_raw(skb);
1498 __skb_pull(skb, ETH_HLEN);
1500 if (type == PTP_CLASS_NONE) {
1510 ocelot_drain_cpu_queue(ocelot, 0);
1515 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
1516 struct sk_buff *skb, unsigned int type)
1518 u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
1519 struct skb_shared_hwtstamps *shhwtstamps;
1520 struct ocelot *ocelot = ds->priv;
1521 struct timespec64 ts;
1525 /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1526 * for RX timestamping. Then free it, and poll for its copy through
1527 * MMIO in the CPU port module, and inject that into the stack from
1528 * ocelot_xtr_poll().
1530 if (felix_check_xtr_pkt(ocelot)) {
1535 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1536 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1538 tstamp_hi = tstamp >> 32;
1539 if ((tstamp & 0xffffffff) < tstamp_lo)
1542 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
1544 shhwtstamps = skb_hwtstamps(skb);
1545 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1546 shhwtstamps->hwtstamp = tstamp;
1550 static void felix_txtstamp(struct dsa_switch *ds, int port,
1551 struct sk_buff *skb)
1553 struct ocelot *ocelot = ds->priv;
1554 struct sk_buff *clone = NULL;
1559 if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
1560 dev_err_ratelimited(ds->dev,
1561 "port %d delivering skb without TX timestamp\n",
1567 OCELOT_SKB_CB(skb)->clone = clone;
1570 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
1572 struct ocelot *ocelot = ds->priv;
1574 ocelot_port_set_maxlen(ocelot, port, new_mtu);
1579 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
1581 struct ocelot *ocelot = ds->priv;
1583 return ocelot_get_max_mtu(ocelot, port);
1586 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
1587 struct flow_cls_offload *cls, bool ingress)
1589 struct ocelot *ocelot = ds->priv;
1590 struct felix *felix = ocelot_to_felix(ocelot);
1591 bool using_tag_8021q;
1594 err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
1598 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1600 return felix_update_trapping_destinations(ds, using_tag_8021q);
1603 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
1604 struct flow_cls_offload *cls, bool ingress)
1606 struct ocelot *ocelot = ds->priv;
1608 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
1611 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
1612 struct flow_cls_offload *cls, bool ingress)
1614 struct ocelot *ocelot = ds->priv;
1616 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
1619 static int felix_port_policer_add(struct dsa_switch *ds, int port,
1620 struct dsa_mall_policer_tc_entry *policer)
1622 struct ocelot *ocelot = ds->priv;
1623 struct ocelot_policer pol = {
1624 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
1625 .burst = policer->burst,
1628 return ocelot_port_policer_add(ocelot, port, &pol);
1631 static void felix_port_policer_del(struct dsa_switch *ds, int port)
1633 struct ocelot *ocelot = ds->priv;
1635 ocelot_port_policer_del(ocelot, port);
1638 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
1639 enum tc_setup_type type,
1642 struct ocelot *ocelot = ds->priv;
1643 struct felix *felix = ocelot_to_felix(ocelot);
1645 if (felix->info->port_setup_tc)
1646 return felix->info->port_setup_tc(ds, port, type, type_data);
1651 static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
1653 struct devlink_sb_pool_info *pool_info)
1655 struct ocelot *ocelot = ds->priv;
1657 return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
1660 static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
1661 u16 pool_index, u32 size,
1662 enum devlink_sb_threshold_type threshold_type,
1663 struct netlink_ext_ack *extack)
1665 struct ocelot *ocelot = ds->priv;
1667 return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
1668 threshold_type, extack);
1671 static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
1672 unsigned int sb_index, u16 pool_index,
1675 struct ocelot *ocelot = ds->priv;
1677 return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
1681 static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
1682 unsigned int sb_index, u16 pool_index,
1683 u32 threshold, struct netlink_ext_ack *extack)
1685 struct ocelot *ocelot = ds->priv;
1687 return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
1691 static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
1692 unsigned int sb_index, u16 tc_index,
1693 enum devlink_sb_pool_type pool_type,
1694 u16 *p_pool_index, u32 *p_threshold)
1696 struct ocelot *ocelot = ds->priv;
1698 return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
1699 pool_type, p_pool_index,
1703 static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
1704 unsigned int sb_index, u16 tc_index,
1705 enum devlink_sb_pool_type pool_type,
1706 u16 pool_index, u32 threshold,
1707 struct netlink_ext_ack *extack)
1709 struct ocelot *ocelot = ds->priv;
1711 return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
1712 pool_type, pool_index, threshold,
1716 static int felix_sb_occ_snapshot(struct dsa_switch *ds,
1717 unsigned int sb_index)
1719 struct ocelot *ocelot = ds->priv;
1721 return ocelot_sb_occ_snapshot(ocelot, sb_index);
1724 static int felix_sb_occ_max_clear(struct dsa_switch *ds,
1725 unsigned int sb_index)
1727 struct ocelot *ocelot = ds->priv;
1729 return ocelot_sb_occ_max_clear(ocelot, sb_index);
1732 static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
1733 unsigned int sb_index, u16 pool_index,
1734 u32 *p_cur, u32 *p_max)
1736 struct ocelot *ocelot = ds->priv;
1738 return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
1742 static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
1743 unsigned int sb_index, u16 tc_index,
1744 enum devlink_sb_pool_type pool_type,
1745 u32 *p_cur, u32 *p_max)
1747 struct ocelot *ocelot = ds->priv;
1749 return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
1750 pool_type, p_cur, p_max);
1753 static int felix_mrp_add(struct dsa_switch *ds, int port,
1754 const struct switchdev_obj_mrp *mrp)
1756 struct ocelot *ocelot = ds->priv;
1758 return ocelot_mrp_add(ocelot, port, mrp);
1761 static int felix_mrp_del(struct dsa_switch *ds, int port,
1762 const struct switchdev_obj_mrp *mrp)
1764 struct ocelot *ocelot = ds->priv;
1766 return ocelot_mrp_add(ocelot, port, mrp);
1770 felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
1771 const struct switchdev_obj_ring_role_mrp *mrp)
1773 struct ocelot *ocelot = ds->priv;
1775 return ocelot_mrp_add_ring_role(ocelot, port, mrp);
1779 felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
1780 const struct switchdev_obj_ring_role_mrp *mrp)
1782 struct ocelot *ocelot = ds->priv;
1784 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
1787 const struct dsa_switch_ops felix_switch_ops = {
1788 .get_tag_protocol = felix_get_tag_protocol,
1789 .change_tag_protocol = felix_change_tag_protocol,
1790 .connect_tag_protocol = felix_connect_tag_protocol,
1791 .setup = felix_setup,
1792 .teardown = felix_teardown,
1793 .set_ageing_time = felix_set_ageing_time,
1794 .get_strings = felix_get_strings,
1795 .get_ethtool_stats = felix_get_ethtool_stats,
1796 .get_sset_count = felix_get_sset_count,
1797 .get_ts_info = felix_get_ts_info,
1798 .phylink_get_caps = felix_phylink_get_caps,
1799 .phylink_validate = felix_phylink_validate,
1800 .phylink_mac_select_pcs = felix_phylink_mac_select_pcs,
1801 .phylink_mac_link_down = felix_phylink_mac_link_down,
1802 .phylink_mac_link_up = felix_phylink_mac_link_up,
1803 .port_fast_age = felix_port_fast_age,
1804 .port_fdb_dump = felix_fdb_dump,
1805 .port_fdb_add = felix_fdb_add,
1806 .port_fdb_del = felix_fdb_del,
1807 .lag_fdb_add = felix_lag_fdb_add,
1808 .lag_fdb_del = felix_lag_fdb_del,
1809 .port_mdb_add = felix_mdb_add,
1810 .port_mdb_del = felix_mdb_del,
1811 .port_pre_bridge_flags = felix_pre_bridge_flags,
1812 .port_bridge_flags = felix_bridge_flags,
1813 .port_bridge_join = felix_bridge_join,
1814 .port_bridge_leave = felix_bridge_leave,
1815 .port_lag_join = felix_lag_join,
1816 .port_lag_leave = felix_lag_leave,
1817 .port_lag_change = felix_lag_change,
1818 .port_stp_state_set = felix_bridge_stp_state_set,
1819 .port_vlan_filtering = felix_vlan_filtering,
1820 .port_vlan_add = felix_vlan_add,
1821 .port_vlan_del = felix_vlan_del,
1822 .port_hwtstamp_get = felix_hwtstamp_get,
1823 .port_hwtstamp_set = felix_hwtstamp_set,
1824 .port_rxtstamp = felix_rxtstamp,
1825 .port_txtstamp = felix_txtstamp,
1826 .port_change_mtu = felix_change_mtu,
1827 .port_max_mtu = felix_get_max_mtu,
1828 .port_policer_add = felix_port_policer_add,
1829 .port_policer_del = felix_port_policer_del,
1830 .cls_flower_add = felix_cls_flower_add,
1831 .cls_flower_del = felix_cls_flower_del,
1832 .cls_flower_stats = felix_cls_flower_stats,
1833 .port_setup_tc = felix_port_setup_tc,
1834 .devlink_sb_pool_get = felix_sb_pool_get,
1835 .devlink_sb_pool_set = felix_sb_pool_set,
1836 .devlink_sb_port_pool_get = felix_sb_port_pool_get,
1837 .devlink_sb_port_pool_set = felix_sb_port_pool_set,
1838 .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
1839 .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
1840 .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
1841 .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
1842 .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
1843 .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
1844 .port_mrp_add = felix_mrp_add,
1845 .port_mrp_del = felix_mrp_del,
1846 .port_mrp_add_ring_role = felix_mrp_add_ring_role,
1847 .port_mrp_del_ring_role = felix_mrp_del_ring_role,
1848 .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
1849 .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
1852 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
1854 struct felix *felix = ocelot_to_felix(ocelot);
1855 struct dsa_switch *ds = felix->ds;
1857 if (!dsa_is_user_port(ds, port))
1860 return dsa_to_port(ds, port)->slave;
1863 int felix_netdev_to_port(struct net_device *dev)
1865 struct dsa_port *dp;
1867 dp = dsa_port_from_netdev(dev);