2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/crc32.h>
31 #include <linux/mii.h>
32 #include <linux/ethtool.h>
33 #include <linux/dm9000.h>
34 #include <linux/delay.h>
35 #include <linux/platform_device.h>
36 #include <linux/irq.h>
37 #include <linux/slab.h>
39 #include <asm/delay.h>
45 /* Board/System/Debug information/definition ---------------- */
47 #define DM9000_PHY 0x40 /* PHY address 0x01 */
49 #define CARDNAME "dm9000"
50 #define DRV_VERSION "1.31"
53 * Transmit timeout, default 5 seconds.
55 static int watchdog = 5000;
56 module_param(watchdog, int, 0400);
57 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
59 /* DM9000 register address locking.
61 * The DM9000 uses an address register to control where data written
62 * to the data register goes. This means that the address register
63 * must be preserved over interrupts or similar calls.
65 * During interrupt and other critical calls, a spinlock is used to
66 * protect the system, but the calls themselves save the address
67 * in the address register in case they are interrupting another
68 * access to the device.
70 * For general accesses a lock is provided so that calls which are
71 * allowed to sleep are serialised so that the address register does
72 * not need to be saved. This lock also serves to serialise access
73 * to the EEPROM and PHY access registers which are shared between
77 /* The driver supports the original DM9000E, and now the two newer
78 * devices, DM9000A and DM9000B.
82 TYPE_DM9000E, /* original DM9000 */
87 /* Structure/enum declaration ------------------------------- */
88 typedef struct board_info {
90 void __iomem *io_addr; /* Register I/O base address */
91 void __iomem *io_data; /* Data I/O address */
99 u8 io_mode; /* 0:word, 2:byte */
104 unsigned int in_suspend :1;
105 unsigned int wake_supported :1;
108 enum dm9000_type type;
110 void (*inblk)(void __iomem *port, void *data, int length);
111 void (*outblk)(void __iomem *port, void *data, int length);
112 void (*dumpblk)(void __iomem *port, int length);
114 struct device *dev; /* parent device */
116 struct resource *addr_res; /* resources found */
117 struct resource *data_res;
118 struct resource *addr_req; /* resources requested */
119 struct resource *data_req;
120 struct resource *irq_res;
124 struct mutex addr_lock; /* phy and eeprom access lock */
126 struct delayed_work phy_poll;
127 struct net_device *ndev;
131 struct mii_if_info mii;
140 #define dm9000_dbg(db, lev, msg...) do { \
141 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
142 (lev) < db->debug_level) { \
143 dev_dbg(db->dev, msg); \
147 static inline board_info_t *to_dm9000_board(struct net_device *dev)
149 return netdev_priv(dev);
152 /* DM9000 network board routine ---------------------------- */
155 dm9000_reset(board_info_t * db)
157 dev_dbg(db->dev, "resetting device\n");
160 writeb(DM9000_NCR, db->io_addr);
162 writeb(NCR_RST, db->io_data);
167 * Read a byte from I/O port
170 ior(board_info_t * db, int reg)
172 writeb(reg, db->io_addr);
173 return readb(db->io_data);
177 * Write a byte to I/O port
181 iow(board_info_t * db, int reg, int value)
183 writeb(reg, db->io_addr);
184 writeb(value, db->io_data);
187 /* routines for sending block to chip */
189 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
191 writesb(reg, data, count);
194 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
196 writesw(reg, data, (count+1) >> 1);
199 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
201 writesl(reg, data, (count+3) >> 2);
204 /* input block from chip to memory */
206 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
208 readsb(reg, data, count);
212 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
214 readsw(reg, data, (count+1) >> 1);
217 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
219 readsl(reg, data, (count+3) >> 2);
222 /* dump block from chip to null */
224 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
229 for (i = 0; i < count; i++)
233 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
238 count = (count + 1) >> 1;
240 for (i = 0; i < count; i++)
244 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
249 count = (count + 3) >> 2;
251 for (i = 0; i < count; i++)
257 * select the specified set of io routines to use with the
261 static void dm9000_set_io(struct board_info *db, int byte_width)
263 /* use the size of the data resource to work out what IO
264 * routines we want to use
267 switch (byte_width) {
269 db->dumpblk = dm9000_dumpblk_8bit;
270 db->outblk = dm9000_outblk_8bit;
271 db->inblk = dm9000_inblk_8bit;
276 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
278 db->dumpblk = dm9000_dumpblk_16bit;
279 db->outblk = dm9000_outblk_16bit;
280 db->inblk = dm9000_inblk_16bit;
285 db->dumpblk = dm9000_dumpblk_32bit;
286 db->outblk = dm9000_outblk_32bit;
287 db->inblk = dm9000_inblk_32bit;
292 static void dm9000_schedule_poll(board_info_t *db)
294 if (db->type == TYPE_DM9000E)
295 schedule_delayed_work(&db->phy_poll, HZ * 2);
298 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
300 board_info_t *dm = to_dm9000_board(dev);
302 if (!netif_running(dev))
305 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
309 dm9000_read_locked(board_info_t *db, int reg)
314 spin_lock_irqsave(&db->lock, flags);
316 spin_unlock_irqrestore(&db->lock, flags);
321 static int dm9000_wait_eeprom(board_info_t *db)
324 int timeout = 8; /* wait max 8msec */
326 /* The DM9000 data sheets say we should be able to
327 * poll the ERRE bit in EPCR to wait for the EEPROM
328 * operation. From testing several chips, this bit
329 * does not seem to work.
331 * We attempt to use the bit, but fall back to the
332 * timeout (which is why we do not return an error
333 * on expiry) to say that the EEPROM operation has
338 status = dm9000_read_locked(db, DM9000_EPCR);
340 if ((status & EPCR_ERRE) == 0)
346 dev_dbg(db->dev, "timeout waiting EEPROM\n");
355 * Read a word data from EEPROM
358 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
362 if (db->flags & DM9000_PLATF_NO_EEPROM) {
368 mutex_lock(&db->addr_lock);
370 spin_lock_irqsave(&db->lock, flags);
372 iow(db, DM9000_EPAR, offset);
373 iow(db, DM9000_EPCR, EPCR_ERPRR);
375 spin_unlock_irqrestore(&db->lock, flags);
377 dm9000_wait_eeprom(db);
379 /* delay for at-least 150uS */
382 spin_lock_irqsave(&db->lock, flags);
384 iow(db, DM9000_EPCR, 0x0);
386 to[0] = ior(db, DM9000_EPDRL);
387 to[1] = ior(db, DM9000_EPDRH);
389 spin_unlock_irqrestore(&db->lock, flags);
391 mutex_unlock(&db->addr_lock);
395 * Write a word data to SROM
398 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
402 if (db->flags & DM9000_PLATF_NO_EEPROM)
405 mutex_lock(&db->addr_lock);
407 spin_lock_irqsave(&db->lock, flags);
408 iow(db, DM9000_EPAR, offset);
409 iow(db, DM9000_EPDRH, data[1]);
410 iow(db, DM9000_EPDRL, data[0]);
411 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
412 spin_unlock_irqrestore(&db->lock, flags);
414 dm9000_wait_eeprom(db);
416 mdelay(1); /* wait at least 150uS to clear */
418 spin_lock_irqsave(&db->lock, flags);
419 iow(db, DM9000_EPCR, 0);
420 spin_unlock_irqrestore(&db->lock, flags);
422 mutex_unlock(&db->addr_lock);
427 static void dm9000_get_drvinfo(struct net_device *dev,
428 struct ethtool_drvinfo *info)
430 board_info_t *dm = to_dm9000_board(dev);
432 strcpy(info->driver, CARDNAME);
433 strcpy(info->version, DRV_VERSION);
434 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
437 static u32 dm9000_get_msglevel(struct net_device *dev)
439 board_info_t *dm = to_dm9000_board(dev);
441 return dm->msg_enable;
444 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
446 board_info_t *dm = to_dm9000_board(dev);
448 dm->msg_enable = value;
451 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
453 board_info_t *dm = to_dm9000_board(dev);
455 mii_ethtool_gset(&dm->mii, cmd);
459 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
461 board_info_t *dm = to_dm9000_board(dev);
463 return mii_ethtool_sset(&dm->mii, cmd);
466 static int dm9000_nway_reset(struct net_device *dev)
468 board_info_t *dm = to_dm9000_board(dev);
469 return mii_nway_restart(&dm->mii);
472 static int dm9000_set_features(struct net_device *dev, u32 features)
474 board_info_t *dm = to_dm9000_board(dev);
475 u32 changed = dev->features ^ features;
478 if (!(changed & NETIF_F_RXCSUM))
481 spin_lock_irqsave(&dm->lock, flags);
482 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
483 spin_unlock_irqrestore(&dm->lock, flags);
488 static u32 dm9000_get_link(struct net_device *dev)
490 board_info_t *dm = to_dm9000_board(dev);
493 if (dm->flags & DM9000_PLATF_EXT_PHY)
494 ret = mii_link_ok(&dm->mii);
496 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
501 #define DM_EEPROM_MAGIC (0x444D394B)
503 static int dm9000_get_eeprom_len(struct net_device *dev)
508 static int dm9000_get_eeprom(struct net_device *dev,
509 struct ethtool_eeprom *ee, u8 *data)
511 board_info_t *dm = to_dm9000_board(dev);
512 int offset = ee->offset;
516 /* EEPROM access is aligned to two bytes */
518 if ((len & 1) != 0 || (offset & 1) != 0)
521 if (dm->flags & DM9000_PLATF_NO_EEPROM)
524 ee->magic = DM_EEPROM_MAGIC;
526 for (i = 0; i < len; i += 2)
527 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
532 static int dm9000_set_eeprom(struct net_device *dev,
533 struct ethtool_eeprom *ee, u8 *data)
535 board_info_t *dm = to_dm9000_board(dev);
536 int offset = ee->offset;
540 /* EEPROM access is aligned to two bytes */
542 if ((len & 1) != 0 || (offset & 1) != 0)
545 if (dm->flags & DM9000_PLATF_NO_EEPROM)
548 if (ee->magic != DM_EEPROM_MAGIC)
551 for (i = 0; i < len; i += 2)
552 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
557 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
559 board_info_t *dm = to_dm9000_board(dev);
561 memset(w, 0, sizeof(struct ethtool_wolinfo));
563 /* note, we could probably support wake-phy too */
564 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
565 w->wolopts = dm->wake_state;
568 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
570 board_info_t *dm = to_dm9000_board(dev);
572 u32 opts = w->wolopts;
575 if (!dm->wake_supported)
578 if (opts & ~WAKE_MAGIC)
581 if (opts & WAKE_MAGIC)
584 mutex_lock(&dm->addr_lock);
586 spin_lock_irqsave(&dm->lock, flags);
587 iow(dm, DM9000_WCR, wcr);
588 spin_unlock_irqrestore(&dm->lock, flags);
590 mutex_unlock(&dm->addr_lock);
592 if (dm->wake_state != opts) {
593 /* change in wol state, update IRQ state */
596 irq_set_irq_wake(dm->irq_wake, 1);
597 else if (dm->wake_state & !opts)
598 irq_set_irq_wake(dm->irq_wake, 0);
601 dm->wake_state = opts;
605 static const struct ethtool_ops dm9000_ethtool_ops = {
606 .get_drvinfo = dm9000_get_drvinfo,
607 .get_settings = dm9000_get_settings,
608 .set_settings = dm9000_set_settings,
609 .get_msglevel = dm9000_get_msglevel,
610 .set_msglevel = dm9000_set_msglevel,
611 .nway_reset = dm9000_nway_reset,
612 .get_link = dm9000_get_link,
613 .get_wol = dm9000_get_wol,
614 .set_wol = dm9000_set_wol,
615 .get_eeprom_len = dm9000_get_eeprom_len,
616 .get_eeprom = dm9000_get_eeprom,
617 .set_eeprom = dm9000_set_eeprom,
620 static void dm9000_show_carrier(board_info_t *db,
621 unsigned carrier, unsigned nsr)
623 struct net_device *ndev = db->ndev;
624 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
627 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
628 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
629 (ncr & NCR_FDX) ? "full" : "half");
631 dev_info(db->dev, "%s: link down\n", ndev->name);
635 dm9000_poll_work(struct work_struct *w)
637 struct delayed_work *dw = to_delayed_work(w);
638 board_info_t *db = container_of(dw, board_info_t, phy_poll);
639 struct net_device *ndev = db->ndev;
641 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
642 !(db->flags & DM9000_PLATF_EXT_PHY)) {
643 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
644 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
645 unsigned new_carrier;
647 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
649 if (old_carrier != new_carrier) {
650 if (netif_msg_link(db))
651 dm9000_show_carrier(db, new_carrier, nsr);
654 netif_carrier_off(ndev);
656 netif_carrier_on(ndev);
659 mii_check_media(&db->mii, netif_msg_link(db), 0);
661 if (netif_running(ndev))
662 dm9000_schedule_poll(db);
665 /* dm9000_release_board
667 * release a board, and any mapped resources
671 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
673 /* unmap our resources */
675 iounmap(db->io_addr);
676 iounmap(db->io_data);
678 /* release the resources */
680 release_resource(db->data_req);
683 release_resource(db->addr_req);
687 static unsigned char dm9000_type_to_char(enum dm9000_type type)
690 case TYPE_DM9000E: return 'e';
691 case TYPE_DM9000A: return 'a';
692 case TYPE_DM9000B: return 'b';
699 * Set DM9000 multicast address
702 dm9000_hash_table_unlocked(struct net_device *dev)
704 board_info_t *db = netdev_priv(dev);
705 struct netdev_hw_addr *ha;
709 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
711 dm9000_dbg(db, 1, "entering %s\n", __func__);
713 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
714 iow(db, oft, dev->dev_addr[i]);
716 /* Clear Hash Table */
717 for (i = 0; i < 4; i++)
720 /* broadcast address */
721 hash_table[3] = 0x8000;
723 if (dev->flags & IFF_PROMISC)
726 if (dev->flags & IFF_ALLMULTI)
729 /* the multicast address in Hash Table : 64 bits */
730 netdev_for_each_mc_addr(ha, dev) {
731 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
732 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
735 /* Write the hash table to MAC MD table */
736 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
737 iow(db, oft++, hash_table[i]);
738 iow(db, oft++, hash_table[i] >> 8);
741 iow(db, DM9000_RCR, rcr);
745 dm9000_hash_table(struct net_device *dev)
747 board_info_t *db = netdev_priv(dev);
750 spin_lock_irqsave(&db->lock, flags);
751 dm9000_hash_table_unlocked(dev);
752 spin_unlock_irqrestore(&db->lock, flags);
756 * Initialize dm9000 board
759 dm9000_init_dm9000(struct net_device *dev)
761 board_info_t *db = netdev_priv(dev);
765 dm9000_dbg(db, 1, "entering %s\n", __func__);
768 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
771 if (dev->hw_features & NETIF_F_RXCSUM)
773 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
775 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
777 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
779 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
780 * up dumping the wake events if we disable this. There is already
781 * a wake-mask in DM9000_WCR */
782 if (db->wake_supported)
785 iow(db, DM9000_NCR, ncr);
787 /* Program operating register */
788 iow(db, DM9000_TCR, 0); /* TX Polling clear */
789 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
790 iow(db, DM9000_FCR, 0xff); /* Flow Control */
791 iow(db, DM9000_SMCR, 0); /* Special Mode */
792 /* clear TX status */
793 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
794 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
796 /* Set address filter table */
797 dm9000_hash_table_unlocked(dev);
799 imr = IMR_PAR | IMR_PTM | IMR_PRM;
800 if (db->type != TYPE_DM9000E)
805 /* Enable TX/RX interrupt mask */
806 iow(db, DM9000_IMR, imr);
808 /* Init Driver variable */
810 db->queue_pkt_len = 0;
811 dev->trans_start = jiffies;
814 /* Our watchdog timed out. Called by the networking layer */
815 static void dm9000_timeout(struct net_device *dev)
817 board_info_t *db = netdev_priv(dev);
821 /* Save previous register address */
822 spin_lock_irqsave(&db->lock, flags);
823 reg_save = readb(db->io_addr);
825 netif_stop_queue(dev);
827 dm9000_init_dm9000(dev);
828 /* We can accept TX packets again */
829 dev->trans_start = jiffies; /* prevent tx timeout */
830 netif_wake_queue(dev);
832 /* Restore previous register address */
833 writeb(reg_save, db->io_addr);
834 spin_unlock_irqrestore(&db->lock, flags);
837 static void dm9000_send_packet(struct net_device *dev,
841 board_info_t *dm = to_dm9000_board(dev);
843 /* The DM9000 is not smart enough to leave fragmented packets alone. */
844 if (dm->ip_summed != ip_summed) {
845 if (ip_summed == CHECKSUM_NONE)
846 iow(dm, DM9000_TCCR, 0);
848 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
849 dm->ip_summed = ip_summed;
852 /* Set TX length to DM9000 */
853 iow(dm, DM9000_TXPLL, pkt_len);
854 iow(dm, DM9000_TXPLH, pkt_len >> 8);
856 /* Issue TX polling command */
857 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
861 * Hardware start transmission.
862 * Send a packet to media from the upper layer.
865 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
868 board_info_t *db = netdev_priv(dev);
870 dm9000_dbg(db, 3, "%s:\n", __func__);
872 if (db->tx_pkt_cnt > 1)
873 return NETDEV_TX_BUSY;
875 spin_lock_irqsave(&db->lock, flags);
877 /* Move data to DM9000 TX RAM */
878 writeb(DM9000_MWCMD, db->io_addr);
880 (db->outblk)(db->io_data, skb->data, skb->len);
881 dev->stats.tx_bytes += skb->len;
884 /* TX control: First packet immediately send, second packet queue */
885 if (db->tx_pkt_cnt == 1) {
886 dm9000_send_packet(dev, skb->ip_summed, skb->len);
889 db->queue_pkt_len = skb->len;
890 db->queue_ip_summed = skb->ip_summed;
891 netif_stop_queue(dev);
894 spin_unlock_irqrestore(&db->lock, flags);
903 * DM9000 interrupt handler
904 * receive the packet to upper layer, free the transmitted packet
907 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
909 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
911 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
912 /* One packet sent complete */
914 dev->stats.tx_packets++;
916 if (netif_msg_tx_done(db))
917 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
919 /* Queue packet check & send */
920 if (db->tx_pkt_cnt > 0)
921 dm9000_send_packet(dev, db->queue_ip_summed,
923 netif_wake_queue(dev);
927 struct dm9000_rxhdr {
934 * Received a packet and pass to upper layer
937 dm9000_rx(struct net_device *dev)
939 board_info_t *db = netdev_priv(dev);
940 struct dm9000_rxhdr rxhdr;
946 /* Check packet ready or not */
948 ior(db, DM9000_MRCMDX); /* Dummy read */
950 /* Get most updated data */
951 rxbyte = readb(db->io_data);
953 /* Status check: this byte must be 0 or 1 */
954 if (rxbyte & DM9000_PKT_ERR) {
955 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
956 iow(db, DM9000_RCR, 0x00); /* Stop Device */
957 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
961 if (!(rxbyte & DM9000_PKT_RDY))
964 /* A packet ready now & Get status/length */
966 writeb(DM9000_MRCMD, db->io_addr);
968 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
970 RxLen = le16_to_cpu(rxhdr.RxLen);
972 if (netif_msg_rx_status(db))
973 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
974 rxhdr.RxStatus, RxLen);
976 /* Packet Status check */
979 if (netif_msg_rx_err(db))
980 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
983 if (RxLen > DM9000_PKT_MAX) {
984 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
987 /* rxhdr.RxStatus is identical to RSR register. */
988 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
992 if (rxhdr.RxStatus & RSR_FOE) {
993 if (netif_msg_rx_err(db))
994 dev_dbg(db->dev, "fifo error\n");
995 dev->stats.rx_fifo_errors++;
997 if (rxhdr.RxStatus & RSR_CE) {
998 if (netif_msg_rx_err(db))
999 dev_dbg(db->dev, "crc error\n");
1000 dev->stats.rx_crc_errors++;
1002 if (rxhdr.RxStatus & RSR_RF) {
1003 if (netif_msg_rx_err(db))
1004 dev_dbg(db->dev, "length error\n");
1005 dev->stats.rx_length_errors++;
1009 /* Move data from DM9000 */
1011 ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
1012 skb_reserve(skb, 2);
1013 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1015 /* Read received packet from RX SRAM */
1017 (db->inblk)(db->io_data, rdptr, RxLen);
1018 dev->stats.rx_bytes += RxLen;
1020 /* Pass to upper layer */
1021 skb->protocol = eth_type_trans(skb, dev);
1022 if (dev->features & NETIF_F_RXCSUM) {
1023 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1024 skb->ip_summed = CHECKSUM_UNNECESSARY;
1026 skb_checksum_none_assert(skb);
1029 dev->stats.rx_packets++;
1032 /* need to dump the packet's data */
1034 (db->dumpblk)(db->io_data, RxLen);
1036 } while (rxbyte & DM9000_PKT_RDY);
1039 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1041 struct net_device *dev = dev_id;
1042 board_info_t *db = netdev_priv(dev);
1044 unsigned long flags;
1047 dm9000_dbg(db, 3, "entering %s\n", __func__);
1049 /* A real interrupt coming */
1051 /* holders of db->lock must always block IRQs */
1052 spin_lock_irqsave(&db->lock, flags);
1054 /* Save previous register address */
1055 reg_save = readb(db->io_addr);
1057 /* Disable all interrupts */
1058 iow(db, DM9000_IMR, IMR_PAR);
1060 /* Got DM9000 interrupt status */
1061 int_status = ior(db, DM9000_ISR); /* Got ISR */
1062 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1064 if (netif_msg_intr(db))
1065 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1067 /* Received the coming packet */
1068 if (int_status & ISR_PRS)
1071 /* Trnasmit Interrupt check */
1072 if (int_status & ISR_PTS)
1073 dm9000_tx_done(dev, db);
1075 if (db->type != TYPE_DM9000E) {
1076 if (int_status & ISR_LNKCHNG) {
1077 /* fire a link-change request */
1078 schedule_delayed_work(&db->phy_poll, 1);
1082 /* Re-enable interrupt mask */
1083 iow(db, DM9000_IMR, db->imr_all);
1085 /* Restore previous register address */
1086 writeb(reg_save, db->io_addr);
1088 spin_unlock_irqrestore(&db->lock, flags);
1093 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1095 struct net_device *dev = dev_id;
1096 board_info_t *db = netdev_priv(dev);
1097 unsigned long flags;
1100 spin_lock_irqsave(&db->lock, flags);
1102 nsr = ior(db, DM9000_NSR);
1103 wcr = ior(db, DM9000_WCR);
1105 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1107 if (nsr & NSR_WAKEST) {
1108 /* clear, so we can avoid */
1109 iow(db, DM9000_NSR, NSR_WAKEST);
1111 if (wcr & WCR_LINKST)
1112 dev_info(db->dev, "wake by link status change\n");
1113 if (wcr & WCR_SAMPLEST)
1114 dev_info(db->dev, "wake by sample packet\n");
1115 if (wcr & WCR_MAGICST )
1116 dev_info(db->dev, "wake by magic packet\n");
1117 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1118 dev_err(db->dev, "wake signalled with no reason? "
1119 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1123 spin_unlock_irqrestore(&db->lock, flags);
1125 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1128 #ifdef CONFIG_NET_POLL_CONTROLLER
1132 static void dm9000_poll_controller(struct net_device *dev)
1134 disable_irq(dev->irq);
1135 dm9000_interrupt(dev->irq, dev);
1136 enable_irq(dev->irq);
1141 * Open the interface.
1142 * The interface is opened whenever "ifconfig" actives it.
1145 dm9000_open(struct net_device *dev)
1147 board_info_t *db = netdev_priv(dev);
1148 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1150 if (netif_msg_ifup(db))
1151 dev_dbg(db->dev, "enabling %s\n", dev->name);
1153 /* If there is no IRQ type specified, default to something that
1154 * may work, and tell the user that this is a problem */
1156 if (irqflags == IRQF_TRIGGER_NONE)
1157 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1159 irqflags |= IRQF_SHARED;
1161 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1162 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1163 mdelay(1); /* delay needs by DM9000B */
1165 /* Initialize DM9000 board */
1167 dm9000_init_dm9000(dev);
1169 if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
1172 /* Init driver variable */
1175 mii_check_media(&db->mii, netif_msg_link(db), 1);
1176 netif_start_queue(dev);
1178 dm9000_schedule_poll(db);
1184 * Sleep, either by using msleep() or if we are suspending, then
1185 * use mdelay() to sleep.
1187 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1196 * Read a word from phyxcer
1199 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1201 board_info_t *db = netdev_priv(dev);
1202 unsigned long flags;
1203 unsigned int reg_save;
1206 mutex_lock(&db->addr_lock);
1208 spin_lock_irqsave(&db->lock,flags);
1210 /* Save previous register address */
1211 reg_save = readb(db->io_addr);
1213 /* Fill the phyxcer register into REG_0C */
1214 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1216 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
1218 writeb(reg_save, db->io_addr);
1219 spin_unlock_irqrestore(&db->lock,flags);
1221 dm9000_msleep(db, 1); /* Wait read complete */
1223 spin_lock_irqsave(&db->lock,flags);
1224 reg_save = readb(db->io_addr);
1226 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1228 /* The read data keeps on REG_0D & REG_0E */
1229 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1231 /* restore the previous address */
1232 writeb(reg_save, db->io_addr);
1233 spin_unlock_irqrestore(&db->lock,flags);
1235 mutex_unlock(&db->addr_lock);
1237 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1242 * Write a word to phyxcer
1245 dm9000_phy_write(struct net_device *dev,
1246 int phyaddr_unused, int reg, int value)
1248 board_info_t *db = netdev_priv(dev);
1249 unsigned long flags;
1250 unsigned long reg_save;
1252 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1253 mutex_lock(&db->addr_lock);
1255 spin_lock_irqsave(&db->lock,flags);
1257 /* Save previous register address */
1258 reg_save = readb(db->io_addr);
1260 /* Fill the phyxcer register into REG_0C */
1261 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1263 /* Fill the written data into REG_0D & REG_0E */
1264 iow(db, DM9000_EPDRL, value);
1265 iow(db, DM9000_EPDRH, value >> 8);
1267 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
1269 writeb(reg_save, db->io_addr);
1270 spin_unlock_irqrestore(&db->lock, flags);
1272 dm9000_msleep(db, 1); /* Wait write complete */
1274 spin_lock_irqsave(&db->lock,flags);
1275 reg_save = readb(db->io_addr);
1277 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1279 /* restore the previous address */
1280 writeb(reg_save, db->io_addr);
1282 spin_unlock_irqrestore(&db->lock, flags);
1283 mutex_unlock(&db->addr_lock);
1287 dm9000_shutdown(struct net_device *dev)
1289 board_info_t *db = netdev_priv(dev);
1292 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1293 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1294 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1295 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1299 * Stop the interface.
1300 * The interface is stopped when it is brought.
1303 dm9000_stop(struct net_device *ndev)
1305 board_info_t *db = netdev_priv(ndev);
1307 if (netif_msg_ifdown(db))
1308 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1310 cancel_delayed_work_sync(&db->phy_poll);
1312 netif_stop_queue(ndev);
1313 netif_carrier_off(ndev);
1315 /* free interrupt */
1316 free_irq(ndev->irq, ndev);
1318 dm9000_shutdown(ndev);
1323 static const struct net_device_ops dm9000_netdev_ops = {
1324 .ndo_open = dm9000_open,
1325 .ndo_stop = dm9000_stop,
1326 .ndo_start_xmit = dm9000_start_xmit,
1327 .ndo_tx_timeout = dm9000_timeout,
1328 .ndo_set_multicast_list = dm9000_hash_table,
1329 .ndo_do_ioctl = dm9000_ioctl,
1330 .ndo_change_mtu = eth_change_mtu,
1331 .ndo_set_features = dm9000_set_features,
1332 .ndo_validate_addr = eth_validate_addr,
1333 .ndo_set_mac_address = eth_mac_addr,
1334 #ifdef CONFIG_NET_POLL_CONTROLLER
1335 .ndo_poll_controller = dm9000_poll_controller,
1340 * Search DM9000 board, allocate space and register it
1342 static int __devinit
1343 dm9000_probe(struct platform_device *pdev)
1345 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1346 struct board_info *db; /* Point a board information structure */
1347 struct net_device *ndev;
1348 const unsigned char *mac_src;
1354 /* Init network device */
1355 ndev = alloc_etherdev(sizeof(struct board_info));
1357 dev_err(&pdev->dev, "could not allocate device.\n");
1361 SET_NETDEV_DEV(ndev, &pdev->dev);
1363 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1365 /* setup board info structure */
1366 db = netdev_priv(ndev);
1368 db->dev = &pdev->dev;
1371 spin_lock_init(&db->lock);
1372 mutex_init(&db->addr_lock);
1374 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1376 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1377 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1378 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1380 if (db->addr_res == NULL || db->data_res == NULL ||
1381 db->irq_res == NULL) {
1382 dev_err(db->dev, "insufficient resources\n");
1387 db->irq_wake = platform_get_irq(pdev, 1);
1388 if (db->irq_wake >= 0) {
1389 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1391 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1392 IRQF_SHARED, dev_name(db->dev), ndev);
1394 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1397 /* test to see if irq is really wakeup capable */
1398 ret = irq_set_irq_wake(db->irq_wake, 1);
1400 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1404 irq_set_irq_wake(db->irq_wake, 0);
1405 db->wake_supported = 1;
1410 iosize = resource_size(db->addr_res);
1411 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1414 if (db->addr_req == NULL) {
1415 dev_err(db->dev, "cannot claim address reg area\n");
1420 db->io_addr = ioremap(db->addr_res->start, iosize);
1422 if (db->io_addr == NULL) {
1423 dev_err(db->dev, "failed to ioremap address reg\n");
1428 iosize = resource_size(db->data_res);
1429 db->data_req = request_mem_region(db->data_res->start, iosize,
1432 if (db->data_req == NULL) {
1433 dev_err(db->dev, "cannot claim data reg area\n");
1438 db->io_data = ioremap(db->data_res->start, iosize);
1440 if (db->io_data == NULL) {
1441 dev_err(db->dev, "failed to ioremap data reg\n");
1446 /* fill in parameters for net-dev structure */
1447 ndev->base_addr = (unsigned long)db->io_addr;
1448 ndev->irq = db->irq_res->start;
1450 /* ensure at least we have a default set of IO routines */
1451 dm9000_set_io(db, iosize);
1453 /* check to see if anything is being over-ridden */
1454 if (pdata != NULL) {
1455 /* check to see if the driver wants to over-ride the
1456 * default IO width */
1458 if (pdata->flags & DM9000_PLATF_8BITONLY)
1459 dm9000_set_io(db, 1);
1461 if (pdata->flags & DM9000_PLATF_16BITONLY)
1462 dm9000_set_io(db, 2);
1464 if (pdata->flags & DM9000_PLATF_32BITONLY)
1465 dm9000_set_io(db, 4);
1467 /* check to see if there are any IO routine
1470 if (pdata->inblk != NULL)
1471 db->inblk = pdata->inblk;
1473 if (pdata->outblk != NULL)
1474 db->outblk = pdata->outblk;
1476 if (pdata->dumpblk != NULL)
1477 db->dumpblk = pdata->dumpblk;
1479 db->flags = pdata->flags;
1482 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1483 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1488 /* try multiple times, DM9000 sometimes gets the read wrong */
1489 for (i = 0; i < 8; i++) {
1490 id_val = ior(db, DM9000_VIDL);
1491 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1492 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1493 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1495 if (id_val == DM9000_ID)
1497 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1500 if (id_val != DM9000_ID) {
1501 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1506 /* Identify what type of DM9000 we are working on */
1508 id_val = ior(db, DM9000_CHIPR);
1509 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1513 db->type = TYPE_DM9000A;
1516 db->type = TYPE_DM9000B;
1519 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1520 db->type = TYPE_DM9000E;
1523 /* dm9000a/b are capable of hardware checksum offload */
1524 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1525 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1526 ndev->features |= ndev->hw_features;
1529 /* from this point we assume that we have found a DM9000 */
1531 /* driver system function */
1534 ndev->netdev_ops = &dm9000_netdev_ops;
1535 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1536 ndev->ethtool_ops = &dm9000_ethtool_ops;
1538 db->msg_enable = NETIF_MSG_LINK;
1539 db->mii.phy_id_mask = 0x1f;
1540 db->mii.reg_num_mask = 0x1f;
1541 db->mii.force_media = 0;
1542 db->mii.full_duplex = 0;
1544 db->mii.mdio_read = dm9000_phy_read;
1545 db->mii.mdio_write = dm9000_phy_write;
1549 /* try reading the node address from the attached EEPROM */
1550 for (i = 0; i < 6; i += 2)
1551 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1553 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1554 mac_src = "platform data";
1555 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1558 if (!is_valid_ether_addr(ndev->dev_addr)) {
1559 /* try reading from mac */
1562 for (i = 0; i < 6; i++)
1563 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1566 if (!is_valid_ether_addr(ndev->dev_addr)) {
1567 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1568 "set using ifconfig\n", ndev->name);
1570 random_ether_addr(ndev->dev_addr);
1575 platform_set_drvdata(pdev, ndev);
1576 ret = register_netdev(ndev);
1579 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1580 ndev->name, dm9000_type_to_char(db->type),
1581 db->io_addr, db->io_data, ndev->irq,
1582 ndev->dev_addr, mac_src);
1586 dev_err(db->dev, "not found (%d).\n", ret);
1588 dm9000_release_board(pdev, db);
1595 dm9000_drv_suspend(struct device *dev)
1597 struct platform_device *pdev = to_platform_device(dev);
1598 struct net_device *ndev = platform_get_drvdata(pdev);
1602 db = netdev_priv(ndev);
1605 if (!netif_running(ndev))
1608 netif_device_detach(ndev);
1610 /* only shutdown if not using WoL */
1611 if (!db->wake_state)
1612 dm9000_shutdown(ndev);
1618 dm9000_drv_resume(struct device *dev)
1620 struct platform_device *pdev = to_platform_device(dev);
1621 struct net_device *ndev = platform_get_drvdata(pdev);
1622 board_info_t *db = netdev_priv(ndev);
1625 if (netif_running(ndev)) {
1626 /* reset if we were not in wake mode to ensure if
1627 * the device was powered off it is in a known state */
1628 if (!db->wake_state) {
1630 dm9000_init_dm9000(ndev);
1633 netif_device_attach(ndev);
1641 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1642 .suspend = dm9000_drv_suspend,
1643 .resume = dm9000_drv_resume,
1646 static int __devexit
1647 dm9000_drv_remove(struct platform_device *pdev)
1649 struct net_device *ndev = platform_get_drvdata(pdev);
1651 platform_set_drvdata(pdev, NULL);
1653 unregister_netdev(ndev);
1654 dm9000_release_board(pdev, netdev_priv(ndev));
1655 free_netdev(ndev); /* free device structure */
1657 dev_dbg(&pdev->dev, "released and freed device\n");
1661 static struct platform_driver dm9000_driver = {
1664 .owner = THIS_MODULE,
1665 .pm = &dm9000_drv_pm_ops,
1667 .probe = dm9000_probe,
1668 .remove = __devexit_p(dm9000_drv_remove),
1674 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1676 return platform_driver_register(&dm9000_driver);
1680 dm9000_cleanup(void)
1682 platform_driver_unregister(&dm9000_driver);
1685 module_init(dm9000_init);
1686 module_exit(dm9000_cleanup);
1688 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1689 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1690 MODULE_LICENSE("GPL");
1691 MODULE_ALIAS("platform:dm9000");