1 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
3 Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This drivers was written with the following sources of reference:
9 - The driver for the Riebl Lance card by the TU Vienna.
10 - The modified TUW driver for PAM's VME cards
11 - The PC-Linux driver for Lance cards (but this is for bus master
12 cards, not the shared memory ones)
13 - The Amiga Ariadne driver
15 v1.0: (in 1.2.13pl4/0.9.13)
19 deleted some debugging stuff
20 optimized register access (keep AREG pointing to CSR0)
21 following AMD, CSR0_STRT should be set only after IDON is detected
22 use memcpy() for data transfers, that also employs long word moves
23 better probe procedure for 24-bit systems
24 non-VME-RieblCards need extra delays in memcpy
25 must also do write test, since 0xfxe00000 may hit ROM
26 use 8/32 tx/rx buffers, which should give better NFS performance;
27 this is made possible by shifting the last packet buffer after the
28 RieblCard reserved area
30 again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31 and thus RAM, in case of no Lance found all memory contents have to
33 Now possible to compile as module.
34 v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35 Several little 1.3 adaptions
36 When the lance is stopped it jumps back into little-endian
37 mode. It is therefore necessary to put it back where it
38 belongs, in big endian mode, in order to make things work.
39 This might be the reason why multicast-mode didn't work
40 before, but I'm not able to test it as I only got an Amiga
41 (we had similar problems with the A2065 driver).
45 static char version[] = "atarilance.c: v1.3 04/04/96 "
46 "Roman.Hodek@informatik.uni-erlangen.de\n";
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/module.h>
51 #include <linux/stddef.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/errno.h>
55 #include <linux/skbuff.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
59 #include <linux/bitops.h>
61 #include <asm/setup.h>
63 #include <asm/atarihw.h>
64 #include <asm/atariints.h>
68 * 0 = silent, print only serious errors
69 * 1 = normal, print error messages
70 * 2 = debug, print debug infos
71 * 3 = debug, print even more debug infos (packet data)
77 static int lance_debug = LANCE_DEBUG;
79 static int lance_debug = 1;
81 module_param(lance_debug, int, 0);
82 MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
83 MODULE_LICENSE("GPL");
85 /* Print debug messages on probing? */
86 #undef LANCE_DEBUG_PROBE
88 #define DPRINTK(n,a) \
90 if (lance_debug >= n) \
94 #ifdef LANCE_DEBUG_PROBE
95 # define PROBE_PRINT(a) printk a
97 # define PROBE_PRINT(a)
100 /* These define the number of Rx and Tx buffers as log2. (Only powers
102 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
103 * is more time critical then sending and packets may have to remain in the
104 * board's memory when main memory is low.
107 #define TX_LOG_RING_SIZE 3
108 #define RX_LOG_RING_SIZE 5
110 /* These are the derived values */
112 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
113 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
114 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
116 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
117 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
118 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
120 #define TX_TIMEOUT 20
122 /* The LANCE Rx and Tx ring descriptors. */
123 struct lance_rx_head {
124 unsigned short base; /* Low word of base addr */
125 volatile unsigned char flag;
126 unsigned char base_hi; /* High word of base addr (unused) */
127 short buf_length; /* This length is 2s complement! */
128 volatile short msg_length; /* This length is "normal". */
131 struct lance_tx_head {
132 unsigned short base; /* Low word of base addr */
133 volatile unsigned char flag;
134 unsigned char base_hi; /* High word of base addr (unused) */
135 short length; /* Length is 2s complement! */
140 unsigned short adr_lo; /* Low 16 bits of address */
141 unsigned char len; /* Length bits */
142 unsigned char adr_hi; /* High 8 bits of address (unused) */
145 /* The LANCE initialization block, described in databook. */
146 struct lance_init_block {
147 unsigned short mode; /* Pre-set mode */
148 unsigned char hwaddr[6]; /* Physical ethernet address */
149 unsigned filter[2]; /* Multicast filter (unused). */
150 /* Receive and transmit ring base, along with length bits. */
151 struct ringdesc rx_ring;
152 struct ringdesc tx_ring;
155 /* The whole layout of the Lance shared memory */
156 struct lance_memory {
157 struct lance_init_block init;
158 struct lance_tx_head tx_head[TX_RING_SIZE];
159 struct lance_rx_head rx_head[RX_RING_SIZE];
160 char packet_area[0]; /* packet data follow after the
161 * init block and the ring
162 * descriptors and are located
166 /* RieblCard specifics:
167 * The original TOS driver for these cards reserves the area from offset
168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
169 * Ethernet address there, and the magic for verifying the data's validity.
170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
171 * is reserved for the interrupt vector number.
173 #define RIEBL_RSVD_START 0xee70
174 #define RIEBL_RSVD_END 0xeec0
175 #define RIEBL_MAGIC 0x09051990
176 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a))
177 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e))
178 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe))
180 /* This is a default address for the old RieblCards without a battery
181 * that have no ethernet address at boot time. 00:00:36:04 is the
182 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
185 static unsigned char OldRieblDefHwaddr[6] = {
186 0x00, 0x00, 0x36, 0x04, 0x00, 0x00
190 /* I/O registers of the Lance chip */
193 /* base+0x0 */ volatile unsigned short data;
194 /* base+0x2 */ volatile unsigned short addr;
195 unsigned char _dummy1[3];
196 /* base+0x7 */ volatile unsigned char ivec;
197 unsigned char _dummy2[5];
198 /* base+0xd */ volatile unsigned char eeprom;
199 unsigned char _dummy3;
200 /* base+0xf */ volatile unsigned char mem;
203 /* Types of boards this driver supports */
206 OLD_RIEBL, /* old Riebl card without battery */
207 NEW_RIEBL, /* new Riebl card with battery */
208 PAM_CARD /* PAM card with EEPROM */
211 static char *lance_names[] = {
212 "Riebl-Card (without battery)",
213 "Riebl-Card (with battery)",
217 /* The driver's private device structure */
219 struct lance_private {
220 enum lance_type cardtype;
221 struct lance_ioreg *iobase;
222 struct lance_memory *mem;
223 int cur_rx, cur_tx; /* The next free ring entry */
224 int dirty_tx; /* Ring entries to be freed. */
226 void *(*memcpy_f)( void *, const void *, size_t );
227 /* This must be long for set_bit() */
232 /* I/O register access macros */
235 #define DREG IO->data
236 #define AREG IO->addr
237 #define REGA(a) (*( AREG = (a), &DREG ))
239 /* Definitions for packet buffer access: */
240 #define PKT_BUF_SZ 1544
241 /* Get the address of a packet buffer corresponding to a given buffer head */
242 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base)
244 /* Possible memory/IO addresses for probing */
247 unsigned long memaddr;
248 unsigned long ioaddr;
250 } lance_addr_list[] = {
251 { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */
252 { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE
253 (highest byte stripped) */
254 { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST
255 (highest byte stripped) */
256 { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to
257 avoid conflict with ROM
258 (highest byte stripped) */
259 { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE
260 (highest byte stripped) */
261 { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE
262 (highest byte stripped) */
265 #define N_LANCE_ADDR ARRAY_SIZE(lance_addr_list)
268 /* Definitions for the Lance */
271 #define TMD1_ENP 0x01 /* end of packet */
272 #define TMD1_STP 0x02 /* start of packet */
273 #define TMD1_DEF 0x04 /* deferred */
274 #define TMD1_ONE 0x08 /* one retry needed */
275 #define TMD1_MORE 0x10 /* more than one retry needed */
276 #define TMD1_ERR 0x40 /* error summary */
277 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
279 #define TMD1_OWN_CHIP TMD1_OWN
280 #define TMD1_OWN_HOST 0
282 /* tx_head misc field */
283 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
284 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
285 #define TMD3_LCAR 0x0800 /* carrier lost */
286 #define TMD3_LCOL 0x1000 /* late collision */
287 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
288 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
291 #define RMD1_ENP 0x01 /* end of packet */
292 #define RMD1_STP 0x02 /* start of packet */
293 #define RMD1_BUFF 0x04 /* buffer error */
294 #define RMD1_CRC 0x08 /* CRC error */
295 #define RMD1_OFLO 0x10 /* overflow */
296 #define RMD1_FRAM 0x20 /* framing error */
297 #define RMD1_ERR 0x40 /* error summary */
298 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
300 #define RMD1_OWN_CHIP RMD1_OWN
301 #define RMD1_OWN_HOST 0
304 #define CSR0 0 /* mode/status */
305 #define CSR1 1 /* init block addr (low) */
306 #define CSR2 2 /* init block addr (high) */
307 #define CSR3 3 /* misc */
308 #define CSR8 8 /* address filter */
309 #define CSR15 15 /* promiscuous mode */
312 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
313 #define CSR0_INIT 0x0001 /* initialize (RS) */
314 #define CSR0_STRT 0x0002 /* start (RS) */
315 #define CSR0_STOP 0x0004 /* stop (RS) */
316 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
317 #define CSR0_TXON 0x0010 /* transmitter on (R) */
318 #define CSR0_RXON 0x0020 /* receiver on (R) */
319 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
320 #define CSR0_INTR 0x0080 /* interrupt active (R) */
321 #define CSR0_IDON 0x0100 /* initialization done (RC) */
322 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
323 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
324 #define CSR0_MERR 0x0800 /* memory error (RC) */
325 #define CSR0_MISS 0x1000 /* missed frame (RC) */
326 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
327 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
328 #define CSR0_ERR 0x8000 /* error (RC) */
331 #define CSR3_BCON 0x0001 /* byte control */
332 #define CSR3_ACON 0x0002 /* ALE control */
333 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
337 /***************************** Prototypes *****************************/
339 static int addr_accessible( volatile void *regp, int wordflag, int
341 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
343 static int lance_open( struct net_device *dev );
344 static void lance_init_ring( struct net_device *dev );
345 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
346 static irqreturn_t lance_interrupt( int irq, void *dev_id );
347 static int lance_rx( struct net_device *dev );
348 static int lance_close( struct net_device *dev );
349 static void set_multicast_list( struct net_device *dev );
350 static int lance_set_mac_address( struct net_device *dev, void *addr );
351 static void lance_tx_timeout (struct net_device *dev);
353 /************************* End of Prototypes **************************/
359 static void *slow_memcpy( void *dst, const void *src, size_t len )
362 const char *cfrom = src;
372 struct net_device * __init atarilance_probe(int unit)
376 struct net_device *dev;
379 if (!MACH_IS_ATARI || found)
380 /* Assume there's only one board possible... That seems true, since
381 * the Riebl/PAM board's address cannot be changed. */
382 return ERR_PTR(-ENODEV);
384 dev = alloc_etherdev(sizeof(struct lance_private));
386 return ERR_PTR(-ENOMEM);
388 sprintf(dev->name, "eth%d", unit);
389 netdev_boot_setup_check(dev);
392 for( i = 0; i < N_LANCE_ADDR; ++i ) {
393 if (lance_probe1( dev, &lance_addr_list[i] )) {
395 err = register_netdev(dev);
398 free_irq(dev->irq, dev);
407 /* Derived from hwreg_present() in atari/config.c: */
409 static int __init addr_accessible( volatile void *regp, int wordflag, int writeflag )
413 long *vbr, save_berr;
415 local_irq_save(flags);
417 __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : );
421 ( "movel %/sp,%/d1\n\t"
422 "movel #Lberr,%2@\n\t"
429 "1: movew %1@,%/d0\n\t"
445 "Lberr: movel %/d1,%/sp"
447 : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
448 : "d0", "d1", "memory"
452 local_irq_restore(flags);
458 static unsigned long __init lance_probe1( struct net_device *dev,
459 struct lance_addr *init_rec )
461 volatile unsigned short *memaddr =
462 (volatile unsigned short *)init_rec->memaddr;
463 volatile unsigned short *ioaddr =
464 (volatile unsigned short *)init_rec->ioaddr;
465 struct lance_private *lp;
466 struct lance_ioreg *IO;
468 static int did_version;
469 unsigned short save1, save2;
471 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
472 (long)memaddr, (long)ioaddr ));
474 /* Test whether memory readable and writable */
475 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
476 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
478 /* Written values should come back... */
479 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
482 if (*memaddr != 0x0001) goto probe_fail;
483 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
485 if (*memaddr != 0x0000) goto probe_fail;
488 /* First port should be readable and writable */
489 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
490 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
492 /* and written values should be readable */
493 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
496 if (ioaddr[1] != 0x0001) goto probe_fail;
498 /* The CSR0_INIT bit should not be readable */
499 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
502 ioaddr[0] = CSR0_INIT | CSR0_STOP;
503 if (ioaddr[0] != CSR0_STOP) {
508 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
509 ioaddr[0] = CSR0_STOP;
510 if (ioaddr[0] != CSR0_STOP) {
517 PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
524 lp = (struct lance_private *)dev->priv;
525 MEM = (struct lance_memory *)memaddr;
526 IO = lp->iobase = (struct lance_ioreg *)ioaddr;
527 dev->base_addr = (unsigned long)ioaddr; /* informational only */
528 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
530 REGA( CSR0 ) = CSR0_STOP;
532 /* Now test for type: If the eeprom I/O port is readable, it is a
534 if (addr_accessible( &(IO->eeprom), 0, 0 )) {
535 /* Switch back to Ram */
537 lp->cardtype = PAM_CARD;
539 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
540 lp->cardtype = NEW_RIEBL;
543 lp->cardtype = OLD_RIEBL;
545 if (lp->cardtype == PAM_CARD ||
546 memaddr == (unsigned short *)0xffe00000) {
547 /* PAMs card and Riebl on ST use level 5 autovector */
548 if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO,
549 "PAM/Riebl-ST Ethernet", dev)) {
550 printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
553 dev->irq = (unsigned short)IRQ_AUTO_5;
556 /* For VME-RieblCards, request a free VME int;
557 * (This must be unsigned long, since dev->irq is short and the
558 * IRQ_MACHSPEC bit would be cut off...)
560 unsigned long irq = atari_register_vme_int();
562 printk( "Lance: request for VME interrupt failed\n" );
565 if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
566 "Riebl-VME Ethernet", dev)) {
567 printk( "Lance: request for irq %ld failed\n", irq );
573 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
574 dev->name, lance_names[lp->cardtype],
575 (unsigned long)ioaddr,
576 (unsigned long)memaddr,
578 init_rec->slow_flag ? " (slow memcpy)" : "" );
580 /* Get the ethernet address */
581 switch( lp->cardtype ) {
583 /* No ethernet address! (Set some default address) */
584 memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
587 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
591 for( i = 0; i < 6; ++i )
593 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
594 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
598 for( i = 0; i < 6; ++i )
599 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
600 if (lp->cardtype == OLD_RIEBL) {
601 printk( "%s: Warning: This is a default ethernet address!\n",
603 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" );
606 spin_lock_init(&lp->devlock);
608 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */
609 for( i = 0; i < 6; i++ )
610 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
611 MEM->init.filter[0] = 0x00000000;
612 MEM->init.filter[1] = 0x00000000;
613 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
614 MEM->init.rx_ring.adr_hi = 0;
615 MEM->init.rx_ring.len = RX_RING_LEN_BITS;
616 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
617 MEM->init.tx_ring.adr_hi = 0;
618 MEM->init.tx_ring.len = TX_RING_LEN_BITS;
620 if (lp->cardtype == PAM_CARD)
621 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
623 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
625 if (did_version++ == 0)
626 DPRINTK( 1, ( version ));
628 /* The LANCE-specific entries in the device structure. */
629 dev->open = &lance_open;
630 dev->hard_start_xmit = &lance_start_xmit;
631 dev->stop = &lance_close;
632 dev->set_multicast_list = &set_multicast_list;
633 dev->set_mac_address = &lance_set_mac_address;
636 dev->tx_timeout = lance_tx_timeout;
637 dev->watchdog_timeo = TX_TIMEOUT;
643 static int lance_open( struct net_device *dev )
645 { struct lance_private *lp = (struct lance_private *)dev->priv;
646 struct lance_ioreg *IO = lp->iobase;
649 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
651 lance_init_ring(dev);
652 /* Re-initialize the LANCE, and start it when done. */
654 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
657 REGA( CSR0 ) = CSR0_INIT;
658 /* From now on, AREG is kept to point to CSR0 */
662 if (DREG & CSR0_IDON)
664 if (i < 0 || (DREG & CSR0_ERR)) {
665 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
666 dev->name, i, DREG ));
674 netif_start_queue (dev);
676 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
682 /* Initialize the LANCE Rx and Tx rings. */
684 static void lance_init_ring( struct net_device *dev )
686 { struct lance_private *lp = (struct lance_private *)dev->priv;
691 lp->cur_rx = lp->cur_tx = 0;
694 offset = offsetof( struct lance_memory, packet_area );
696 /* If the packet buffer at offset 'o' would conflict with the reserved area
697 * of RieblCards, advance it */
698 #define CHECK_OFFSET(o) \
700 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
701 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
702 : (o) < RIEBL_RSVD_END) \
703 (o) = RIEBL_RSVD_END; \
707 for( i = 0; i < TX_RING_SIZE; i++ ) {
708 CHECK_OFFSET(offset);
709 MEM->tx_head[i].base = offset;
710 MEM->tx_head[i].flag = TMD1_OWN_HOST;
711 MEM->tx_head[i].base_hi = 0;
712 MEM->tx_head[i].length = 0;
713 MEM->tx_head[i].misc = 0;
714 offset += PKT_BUF_SZ;
717 for( i = 0; i < RX_RING_SIZE; i++ ) {
718 CHECK_OFFSET(offset);
719 MEM->rx_head[i].base = offset;
720 MEM->rx_head[i].flag = TMD1_OWN_CHIP;
721 MEM->rx_head[i].base_hi = 0;
722 MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
723 MEM->rx_head[i].msg_length = 0;
724 offset += PKT_BUF_SZ;
729 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
732 static void lance_tx_timeout (struct net_device *dev)
734 struct lance_private *lp = (struct lance_private *) dev->priv;
735 struct lance_ioreg *IO = lp->iobase;
738 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
742 * Always set BSWP after a STOP as STOP puts it back into
743 * little endian mode.
745 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
746 dev->stats.tx_errors++;
747 #ifndef final_version
749 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
750 lp->dirty_tx, lp->cur_tx,
751 lp->tx_full ? " (full)" : "",
753 for( i = 0 ; i < RX_RING_SIZE; i++ )
754 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
755 i, MEM->rx_head[i].base,
756 -MEM->rx_head[i].buf_length,
757 MEM->rx_head[i].msg_length ));
758 for( i = 0 ; i < TX_RING_SIZE; i++ )
759 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
760 i, MEM->tx_head[i].base,
761 -MEM->tx_head[i].length,
762 MEM->tx_head[i].misc ));
765 /* XXX MSch: maybe purge/reinit ring here */
766 /* lance_restart, essentially */
767 lance_init_ring(dev);
768 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
769 dev->trans_start = jiffies;
770 netif_wake_queue (dev);
773 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
775 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
777 { struct lance_private *lp = (struct lance_private *)dev->priv;
778 struct lance_ioreg *IO = lp->iobase;
780 struct lance_tx_head *head;
783 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
787 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
791 /* PAM-Card has a bug: Can only send packets with even number of bytes! */
792 else if (lp->cardtype == PAM_CARD && (len & 1))
795 if (len > skb->len) {
796 if (skb_padto(skb, len))
800 netif_stop_queue (dev);
802 /* Fill in a Tx ring entry */
803 if (lance_debug >= 3) {
806 printk( "%s: TX pkt type 0x%04x from ", dev->name,
807 ((u_short *)skb->data)[6]);
808 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
809 printk("%02x%s", *p++, i != 5 ? ":" : "" );
811 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
812 printk("%02x%s", *p++, i != 5 ? ":" : "" );
813 printk(" data at 0x%08x len %d\n", (int)skb->data,
817 /* We're not prepared for the int until the last flags are set/reset. And
818 * the int may happen already after setting the OWN_CHIP... */
819 spin_lock_irqsave (&lp->devlock, flags);
821 /* Mask to ring buffer boundary. */
822 entry = lp->cur_tx & TX_RING_MOD_MASK;
823 head = &(MEM->tx_head[entry]);
825 /* Caution: the write order is important here, set the "ownership" bits
832 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
833 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
834 dev->stats.tx_bytes += skb->len;
835 dev_kfree_skb( skb );
837 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
838 lp->cur_tx -= TX_RING_SIZE;
839 lp->dirty_tx -= TX_RING_SIZE;
842 /* Trigger an immediate send poll. */
843 DREG = CSR0_INEA | CSR0_TDMD;
844 dev->trans_start = jiffies;
846 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
848 netif_start_queue (dev);
851 spin_unlock_irqrestore (&lp->devlock, flags);
856 /* The LANCE interrupt handler. */
858 static irqreturn_t lance_interrupt( int irq, void *dev_id )
860 struct net_device *dev = dev_id;
861 struct lance_private *lp;
862 struct lance_ioreg *IO;
863 int csr0, boguscnt = 10;
867 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
871 lp = (struct lance_private *)dev->priv;
873 spin_lock (&lp->devlock);
877 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
880 /* Acknowledge all of the current interrupt sources ASAP. */
881 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
882 CSR0_TDMD | CSR0_INEA);
884 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
885 dev->name, csr0, DREG ));
887 if (csr0 & CSR0_RINT) /* Rx interrupt */
890 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
891 int dirty_tx = lp->dirty_tx;
893 while( dirty_tx < lp->cur_tx) {
894 int entry = dirty_tx & TX_RING_MOD_MASK;
895 int status = MEM->tx_head[entry].flag;
897 if (status & TMD1_OWN_CHIP)
898 break; /* It still hasn't been Txed */
900 MEM->tx_head[entry].flag = 0;
902 if (status & TMD1_ERR) {
903 /* There was an major error, log it. */
904 int err_status = MEM->tx_head[entry].misc;
905 dev->stats.tx_errors++;
906 if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
907 if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
908 if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++;
909 if (err_status & TMD3_UFLO) {
910 /* Ackk! On FIFO errors the Tx unit is turned off! */
911 dev->stats.tx_fifo_errors++;
912 /* Remove this verbosity later! */
913 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
915 /* Restart the chip. */
919 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
920 dev->stats.collisions++;
921 dev->stats.tx_packets++;
924 /* XXX MSch: free skb?? */
928 #ifndef final_version
929 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
930 DPRINTK( 0, ( "out-of-sync dirty pointer,"
931 " %d vs. %d, full=%ld.\n",
932 dirty_tx, lp->cur_tx, lp->tx_full ));
933 dirty_tx += TX_RING_SIZE;
937 if (lp->tx_full && (netif_queue_stopped(dev))
938 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
939 /* The ring is no longer full, clear tbusy. */
941 netif_wake_queue (dev);
944 lp->dirty_tx = dirty_tx;
947 /* Log misc errors. */
948 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
949 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
950 if (csr0 & CSR0_MERR) {
951 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
952 "status %04x.\n", dev->name, csr0 ));
953 /* Restart the chip. */
958 /* Clear any other interrupt, and set interrupt enable. */
959 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
960 CSR0_IDON | CSR0_INEA;
962 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
965 spin_unlock (&lp->devlock);
966 return IRQ_RETVAL(handled);
970 static int lance_rx( struct net_device *dev )
972 { struct lance_private *lp = (struct lance_private *)dev->priv;
973 int entry = lp->cur_rx & RX_RING_MOD_MASK;
976 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
977 MEM->rx_head[entry].flag ));
979 /* If we own the next entry, it's a new packet. Send it up. */
980 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
981 struct lance_rx_head *head = &(MEM->rx_head[entry]);
982 int status = head->flag;
984 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
985 /* There is a tricky error noted by John Murphy,
986 <murf@perftech.com> to Russ Nelson: Even with full-sized
987 buffers it's possible for a jabber packet to use two
988 buffers, with only the last correctly noting the error. */
989 if (status & RMD1_ENP) /* Only count a general error at the */
990 dev->stats.rx_errors++; /* end of a packet.*/
991 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
992 if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
993 if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
994 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
995 head->flag &= (RMD1_ENP|RMD1_STP);
997 /* Malloc up new buffer, compatible with net-3. */
998 short pkt_len = head->msg_length & 0xfff;
1002 printk( "%s: Runt packet!\n", dev->name );
1003 dev->stats.rx_errors++;
1006 skb = dev_alloc_skb( pkt_len+2 );
1008 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
1010 for( i = 0; i < RX_RING_SIZE; i++ )
1011 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1015 if (i > RX_RING_SIZE - 2) {
1016 dev->stats.rx_dropped++;
1017 head->flag |= RMD1_OWN_CHIP;
1023 if (lance_debug >= 3) {
1024 u_char *data = PKTBUF_ADDR(head), *p;
1025 printk( "%s: RX pkt type 0x%04x from ", dev->name,
1026 ((u_short *)data)[6]);
1027 for( p = &data[6], i = 0; i < 6; i++ )
1028 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1030 for( p = data, i = 0; i < 6; i++ )
1031 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1032 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
1034 data[15], data[16], data[17], data[18],
1035 data[19], data[20], data[21], data[22],
1039 skb_reserve( skb, 2 ); /* 16 byte align */
1040 skb_put( skb, pkt_len ); /* Make room */
1041 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1042 skb->protocol = eth_type_trans( skb, dev );
1044 dev->last_rx = jiffies;
1045 dev->stats.rx_packets++;
1046 dev->stats.rx_bytes += pkt_len;
1050 head->flag |= RMD1_OWN_CHIP;
1051 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1053 lp->cur_rx &= RX_RING_MOD_MASK;
1055 /* From lance.c (Donald Becker): */
1056 /* We should check that at least two ring entries are free. If not,
1057 we should free one and mark stats->rx_dropped++. */
1063 static int lance_close( struct net_device *dev )
1065 { struct lance_private *lp = (struct lance_private *)dev->priv;
1066 struct lance_ioreg *IO = lp->iobase;
1068 netif_stop_queue (dev);
1072 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1075 /* We stop the LANCE here -- it occasionally polls
1076 memory if we don't. */
1083 /* Set or clear the multicast filter for this adaptor.
1084 num_addrs == -1 Promiscuous mode, receive all packets
1085 num_addrs == 0 Normal mode, clear multicast list
1086 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1087 best-effort filtering.
1090 static void set_multicast_list( struct net_device *dev )
1092 { struct lance_private *lp = (struct lance_private *)dev->priv;
1093 struct lance_ioreg *IO = lp->iobase;
1095 if (netif_running(dev))
1096 /* Only possible if board is already started */
1099 /* We take the simple way out and always enable promiscuous mode. */
1100 DREG = CSR0_STOP; /* Temporarily stop the lance. */
1102 if (dev->flags & IFF_PROMISC) {
1103 /* Log any net taps. */
1104 DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1105 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1107 short multicast_table[4];
1108 int num_addrs = dev->mc_count;
1110 /* We don't use the multicast table, but rely on upper-layer
1112 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1113 sizeof(multicast_table) );
1114 for( i = 0; i < 4; i++ )
1115 REGA( CSR8+i ) = multicast_table[i];
1116 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1120 * Always set BSWP after a STOP as STOP puts it back into
1121 * little endian mode.
1123 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1125 /* Resume normal operation and reset AREG to CSR0 */
1126 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1130 /* This is needed for old RieblCards and possible for new RieblCards */
1132 static int lance_set_mac_address( struct net_device *dev, void *addr )
1134 { struct lance_private *lp = (struct lance_private *)dev->priv;
1135 struct sockaddr *saddr = addr;
1138 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1139 return( -EOPNOTSUPP );
1141 if (netif_running(dev)) {
1142 /* Only possible while card isn't started */
1143 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1148 memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1149 for( i = 0; i < 6; i++ )
1150 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1151 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1152 /* set also the magic for future sessions */
1153 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1160 static struct net_device *atarilance_dev;
1162 int __init init_module(void)
1164 atarilance_dev = atarilance_probe(-1);
1165 if (IS_ERR(atarilance_dev))
1166 return PTR_ERR(atarilance_dev);
1170 void __exit cleanup_module(void)
1172 unregister_netdev(atarilance_dev);
1173 free_irq(atarilance_dev->irq, atarilance_dev);
1174 free_netdev(atarilance_dev);