2 * tifm_sd.c - TI FlashMedia driver
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include <linux/tifm.h>
14 #include <linux/mmc/protocol.h>
15 #include <linux/mmc/host.h>
16 #include <linux/highmem.h>
17 #include <linux/scatterlist.h>
20 #define DRIVER_NAME "tifm_sd"
21 #define DRIVER_VERSION "0.8"
23 static int no_dma = 0;
24 static int fixed_timeout = 0;
25 module_param(no_dma, bool, 0644);
26 module_param(fixed_timeout, bool, 0644);
28 /* Constants here are mostly from OMAP5912 datasheet */
29 #define TIFM_MMCSD_RESET 0x0002
30 #define TIFM_MMCSD_CLKMASK 0x03ff
31 #define TIFM_MMCSD_POWER 0x0800
32 #define TIFM_MMCSD_4BBUS 0x8000
33 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
34 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
35 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
36 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
37 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
38 #define TIFM_MMCSD_READ 0x8000
40 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */
41 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
53 #define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */
54 #define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */
56 #define TIFM_MMCSD_FIFO_SIZE 0x0020
58 #define TIFM_MMCSD_RSP_R0 0x0000
59 #define TIFM_MMCSD_RSP_R1 0x0100
60 #define TIFM_MMCSD_RSP_R2 0x0200
61 #define TIFM_MMCSD_RSP_R3 0x0300
62 #define TIFM_MMCSD_RSP_R4 0x0400
63 #define TIFM_MMCSD_RSP_R5 0x0500
64 #define TIFM_MMCSD_RSP_R6 0x0600
66 #define TIFM_MMCSD_RSP_BUSY 0x0800
68 #define TIFM_MMCSD_CMD_BC 0x0000
69 #define TIFM_MMCSD_CMD_BCR 0x1000
70 #define TIFM_MMCSD_CMD_AC 0x2000
71 #define TIFM_MMCSD_CMD_ADTC 0x3000
73 #define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL
88 unsigned short eject:1,
91 unsigned short cmd_flags;
93 unsigned int clk_freq;
95 unsigned long timeout_jiffies;
97 struct tasklet_struct finish_tasklet;
98 struct timer_list timer;
99 struct mmc_request *req;
103 unsigned int block_pos;
104 struct scatterlist bounce_buf;
105 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE];
108 /* for some reason, host won't respond correctly to readw/writew */
109 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
110 unsigned int off, unsigned int cnt)
112 struct tifm_dev *sock = host->dev;
114 unsigned int pos = 0, val;
116 buf = kmap_atomic(pg, KM_BIO_DST_IRQ) + off;
117 if (host->cmd_flags & DATA_CARRY) {
118 buf[pos++] = host->bounce_buf_data[0];
119 host->cmd_flags &= ~DATA_CARRY;
123 val = readl(sock->addr + SOCK_MMCSD_DATA);
124 buf[pos++] = val & 0xff;
126 host->bounce_buf_data[0] = (val >> 8) & 0xff;
127 host->cmd_flags |= DATA_CARRY;
130 buf[pos++] = (val >> 8) & 0xff;
132 kunmap_atomic(buf - off, KM_BIO_DST_IRQ);
135 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
136 unsigned int off, unsigned int cnt)
138 struct tifm_dev *sock = host->dev;
140 unsigned int pos = 0, val;
142 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + off;
143 if (host->cmd_flags & DATA_CARRY) {
144 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
145 writel(val, sock->addr + SOCK_MMCSD_DATA);
146 host->cmd_flags &= ~DATA_CARRY;
152 host->bounce_buf_data[0] = val & 0xff;
153 host->cmd_flags |= DATA_CARRY;
156 val |= (buf[pos++] << 8) & 0xff00;
157 writel(val, sock->addr + SOCK_MMCSD_DATA);
159 kunmap_atomic(buf - off, KM_BIO_SRC_IRQ);
162 static void tifm_sd_transfer_data(struct tifm_sd *host)
164 struct mmc_data *r_data = host->req->cmd->data;
165 struct scatterlist *sg = r_data->sg;
166 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
167 unsigned int p_off, p_cnt;
170 if (host->sg_pos == host->sg_len)
173 cnt = sg[host->sg_pos].length - host->block_pos;
177 if (host->sg_pos == host->sg_len) {
178 if ((r_data->flags & MMC_DATA_WRITE)
180 writel(host->bounce_buf_data[0],
186 cnt = sg[host->sg_pos].length;
188 off = sg[host->sg_pos].offset + host->block_pos;
190 pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT);
191 p_off = offset_in_page(off);
192 p_cnt = PAGE_SIZE - p_off;
193 p_cnt = min(p_cnt, cnt);
194 p_cnt = min(p_cnt, t_size);
196 if (r_data->flags & MMC_DATA_READ)
197 tifm_sd_read_fifo(host, pg, p_off, p_cnt);
198 else if (r_data->flags & MMC_DATA_WRITE)
199 tifm_sd_write_fifo(host, pg, p_off, p_cnt);
202 host->block_pos += p_cnt;
206 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
207 struct page *src, unsigned int src_off,
210 unsigned char *src_buf = kmap_atomic(src, KM_BIO_SRC_IRQ) + src_off;
211 unsigned char *dst_buf = kmap_atomic(dst, KM_BIO_DST_IRQ) + dst_off;
213 memcpy(dst_buf, src_buf, count);
215 kunmap_atomic(dst_buf - dst_off, KM_BIO_DST_IRQ);
216 kunmap_atomic(src_buf - src_off, KM_BIO_SRC_IRQ);
219 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data)
221 struct scatterlist *sg = r_data->sg;
222 unsigned int t_size = r_data->blksz;
223 unsigned int off, cnt;
224 unsigned int p_off, p_cnt;
227 dev_dbg(&host->dev->dev, "bouncing block\n");
229 cnt = sg[host->sg_pos].length - host->block_pos;
233 if (host->sg_pos == host->sg_len)
235 cnt = sg[host->sg_pos].length;
237 off = sg[host->sg_pos].offset + host->block_pos;
239 pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT);
240 p_off = offset_in_page(off);
241 p_cnt = PAGE_SIZE - p_off;
242 p_cnt = min(p_cnt, cnt);
243 p_cnt = min(p_cnt, t_size);
245 if (r_data->flags & MMC_DATA_WRITE)
246 tifm_sd_copy_page(host->bounce_buf.page,
247 r_data->blksz - t_size,
249 else if (r_data->flags & MMC_DATA_READ)
250 tifm_sd_copy_page(pg, p_off, host->bounce_buf.page,
251 r_data->blksz - t_size, p_cnt);
254 host->block_pos += p_cnt;
258 int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data)
260 struct tifm_dev *sock = host->dev;
261 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz;
262 unsigned int dma_len, dma_blk_cnt, dma_off;
263 struct scatterlist *sg = NULL;
266 if (host->sg_pos == host->sg_len)
269 if (host->cmd_flags & DATA_CARRY) {
270 host->cmd_flags &= ~DATA_CARRY;
271 local_irq_save(flags);
272 tifm_sd_bounce_block(host, r_data);
273 local_irq_restore(flags);
274 if (host->sg_pos == host->sg_len)
278 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
282 if (host->sg_pos == host->sg_len)
284 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
287 if (dma_len < t_size) {
288 dma_blk_cnt = dma_len / r_data->blksz;
289 dma_off = host->block_pos;
290 host->block_pos += dma_blk_cnt * r_data->blksz;
292 dma_blk_cnt = TIFM_DMA_TSIZE;
293 dma_off = host->block_pos;
294 host->block_pos += t_size;
298 sg = &r_data->sg[host->sg_pos];
300 if (r_data->flags & MMC_DATA_WRITE) {
301 local_irq_save(flags);
302 tifm_sd_bounce_block(host, r_data);
303 local_irq_restore(flags);
305 host->cmd_flags |= DATA_CARRY;
307 sg = &host->bounce_buf;
313 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt);
314 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
315 if (r_data->flags & MMC_DATA_WRITE)
316 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
317 sock->addr + SOCK_DMA_CONTROL);
319 writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
320 sock->addr + SOCK_DMA_CONTROL);
325 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
329 switch (mmc_resp_type(cmd)) {
331 rc |= TIFM_MMCSD_RSP_R0;
334 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
336 rc |= TIFM_MMCSD_RSP_R1;
339 rc |= TIFM_MMCSD_RSP_R2;
342 rc |= TIFM_MMCSD_RSP_R3;
348 switch (mmc_cmd_type(cmd)) {
350 rc |= TIFM_MMCSD_CMD_BC;
353 rc |= TIFM_MMCSD_CMD_BCR;
356 rc |= TIFM_MMCSD_CMD_AC;
359 rc |= TIFM_MMCSD_CMD_ADTC;
367 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
369 struct tifm_dev *sock = host->dev;
370 unsigned int cmd_mask = tifm_sd_op_flags(cmd);
372 if (host->open_drain)
373 cmd_mask |= TIFM_MMCSD_ODTO;
375 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
376 cmd_mask |= TIFM_MMCSD_READ;
378 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
379 cmd->opcode, cmd->arg, cmd_mask);
381 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
382 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
383 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
386 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
388 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
389 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
390 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
391 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
392 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
393 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
394 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
395 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
398 static void tifm_sd_check_status(struct tifm_sd *host)
400 struct tifm_dev *sock = host->dev;
401 struct mmc_command *cmd = host->req->cmd;
403 if (cmd->error != MMC_ERR_NONE)
406 if (!(host->cmd_flags & CMD_READY))
410 if (cmd->data->error != MMC_ERR_NONE) {
411 if ((host->cmd_flags & SCMD_ACTIVE)
412 && !(host->cmd_flags & SCMD_READY))
418 if (!(host->cmd_flags & BRS_READY))
421 if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
424 if (cmd->data->flags & MMC_DATA_WRITE) {
425 if (host->req->stop) {
426 if (!(host->cmd_flags & SCMD_ACTIVE)) {
427 host->cmd_flags |= SCMD_ACTIVE;
428 writel(TIFM_MMCSD_EOFB
430 + SOCK_MMCSD_INT_ENABLE),
432 + SOCK_MMCSD_INT_ENABLE);
433 tifm_sd_exec(host, host->req->stop);
436 if (!(host->cmd_flags & SCMD_READY)
437 || (host->cmd_flags & CARD_BUSY))
439 writel((~TIFM_MMCSD_EOFB)
441 + SOCK_MMCSD_INT_ENABLE),
443 + SOCK_MMCSD_INT_ENABLE);
446 if (host->cmd_flags & CARD_BUSY)
448 writel((~TIFM_MMCSD_EOFB)
450 + SOCK_MMCSD_INT_ENABLE),
451 sock->addr + SOCK_MMCSD_INT_ENABLE);
454 if (host->req->stop) {
455 if (!(host->cmd_flags & SCMD_ACTIVE)) {
456 host->cmd_flags |= SCMD_ACTIVE;
457 tifm_sd_exec(host, host->req->stop);
460 if (!(host->cmd_flags & SCMD_READY))
467 tasklet_schedule(&host->finish_tasklet);
470 /* Called from interrupt handler */
471 static void tifm_sd_data_event(struct tifm_dev *sock)
473 struct tifm_sd *host;
474 unsigned int fifo_status = 0;
475 struct mmc_data *r_data = NULL;
477 spin_lock(&sock->lock);
478 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
479 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
480 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
481 fifo_status, host->cmd_flags);
484 r_data = host->req->cmd->data;
486 if (r_data && (fifo_status & TIFM_FIFO_READY)) {
487 if (tifm_sd_set_dma_data(host, r_data)) {
488 host->cmd_flags |= FIFO_READY;
489 tifm_sd_check_status(host);
494 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
495 spin_unlock(&sock->lock);
498 /* Called from interrupt handler */
499 static void tifm_sd_card_event(struct tifm_dev *sock)
501 struct tifm_sd *host;
502 unsigned int host_status = 0;
503 int cmd_error = MMC_ERR_NONE;
504 struct mmc_command *cmd = NULL;
507 spin_lock(&sock->lock);
508 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
509 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
510 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
511 host_status, host->cmd_flags);
514 cmd = host->req->cmd;
516 if (host_status & TIFM_MMCSD_ERRMASK) {
517 writel(host_status & TIFM_MMCSD_ERRMASK,
518 sock->addr + SOCK_MMCSD_STATUS);
519 if (host_status & TIFM_MMCSD_CTO)
520 cmd_error = MMC_ERR_TIMEOUT;
521 else if (host_status & TIFM_MMCSD_CCRC)
522 cmd_error = MMC_ERR_BADCRC;
525 if (host_status & TIFM_MMCSD_DTO)
526 cmd->data->error = MMC_ERR_TIMEOUT;
527 else if (host_status & TIFM_MMCSD_DCRC)
528 cmd->data->error = MMC_ERR_BADCRC;
531 writel(TIFM_FIFO_INT_SETALL,
532 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
533 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
535 if (host->req->stop) {
536 if (host->cmd_flags & SCMD_ACTIVE) {
537 host->req->stop->error = cmd_error;
538 host->cmd_flags |= SCMD_READY;
540 cmd->error = cmd_error;
541 host->cmd_flags |= SCMD_ACTIVE;
542 tifm_sd_exec(host, host->req->stop);
546 cmd->error = cmd_error;
548 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
549 if (!(host->cmd_flags & CMD_READY)) {
550 host->cmd_flags |= CMD_READY;
551 tifm_sd_fetch_resp(cmd, sock);
552 } else if (host->cmd_flags & SCMD_ACTIVE) {
553 host->cmd_flags |= SCMD_READY;
554 tifm_sd_fetch_resp(host->req->stop,
558 if (host_status & TIFM_MMCSD_BRS)
559 host->cmd_flags |= BRS_READY;
562 if (host->no_dma && cmd->data) {
563 if (host_status & TIFM_MMCSD_AE)
564 writel(host_status & TIFM_MMCSD_AE,
565 sock->addr + SOCK_MMCSD_STATUS);
567 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF
569 local_irq_save(flags);
570 tifm_sd_transfer_data(host);
571 local_irq_restore(flags);
572 host_status &= ~TIFM_MMCSD_AE;
576 if (host_status & TIFM_MMCSD_EOFB)
577 host->cmd_flags &= ~CARD_BUSY;
578 else if (host_status & TIFM_MMCSD_CB)
579 host->cmd_flags |= CARD_BUSY;
581 tifm_sd_check_status(host);
584 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
585 spin_unlock(&sock->lock);
588 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
589 struct mmc_data *data)
591 struct tifm_dev *sock = host->dev;
592 unsigned int data_timeout = data->timeout_clks;
597 data_timeout += data->timeout_ns /
598 ((1000000000UL / host->clk_freq) * host->clk_div);
600 if (data_timeout < 0xffff) {
601 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
602 writel((~TIFM_MMCSD_DPE)
603 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
604 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
606 data_timeout = (data_timeout >> 10) + 1;
607 if (data_timeout > 0xffff)
608 data_timeout = 0; /* set to unlimited */
609 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
610 writel(TIFM_MMCSD_DPE
611 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
612 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
616 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
618 struct tifm_sd *host = mmc_priv(mmc);
619 struct tifm_dev *sock = host->dev;
621 struct mmc_data *r_data = mrq->cmd->data;
623 spin_lock_irqsave(&sock->lock, flags);
625 spin_unlock_irqrestore(&sock->lock, flags);
630 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
631 spin_unlock_irqrestore(&sock->lock, flags);
640 tifm_sd_set_data_timeout(host, r_data);
642 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop)
643 writel(TIFM_MMCSD_EOFB
644 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
645 sock->addr + SOCK_MMCSD_INT_ENABLE);
648 writel(TIFM_MMCSD_BUFINT
649 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
650 sock->addr + SOCK_MMCSD_INT_ENABLE);
651 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
652 | (TIFM_MMCSD_FIFO_SIZE - 1),
653 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
655 host->sg_len = r_data->sg_len;
657 sg_init_one(&host->bounce_buf, host->bounce_buf_data,
660 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
661 r_data->flags & MMC_DATA_WRITE
663 : PCI_DMA_FROMDEVICE)) {
664 printk(KERN_ERR "%s : scatterlist map failed\n",
666 spin_unlock_irqrestore(&sock->lock, flags);
669 host->sg_len = tifm_map_sg(sock, r_data->sg,
674 : PCI_DMA_FROMDEVICE);
675 if (host->sg_len < 1) {
676 printk(KERN_ERR "%s : scatterlist map failed\n",
678 tifm_unmap_sg(sock, &host->bounce_buf, 1,
679 r_data->flags & MMC_DATA_WRITE
681 : PCI_DMA_FROMDEVICE);
682 spin_unlock_irqrestore(&sock->lock, flags);
686 writel(TIFM_FIFO_INT_SETALL,
687 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
688 writel(ilog2(r_data->blksz) - 2,
689 sock->addr + SOCK_FIFO_PAGE_SIZE);
690 writel(TIFM_FIFO_ENABLE,
691 sock->addr + SOCK_FIFO_CONTROL);
692 writel(TIFM_FIFO_INTMASK,
693 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
695 if (r_data->flags & MMC_DATA_WRITE)
696 writel(TIFM_MMCSD_TXDE,
697 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
699 writel(TIFM_MMCSD_RXDE,
700 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
702 tifm_sd_set_dma_data(host, r_data);
705 writel(r_data->blocks - 1,
706 sock->addr + SOCK_MMCSD_NUM_BLOCKS);
707 writel(r_data->blksz - 1,
708 sock->addr + SOCK_MMCSD_BLOCK_LEN);
712 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
713 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
714 sock->addr + SOCK_CONTROL);
715 tifm_sd_exec(host, mrq->cmd);
716 spin_unlock_irqrestore(&sock->lock, flags);
720 mrq->cmd->error = MMC_ERR_TIMEOUT;
721 mmc_request_done(mmc, mrq);
724 static void tifm_sd_end_cmd(unsigned long data)
726 struct tifm_sd *host = (struct tifm_sd*)data;
727 struct tifm_dev *sock = host->dev;
728 struct mmc_host *mmc = tifm_get_drvdata(sock);
729 struct mmc_request *mrq;
730 struct mmc_data *r_data = NULL;
733 spin_lock_irqsave(&sock->lock, flags);
735 del_timer(&host->timer);
740 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
741 spin_unlock_irqrestore(&sock->lock, flags);
745 r_data = mrq->cmd->data;
748 writel((~TIFM_MMCSD_BUFINT)
749 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
750 sock->addr + SOCK_MMCSD_INT_ENABLE);
752 tifm_unmap_sg(sock, &host->bounce_buf, 1,
753 (r_data->flags & MMC_DATA_WRITE)
754 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
755 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
756 (r_data->flags & MMC_DATA_WRITE)
757 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
760 r_data->bytes_xfered = r_data->blocks
761 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
762 r_data->bytes_xfered *= r_data->blksz;
763 r_data->bytes_xfered += r_data->blksz
764 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
767 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
768 sock->addr + SOCK_CONTROL);
770 spin_unlock_irqrestore(&sock->lock, flags);
771 mmc_request_done(mmc, mrq);
774 static void tifm_sd_abort(unsigned long data)
776 struct tifm_sd *host = (struct tifm_sd*)data;
778 printk(KERN_ERR DRIVER_NAME
779 ": card failed to respond for a long period of time\n");
781 tifm_eject(host->dev);
784 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
786 struct tifm_sd *host = mmc_priv(mmc);
787 struct tifm_dev *sock = host->dev;
788 unsigned int clk_div1, clk_div2;
791 spin_lock_irqsave(&sock->lock, flags);
793 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
795 if (ios->bus_width == MMC_BUS_WIDTH_4) {
796 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
797 sock->addr + SOCK_MMCSD_CONFIG);
799 writel((~TIFM_MMCSD_4BBUS)
800 & readl(sock->addr + SOCK_MMCSD_CONFIG),
801 sock->addr + SOCK_MMCSD_CONFIG);
805 clk_div1 = 20000000 / ios->clock;
809 clk_div2 = 24000000 / ios->clock;
813 if ((20000000 / clk_div1) > ios->clock)
815 if ((24000000 / clk_div2) > ios->clock)
817 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
818 host->clk_freq = 20000000;
819 host->clk_div = clk_div1;
820 writel((~TIFM_CTRL_FAST_CLK)
821 & readl(sock->addr + SOCK_CONTROL),
822 sock->addr + SOCK_CONTROL);
824 host->clk_freq = 24000000;
825 host->clk_div = clk_div2;
826 writel(TIFM_CTRL_FAST_CLK
827 | readl(sock->addr + SOCK_CONTROL),
828 sock->addr + SOCK_CONTROL);
833 host->clk_div &= TIFM_MMCSD_CLKMASK;
835 | ((~TIFM_MMCSD_CLKMASK)
836 & readl(sock->addr + SOCK_MMCSD_CONFIG)),
837 sock->addr + SOCK_MMCSD_CONFIG);
839 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
841 /* chip_select : maybe later */
843 //power is set before probe / after remove
845 spin_unlock_irqrestore(&sock->lock, flags);
848 static int tifm_sd_ro(struct mmc_host *mmc)
851 struct tifm_sd *host = mmc_priv(mmc);
852 struct tifm_dev *sock = host->dev;
855 spin_lock_irqsave(&sock->lock, flags);
856 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
858 spin_unlock_irqrestore(&sock->lock, flags);
862 static const struct mmc_host_ops tifm_sd_ops = {
863 .request = tifm_sd_request,
864 .set_ios = tifm_sd_ios,
868 static int tifm_sd_initialize_host(struct tifm_sd *host)
871 unsigned int host_status = 0;
872 struct tifm_dev *sock = host->dev;
874 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
877 host->clk_freq = 20000000;
878 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
879 writel(host->clk_div | TIFM_MMCSD_POWER,
880 sock->addr + SOCK_MMCSD_CONFIG);
882 /* wait up to 0.51 sec for reset */
883 for (rc = 32; rc <= 256; rc <<= 1) {
884 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
892 printk(KERN_ERR "%s : controller failed to reset\n",
897 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
898 writel(host->clk_div | TIFM_MMCSD_POWER,
899 sock->addr + SOCK_MMCSD_CONFIG);
900 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
902 // command timeout fixed to 64 clocks for now
903 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
904 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
906 for (rc = 16; rc <= 64; rc <<= 1) {
907 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
908 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
909 if (!(host_status & TIFM_MMCSD_ERRMASK)
910 && (host_status & TIFM_MMCSD_EOC)) {
919 "%s : card not ready - probe failed on initialization\n",
924 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
925 | TIFM_MMCSD_ERRMASK,
926 sock->addr + SOCK_MMCSD_INT_ENABLE);
932 static int tifm_sd_probe(struct tifm_dev *sock)
934 struct mmc_host *mmc;
935 struct tifm_sd *host;
938 if (!(TIFM_SOCK_STATE_OCCUPIED
939 & readl(sock->addr + SOCK_PRESENT_STATE))) {
940 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
944 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
948 host = mmc_priv(mmc);
949 host->no_dma = no_dma;
950 tifm_set_drvdata(sock, mmc);
952 host->timeout_jiffies = msecs_to_jiffies(1000);
954 tasklet_init(&host->finish_tasklet, tifm_sd_end_cmd,
955 (unsigned long)host);
956 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
958 mmc->ops = &tifm_sd_ops;
959 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
960 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
961 mmc->f_min = 20000000 / 60;
962 mmc->f_max = 24000000;
964 mmc->max_blk_count = 2048;
965 mmc->max_hw_segs = mmc->max_blk_count;
966 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE);
967 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size;
968 mmc->max_req_size = mmc->max_seg_size;
969 mmc->max_phys_segs = mmc->max_hw_segs;
971 sock->card_event = tifm_sd_card_event;
972 sock->data_event = tifm_sd_data_event;
973 rc = tifm_sd_initialize_host(host);
976 rc = mmc_add_host(mmc);
986 static void tifm_sd_remove(struct tifm_dev *sock)
988 struct mmc_host *mmc = tifm_get_drvdata(sock);
989 struct tifm_sd *host = mmc_priv(mmc);
992 spin_lock_irqsave(&sock->lock, flags);
994 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
996 spin_unlock_irqrestore(&sock->lock, flags);
998 tasklet_kill(&host->finish_tasklet);
1000 spin_lock_irqsave(&sock->lock, flags);
1002 writel(TIFM_FIFO_INT_SETALL,
1003 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1004 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
1005 host->req->cmd->error = MMC_ERR_TIMEOUT;
1006 if (host->req->stop)
1007 host->req->stop->error = MMC_ERR_TIMEOUT;
1008 tasklet_schedule(&host->finish_tasklet);
1010 spin_unlock_irqrestore(&sock->lock, flags);
1011 mmc_remove_host(mmc);
1012 dev_dbg(&sock->dev, "after remove\n");
1014 /* The meaning of the bit majority in this constant is unknown. */
1015 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
1016 sock->addr + SOCK_CONTROL);
1023 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
1025 struct mmc_host *mmc = tifm_get_drvdata(sock);
1028 rc = mmc_suspend_host(mmc, state);
1029 /* The meaning of the bit majority in this constant is unknown. */
1030 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
1031 sock->addr + SOCK_CONTROL);
1035 static int tifm_sd_resume(struct tifm_dev *sock)
1037 struct mmc_host *mmc = tifm_get_drvdata(sock);
1038 struct tifm_sd *host = mmc_priv(mmc);
1041 rc = tifm_sd_initialize_host(host);
1042 dev_dbg(&sock->dev, "resume initialize %d\n", rc);
1047 rc = mmc_resume_host(mmc);
1054 #define tifm_sd_suspend NULL
1055 #define tifm_sd_resume NULL
1057 #endif /* CONFIG_PM */
1059 static struct tifm_device_id tifm_sd_id_tbl[] = {
1060 { TIFM_TYPE_SD }, { }
1063 static struct tifm_driver tifm_sd_driver = {
1065 .name = DRIVER_NAME,
1066 .owner = THIS_MODULE
1068 .id_table = tifm_sd_id_tbl,
1069 .probe = tifm_sd_probe,
1070 .remove = tifm_sd_remove,
1071 .suspend = tifm_sd_suspend,
1072 .resume = tifm_sd_resume
1075 static int __init tifm_sd_init(void)
1077 return tifm_register_driver(&tifm_sd_driver);
1080 static void __exit tifm_sd_exit(void)
1082 tifm_unregister_driver(&tifm_sd_driver);
1085 MODULE_AUTHOR("Alex Dubov");
1086 MODULE_DESCRIPTION("TI FlashMedia SD driver");
1087 MODULE_LICENSE("GPL");
1088 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
1089 MODULE_VERSION(DRIVER_VERSION);
1091 module_init(tifm_sd_init);
1092 module_exit(tifm_sd_exit);