drivers/mmc/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/highmem.h>
  13 #include <linux/pci.h>
  14 #include <linux/dma-mapping.h>
  15
  16 #include <linux/mmc/host.h>
  17 #include <linux/mmc/protocol.h>
  18
  19 #include <asm/scatterlist.h>
  20
  21 #include "sdhci.h"
  22
  23 #define DRIVER_NAME "sdhci"
  24 #define DRIVER_VERSION "0.11"
  25
  26 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
  27
  28 #define DBG(f, x...) \
  29         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  30
  31 static unsigned int debug_nodma = 0;
  32 static unsigned int debug_forcedma = 0;
  33 static unsigned int debug_quirks = 0;
  34
  35 static const struct pci_device_id pci_ids[] __devinitdata = {
  36         /* handle any SD host controller */
  37         {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
  38         { /* end: all zeroes */ },
  39 };
  40
  41 MODULE_DEVICE_TABLE(pci, pci_ids);
  42
  43 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  44 static void sdhci_finish_data(struct sdhci_host *);
  45
  46 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  47 static void sdhci_finish_command(struct sdhci_host *);
  48
  49 static void sdhci_dumpregs(struct sdhci_host *host)
  50 {
  51         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  52
  53         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  54                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
  55                 readw(host->ioaddr + SDHCI_HOST_VERSION));
  56         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  57                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
  58                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
  59         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  60                 readl(host->ioaddr + SDHCI_ARGUMENT),
  61                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
  62         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  63                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
  64                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
  65         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  66                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
  67                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
  68         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  69                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
  70                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
  71         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  72                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
  73                 readl(host->ioaddr + SDHCI_INT_STATUS));
  74         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  75                 readl(host->ioaddr + SDHCI_INT_ENABLE),
  76                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
  77         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  78                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
  79                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
  80         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  81                 readl(host->ioaddr + SDHCI_CAPABILITIES),
  82                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
  83
  84         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  85 }
  86
  87 /*****************************************************************************\
  88  *                                                                           *
  89  * Low level functions                                                       *
  90  *                                                                           *
  91 \*****************************************************************************/
  92
  93 static void sdhci_reset(struct sdhci_host *host, u8 mask)
  94 {
  95         unsigned long timeout;
  96
  97         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
  98
  99         if (mask & SDHCI_RESET_ALL)
 100                 host->clock = 0;
 101
 102         /* Wait max 100 ms */
 103         timeout = 100;
 104
 105         /* hw clears the bit when it's done */
 106         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 107                 if (timeout == 0) {
 108                         printk(KERN_ERR "%s: Reset 0x%x never completed. "
 109                                 "Please report this to " BUGMAIL ".\n",
 110                                 mmc_hostname(host->mmc), (int)mask);
 111                         sdhci_dumpregs(host);
 112                         return;
 113                 }
 114                 timeout--;
 115                 mdelay(1);
 116         }
 117 }
 118
 119 static void sdhci_init(struct sdhci_host *host)
 120 {
 121         u32 intmask;
 122
 123         sdhci_reset(host, SDHCI_RESET_ALL);
 124
 125         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 126                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 127                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 128                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
 129                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
 130                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
 131
 132         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 133         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 134 }
 135
 136 static void sdhci_activate_led(struct sdhci_host *host)
 137 {
 138         u8 ctrl;
 139
 140         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 141         ctrl |= SDHCI_CTRL_LED;
 142         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 143 }
 144
 145 static void sdhci_deactivate_led(struct sdhci_host *host)
 146 {
 147         u8 ctrl;
 148
 149         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 150         ctrl &= ~SDHCI_CTRL_LED;
 151         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 152 }
 153
 154 /*****************************************************************************\
 155  *                                                                           *
 156  * Core functions                                                            *
 157  *                                                                           *
 158 \*****************************************************************************/
 159
 160 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
 161 {
 162         host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
 163         return host->mapped_sg + host->cur_sg->offset;
 164 }
 165
 166 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
 167 {
 168         kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
 169 }
 170
 171 static inline int sdhci_next_sg(struct sdhci_host* host)
 172 {
 173         /*
 174          * Skip to next SG entry.
 175          */
 176         host->cur_sg++;
 177         host->num_sg--;
 178
 179         /*
 180          * Any entries left?
 181          */
 182         if (host->num_sg > 0) {
 183                 host->offset = 0;
 184                 host->remain = host->cur_sg->length;
 185         }
 186
 187         return host->num_sg;
 188 }
 189
 190 static void sdhci_read_block_pio(struct sdhci_host *host)
 191 {
 192         int blksize, chunk_remain;
 193         u32 data;
 194         char *buffer;
 195         int size;
 196
 197         DBG("PIO reading\n");
 198
 199         blksize = host->data->blksz;
 200         chunk_remain = 0;
 201         data = 0;
 202
 203         buffer = sdhci_kmap_sg(host) + host->offset;
 204
 205         while (blksize) {
 206                 if (chunk_remain == 0) {
 207                         data = readl(host->ioaddr + SDHCI_BUFFER);
 208                         chunk_remain = min(blksize, 4);
 209                 }
 210
 211                 size = min(host->size, host->remain);
 212                 size = min(size, chunk_remain);
 213
 214                 chunk_remain -= size;
 215                 blksize -= size;
 216                 host->offset += size;
 217                 host->remain -= size;
 218                 host->size -= size;
 219                 while (size) {
 220                         *buffer = data & 0xFF;
 221                         buffer++;
 222                         data >>= 8;
 223                         size--;
 224                 }
 225
 226                 if (host->remain == 0) {
 227                         sdhci_kunmap_sg(host);
 228                         if (sdhci_next_sg(host) == 0) {
 229                                 BUG_ON(blksize != 0);
 230                                 return;
 231                         }
 232                         buffer = sdhci_kmap_sg(host);
 233                 }
 234         }
 235
 236         sdhci_kunmap_sg(host);
 237 }
 238
 239 static void sdhci_write_block_pio(struct sdhci_host *host)
 240 {
 241         int blksize, chunk_remain;
 242         u32 data;
 243         char *buffer;
 244         int bytes, size;
 245
 246         DBG("PIO writing\n");
 247
 248         blksize = host->data->blksz;
 249         chunk_remain = 4;
 250         data = 0;
 251
 252         bytes = 0;
 253         buffer = sdhci_kmap_sg(host) + host->offset;
 254
 255         while (blksize) {
 256                 size = min(host->size, host->remain);
 257                 size = min(size, chunk_remain);
 258
 259                 chunk_remain -= size;
 260                 blksize -= size;
 261                 host->offset += size;
 262                 host->remain -= size;
 263                 host->size -= size;
 264                 while (size) {
 265                         data >>= 8;
 266                         data |= (u32)*buffer << 24;
 267                         buffer++;
 268                         size--;
 269                 }
 270
 271                 if (chunk_remain == 0) {
 272                         writel(data, host->ioaddr + SDHCI_BUFFER);
 273                         chunk_remain = min(blksize, 4);
 274                 }
 275
 276                 if (host->remain == 0) {
 277                         sdhci_kunmap_sg(host);
 278                         if (sdhci_next_sg(host) == 0) {
 279                                 BUG_ON(blksize != 0);
 280                                 return;
 281                         }
 282                         buffer = sdhci_kmap_sg(host);
 283                 }
 284         }
 285
 286         sdhci_kunmap_sg(host);
 287 }
 288
 289 static void sdhci_transfer_pio(struct sdhci_host *host)
 290 {
 291         u32 mask;
 292
 293         BUG_ON(!host->data);
 294
 295         if (host->size == 0)
 296                 return;
 297
 298         if (host->data->flags & MMC_DATA_READ)
 299                 mask = SDHCI_DATA_AVAILABLE;
 300         else
 301                 mask = SDHCI_SPACE_AVAILABLE;
 302
 303         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 304                 if (host->data->flags & MMC_DATA_READ)
 305                         sdhci_read_block_pio(host);
 306                 else
 307                         sdhci_write_block_pio(host);
 308
 309                 if (host->size == 0)
 310                         break;
 311
 312                 BUG_ON(host->num_sg == 0);
 313         }
 314
 315         DBG("PIO transfer complete.\n");
 316 }
 317
 318 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 319 {
 320         u8 count;
 321         unsigned target_timeout, current_timeout;
 322
 323         WARN_ON(host->data);
 324
 325         if (data == NULL)
 326                 return;
 327
 328         DBG("blksz %04x blks %04x flags %08x\n",
 329                 data->blksz, data->blocks, data->flags);
 330         DBG("tsac %d ms nsac %d clk\n",
 331                 data->timeout_ns / 1000000, data->timeout_clks);
 332
 333         /* Sanity checks */
 334         BUG_ON(data->blksz * data->blocks > 524288);
 335         BUG_ON(data->blksz > host->max_block);
 336         BUG_ON(data->blocks > 65535);
 337
 338         /* timeout in us */
 339         target_timeout = data->timeout_ns / 1000 +
 340                 data->timeout_clks / host->clock;
 341
 342         /*
 343          * Figure out needed cycles.
 344          * We do this in steps in order to fit inside a 32 bit int.
 345          * The first step is the minimum timeout, which will have a
 346          * minimum resolution of 6 bits:
 347          * (1) 2^13*1000 > 2^22,
 348          * (2) host->timeout_clk < 2^16
 349          *     =>
 350          *     (1) / (2) > 2^6
 351          */
 352         count = 0;
 353         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 354         while (current_timeout < target_timeout) {
 355                 count++;
 356                 current_timeout <<= 1;
 357                 if (count >= 0xF)
 358                         break;
 359         }
 360
 361         if (count >= 0xF) {
 362                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 363                         mmc_hostname(host->mmc));
 364                 count = 0xE;
 365         }
 366
 367         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 368
 369         if (host->flags & SDHCI_USE_DMA) {
 370                 int count;
 371
 372                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 373                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 374                 BUG_ON(count != 1);
 375
 376                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 377         } else {
 378                 host->size = data->blksz * data->blocks;
 379
 380                 host->cur_sg = data->sg;
 381                 host->num_sg = data->sg_len;
 382
 383                 host->offset = 0;
 384                 host->remain = host->cur_sg->length;
 385         }
 386
 387         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 388         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
 389                 host->ioaddr + SDHCI_BLOCK_SIZE);
 390         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 391 }
 392
 393 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 394         struct mmc_data *data)
 395 {
 396         u16 mode;
 397
 398         WARN_ON(host->data);
 399
 400         if (data == NULL)
 401                 return;
 402
 403         mode = SDHCI_TRNS_BLK_CNT_EN;
 404         if (data->blocks > 1)
 405                 mode |= SDHCI_TRNS_MULTI;
 406         if (data->flags & MMC_DATA_READ)
 407                 mode |= SDHCI_TRNS_READ;
 408         if (host->flags & SDHCI_USE_DMA)
 409                 mode |= SDHCI_TRNS_DMA;
 410
 411         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 412 }
 413
 414 static void sdhci_finish_data(struct sdhci_host *host)
 415 {
 416         struct mmc_data *data;
 417         u16 blocks;
 418
 419         BUG_ON(!host->data);
 420
 421         data = host->data;
 422         host->data = NULL;
 423
 424         if (host->flags & SDHCI_USE_DMA) {
 425                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 426                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 427         }
 428
 429         /*
 430          * Controller doesn't count down when in single block mode.
 431          */
 432         if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
 433                 blocks = 0;
 434         else
 435                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 436         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 437
 438         if ((data->error == MMC_ERR_NONE) && blocks) {
 439                 printk(KERN_ERR "%s: Controller signalled completion even "
 440                         "though there were blocks left. Please report this "
 441                         "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
 442                 data->error = MMC_ERR_FAILED;
 443         }
 444
 445         if (host->size != 0) {
 446                 printk(KERN_ERR "%s: %d bytes were left untransferred. "
 447                         "Please report this to " BUGMAIL ".\n",
 448                         mmc_hostname(host->mmc), host->size);
 449                 data->error = MMC_ERR_FAILED;
 450         }
 451
 452         DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
 453
 454         if (data->stop) {
 455                 /*
 456                  * The controller needs a reset of internal state machines
 457                  * upon error conditions.
 458                  */
 459                 if (data->error != MMC_ERR_NONE) {
 460                         sdhci_reset(host, SDHCI_RESET_CMD);
 461                         sdhci_reset(host, SDHCI_RESET_DATA);
 462                 }
 463
 464                 sdhci_send_command(host, data->stop);
 465         } else
 466                 tasklet_schedule(&host->finish_tasklet);
 467 }
 468
 469 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 470 {
 471         int flags;
 472         u32 mask;
 473         unsigned long timeout;
 474
 475         WARN_ON(host->cmd);
 476
 477         DBG("Sending cmd (%x)\n", cmd->opcode);
 478
 479         /* Wait max 10 ms */
 480         timeout = 10;
 481
 482         mask = SDHCI_CMD_INHIBIT;
 483         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 484                 mask |= SDHCI_DATA_INHIBIT;
 485
 486         /* We shouldn't wait for data inihibit for stop commands, even
 487            though they might use busy signaling */
 488         if (host->mrq->data && (cmd == host->mrq->data->stop))
 489                 mask &= ~SDHCI_DATA_INHIBIT;
 490
 491         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 492                 if (timeout == 0) {
 493                         printk(KERN_ERR "%s: Controller never released "
 494                                 "inhibit bit(s). Please report this to "
 495                                 BUGMAIL ".\n", mmc_hostname(host->mmc));
 496                         sdhci_dumpregs(host);
 497                         cmd->error = MMC_ERR_FAILED;
 498                         tasklet_schedule(&host->finish_tasklet);
 499                         return;
 500                 }
 501                 timeout--;
 502                 mdelay(1);
 503         }
 504
 505         mod_timer(&host->timer, jiffies + 10 * HZ);
 506
 507         host->cmd = cmd;
 508
 509         sdhci_prepare_data(host, cmd->data);
 510
 511         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 512
 513         sdhci_set_transfer_mode(host, cmd->data);
 514
 515         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 516                 printk(KERN_ERR "%s: Unsupported response type! "
 517                         "Please report this to " BUGMAIL ".\n",
 518                         mmc_hostname(host->mmc));
 519                 cmd->error = MMC_ERR_INVALID;
 520                 tasklet_schedule(&host->finish_tasklet);
 521                 return;
 522         }
 523
 524         if (!(cmd->flags & MMC_RSP_PRESENT))
 525                 flags = SDHCI_CMD_RESP_NONE;
 526         else if (cmd->flags & MMC_RSP_136)
 527                 flags = SDHCI_CMD_RESP_LONG;
 528         else if (cmd->flags & MMC_RSP_BUSY)
 529                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 530         else
 531                 flags = SDHCI_CMD_RESP_SHORT;
 532
 533         if (cmd->flags & MMC_RSP_CRC)
 534                 flags |= SDHCI_CMD_CRC;
 535         if (cmd->flags & MMC_RSP_OPCODE)
 536                 flags |= SDHCI_CMD_INDEX;
 537         if (cmd->data)
 538                 flags |= SDHCI_CMD_DATA;
 539
 540         writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
 541                 host->ioaddr + SDHCI_COMMAND);
 542 }
 543
 544 static void sdhci_finish_command(struct sdhci_host *host)
 545 {
 546         int i;
 547
 548         BUG_ON(host->cmd == NULL);
 549
 550         if (host->cmd->flags & MMC_RSP_PRESENT) {
 551                 if (host->cmd->flags & MMC_RSP_136) {
 552                         /* CRC is stripped so we need to do some shifting. */
 553                         for (i = 0;i < 4;i++) {
 554                                 host->cmd->resp[i] = readl(host->ioaddr +
 555                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 556                                 if (i != 3)
 557                                         host->cmd->resp[i] |=
 558                                                 readb(host->ioaddr +
 559                                                 SDHCI_RESPONSE + (3-i)*4-1);
 560                         }
 561                 } else {
 562                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 563                 }
 564         }
 565
 566         host->cmd->error = MMC_ERR_NONE;
 567
 568         DBG("Ending cmd (%x)\n", host->cmd->opcode);
 569
 570         if (host->cmd->data)
 571                 host->data = host->cmd->data;
 572         else
 573                 tasklet_schedule(&host->finish_tasklet);
 574
 575         host->cmd = NULL;
 576 }
 577
 578 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 579 {
 580         int div;
 581         u16 clk;
 582         unsigned long timeout;
 583
 584         if (clock == host->clock)
 585                 return;
 586
 587         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 588
 589         if (clock == 0)
 590                 goto out;
 591
 592         for (div = 1;div < 256;div *= 2) {
 593                 if ((host->max_clk / div) <= clock)
 594                         break;
 595         }
 596         div >>= 1;
 597
 598         clk = div << SDHCI_DIVIDER_SHIFT;
 599         clk |= SDHCI_CLOCK_INT_EN;
 600         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 601
 602         /* Wait max 10 ms */
 603         timeout = 10;
 604         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 605                 & SDHCI_CLOCK_INT_STABLE)) {
 606                 if (timeout == 0) {
 607                         printk(KERN_ERR "%s: Internal clock never stabilised. "
 608                                 "Please report this to " BUGMAIL ".\n",
 609                                 mmc_hostname(host->mmc));
 610                         sdhci_dumpregs(host);
 611                         return;
 612                 }
 613                 timeout--;
 614                 mdelay(1);
 615         }
 616
 617         clk |= SDHCI_CLOCK_CARD_EN;
 618         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 619
 620 out:
 621         host->clock = clock;
 622 }
 623
 624 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 625 {
 626         u8 pwr;
 627
 628         if (host->power == power)
 629                 return;
 630
 631         writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 632
 633         if (power == (unsigned short)-1)
 634                 goto out;
 635
 636         pwr = SDHCI_POWER_ON;
 637
 638         switch (power) {
 639         case MMC_VDD_170:
 640         case MMC_VDD_180:
 641         case MMC_VDD_190:
 642                 pwr |= SDHCI_POWER_180;
 643                 break;
 644         case MMC_VDD_290:
 645         case MMC_VDD_300:
 646         case MMC_VDD_310:
 647                 pwr |= SDHCI_POWER_300;
 648                 break;
 649         case MMC_VDD_320:
 650         case MMC_VDD_330:
 651         case MMC_VDD_340:
 652                 pwr |= SDHCI_POWER_330;
 653                 break;
 654         default:
 655                 BUG();
 656         }
 657
 658         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 659
 660 out:
 661         host->power = power;
 662 }
 663
 664 /*****************************************************************************\
 665  *                                                                           *
 666  * MMC callbacks                                                             *
 667  *                                                                           *
 668 \*****************************************************************************/
 669
 670 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 671 {
 672         struct sdhci_host *host;
 673         unsigned long flags;
 674
 675         host = mmc_priv(mmc);
 676
 677         spin_lock_irqsave(&host->lock, flags);
 678
 679         WARN_ON(host->mrq != NULL);
 680
 681         sdhci_activate_led(host);
 682
 683         host->mrq = mrq;
 684
 685         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 686                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 687                 tasklet_schedule(&host->finish_tasklet);
 688         } else
 689                 sdhci_send_command(host, mrq->cmd);
 690
 691         spin_unlock_irqrestore(&host->lock, flags);
 692 }
 693
 694 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 695 {
 696         struct sdhci_host *host;
 697         unsigned long flags;
 698         u8 ctrl;
 699
 700         host = mmc_priv(mmc);
 701
 702         spin_lock_irqsave(&host->lock, flags);
 703
 704         /*
 705          * Reset the chip on each power off.
 706          * Should clear out any weird states.
 707          */
 708         if (ios->power_mode == MMC_POWER_OFF) {
 709                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 710                 sdhci_init(host);
 711         }
 712
 713         sdhci_set_clock(host, ios->clock);
 714
 715         if (ios->power_mode == MMC_POWER_OFF)
 716                 sdhci_set_power(host, -1);
 717         else
 718                 sdhci_set_power(host, ios->vdd);
 719
 720         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 721         if (ios->bus_width == MMC_BUS_WIDTH_4)
 722                 ctrl |= SDHCI_CTRL_4BITBUS;
 723         else
 724                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 725         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 726
 727         spin_unlock_irqrestore(&host->lock, flags);
 728 }
 729
 730 static int sdhci_get_ro(struct mmc_host *mmc)
 731 {
 732         struct sdhci_host *host;
 733         unsigned long flags;
 734         int present;
 735
 736         host = mmc_priv(mmc);
 737
 738         spin_lock_irqsave(&host->lock, flags);
 739
 740         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 741
 742         spin_unlock_irqrestore(&host->lock, flags);
 743
 744         return !(present & SDHCI_WRITE_PROTECT);
 745 }
 746
 747 static struct mmc_host_ops sdhci_ops = {
 748         .request        = sdhci_request,
 749         .set_ios        = sdhci_set_ios,
 750         .get_ro         = sdhci_get_ro,
 751 };
 752
 753 /*****************************************************************************\
 754  *                                                                           *
 755  * Tasklets                                                                  *
 756  *                                                                           *
 757 \*****************************************************************************/
 758
 759 static void sdhci_tasklet_card(unsigned long param)
 760 {
 761         struct sdhci_host *host;
 762         unsigned long flags;
 763
 764         host = (struct sdhci_host*)param;
 765
 766         spin_lock_irqsave(&host->lock, flags);
 767
 768         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 769                 if (host->mrq) {
 770                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 771                                 mmc_hostname(host->mmc));
 772                         printk(KERN_ERR "%s: Resetting controller.\n",
 773                                 mmc_hostname(host->mmc));
 774
 775                         sdhci_reset(host, SDHCI_RESET_CMD);
 776                         sdhci_reset(host, SDHCI_RESET_DATA);
 777
 778                         host->mrq->cmd->error = MMC_ERR_FAILED;
 779                         tasklet_schedule(&host->finish_tasklet);
 780                 }
 781         }
 782
 783         spin_unlock_irqrestore(&host->lock, flags);
 784
 785         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 786 }
 787
 788 static void sdhci_tasklet_finish(unsigned long param)
 789 {
 790         struct sdhci_host *host;
 791         unsigned long flags;
 792         struct mmc_request *mrq;
 793
 794         host = (struct sdhci_host*)param;
 795
 796         spin_lock_irqsave(&host->lock, flags);
 797
 798         del_timer(&host->timer);
 799
 800         mrq = host->mrq;
 801
 802         DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
 803
 804         /*
 805          * The controller needs a reset of internal state machines
 806          * upon error conditions.
 807          */
 808         if ((mrq->cmd->error != MMC_ERR_NONE) ||
 809                 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
 810                 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
 811                 sdhci_reset(host, SDHCI_RESET_CMD);
 812                 sdhci_reset(host, SDHCI_RESET_DATA);
 813         }
 814
 815         host->mrq = NULL;
 816         host->cmd = NULL;
 817         host->data = NULL;
 818
 819         sdhci_deactivate_led(host);
 820
 821         spin_unlock_irqrestore(&host->lock, flags);
 822
 823         mmc_request_done(host->mmc, mrq);
 824 }
 825
 826 static void sdhci_timeout_timer(unsigned long data)
 827 {
 828         struct sdhci_host *host;
 829         unsigned long flags;
 830
 831         host = (struct sdhci_host*)data;
 832
 833         spin_lock_irqsave(&host->lock, flags);
 834
 835         if (host->mrq) {
 836                 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
 837                         "Please report this to " BUGMAIL ".\n",
 838                         mmc_hostname(host->mmc));
 839                 sdhci_dumpregs(host);
 840
 841                 if (host->data) {
 842                         host->data->error = MMC_ERR_TIMEOUT;
 843                         sdhci_finish_data(host);
 844                 } else {
 845                         if (host->cmd)
 846                                 host->cmd->error = MMC_ERR_TIMEOUT;
 847                         else
 848                                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 849
 850                         tasklet_schedule(&host->finish_tasklet);
 851                 }
 852         }
 853
 854         spin_unlock_irqrestore(&host->lock, flags);
 855 }
 856
 857 /*****************************************************************************\
 858  *                                                                           *
 859  * Interrupt handling                                                        *
 860  *                                                                           *
 861 \*****************************************************************************/
 862
 863 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 864 {
 865         BUG_ON(intmask == 0);
 866
 867         if (!host->cmd) {
 868                 printk(KERN_ERR "%s: Got command interrupt even though no "
 869                         "command operation was in progress.\n",
 870                         mmc_hostname(host->mmc));
 871                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 872                         mmc_hostname(host->mmc));
 873                 sdhci_dumpregs(host);
 874                 return;
 875         }
 876
 877         if (intmask & SDHCI_INT_RESPONSE)
 878                 sdhci_finish_command(host);
 879         else {
 880                 if (intmask & SDHCI_INT_TIMEOUT)
 881                         host->cmd->error = MMC_ERR_TIMEOUT;
 882                 else if (intmask & SDHCI_INT_CRC)
 883                         host->cmd->error = MMC_ERR_BADCRC;
 884                 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
 885                         host->cmd->error = MMC_ERR_FAILED;
 886                 else
 887                         host->cmd->error = MMC_ERR_INVALID;
 888
 889                 tasklet_schedule(&host->finish_tasklet);
 890         }
 891 }
 892
 893 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 894 {
 895         BUG_ON(intmask == 0);
 896
 897         if (!host->data) {
 898                 /*
 899                  * A data end interrupt is sent together with the response
 900                  * for the stop command.
 901                  */
 902                 if (intmask & SDHCI_INT_DATA_END)
 903                         return;
 904
 905                 printk(KERN_ERR "%s: Got data interrupt even though no "
 906                         "data operation was in progress.\n",
 907                         mmc_hostname(host->mmc));
 908                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 909                         mmc_hostname(host->mmc));
 910                 sdhci_dumpregs(host);
 911
 912                 return;
 913         }
 914
 915         if (intmask & SDHCI_INT_DATA_TIMEOUT)
 916                 host->data->error = MMC_ERR_TIMEOUT;
 917         else if (intmask & SDHCI_INT_DATA_CRC)
 918                 host->data->error = MMC_ERR_BADCRC;
 919         else if (intmask & SDHCI_INT_DATA_END_BIT)
 920                 host->data->error = MMC_ERR_FAILED;
 921
 922         if (host->data->error != MMC_ERR_NONE)
 923                 sdhci_finish_data(host);
 924         else {
 925                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
 926                         sdhci_transfer_pio(host);
 927
 928                 if (intmask & SDHCI_INT_DATA_END)
 929                         sdhci_finish_data(host);
 930         }
 931 }
 932
 933 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
 934 {
 935         irqreturn_t result;
 936         struct sdhci_host* host = dev_id;
 937         u32 intmask;
 938
 939         spin_lock(&host->lock);
 940
 941         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
 942
 943         if (!intmask) {
 944                 result = IRQ_NONE;
 945                 goto out;
 946         }
 947
 948         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
 949
 950         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
 951                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
 952                         host->ioaddr + SDHCI_INT_STATUS);
 953                 tasklet_schedule(&host->card_tasklet);
 954         }
 955
 956         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
 957
 958         if (intmask & SDHCI_INT_CMD_MASK) {
 959                 writel(intmask & SDHCI_INT_CMD_MASK,
 960                         host->ioaddr + SDHCI_INT_STATUS);
 961                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
 962         }
 963
 964         if (intmask & SDHCI_INT_DATA_MASK) {
 965                 writel(intmask & SDHCI_INT_DATA_MASK,
 966                         host->ioaddr + SDHCI_INT_STATUS);
 967                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
 968         }
 969
 970         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
 971
 972         if (intmask & SDHCI_INT_BUS_POWER) {
 973                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
 974                         mmc_hostname(host->mmc));
 975                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
 976         }
 977
 978         intmask &= SDHCI_INT_BUS_POWER;
 979
 980         if (intmask) {
 981                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
 982                         "report this to " BUGMAIL ".\n",
 983                         mmc_hostname(host->mmc), intmask);
 984                 sdhci_dumpregs(host);
 985
 986                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
 987         }
 988
 989         result = IRQ_HANDLED;
 990
 991 out:
 992         spin_unlock(&host->lock);
 993
 994         return result;
 995 }
 996
 997 /*****************************************************************************\
 998  *                                                                           *
 999  * Suspend/resume                                                            *
1000  *                                                                           *
1001 \*****************************************************************************/
1002
1003 #ifdef CONFIG_PM
1004
1005 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1006 {
1007         struct sdhci_chip *chip;
1008         int i, ret;
1009
1010         chip = pci_get_drvdata(pdev);
1011         if (!chip)
1012                 return 0;
1013
1014         DBG("Suspending...\n");
1015
1016         for (i = 0;i < chip->num_slots;i++) {
1017                 if (!chip->hosts[i])
1018                         continue;
1019                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1020                 if (ret) {
1021                         for (i--;i >= 0;i--)
1022                                 mmc_resume_host(chip->hosts[i]->mmc);
1023                         return ret;
1024                 }
1025         }
1026
1027         pci_save_state(pdev);
1028         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1029         pci_disable_device(pdev);
1030         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1031
1032         return 0;
1033 }
1034
1035 static int sdhci_resume (struct pci_dev *pdev)
1036 {
1037         struct sdhci_chip *chip;
1038         int i, ret;
1039
1040         chip = pci_get_drvdata(pdev);
1041         if (!chip)
1042                 return 0;
1043
1044         DBG("Resuming...\n");
1045
1046         pci_set_power_state(pdev, PCI_D0);
1047         pci_restore_state(pdev);
1048         pci_enable_device(pdev);
1049
1050         for (i = 0;i < chip->num_slots;i++) {
1051                 if (!chip->hosts[i])
1052                         continue;
1053                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1054                         pci_set_master(pdev);
1055                 sdhci_init(chip->hosts[i]);
1056                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1057                 if (ret)
1058                         return ret;
1059         }
1060
1061         return 0;
1062 }
1063
1064 #else /* CONFIG_PM */
1065
1066 #define sdhci_suspend NULL
1067 #define sdhci_resume NULL
1068
1069 #endif /* CONFIG_PM */
1070
1071 /*****************************************************************************\
1072  *                                                                           *
1073  * Device probing/removal                                                    *
1074  *                                                                           *
1075 \*****************************************************************************/
1076
1077 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1078 {
1079         int ret;
1080         unsigned int version;
1081         struct sdhci_chip *chip;
1082         struct mmc_host *mmc;
1083         struct sdhci_host *host;
1084
1085         u8 first_bar;
1086         unsigned int caps;
1087
1088         chip = pci_get_drvdata(pdev);
1089         BUG_ON(!chip);
1090
1091         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1092         if (ret)
1093                 return ret;
1094
1095         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1096
1097         if (first_bar > 5) {
1098                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1099                 return -ENODEV;
1100         }
1101
1102         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1103                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1104                 return -ENODEV;
1105         }
1106
1107         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1108                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1109                 return -ENODEV;
1110         }
1111
1112         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1113                 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1114                 return -ENODEV;
1115         }
1116
1117         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1118                 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1119                 return -ENODEV;
1120         }
1121
1122         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1123         if (!mmc)
1124                 return -ENOMEM;
1125
1126         host = mmc_priv(mmc);
1127         host->mmc = mmc;
1128
1129         host->bar = first_bar + slot;
1130
1131         host->addr = pci_resource_start(pdev, host->bar);
1132         host->irq = pdev->irq;
1133
1134         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1135
1136         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1137
1138         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1139         if (ret)
1140                 goto free;
1141
1142         host->ioaddr = ioremap_nocache(host->addr,
1143                 pci_resource_len(pdev, host->bar));
1144         if (!host->ioaddr) {
1145                 ret = -ENOMEM;
1146                 goto release;
1147         }
1148
1149         sdhci_reset(host, SDHCI_RESET_ALL);
1150
1151         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1152         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1153         if (version != 0) {
1154                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1155                         "Cowardly refusing to continue.\n", host->slot_descr,
1156                         version);
1157                 ret = -ENODEV;
1158                 goto unmap;
1159         }
1160
1161         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1162
1163         if (debug_nodma)
1164                 DBG("DMA forced off\n");
1165         else if (debug_forcedma) {
1166                 DBG("DMA forced on\n");
1167                 host->flags |= SDHCI_USE_DMA;
1168         } else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1169                 DBG("Controller doesn't have DMA interface\n");
1170         else if (!(caps & SDHCI_CAN_DO_DMA))
1171                 DBG("Controller doesn't have DMA capability\n");
1172         else
1173                 host->flags |= SDHCI_USE_DMA;
1174
1175         if (host->flags & SDHCI_USE_DMA) {
1176                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1177                         printk(KERN_WARNING "%s: No suitable DMA available. "
1178                                 "Falling back to PIO.\n", host->slot_descr);
1179                         host->flags &= ~SDHCI_USE_DMA;
1180                 }
1181         }
1182
1183         if (host->flags & SDHCI_USE_DMA)
1184                 pci_set_master(pdev);
1185         else /* XXX: Hack to get MMC layer to avoid highmem */
1186                 pdev->dma_mask = 0;
1187
1188         host->max_clk =
1189                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1190         if (host->max_clk == 0) {
1191                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1192                         "frequency.\n", host->slot_descr);
1193                 ret = -ENODEV;
1194                 goto unmap;
1195         }
1196         host->max_clk *= 1000000;
1197
1198         host->timeout_clk =
1199                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1200         if (host->timeout_clk == 0) {
1201                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1202                         "frequency.\n", host->slot_descr);
1203                 ret = -ENODEV;
1204                 goto unmap;
1205         }
1206         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1207                 host->timeout_clk *= 1000;
1208
1209         host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1210         if (host->max_block >= 3) {
1211                 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1212                         host->slot_descr);
1213                 ret = -ENODEV;
1214                 goto unmap;
1215         }
1216         host->max_block = 512 << host->max_block;
1217
1218         /*
1219          * Set host parameters.
1220          */
1221         mmc->ops = &sdhci_ops;
1222         mmc->f_min = host->max_clk / 256;
1223         mmc->f_max = host->max_clk;
1224         mmc->caps = MMC_CAP_4_BIT_DATA;
1225
1226         mmc->ocr_avail = 0;
1227         if (caps & SDHCI_CAN_VDD_330)
1228                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1229         else if (caps & SDHCI_CAN_VDD_300)
1230                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1231         else if (caps & SDHCI_CAN_VDD_180)
1232                 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1233
1234         if (mmc->ocr_avail == 0) {
1235                 printk(KERN_ERR "%s: Hardware doesn't report any "
1236                         "support voltages.\n", host->slot_descr);
1237                 ret = -ENODEV;
1238                 goto unmap;
1239         }
1240
1241         spin_lock_init(&host->lock);
1242
1243         /*
1244          * Maximum number of segments. Hardware cannot do scatter lists.
1245          */
1246         if (host->flags & SDHCI_USE_DMA)
1247                 mmc->max_hw_segs = 1;
1248         else
1249                 mmc->max_hw_segs = 16;
1250         mmc->max_phys_segs = 16;
1251
1252         /*
1253          * Maximum number of sectors in one transfer. Limited by DMA boundary
1254          * size (512KiB), which means (512 KiB/512=) 1024 entries.
1255          */
1256         mmc->max_sectors = 1024;
1257
1258         /*
1259          * Maximum segment size. Could be one segment with the maximum number
1260          * of sectors.
1261          */
1262         mmc->max_seg_size = mmc->max_sectors * 512;
1263
1264         /*
1265          * Init tasklets.
1266          */
1267         tasklet_init(&host->card_tasklet,
1268                 sdhci_tasklet_card, (unsigned long)host);
1269         tasklet_init(&host->finish_tasklet,
1270                 sdhci_tasklet_finish, (unsigned long)host);
1271
1272         setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1273
1274         ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1275                 host->slot_descr, host);
1276         if (ret)
1277                 goto untasklet;
1278
1279         sdhci_init(host);
1280
1281 #ifdef CONFIG_MMC_DEBUG
1282         sdhci_dumpregs(host);
1283 #endif
1284
1285         host->chip = chip;
1286         chip->hosts[slot] = host;
1287
1288         mmc_add_host(mmc);
1289
1290         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1291                 host->addr, host->irq,
1292                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1293
1294         return 0;
1295
1296 untasklet:
1297         tasklet_kill(&host->card_tasklet);
1298         tasklet_kill(&host->finish_tasklet);
1299 unmap:
1300         iounmap(host->ioaddr);
1301 release:
1302         pci_release_region(pdev, host->bar);
1303 free:
1304         mmc_free_host(mmc);
1305
1306         return ret;
1307 }
1308
1309 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1310 {
1311         struct sdhci_chip *chip;
1312         struct mmc_host *mmc;
1313         struct sdhci_host *host;
1314
1315         chip = pci_get_drvdata(pdev);
1316         host = chip->hosts[slot];
1317         mmc = host->mmc;
1318
1319         chip->hosts[slot] = NULL;
1320
1321         mmc_remove_host(mmc);
1322
1323         sdhci_reset(host, SDHCI_RESET_ALL);
1324
1325         free_irq(host->irq, host);
1326
1327         del_timer_sync(&host->timer);
1328
1329         tasklet_kill(&host->card_tasklet);
1330         tasklet_kill(&host->finish_tasklet);
1331
1332         iounmap(host->ioaddr);
1333
1334         pci_release_region(pdev, host->bar);
1335
1336         mmc_free_host(mmc);
1337 }
1338
1339 static int __devinit sdhci_probe(struct pci_dev *pdev,
1340         const struct pci_device_id *ent)
1341 {
1342         int ret, i;
1343         u8 slots, rev;
1344         struct sdhci_chip *chip;
1345
1346         BUG_ON(pdev == NULL);
1347         BUG_ON(ent == NULL);
1348
1349         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1350
1351         printk(KERN_INFO DRIVER_NAME
1352                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1353                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1354                 (int)rev);
1355
1356         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1357         if (ret)
1358                 return ret;
1359
1360         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1361         DBG("found %d slot(s)\n", slots);
1362         if (slots == 0)
1363                 return -ENODEV;
1364
1365         ret = pci_enable_device(pdev);
1366         if (ret)
1367                 return ret;
1368
1369         chip = kzalloc(sizeof(struct sdhci_chip) +
1370                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1371         if (!chip) {
1372                 ret = -ENOMEM;
1373                 goto err;
1374         }
1375
1376         chip->pdev = pdev;
1377         chip->quirks = ent->driver_data;
1378
1379         if (debug_quirks)
1380                 chip->quirks = debug_quirks;
1381
1382         chip->num_slots = slots;
1383         pci_set_drvdata(pdev, chip);
1384
1385         for (i = 0;i < slots;i++) {
1386                 ret = sdhci_probe_slot(pdev, i);
1387                 if (ret) {
1388                         for (i--;i >= 0;i--)
1389                                 sdhci_remove_slot(pdev, i);
1390                         goto free;
1391                 }
1392         }
1393
1394         return 0;
1395
1396 free:
1397         pci_set_drvdata(pdev, NULL);
1398         kfree(chip);
1399
1400 err:
1401         pci_disable_device(pdev);
1402         return ret;
1403 }
1404
1405 static void __devexit sdhci_remove(struct pci_dev *pdev)
1406 {
1407         int i;
1408         struct sdhci_chip *chip;
1409
1410         chip = pci_get_drvdata(pdev);
1411
1412         if (chip) {
1413                 for (i = 0;i < chip->num_slots;i++)
1414                         sdhci_remove_slot(pdev, i);
1415
1416                 pci_set_drvdata(pdev, NULL);
1417
1418                 kfree(chip);
1419         }
1420
1421         pci_disable_device(pdev);
1422 }
1423
1424 static struct pci_driver sdhci_driver = {
1425         .name =         DRIVER_NAME,
1426         .id_table =     pci_ids,
1427         .probe =        sdhci_probe,
1428         .remove =       __devexit_p(sdhci_remove),
1429         .suspend =      sdhci_suspend,
1430         .resume =       sdhci_resume,
1431 };
1432
1433 /*****************************************************************************\
1434  *                                                                           *
1435  * Driver init/exit                                                          *
1436  *                                                                           *
1437 \*****************************************************************************/
1438
1439 static int __init sdhci_drv_init(void)
1440 {
1441         printk(KERN_INFO DRIVER_NAME
1442                 ": Secure Digital Host Controller Interface driver, "
1443                 DRIVER_VERSION "\n");
1444         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1445
1446         return pci_register_driver(&sdhci_driver);
1447 }
1448
1449 static void __exit sdhci_drv_exit(void)
1450 {
1451         DBG("Exiting\n");
1452
1453         pci_unregister_driver(&sdhci_driver);
1454 }
1455
1456 module_init(sdhci_drv_init);
1457 module_exit(sdhci_drv_exit);
1458
1459 module_param(debug_nodma, uint, 0444);
1460 module_param(debug_forcedma, uint, 0444);
1461 module_param(debug_quirks, uint, 0444);
1462
1463 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1464 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1465 MODULE_VERSION(DRIVER_VERSION);
1466 MODULE_LICENSE("GPL");
1467
1468 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1469 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1470 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");