8 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
9 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
10 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
11 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
12 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
13 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
14 #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294
15 #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295
16 #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296
17 #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
18 #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9
19 #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa
20 #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
21 #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
22 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
23 #define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
29 #define PCI_SDHCI_IFPIO 0x00
30 #define PCI_SDHCI_IFDMA 0x01
31 #define PCI_SDHCI_IFVENDOR 0x02
33 #define PCI_SLOT_INFO 0x40 /* 8 bits */
34 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
35 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
39 struct sdhci_pci_chip;
40 struct sdhci_pci_slot;
42 struct sdhci_pci_fixes {
45 bool allow_runtime_pm;
46 bool own_cd_for_runtime_pm;
48 int (*probe) (struct sdhci_pci_chip *);
50 int (*probe_slot) (struct sdhci_pci_slot *);
51 void (*remove_slot) (struct sdhci_pci_slot *, int);
53 int (*suspend) (struct sdhci_pci_chip *);
54 int (*resume) (struct sdhci_pci_chip *);
57 struct sdhci_pci_slot {
58 struct sdhci_pci_chip *chip;
59 struct sdhci_host *host;
60 struct sdhci_pci_data *data;
69 bool cd_override_level;
71 void (*hw_reset)(struct sdhci_host *host);
74 struct sdhci_pci_chip {
79 bool allow_runtime_pm;
80 const struct sdhci_pci_fixes *fixes;
82 int num_slots; /* Slots on controller */
83 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
86 #endif /* __SDHCI_PCI_H */