1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
41 #define PCI_SDHCI_IFPIO 0x00
42 #define PCI_SDHCI_IFDMA 0x01
43 #define PCI_SDHCI_IFVENDOR 0x02
45 #define PCI_SLOT_INFO 0x40 /* 8 bits */
46 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
47 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
51 struct sdhci_pci_chip;
52 struct sdhci_pci_slot;
54 struct sdhci_pci_fixes {
57 bool allow_runtime_pm;
59 int (*probe) (struct sdhci_pci_chip *);
61 int (*probe_slot) (struct sdhci_pci_slot *);
62 void (*remove_slot) (struct sdhci_pci_slot *, int);
64 int (*suspend) (struct sdhci_pci_chip *);
65 int (*resume) (struct sdhci_pci_chip *);
68 struct sdhci_pci_slot {
69 struct sdhci_pci_chip *chip;
70 struct sdhci_host *host;
71 struct sdhci_pci_data *data;
79 struct sdhci_pci_chip {
84 bool allow_runtime_pm;
85 const struct sdhci_pci_fixes *fixes;
87 int num_slots; /* Slots on controller */
88 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
92 /*****************************************************************************\
94 * Hardware specific quirk handling *
96 \*****************************************************************************/
98 static int ricoh_probe(struct sdhci_pci_chip *chip)
100 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
101 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
102 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
106 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
109 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
110 & SDHCI_TIMEOUT_CLK_MASK) |
112 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
113 & SDHCI_CLOCK_BASE_MASK) |
115 SDHCI_TIMEOUT_CLK_UNIT |
122 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
124 /* Apply a delay to allow controller to settle */
125 /* Otherwise it becomes confused if card state changed
131 static const struct sdhci_pci_fixes sdhci_ricoh = {
132 .probe = ricoh_probe,
133 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
134 SDHCI_QUIRK_FORCE_DMA |
135 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
138 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
139 .probe_slot = ricoh_mmc_probe_slot,
140 .resume = ricoh_mmc_resume,
141 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
142 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
143 SDHCI_QUIRK_NO_CARD_NO_RESET |
144 SDHCI_QUIRK_MISSING_CAPS
147 static const struct sdhci_pci_fixes sdhci_ene_712 = {
148 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
149 SDHCI_QUIRK_BROKEN_DMA,
152 static const struct sdhci_pci_fixes sdhci_ene_714 = {
153 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
154 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
155 SDHCI_QUIRK_BROKEN_DMA,
158 static const struct sdhci_pci_fixes sdhci_cafe = {
159 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
160 SDHCI_QUIRK_NO_BUSY_IRQ |
161 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
162 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
165 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
167 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
172 * ADMA operation is disabled for Moorestown platform due to
175 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
178 * slots number is fixed here for MRST as SDIO3/5 are never used and
179 * have hardware bugs.
185 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
187 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
191 #ifdef CONFIG_PM_RUNTIME
193 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
195 struct sdhci_pci_slot *slot = dev_id;
196 struct sdhci_host *host = slot->host;
198 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
202 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
204 int err, irq, gpio = slot->cd_gpio;
206 slot->cd_gpio = -EINVAL;
207 slot->cd_irq = -EINVAL;
209 if (!gpio_is_valid(gpio))
212 err = gpio_request(gpio, "sd_cd");
216 err = gpio_direction_input(gpio);
220 irq = gpio_to_irq(gpio);
224 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
225 IRQF_TRIGGER_FALLING, "sd_cd", slot);
229 slot->cd_gpio = gpio;
237 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
240 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
242 if (slot->cd_irq >= 0)
243 free_irq(slot->cd_irq, slot);
244 if (gpio_is_valid(slot->cd_gpio))
245 gpio_free(slot->cd_gpio);
250 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
254 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
260 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
262 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
263 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
264 MMC_CAP2_HC_ERASE_SZ;
268 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
270 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
274 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
275 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
276 .probe_slot = mrst_hc_probe_slot,
279 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
280 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
281 .probe = mrst_hc_probe,
284 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
285 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
286 .allow_runtime_pm = true,
289 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
290 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
291 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
292 .allow_runtime_pm = true,
293 .probe_slot = mfd_sdio_probe_slot,
296 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
297 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
298 .allow_runtime_pm = true,
299 .probe_slot = mfd_emmc_probe_slot,
302 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
303 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
304 .probe_slot = pch_hc_probe_slot,
307 /* O2Micro extra registers */
308 #define O2_SD_LOCK_WP 0xD3
309 #define O2_SD_MULTI_VCC3V 0xEE
310 #define O2_SD_CLKREQ 0xEC
311 #define O2_SD_CAPS 0xE0
312 #define O2_SD_ADMA1 0xE2
313 #define O2_SD_ADMA2 0xE7
314 #define O2_SD_INF_MOD 0xF1
316 static int o2_probe(struct sdhci_pci_chip *chip)
321 switch (chip->pdev->device) {
322 case PCI_DEVICE_ID_O2_8220:
323 case PCI_DEVICE_ID_O2_8221:
324 case PCI_DEVICE_ID_O2_8320:
325 case PCI_DEVICE_ID_O2_8321:
326 /* This extra setup is required due to broken ADMA. */
327 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
331 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
333 /* Set Multi 3 to VCC3V# */
334 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
336 /* Disable CLK_REQ# support after media DET */
337 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
341 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
343 /* Choose capabilities, enable SDMA. We have to write 0x01
344 * to the capabilities register first to unlock it.
346 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
350 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
351 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
353 /* Disable ADMA1/2 */
354 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
355 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
357 /* Disable the infinite transfer mode */
358 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
362 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
365 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
369 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
375 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
380 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
385 * Turn PMOS on [bit 0], set over current detection to 2.4 V
386 * [bit 1:2] and enable over current debouncing [bit 6].
393 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
400 static int jmicron_probe(struct sdhci_pci_chip *chip)
405 if (chip->pdev->revision == 0) {
406 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
407 SDHCI_QUIRK_32BIT_DMA_SIZE |
408 SDHCI_QUIRK_32BIT_ADMA_SIZE |
409 SDHCI_QUIRK_RESET_AFTER_REQUEST |
410 SDHCI_QUIRK_BROKEN_SMALL_PIO;
414 * JMicron chips can have two interfaces to the same hardware
415 * in order to work around limitations in Microsoft's driver.
416 * We need to make sure we only bind to one of them.
418 * This code assumes two things:
420 * 1. The PCI code adds subfunctions in order.
422 * 2. The MMC interface has a lower subfunction number
423 * than the SD interface.
425 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
426 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
427 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
428 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
431 struct pci_dev *sd_dev;
434 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
435 mmcdev, sd_dev)) != NULL) {
436 if ((PCI_SLOT(chip->pdev->devfn) ==
437 PCI_SLOT(sd_dev->devfn)) &&
438 (chip->pdev->bus == sd_dev->bus))
444 dev_info(&chip->pdev->dev, "Refusing to bind to "
445 "secondary interface.\n");
451 * JMicron chips need a bit of a nudge to enable the power
454 ret = jmicron_pmos(chip, 1);
456 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
460 /* quirk for unsable RO-detection on JM388 chips */
461 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
462 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
463 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
468 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
472 scratch = readb(host->ioaddr + 0xC0);
479 writeb(scratch, host->ioaddr + 0xC0);
482 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
484 if (slot->chip->pdev->revision == 0) {
487 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
488 version = (version & SDHCI_VENDOR_VER_MASK) >>
489 SDHCI_VENDOR_VER_SHIFT;
492 * Older versions of the chip have lots of nasty glitches
493 * in the ADMA engine. It's best just to avoid it
497 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
500 /* JM388 MMC doesn't support 1.8V while SD supports it */
501 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
502 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
503 MMC_VDD_29_30 | MMC_VDD_30_31 |
504 MMC_VDD_165_195; /* allow 1.8V */
505 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
506 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
510 * The secondary interface requires a bit set to get the
513 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
514 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
515 jmicron_enable_mmc(slot->host, 1);
517 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
522 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
527 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
528 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
529 jmicron_enable_mmc(slot->host, 0);
532 static int jmicron_suspend(struct sdhci_pci_chip *chip)
536 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
537 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
538 for (i = 0; i < chip->num_slots; i++)
539 jmicron_enable_mmc(chip->slots[i]->host, 0);
545 static int jmicron_resume(struct sdhci_pci_chip *chip)
549 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
550 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
551 for (i = 0; i < chip->num_slots; i++)
552 jmicron_enable_mmc(chip->slots[i]->host, 1);
555 ret = jmicron_pmos(chip, 1);
557 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
564 static const struct sdhci_pci_fixes sdhci_o2 = {
568 static const struct sdhci_pci_fixes sdhci_jmicron = {
569 .probe = jmicron_probe,
571 .probe_slot = jmicron_probe_slot,
572 .remove_slot = jmicron_remove_slot,
574 .suspend = jmicron_suspend,
575 .resume = jmicron_resume,
578 /* SysKonnect CardBus2SDIO extra registers */
579 #define SYSKT_CTRL 0x200
580 #define SYSKT_RDFIFO_STAT 0x204
581 #define SYSKT_WRFIFO_STAT 0x208
582 #define SYSKT_POWER_DATA 0x20c
583 #define SYSKT_POWER_330 0xef
584 #define SYSKT_POWER_300 0xf8
585 #define SYSKT_POWER_184 0xcc
586 #define SYSKT_POWER_CMD 0x20d
587 #define SYSKT_POWER_START (1 << 7)
588 #define SYSKT_POWER_STATUS 0x20e
589 #define SYSKT_POWER_STATUS_OK (1 << 0)
590 #define SYSKT_BOARD_REV 0x210
591 #define SYSKT_CHIP_REV 0x211
592 #define SYSKT_CONF_DATA 0x212
593 #define SYSKT_CONF_DATA_1V8 (1 << 2)
594 #define SYSKT_CONF_DATA_2V5 (1 << 1)
595 #define SYSKT_CONF_DATA_3V3 (1 << 0)
597 static int syskt_probe(struct sdhci_pci_chip *chip)
599 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
600 chip->pdev->class &= ~0x0000FF;
601 chip->pdev->class |= PCI_SDHCI_IFDMA;
606 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
610 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
611 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
612 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
613 "board rev %d.%d, chip rev %d.%d\n",
614 board_rev >> 4, board_rev & 0xf,
615 chip_rev >> 4, chip_rev & 0xf);
616 if (chip_rev >= 0x20)
617 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
619 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
620 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
622 tm = 10; /* Wait max 1 ms */
624 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
625 if (ps & SYSKT_POWER_STATUS_OK)
630 dev_err(&slot->chip->pdev->dev,
631 "power regulator never stabilized");
632 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
639 static const struct sdhci_pci_fixes sdhci_syskt = {
640 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
641 .probe = syskt_probe,
642 .probe_slot = syskt_probe_slot,
645 static int via_probe(struct sdhci_pci_chip *chip)
647 if (chip->pdev->revision == 0x10)
648 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
653 static const struct sdhci_pci_fixes sdhci_via = {
657 static const struct pci_device_id pci_ids[] __devinitconst = {
659 .vendor = PCI_VENDOR_ID_RICOH,
660 .device = PCI_DEVICE_ID_RICOH_R5C822,
661 .subvendor = PCI_ANY_ID,
662 .subdevice = PCI_ANY_ID,
663 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
667 .vendor = PCI_VENDOR_ID_RICOH,
669 .subvendor = PCI_ANY_ID,
670 .subdevice = PCI_ANY_ID,
671 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
675 .vendor = PCI_VENDOR_ID_RICOH,
677 .subvendor = PCI_ANY_ID,
678 .subdevice = PCI_ANY_ID,
679 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
683 .vendor = PCI_VENDOR_ID_RICOH,
685 .subvendor = PCI_ANY_ID,
686 .subdevice = PCI_ANY_ID,
687 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
691 .vendor = PCI_VENDOR_ID_ENE,
692 .device = PCI_DEVICE_ID_ENE_CB712_SD,
693 .subvendor = PCI_ANY_ID,
694 .subdevice = PCI_ANY_ID,
695 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
699 .vendor = PCI_VENDOR_ID_ENE,
700 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
701 .subvendor = PCI_ANY_ID,
702 .subdevice = PCI_ANY_ID,
703 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
707 .vendor = PCI_VENDOR_ID_ENE,
708 .device = PCI_DEVICE_ID_ENE_CB714_SD,
709 .subvendor = PCI_ANY_ID,
710 .subdevice = PCI_ANY_ID,
711 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
715 .vendor = PCI_VENDOR_ID_ENE,
716 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
717 .subvendor = PCI_ANY_ID,
718 .subdevice = PCI_ANY_ID,
719 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
723 .vendor = PCI_VENDOR_ID_MARVELL,
724 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
725 .subvendor = PCI_ANY_ID,
726 .subdevice = PCI_ANY_ID,
727 .driver_data = (kernel_ulong_t)&sdhci_cafe,
731 .vendor = PCI_VENDOR_ID_JMICRON,
732 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
733 .subvendor = PCI_ANY_ID,
734 .subdevice = PCI_ANY_ID,
735 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
739 .vendor = PCI_VENDOR_ID_JMICRON,
740 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
741 .subvendor = PCI_ANY_ID,
742 .subdevice = PCI_ANY_ID,
743 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
747 .vendor = PCI_VENDOR_ID_JMICRON,
748 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
749 .subvendor = PCI_ANY_ID,
750 .subdevice = PCI_ANY_ID,
751 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
755 .vendor = PCI_VENDOR_ID_JMICRON,
756 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
757 .subvendor = PCI_ANY_ID,
758 .subdevice = PCI_ANY_ID,
759 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
763 .vendor = PCI_VENDOR_ID_SYSKONNECT,
765 .subvendor = PCI_ANY_ID,
766 .subdevice = PCI_ANY_ID,
767 .driver_data = (kernel_ulong_t)&sdhci_syskt,
771 .vendor = PCI_VENDOR_ID_VIA,
773 .subvendor = PCI_ANY_ID,
774 .subdevice = PCI_ANY_ID,
775 .driver_data = (kernel_ulong_t)&sdhci_via,
779 .vendor = PCI_VENDOR_ID_INTEL,
780 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
781 .subvendor = PCI_ANY_ID,
782 .subdevice = PCI_ANY_ID,
783 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
787 .vendor = PCI_VENDOR_ID_INTEL,
788 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
789 .subvendor = PCI_ANY_ID,
790 .subdevice = PCI_ANY_ID,
791 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
795 .vendor = PCI_VENDOR_ID_INTEL,
796 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
797 .subvendor = PCI_ANY_ID,
798 .subdevice = PCI_ANY_ID,
799 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
803 .vendor = PCI_VENDOR_ID_INTEL,
804 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
805 .subvendor = PCI_ANY_ID,
806 .subdevice = PCI_ANY_ID,
807 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
811 .vendor = PCI_VENDOR_ID_INTEL,
812 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
813 .subvendor = PCI_ANY_ID,
814 .subdevice = PCI_ANY_ID,
815 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
819 .vendor = PCI_VENDOR_ID_INTEL,
820 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
821 .subvendor = PCI_ANY_ID,
822 .subdevice = PCI_ANY_ID,
823 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
827 .vendor = PCI_VENDOR_ID_INTEL,
828 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
829 .subvendor = PCI_ANY_ID,
830 .subdevice = PCI_ANY_ID,
831 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
835 .vendor = PCI_VENDOR_ID_INTEL,
836 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
837 .subvendor = PCI_ANY_ID,
838 .subdevice = PCI_ANY_ID,
839 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
843 .vendor = PCI_VENDOR_ID_INTEL,
844 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
845 .subvendor = PCI_ANY_ID,
846 .subdevice = PCI_ANY_ID,
847 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
851 .vendor = PCI_VENDOR_ID_INTEL,
852 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
853 .subvendor = PCI_ANY_ID,
854 .subdevice = PCI_ANY_ID,
855 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
859 .vendor = PCI_VENDOR_ID_O2,
860 .device = PCI_DEVICE_ID_O2_8120,
861 .subvendor = PCI_ANY_ID,
862 .subdevice = PCI_ANY_ID,
863 .driver_data = (kernel_ulong_t)&sdhci_o2,
867 .vendor = PCI_VENDOR_ID_O2,
868 .device = PCI_DEVICE_ID_O2_8220,
869 .subvendor = PCI_ANY_ID,
870 .subdevice = PCI_ANY_ID,
871 .driver_data = (kernel_ulong_t)&sdhci_o2,
875 .vendor = PCI_VENDOR_ID_O2,
876 .device = PCI_DEVICE_ID_O2_8221,
877 .subvendor = PCI_ANY_ID,
878 .subdevice = PCI_ANY_ID,
879 .driver_data = (kernel_ulong_t)&sdhci_o2,
883 .vendor = PCI_VENDOR_ID_O2,
884 .device = PCI_DEVICE_ID_O2_8320,
885 .subvendor = PCI_ANY_ID,
886 .subdevice = PCI_ANY_ID,
887 .driver_data = (kernel_ulong_t)&sdhci_o2,
891 .vendor = PCI_VENDOR_ID_O2,
892 .device = PCI_DEVICE_ID_O2_8321,
893 .subvendor = PCI_ANY_ID,
894 .subdevice = PCI_ANY_ID,
895 .driver_data = (kernel_ulong_t)&sdhci_o2,
898 { /* Generic SD host controller */
899 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
902 { /* end: all zeroes */ },
905 MODULE_DEVICE_TABLE(pci, pci_ids);
907 /*****************************************************************************\
909 * SDHCI core callbacks *
911 \*****************************************************************************/
913 static int sdhci_pci_enable_dma(struct sdhci_host *host)
915 struct sdhci_pci_slot *slot;
916 struct pci_dev *pdev;
919 slot = sdhci_priv(host);
920 pdev = slot->chip->pdev;
922 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
923 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
924 (host->flags & SDHCI_USE_SDMA)) {
925 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
926 "doesn't fully claim to support it.\n");
929 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
933 pci_set_master(pdev);
938 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
942 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
945 case MMC_BUS_WIDTH_8:
946 ctrl |= SDHCI_CTRL_8BITBUS;
947 ctrl &= ~SDHCI_CTRL_4BITBUS;
949 case MMC_BUS_WIDTH_4:
950 ctrl |= SDHCI_CTRL_4BITBUS;
951 ctrl &= ~SDHCI_CTRL_8BITBUS;
954 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
958 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
963 static void sdhci_pci_hw_reset(struct sdhci_host *host)
965 struct sdhci_pci_slot *slot = sdhci_priv(host);
966 int rst_n_gpio = slot->rst_n_gpio;
968 if (!gpio_is_valid(rst_n_gpio))
970 gpio_set_value_cansleep(rst_n_gpio, 0);
971 /* For eMMC, minimum is 1us but give it 10us for good measure */
973 gpio_set_value_cansleep(rst_n_gpio, 1);
974 /* For eMMC, minimum is 200us but give it 300us for good measure */
975 usleep_range(300, 1000);
978 static struct sdhci_ops sdhci_pci_ops = {
979 .enable_dma = sdhci_pci_enable_dma,
980 .platform_8bit_width = sdhci_pci_8bit_width,
981 .hw_reset = sdhci_pci_hw_reset,
984 /*****************************************************************************\
988 \*****************************************************************************/
992 static int sdhci_pci_suspend(struct device *dev)
994 struct pci_dev *pdev = to_pci_dev(dev);
995 struct sdhci_pci_chip *chip;
996 struct sdhci_pci_slot *slot;
997 mmc_pm_flag_t slot_pm_flags;
998 mmc_pm_flag_t pm_flags = 0;
1001 chip = pci_get_drvdata(pdev);
1005 for (i = 0; i < chip->num_slots; i++) {
1006 slot = chip->slots[i];
1010 ret = sdhci_suspend_host(slot->host);
1013 goto err_pci_suspend;
1015 slot_pm_flags = slot->host->mmc->pm_flags;
1016 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1017 sdhci_enable_irq_wakeups(slot->host);
1019 pm_flags |= slot_pm_flags;
1022 if (chip->fixes && chip->fixes->suspend) {
1023 ret = chip->fixes->suspend(chip);
1025 goto err_pci_suspend;
1028 pci_save_state(pdev);
1029 if (pm_flags & MMC_PM_KEEP_POWER) {
1030 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1031 pci_pme_active(pdev, true);
1032 pci_enable_wake(pdev, PCI_D3hot, 1);
1034 pci_set_power_state(pdev, PCI_D3hot);
1036 pci_enable_wake(pdev, PCI_D3hot, 0);
1037 pci_disable_device(pdev);
1038 pci_set_power_state(pdev, PCI_D3hot);
1045 sdhci_resume_host(chip->slots[i]->host);
1049 static int sdhci_pci_resume(struct device *dev)
1051 struct pci_dev *pdev = to_pci_dev(dev);
1052 struct sdhci_pci_chip *chip;
1053 struct sdhci_pci_slot *slot;
1056 chip = pci_get_drvdata(pdev);
1060 pci_set_power_state(pdev, PCI_D0);
1061 pci_restore_state(pdev);
1062 ret = pci_enable_device(pdev);
1066 if (chip->fixes && chip->fixes->resume) {
1067 ret = chip->fixes->resume(chip);
1072 for (i = 0; i < chip->num_slots; i++) {
1073 slot = chip->slots[i];
1077 ret = sdhci_resume_host(slot->host);
1085 #else /* CONFIG_PM */
1087 #define sdhci_pci_suspend NULL
1088 #define sdhci_pci_resume NULL
1090 #endif /* CONFIG_PM */
1092 #ifdef CONFIG_PM_RUNTIME
1094 static int sdhci_pci_runtime_suspend(struct device *dev)
1096 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1097 struct sdhci_pci_chip *chip;
1098 struct sdhci_pci_slot *slot;
1101 chip = pci_get_drvdata(pdev);
1105 for (i = 0; i < chip->num_slots; i++) {
1106 slot = chip->slots[i];
1110 ret = sdhci_runtime_suspend_host(slot->host);
1113 goto err_pci_runtime_suspend;
1116 if (chip->fixes && chip->fixes->suspend) {
1117 ret = chip->fixes->suspend(chip);
1119 goto err_pci_runtime_suspend;
1124 err_pci_runtime_suspend:
1126 sdhci_runtime_resume_host(chip->slots[i]->host);
1130 static int sdhci_pci_runtime_resume(struct device *dev)
1132 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1133 struct sdhci_pci_chip *chip;
1134 struct sdhci_pci_slot *slot;
1137 chip = pci_get_drvdata(pdev);
1141 if (chip->fixes && chip->fixes->resume) {
1142 ret = chip->fixes->resume(chip);
1147 for (i = 0; i < chip->num_slots; i++) {
1148 slot = chip->slots[i];
1152 ret = sdhci_runtime_resume_host(slot->host);
1160 static int sdhci_pci_runtime_idle(struct device *dev)
1167 #define sdhci_pci_runtime_suspend NULL
1168 #define sdhci_pci_runtime_resume NULL
1169 #define sdhci_pci_runtime_idle NULL
1173 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1174 .suspend = sdhci_pci_suspend,
1175 .resume = sdhci_pci_resume,
1176 .runtime_suspend = sdhci_pci_runtime_suspend,
1177 .runtime_resume = sdhci_pci_runtime_resume,
1178 .runtime_idle = sdhci_pci_runtime_idle,
1181 /*****************************************************************************\
1183 * Device probing/removal *
1185 \*****************************************************************************/
1187 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1188 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1191 struct sdhci_pci_slot *slot;
1192 struct sdhci_host *host;
1193 int ret, bar = first_bar + slotno;
1195 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1196 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1197 return ERR_PTR(-ENODEV);
1200 if (pci_resource_len(pdev, bar) < 0x100) {
1201 dev_err(&pdev->dev, "Invalid iomem size. You may "
1202 "experience problems.\n");
1205 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1206 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1207 return ERR_PTR(-ENODEV);
1210 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1211 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1212 return ERR_PTR(-ENODEV);
1215 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1217 dev_err(&pdev->dev, "cannot allocate host\n");
1218 return ERR_CAST(host);
1221 slot = sdhci_priv(host);
1225 slot->pci_bar = bar;
1226 slot->rst_n_gpio = -EINVAL;
1227 slot->cd_gpio = -EINVAL;
1229 /* Retrieve platform data if there is any */
1230 if (*sdhci_pci_get_data)
1231 slot->data = sdhci_pci_get_data(pdev, slotno);
1234 if (slot->data->setup) {
1235 ret = slot->data->setup(slot->data);
1237 dev_err(&pdev->dev, "platform setup failed\n");
1241 slot->rst_n_gpio = slot->data->rst_n_gpio;
1242 slot->cd_gpio = slot->data->cd_gpio;
1245 host->hw_name = "PCI";
1246 host->ops = &sdhci_pci_ops;
1247 host->quirks = chip->quirks;
1248 host->quirks2 = chip->quirks2;
1250 host->irq = pdev->irq;
1252 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1254 dev_err(&pdev->dev, "cannot request region\n");
1258 host->ioaddr = pci_ioremap_bar(pdev, bar);
1259 if (!host->ioaddr) {
1260 dev_err(&pdev->dev, "failed to remap registers\n");
1265 if (chip->fixes && chip->fixes->probe_slot) {
1266 ret = chip->fixes->probe_slot(slot);
1271 if (gpio_is_valid(slot->rst_n_gpio)) {
1272 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1273 gpio_direction_output(slot->rst_n_gpio, 1);
1274 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1276 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1277 slot->rst_n_gpio = -EINVAL;
1281 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1283 ret = sdhci_add_host(host);
1287 sdhci_pci_add_own_cd(slot);
1292 if (gpio_is_valid(slot->rst_n_gpio))
1293 gpio_free(slot->rst_n_gpio);
1295 if (chip->fixes && chip->fixes->remove_slot)
1296 chip->fixes->remove_slot(slot, 0);
1299 iounmap(host->ioaddr);
1302 pci_release_region(pdev, bar);
1305 if (slot->data && slot->data->cleanup)
1306 slot->data->cleanup(slot->data);
1309 sdhci_free_host(host);
1311 return ERR_PTR(ret);
1314 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1319 sdhci_pci_remove_own_cd(slot);
1322 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1323 if (scratch == (u32)-1)
1326 sdhci_remove_host(slot->host, dead);
1328 if (gpio_is_valid(slot->rst_n_gpio))
1329 gpio_free(slot->rst_n_gpio);
1331 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1332 slot->chip->fixes->remove_slot(slot, dead);
1334 if (slot->data && slot->data->cleanup)
1335 slot->data->cleanup(slot->data);
1337 pci_release_region(slot->chip->pdev, slot->pci_bar);
1339 sdhci_free_host(slot->host);
1342 static void __devinit sdhci_pci_runtime_pm_allow(struct device *dev)
1344 pm_runtime_put_noidle(dev);
1345 pm_runtime_allow(dev);
1346 pm_runtime_set_autosuspend_delay(dev, 50);
1347 pm_runtime_use_autosuspend(dev);
1348 pm_suspend_ignore_children(dev, 1);
1351 static void __devexit sdhci_pci_runtime_pm_forbid(struct device *dev)
1353 pm_runtime_forbid(dev);
1354 pm_runtime_get_noresume(dev);
1357 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1358 const struct pci_device_id *ent)
1360 struct sdhci_pci_chip *chip;
1361 struct sdhci_pci_slot *slot;
1363 u8 slots, first_bar;
1366 BUG_ON(pdev == NULL);
1367 BUG_ON(ent == NULL);
1369 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1370 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1372 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1376 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1377 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1381 BUG_ON(slots > MAX_SLOTS);
1383 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1387 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1389 if (first_bar > 5) {
1390 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1394 ret = pci_enable_device(pdev);
1398 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1405 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1407 chip->quirks = chip->fixes->quirks;
1408 chip->quirks2 = chip->fixes->quirks2;
1409 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1411 chip->num_slots = slots;
1413 pci_set_drvdata(pdev, chip);
1415 if (chip->fixes && chip->fixes->probe) {
1416 ret = chip->fixes->probe(chip);
1421 slots = chip->num_slots; /* Quirk may have changed this */
1423 for (i = 0; i < slots; i++) {
1424 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1426 for (i--; i >= 0; i--)
1427 sdhci_pci_remove_slot(chip->slots[i]);
1428 ret = PTR_ERR(slot);
1432 chip->slots[i] = slot;
1435 if (chip->allow_runtime_pm)
1436 sdhci_pci_runtime_pm_allow(&pdev->dev);
1441 pci_set_drvdata(pdev, NULL);
1445 pci_disable_device(pdev);
1449 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1452 struct sdhci_pci_chip *chip;
1454 chip = pci_get_drvdata(pdev);
1457 if (chip->allow_runtime_pm)
1458 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1460 for (i = 0; i < chip->num_slots; i++)
1461 sdhci_pci_remove_slot(chip->slots[i]);
1463 pci_set_drvdata(pdev, NULL);
1467 pci_disable_device(pdev);
1470 static struct pci_driver sdhci_driver = {
1471 .name = "sdhci-pci",
1472 .id_table = pci_ids,
1473 .probe = sdhci_pci_probe,
1474 .remove = __devexit_p(sdhci_pci_remove),
1476 .pm = &sdhci_pci_pm_ops
1480 module_pci_driver(sdhci_driver);
1482 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1483 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1484 MODULE_LICENSE("GPL");