1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
30 #include "sdhci-pci.h"
31 #include "sdhci-pci-o2micro.h"
33 /*****************************************************************************\
35 * Hardware specific quirk handling *
37 \*****************************************************************************/
39 static int ricoh_probe(struct sdhci_pci_chip *chip)
41 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
42 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
43 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
47 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
50 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
51 & SDHCI_TIMEOUT_CLK_MASK) |
53 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
54 & SDHCI_CLOCK_BASE_MASK) |
56 SDHCI_TIMEOUT_CLK_UNIT |
63 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
65 /* Apply a delay to allow controller to settle */
66 /* Otherwise it becomes confused if card state changed
72 static const struct sdhci_pci_fixes sdhci_ricoh = {
74 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
75 SDHCI_QUIRK_FORCE_DMA |
76 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
79 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
80 .probe_slot = ricoh_mmc_probe_slot,
81 .resume = ricoh_mmc_resume,
82 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
83 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
84 SDHCI_QUIRK_NO_CARD_NO_RESET |
85 SDHCI_QUIRK_MISSING_CAPS
88 static const struct sdhci_pci_fixes sdhci_ene_712 = {
89 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
90 SDHCI_QUIRK_BROKEN_DMA,
93 static const struct sdhci_pci_fixes sdhci_ene_714 = {
94 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
95 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
96 SDHCI_QUIRK_BROKEN_DMA,
99 static const struct sdhci_pci_fixes sdhci_cafe = {
100 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
101 SDHCI_QUIRK_NO_BUSY_IRQ |
102 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
103 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
106 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
107 .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
110 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
112 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
117 * ADMA operation is disabled for Moorestown platform due to
120 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
123 * slots number is fixed here for MRST as SDIO3/5 are never used and
124 * have hardware bugs.
130 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
132 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
136 #ifdef CONFIG_PM_RUNTIME
138 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
140 struct sdhci_pci_slot *slot = dev_id;
141 struct sdhci_host *host = slot->host;
143 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
147 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
149 int err, irq, gpio = slot->cd_gpio;
151 slot->cd_gpio = -EINVAL;
152 slot->cd_irq = -EINVAL;
154 if (!gpio_is_valid(gpio))
157 err = gpio_request(gpio, "sd_cd");
161 err = gpio_direction_input(gpio);
165 irq = gpio_to_irq(gpio);
169 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
170 IRQF_TRIGGER_FALLING, "sd_cd", slot);
174 slot->cd_gpio = gpio;
182 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
185 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
187 if (slot->cd_irq >= 0)
188 free_irq(slot->cd_irq, slot);
189 if (gpio_is_valid(slot->cd_gpio))
190 gpio_free(slot->cd_gpio);
195 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
199 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
205 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
207 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
208 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
209 MMC_CAP2_HC_ERASE_SZ;
213 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
215 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
219 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
220 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
221 .probe_slot = mrst_hc_probe_slot,
224 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
225 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
226 .probe = mrst_hc_probe,
229 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
230 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
231 .allow_runtime_pm = true,
232 .own_cd_for_runtime_pm = true,
235 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
236 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
237 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
238 .allow_runtime_pm = true,
239 .probe_slot = mfd_sdio_probe_slot,
242 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
243 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
244 .allow_runtime_pm = true,
245 .probe_slot = mfd_emmc_probe_slot,
248 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
249 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
250 .probe_slot = pch_hc_probe_slot,
253 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
257 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
259 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
260 /* For eMMC, minimum is 1us but give it 9us for good measure */
263 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
264 /* For eMMC, minimum is 200us but give it 300us for good measure */
265 usleep_range(300, 1000);
268 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
270 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
271 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR;
272 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
273 slot->hw_reset = sdhci_pci_int_hw_reset;
277 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
279 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
283 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
284 .allow_runtime_pm = true,
285 .probe_slot = byt_emmc_probe_slot,
286 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
289 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
290 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
291 .allow_runtime_pm = true,
292 .probe_slot = byt_sdio_probe_slot,
295 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
296 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
297 .allow_runtime_pm = true,
298 .own_cd_for_runtime_pm = true,
301 /* Define Host controllers for Intel Merrifield platform */
302 #define INTEL_MRFL_EMMC_0 0
303 #define INTEL_MRFL_EMMC_1 1
305 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
307 if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
308 (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
309 /* SD support is not ready yet */
312 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
318 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
319 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
320 .quirks2 = SDHCI_QUIRK2_BROKEN_HS200,
321 .probe_slot = intel_mrfl_mmc_probe_slot,
324 /* O2Micro extra registers */
325 #define O2_SD_LOCK_WP 0xD3
326 #define O2_SD_MULTI_VCC3V 0xEE
327 #define O2_SD_CLKREQ 0xEC
328 #define O2_SD_CAPS 0xE0
329 #define O2_SD_ADMA1 0xE2
330 #define O2_SD_ADMA2 0xE7
331 #define O2_SD_INF_MOD 0xF1
333 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
338 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
343 * Turn PMOS on [bit 0], set over current detection to 2.4 V
344 * [bit 1:2] and enable over current debouncing [bit 6].
351 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
358 static int jmicron_probe(struct sdhci_pci_chip *chip)
363 if (chip->pdev->revision == 0) {
364 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
365 SDHCI_QUIRK_32BIT_DMA_SIZE |
366 SDHCI_QUIRK_32BIT_ADMA_SIZE |
367 SDHCI_QUIRK_RESET_AFTER_REQUEST |
368 SDHCI_QUIRK_BROKEN_SMALL_PIO;
372 * JMicron chips can have two interfaces to the same hardware
373 * in order to work around limitations in Microsoft's driver.
374 * We need to make sure we only bind to one of them.
376 * This code assumes two things:
378 * 1. The PCI code adds subfunctions in order.
380 * 2. The MMC interface has a lower subfunction number
381 * than the SD interface.
383 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
384 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
385 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
386 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
389 struct pci_dev *sd_dev;
392 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
393 mmcdev, sd_dev)) != NULL) {
394 if ((PCI_SLOT(chip->pdev->devfn) ==
395 PCI_SLOT(sd_dev->devfn)) &&
396 (chip->pdev->bus == sd_dev->bus))
402 dev_info(&chip->pdev->dev, "Refusing to bind to "
403 "secondary interface.\n");
409 * JMicron chips need a bit of a nudge to enable the power
412 ret = jmicron_pmos(chip, 1);
414 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
418 /* quirk for unsable RO-detection on JM388 chips */
419 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
420 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
421 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
426 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
430 scratch = readb(host->ioaddr + 0xC0);
437 writeb(scratch, host->ioaddr + 0xC0);
440 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
442 if (slot->chip->pdev->revision == 0) {
445 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
446 version = (version & SDHCI_VENDOR_VER_MASK) >>
447 SDHCI_VENDOR_VER_SHIFT;
450 * Older versions of the chip have lots of nasty glitches
451 * in the ADMA engine. It's best just to avoid it
455 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
458 /* JM388 MMC doesn't support 1.8V while SD supports it */
459 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
460 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
461 MMC_VDD_29_30 | MMC_VDD_30_31 |
462 MMC_VDD_165_195; /* allow 1.8V */
463 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
464 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
468 * The secondary interface requires a bit set to get the
471 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
472 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
473 jmicron_enable_mmc(slot->host, 1);
475 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
480 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
485 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
486 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
487 jmicron_enable_mmc(slot->host, 0);
490 static int jmicron_suspend(struct sdhci_pci_chip *chip)
494 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
495 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
496 for (i = 0; i < chip->num_slots; i++)
497 jmicron_enable_mmc(chip->slots[i]->host, 0);
503 static int jmicron_resume(struct sdhci_pci_chip *chip)
507 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
508 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
509 for (i = 0; i < chip->num_slots; i++)
510 jmicron_enable_mmc(chip->slots[i]->host, 1);
513 ret = jmicron_pmos(chip, 1);
515 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
522 static const struct sdhci_pci_fixes sdhci_o2 = {
523 .probe = sdhci_pci_o2_probe,
524 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
525 .probe_slot = sdhci_pci_o2_probe_slot,
526 .resume = sdhci_pci_o2_resume,
529 static const struct sdhci_pci_fixes sdhci_jmicron = {
530 .probe = jmicron_probe,
532 .probe_slot = jmicron_probe_slot,
533 .remove_slot = jmicron_remove_slot,
535 .suspend = jmicron_suspend,
536 .resume = jmicron_resume,
539 /* SysKonnect CardBus2SDIO extra registers */
540 #define SYSKT_CTRL 0x200
541 #define SYSKT_RDFIFO_STAT 0x204
542 #define SYSKT_WRFIFO_STAT 0x208
543 #define SYSKT_POWER_DATA 0x20c
544 #define SYSKT_POWER_330 0xef
545 #define SYSKT_POWER_300 0xf8
546 #define SYSKT_POWER_184 0xcc
547 #define SYSKT_POWER_CMD 0x20d
548 #define SYSKT_POWER_START (1 << 7)
549 #define SYSKT_POWER_STATUS 0x20e
550 #define SYSKT_POWER_STATUS_OK (1 << 0)
551 #define SYSKT_BOARD_REV 0x210
552 #define SYSKT_CHIP_REV 0x211
553 #define SYSKT_CONF_DATA 0x212
554 #define SYSKT_CONF_DATA_1V8 (1 << 2)
555 #define SYSKT_CONF_DATA_2V5 (1 << 1)
556 #define SYSKT_CONF_DATA_3V3 (1 << 0)
558 static int syskt_probe(struct sdhci_pci_chip *chip)
560 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
561 chip->pdev->class &= ~0x0000FF;
562 chip->pdev->class |= PCI_SDHCI_IFDMA;
567 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
571 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
572 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
573 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
574 "board rev %d.%d, chip rev %d.%d\n",
575 board_rev >> 4, board_rev & 0xf,
576 chip_rev >> 4, chip_rev & 0xf);
577 if (chip_rev >= 0x20)
578 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
580 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
581 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
583 tm = 10; /* Wait max 1 ms */
585 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
586 if (ps & SYSKT_POWER_STATUS_OK)
591 dev_err(&slot->chip->pdev->dev,
592 "power regulator never stabilized");
593 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
600 static const struct sdhci_pci_fixes sdhci_syskt = {
601 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
602 .probe = syskt_probe,
603 .probe_slot = syskt_probe_slot,
606 static int via_probe(struct sdhci_pci_chip *chip)
608 if (chip->pdev->revision == 0x10)
609 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
614 static const struct sdhci_pci_fixes sdhci_via = {
618 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
620 slot->host->mmc->caps2 |= MMC_CAP2_HS200;
624 static const struct sdhci_pci_fixes sdhci_rtsx = {
625 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
626 SDHCI_QUIRK2_BROKEN_DDR50,
627 .probe_slot = rtsx_probe_slot,
630 static const struct pci_device_id pci_ids[] = {
632 .vendor = PCI_VENDOR_ID_RICOH,
633 .device = PCI_DEVICE_ID_RICOH_R5C822,
634 .subvendor = PCI_ANY_ID,
635 .subdevice = PCI_ANY_ID,
636 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
640 .vendor = PCI_VENDOR_ID_RICOH,
642 .subvendor = PCI_ANY_ID,
643 .subdevice = PCI_ANY_ID,
644 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
648 .vendor = PCI_VENDOR_ID_RICOH,
650 .subvendor = PCI_ANY_ID,
651 .subdevice = PCI_ANY_ID,
652 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
656 .vendor = PCI_VENDOR_ID_RICOH,
658 .subvendor = PCI_ANY_ID,
659 .subdevice = PCI_ANY_ID,
660 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
664 .vendor = PCI_VENDOR_ID_ENE,
665 .device = PCI_DEVICE_ID_ENE_CB712_SD,
666 .subvendor = PCI_ANY_ID,
667 .subdevice = PCI_ANY_ID,
668 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
672 .vendor = PCI_VENDOR_ID_ENE,
673 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
674 .subvendor = PCI_ANY_ID,
675 .subdevice = PCI_ANY_ID,
676 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
680 .vendor = PCI_VENDOR_ID_ENE,
681 .device = PCI_DEVICE_ID_ENE_CB714_SD,
682 .subvendor = PCI_ANY_ID,
683 .subdevice = PCI_ANY_ID,
684 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
688 .vendor = PCI_VENDOR_ID_ENE,
689 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
690 .subvendor = PCI_ANY_ID,
691 .subdevice = PCI_ANY_ID,
692 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
696 .vendor = PCI_VENDOR_ID_MARVELL,
697 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
698 .subvendor = PCI_ANY_ID,
699 .subdevice = PCI_ANY_ID,
700 .driver_data = (kernel_ulong_t)&sdhci_cafe,
704 .vendor = PCI_VENDOR_ID_JMICRON,
705 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
706 .subvendor = PCI_ANY_ID,
707 .subdevice = PCI_ANY_ID,
708 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
712 .vendor = PCI_VENDOR_ID_JMICRON,
713 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
714 .subvendor = PCI_ANY_ID,
715 .subdevice = PCI_ANY_ID,
716 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
720 .vendor = PCI_VENDOR_ID_JMICRON,
721 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
722 .subvendor = PCI_ANY_ID,
723 .subdevice = PCI_ANY_ID,
724 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
728 .vendor = PCI_VENDOR_ID_JMICRON,
729 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
730 .subvendor = PCI_ANY_ID,
731 .subdevice = PCI_ANY_ID,
732 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
736 .vendor = PCI_VENDOR_ID_SYSKONNECT,
738 .subvendor = PCI_ANY_ID,
739 .subdevice = PCI_ANY_ID,
740 .driver_data = (kernel_ulong_t)&sdhci_syskt,
744 .vendor = PCI_VENDOR_ID_VIA,
746 .subvendor = PCI_ANY_ID,
747 .subdevice = PCI_ANY_ID,
748 .driver_data = (kernel_ulong_t)&sdhci_via,
752 .vendor = PCI_VENDOR_ID_REALTEK,
754 .subvendor = PCI_ANY_ID,
755 .subdevice = PCI_ANY_ID,
756 .driver_data = (kernel_ulong_t)&sdhci_rtsx,
760 .vendor = PCI_VENDOR_ID_INTEL,
761 .device = PCI_DEVICE_ID_INTEL_QRK_SD,
762 .subvendor = PCI_ANY_ID,
763 .subdevice = PCI_ANY_ID,
764 .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
768 .vendor = PCI_VENDOR_ID_INTEL,
769 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
770 .subvendor = PCI_ANY_ID,
771 .subdevice = PCI_ANY_ID,
772 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
776 .vendor = PCI_VENDOR_ID_INTEL,
777 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
778 .subvendor = PCI_ANY_ID,
779 .subdevice = PCI_ANY_ID,
780 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
784 .vendor = PCI_VENDOR_ID_INTEL,
785 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
786 .subvendor = PCI_ANY_ID,
787 .subdevice = PCI_ANY_ID,
788 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
792 .vendor = PCI_VENDOR_ID_INTEL,
793 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
794 .subvendor = PCI_ANY_ID,
795 .subdevice = PCI_ANY_ID,
796 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
800 .vendor = PCI_VENDOR_ID_INTEL,
801 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
802 .subvendor = PCI_ANY_ID,
803 .subdevice = PCI_ANY_ID,
804 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
808 .vendor = PCI_VENDOR_ID_INTEL,
809 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
810 .subvendor = PCI_ANY_ID,
811 .subdevice = PCI_ANY_ID,
812 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
816 .vendor = PCI_VENDOR_ID_INTEL,
817 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
818 .subvendor = PCI_ANY_ID,
819 .subdevice = PCI_ANY_ID,
820 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
824 .vendor = PCI_VENDOR_ID_INTEL,
825 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
826 .subvendor = PCI_ANY_ID,
827 .subdevice = PCI_ANY_ID,
828 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
832 .vendor = PCI_VENDOR_ID_INTEL,
833 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
834 .subvendor = PCI_ANY_ID,
835 .subdevice = PCI_ANY_ID,
836 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
840 .vendor = PCI_VENDOR_ID_INTEL,
841 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
842 .subvendor = PCI_ANY_ID,
843 .subdevice = PCI_ANY_ID,
844 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
848 .vendor = PCI_VENDOR_ID_INTEL,
849 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
850 .subvendor = PCI_ANY_ID,
851 .subdevice = PCI_ANY_ID,
852 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
856 .vendor = PCI_VENDOR_ID_INTEL,
857 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
858 .subvendor = PCI_ANY_ID,
859 .subdevice = PCI_ANY_ID,
860 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
864 .vendor = PCI_VENDOR_ID_INTEL,
865 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
866 .subvendor = PCI_ANY_ID,
867 .subdevice = PCI_ANY_ID,
868 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
872 .vendor = PCI_VENDOR_ID_INTEL,
873 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
874 .subvendor = PCI_ANY_ID,
875 .subdevice = PCI_ANY_ID,
876 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
881 .vendor = PCI_VENDOR_ID_INTEL,
882 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
883 .subvendor = PCI_ANY_ID,
884 .subdevice = PCI_ANY_ID,
885 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
889 .vendor = PCI_VENDOR_ID_INTEL,
890 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
891 .subvendor = PCI_ANY_ID,
892 .subdevice = PCI_ANY_ID,
893 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
897 .vendor = PCI_VENDOR_ID_INTEL,
898 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
899 .subvendor = PCI_ANY_ID,
900 .subdevice = PCI_ANY_ID,
901 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
905 .vendor = PCI_VENDOR_ID_INTEL,
906 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
907 .subvendor = PCI_ANY_ID,
908 .subdevice = PCI_ANY_ID,
909 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
913 .vendor = PCI_VENDOR_ID_INTEL,
914 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
915 .subvendor = PCI_ANY_ID,
916 .subdevice = PCI_ANY_ID,
917 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
921 .vendor = PCI_VENDOR_ID_INTEL,
922 .device = PCI_DEVICE_ID_INTEL_MRFL_MMC,
923 .subvendor = PCI_ANY_ID,
924 .subdevice = PCI_ANY_ID,
925 .driver_data = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
928 .vendor = PCI_VENDOR_ID_O2,
929 .device = PCI_DEVICE_ID_O2_8120,
930 .subvendor = PCI_ANY_ID,
931 .subdevice = PCI_ANY_ID,
932 .driver_data = (kernel_ulong_t)&sdhci_o2,
936 .vendor = PCI_VENDOR_ID_O2,
937 .device = PCI_DEVICE_ID_O2_8220,
938 .subvendor = PCI_ANY_ID,
939 .subdevice = PCI_ANY_ID,
940 .driver_data = (kernel_ulong_t)&sdhci_o2,
944 .vendor = PCI_VENDOR_ID_O2,
945 .device = PCI_DEVICE_ID_O2_8221,
946 .subvendor = PCI_ANY_ID,
947 .subdevice = PCI_ANY_ID,
948 .driver_data = (kernel_ulong_t)&sdhci_o2,
952 .vendor = PCI_VENDOR_ID_O2,
953 .device = PCI_DEVICE_ID_O2_8320,
954 .subvendor = PCI_ANY_ID,
955 .subdevice = PCI_ANY_ID,
956 .driver_data = (kernel_ulong_t)&sdhci_o2,
960 .vendor = PCI_VENDOR_ID_O2,
961 .device = PCI_DEVICE_ID_O2_8321,
962 .subvendor = PCI_ANY_ID,
963 .subdevice = PCI_ANY_ID,
964 .driver_data = (kernel_ulong_t)&sdhci_o2,
968 .vendor = PCI_VENDOR_ID_O2,
969 .device = PCI_DEVICE_ID_O2_FUJIN2,
970 .subvendor = PCI_ANY_ID,
971 .subdevice = PCI_ANY_ID,
972 .driver_data = (kernel_ulong_t)&sdhci_o2,
976 .vendor = PCI_VENDOR_ID_O2,
977 .device = PCI_DEVICE_ID_O2_SDS0,
978 .subvendor = PCI_ANY_ID,
979 .subdevice = PCI_ANY_ID,
980 .driver_data = (kernel_ulong_t)&sdhci_o2,
984 .vendor = PCI_VENDOR_ID_O2,
985 .device = PCI_DEVICE_ID_O2_SDS1,
986 .subvendor = PCI_ANY_ID,
987 .subdevice = PCI_ANY_ID,
988 .driver_data = (kernel_ulong_t)&sdhci_o2,
992 .vendor = PCI_VENDOR_ID_O2,
993 .device = PCI_DEVICE_ID_O2_SEABIRD0,
994 .subvendor = PCI_ANY_ID,
995 .subdevice = PCI_ANY_ID,
996 .driver_data = (kernel_ulong_t)&sdhci_o2,
1000 .vendor = PCI_VENDOR_ID_O2,
1001 .device = PCI_DEVICE_ID_O2_SEABIRD1,
1002 .subvendor = PCI_ANY_ID,
1003 .subdevice = PCI_ANY_ID,
1004 .driver_data = (kernel_ulong_t)&sdhci_o2,
1007 { /* Generic SD host controller */
1008 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1011 { /* end: all zeroes */ },
1014 MODULE_DEVICE_TABLE(pci, pci_ids);
1016 /*****************************************************************************\
1018 * SDHCI core callbacks *
1020 \*****************************************************************************/
1022 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1024 struct sdhci_pci_slot *slot;
1025 struct pci_dev *pdev;
1028 slot = sdhci_priv(host);
1029 pdev = slot->chip->pdev;
1031 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1032 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1033 (host->flags & SDHCI_USE_SDMA)) {
1034 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1035 "doesn't fully claim to support it.\n");
1038 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1042 pci_set_master(pdev);
1047 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1051 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1054 case MMC_BUS_WIDTH_8:
1055 ctrl |= SDHCI_CTRL_8BITBUS;
1056 ctrl &= ~SDHCI_CTRL_4BITBUS;
1058 case MMC_BUS_WIDTH_4:
1059 ctrl |= SDHCI_CTRL_4BITBUS;
1060 ctrl &= ~SDHCI_CTRL_8BITBUS;
1063 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1067 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1070 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1072 struct sdhci_pci_slot *slot = sdhci_priv(host);
1073 int rst_n_gpio = slot->rst_n_gpio;
1075 if (!gpio_is_valid(rst_n_gpio))
1077 gpio_set_value_cansleep(rst_n_gpio, 0);
1078 /* For eMMC, minimum is 1us but give it 10us for good measure */
1080 gpio_set_value_cansleep(rst_n_gpio, 1);
1081 /* For eMMC, minimum is 200us but give it 300us for good measure */
1082 usleep_range(300, 1000);
1085 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1087 struct sdhci_pci_slot *slot = sdhci_priv(host);
1090 slot->hw_reset(host);
1093 static const struct sdhci_ops sdhci_pci_ops = {
1094 .set_clock = sdhci_set_clock,
1095 .enable_dma = sdhci_pci_enable_dma,
1096 .set_bus_width = sdhci_pci_set_bus_width,
1097 .reset = sdhci_reset,
1098 .set_uhs_signaling = sdhci_set_uhs_signaling,
1099 .hw_reset = sdhci_pci_hw_reset,
1102 /*****************************************************************************\
1106 \*****************************************************************************/
1110 static int sdhci_pci_suspend(struct device *dev)
1112 struct pci_dev *pdev = to_pci_dev(dev);
1113 struct sdhci_pci_chip *chip;
1114 struct sdhci_pci_slot *slot;
1115 mmc_pm_flag_t slot_pm_flags;
1116 mmc_pm_flag_t pm_flags = 0;
1119 chip = pci_get_drvdata(pdev);
1123 for (i = 0; i < chip->num_slots; i++) {
1124 slot = chip->slots[i];
1128 ret = sdhci_suspend_host(slot->host);
1131 goto err_pci_suspend;
1133 slot_pm_flags = slot->host->mmc->pm_flags;
1134 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1135 sdhci_enable_irq_wakeups(slot->host);
1137 pm_flags |= slot_pm_flags;
1140 if (chip->fixes && chip->fixes->suspend) {
1141 ret = chip->fixes->suspend(chip);
1143 goto err_pci_suspend;
1146 if (pm_flags & MMC_PM_KEEP_POWER) {
1147 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1148 device_init_wakeup(dev, true);
1150 device_init_wakeup(dev, false);
1152 device_init_wakeup(dev, false);
1158 sdhci_resume_host(chip->slots[i]->host);
1162 static int sdhci_pci_resume(struct device *dev)
1164 struct pci_dev *pdev = to_pci_dev(dev);
1165 struct sdhci_pci_chip *chip;
1166 struct sdhci_pci_slot *slot;
1169 chip = pci_get_drvdata(pdev);
1173 if (chip->fixes && chip->fixes->resume) {
1174 ret = chip->fixes->resume(chip);
1179 for (i = 0; i < chip->num_slots; i++) {
1180 slot = chip->slots[i];
1184 ret = sdhci_resume_host(slot->host);
1192 #else /* CONFIG_PM */
1194 #define sdhci_pci_suspend NULL
1195 #define sdhci_pci_resume NULL
1197 #endif /* CONFIG_PM */
1199 #ifdef CONFIG_PM_RUNTIME
1201 static int sdhci_pci_runtime_suspend(struct device *dev)
1203 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1204 struct sdhci_pci_chip *chip;
1205 struct sdhci_pci_slot *slot;
1208 chip = pci_get_drvdata(pdev);
1212 for (i = 0; i < chip->num_slots; i++) {
1213 slot = chip->slots[i];
1217 ret = sdhci_runtime_suspend_host(slot->host);
1220 goto err_pci_runtime_suspend;
1223 if (chip->fixes && chip->fixes->suspend) {
1224 ret = chip->fixes->suspend(chip);
1226 goto err_pci_runtime_suspend;
1231 err_pci_runtime_suspend:
1233 sdhci_runtime_resume_host(chip->slots[i]->host);
1237 static int sdhci_pci_runtime_resume(struct device *dev)
1239 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1240 struct sdhci_pci_chip *chip;
1241 struct sdhci_pci_slot *slot;
1244 chip = pci_get_drvdata(pdev);
1248 if (chip->fixes && chip->fixes->resume) {
1249 ret = chip->fixes->resume(chip);
1254 for (i = 0; i < chip->num_slots; i++) {
1255 slot = chip->slots[i];
1259 ret = sdhci_runtime_resume_host(slot->host);
1267 static int sdhci_pci_runtime_idle(struct device *dev)
1274 #define sdhci_pci_runtime_suspend NULL
1275 #define sdhci_pci_runtime_resume NULL
1276 #define sdhci_pci_runtime_idle NULL
1280 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1281 .suspend = sdhci_pci_suspend,
1282 .resume = sdhci_pci_resume,
1283 .runtime_suspend = sdhci_pci_runtime_suspend,
1284 .runtime_resume = sdhci_pci_runtime_resume,
1285 .runtime_idle = sdhci_pci_runtime_idle,
1288 /*****************************************************************************\
1290 * Device probing/removal *
1292 \*****************************************************************************/
1294 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1295 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1298 struct sdhci_pci_slot *slot;
1299 struct sdhci_host *host;
1300 int ret, bar = first_bar + slotno;
1302 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1303 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1304 return ERR_PTR(-ENODEV);
1307 if (pci_resource_len(pdev, bar) < 0x100) {
1308 dev_err(&pdev->dev, "Invalid iomem size. You may "
1309 "experience problems.\n");
1312 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1313 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1314 return ERR_PTR(-ENODEV);
1317 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1318 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1319 return ERR_PTR(-ENODEV);
1322 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1324 dev_err(&pdev->dev, "cannot allocate host\n");
1325 return ERR_CAST(host);
1328 slot = sdhci_priv(host);
1332 slot->pci_bar = bar;
1333 slot->rst_n_gpio = -EINVAL;
1334 slot->cd_gpio = -EINVAL;
1336 /* Retrieve platform data if there is any */
1337 if (*sdhci_pci_get_data)
1338 slot->data = sdhci_pci_get_data(pdev, slotno);
1341 if (slot->data->setup) {
1342 ret = slot->data->setup(slot->data);
1344 dev_err(&pdev->dev, "platform setup failed\n");
1348 slot->rst_n_gpio = slot->data->rst_n_gpio;
1349 slot->cd_gpio = slot->data->cd_gpio;
1352 host->hw_name = "PCI";
1353 host->ops = &sdhci_pci_ops;
1354 host->quirks = chip->quirks;
1355 host->quirks2 = chip->quirks2;
1357 host->irq = pdev->irq;
1359 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1361 dev_err(&pdev->dev, "cannot request region\n");
1365 host->ioaddr = pci_ioremap_bar(pdev, bar);
1366 if (!host->ioaddr) {
1367 dev_err(&pdev->dev, "failed to remap registers\n");
1372 if (chip->fixes && chip->fixes->probe_slot) {
1373 ret = chip->fixes->probe_slot(slot);
1378 if (gpio_is_valid(slot->rst_n_gpio)) {
1379 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1380 gpio_direction_output(slot->rst_n_gpio, 1);
1381 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1382 slot->hw_reset = sdhci_pci_gpio_hw_reset;
1384 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1385 slot->rst_n_gpio = -EINVAL;
1389 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1390 host->mmc->slotno = slotno;
1391 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1393 ret = sdhci_add_host(host);
1397 sdhci_pci_add_own_cd(slot);
1400 * Check if the chip needs a separate GPIO for card detect to wake up
1401 * from runtime suspend. If it is not there, don't allow runtime PM.
1402 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1404 if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1405 !gpio_is_valid(slot->cd_gpio))
1406 chip->allow_runtime_pm = false;
1411 if (gpio_is_valid(slot->rst_n_gpio))
1412 gpio_free(slot->rst_n_gpio);
1414 if (chip->fixes && chip->fixes->remove_slot)
1415 chip->fixes->remove_slot(slot, 0);
1418 iounmap(host->ioaddr);
1421 pci_release_region(pdev, bar);
1424 if (slot->data && slot->data->cleanup)
1425 slot->data->cleanup(slot->data);
1428 sdhci_free_host(host);
1430 return ERR_PTR(ret);
1433 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1438 sdhci_pci_remove_own_cd(slot);
1441 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1442 if (scratch == (u32)-1)
1445 sdhci_remove_host(slot->host, dead);
1447 if (gpio_is_valid(slot->rst_n_gpio))
1448 gpio_free(slot->rst_n_gpio);
1450 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1451 slot->chip->fixes->remove_slot(slot, dead);
1453 if (slot->data && slot->data->cleanup)
1454 slot->data->cleanup(slot->data);
1456 pci_release_region(slot->chip->pdev, slot->pci_bar);
1458 sdhci_free_host(slot->host);
1461 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1463 pm_runtime_put_noidle(dev);
1464 pm_runtime_allow(dev);
1465 pm_runtime_set_autosuspend_delay(dev, 50);
1466 pm_runtime_use_autosuspend(dev);
1467 pm_suspend_ignore_children(dev, 1);
1470 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1472 pm_runtime_forbid(dev);
1473 pm_runtime_get_noresume(dev);
1476 static int sdhci_pci_probe(struct pci_dev *pdev,
1477 const struct pci_device_id *ent)
1479 struct sdhci_pci_chip *chip;
1480 struct sdhci_pci_slot *slot;
1482 u8 slots, first_bar;
1485 BUG_ON(pdev == NULL);
1486 BUG_ON(ent == NULL);
1488 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1489 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1491 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1495 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1496 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1500 BUG_ON(slots > MAX_SLOTS);
1502 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1506 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1508 if (first_bar > 5) {
1509 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1513 ret = pci_enable_device(pdev);
1517 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1524 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1526 chip->quirks = chip->fixes->quirks;
1527 chip->quirks2 = chip->fixes->quirks2;
1528 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1530 chip->num_slots = slots;
1532 pci_set_drvdata(pdev, chip);
1534 if (chip->fixes && chip->fixes->probe) {
1535 ret = chip->fixes->probe(chip);
1540 slots = chip->num_slots; /* Quirk may have changed this */
1542 for (i = 0; i < slots; i++) {
1543 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1545 for (i--; i >= 0; i--)
1546 sdhci_pci_remove_slot(chip->slots[i]);
1547 ret = PTR_ERR(slot);
1551 chip->slots[i] = slot;
1554 if (chip->allow_runtime_pm)
1555 sdhci_pci_runtime_pm_allow(&pdev->dev);
1560 pci_set_drvdata(pdev, NULL);
1564 pci_disable_device(pdev);
1568 static void sdhci_pci_remove(struct pci_dev *pdev)
1571 struct sdhci_pci_chip *chip;
1573 chip = pci_get_drvdata(pdev);
1576 if (chip->allow_runtime_pm)
1577 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1579 for (i = 0; i < chip->num_slots; i++)
1580 sdhci_pci_remove_slot(chip->slots[i]);
1582 pci_set_drvdata(pdev, NULL);
1586 pci_disable_device(pdev);
1589 static struct pci_driver sdhci_driver = {
1590 .name = "sdhci-pci",
1591 .id_table = pci_ids,
1592 .probe = sdhci_pci_probe,
1593 .remove = sdhci_pci_remove,
1595 .pm = &sdhci_pci_pm_ops
1599 module_pci_driver(sdhci_driver);
1601 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1602 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1603 MODULE_LICENSE("GPL");