1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/mmc/mmc.h>
24 #include <linux/scatterlist.h>
26 #include <linux/gpio.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/mmc/slot-gpio.h>
29 #include <linux/mmc/sdhci-pci-data.h>
32 #include "sdhci-pci.h"
33 #include "sdhci-pci-o2micro.h"
35 /*****************************************************************************\
37 * Hardware specific quirk handling *
39 \*****************************************************************************/
41 static int ricoh_probe(struct sdhci_pci_chip *chip)
43 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
44 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
45 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
49 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
52 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
53 & SDHCI_TIMEOUT_CLK_MASK) |
55 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
56 & SDHCI_CLOCK_BASE_MASK) |
58 SDHCI_TIMEOUT_CLK_UNIT |
65 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
67 /* Apply a delay to allow controller to settle */
68 /* Otherwise it becomes confused if card state changed
74 static const struct sdhci_pci_fixes sdhci_ricoh = {
76 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
77 SDHCI_QUIRK_FORCE_DMA |
78 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
81 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
82 .probe_slot = ricoh_mmc_probe_slot,
83 .resume = ricoh_mmc_resume,
84 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
85 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
86 SDHCI_QUIRK_NO_CARD_NO_RESET |
87 SDHCI_QUIRK_MISSING_CAPS
90 static const struct sdhci_pci_fixes sdhci_ene_712 = {
91 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
92 SDHCI_QUIRK_BROKEN_DMA,
95 static const struct sdhci_pci_fixes sdhci_ene_714 = {
96 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
97 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
98 SDHCI_QUIRK_BROKEN_DMA,
101 static const struct sdhci_pci_fixes sdhci_cafe = {
102 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
103 SDHCI_QUIRK_NO_BUSY_IRQ |
104 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
105 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
108 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
109 .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
112 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
114 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
119 * ADMA operation is disabled for Moorestown platform due to
122 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
125 * slots number is fixed here for MRST as SDIO3/5 are never used and
126 * have hardware bugs.
132 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
134 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
140 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
142 struct sdhci_pci_slot *slot = dev_id;
143 struct sdhci_host *host = slot->host;
145 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
149 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
151 int err, irq, gpio = slot->cd_gpio;
153 slot->cd_gpio = -EINVAL;
154 slot->cd_irq = -EINVAL;
156 if (!gpio_is_valid(gpio))
159 err = gpio_request(gpio, "sd_cd");
163 err = gpio_direction_input(gpio);
167 irq = gpio_to_irq(gpio);
171 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
172 IRQF_TRIGGER_FALLING, "sd_cd", slot);
176 slot->cd_gpio = gpio;
184 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
187 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
189 if (slot->cd_irq >= 0)
190 free_irq(slot->cd_irq, slot);
191 if (gpio_is_valid(slot->cd_gpio))
192 gpio_free(slot->cd_gpio);
197 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
201 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
207 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
209 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
210 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
211 MMC_CAP2_HC_ERASE_SZ;
215 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
217 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
221 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
222 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
223 .probe_slot = mrst_hc_probe_slot,
226 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
227 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
228 .probe = mrst_hc_probe,
231 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
232 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
233 .allow_runtime_pm = true,
234 .own_cd_for_runtime_pm = true,
237 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
238 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
239 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
240 .allow_runtime_pm = true,
241 .probe_slot = mfd_sdio_probe_slot,
244 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
245 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
246 .allow_runtime_pm = true,
247 .probe_slot = mfd_emmc_probe_slot,
250 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
251 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
252 .probe_slot = pch_hc_probe_slot,
255 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
259 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
261 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
262 /* For eMMC, minimum is 1us but give it 9us for good measure */
265 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
266 /* For eMMC, minimum is 200us but give it 300us for good measure */
267 usleep_range(300, 1000);
270 static int spt_select_drive_strength(struct sdhci_host *host,
271 struct mmc_card *card,
272 unsigned int max_dtr,
273 int host_drv, int card_drv, int *drv_type)
277 if (sdhci_pci_spt_drive_strength > 0)
278 drive_strength = sdhci_pci_spt_drive_strength & 0xf;
280 drive_strength = 0; /* Default 50-ohm */
282 if ((mmc_driver_type_mask(drive_strength) & card_drv) == 0)
283 drive_strength = 0; /* Default 50-ohm */
285 return drive_strength;
288 /* Try to read the drive strength from the card */
289 static void spt_read_drive_strength(struct sdhci_host *host)
294 if (sdhci_pci_spt_drive_strength)
297 sdhci_pci_spt_drive_strength = -1;
299 m = sdhci_readw(host, SDHCI_HOST_CONTROL2) & 0x7;
300 if (m != 3 && m != 5)
302 val = sdhci_readl(host, SDHCI_PRESENT_STATE);
305 sdhci_writel(host, 0x007f0023, SDHCI_INT_ENABLE);
306 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
307 sdhci_writew(host, 0x10, SDHCI_TRANSFER_MODE);
308 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
309 sdhci_writew(host, 512, SDHCI_BLOCK_SIZE);
310 sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
311 sdhci_writel(host, 0, SDHCI_ARGUMENT);
312 sdhci_writew(host, 0x83b, SDHCI_COMMAND);
313 for (i = 0; i < 1000; i++) {
314 val = sdhci_readl(host, SDHCI_INT_STATUS);
315 if (val & 0xffff8000)
321 val = sdhci_readl(host, SDHCI_PRESENT_STATE);
324 for (i = 0; i < 47; i++)
325 val = sdhci_readl(host, SDHCI_BUFFER);
327 if (t != 0x200 && t != 0x300)
330 sdhci_pci_spt_drive_strength = 0x10 | ((val >> 12) & 0xf);
333 static int bxt_get_cd(struct mmc_host *mmc)
335 int gpio_cd = mmc_gpio_get_cd(mmc);
336 struct sdhci_host *host = mmc_priv(mmc);
343 pm_runtime_get_sync(mmc->parent);
345 spin_lock_irqsave(&host->lock, flags);
347 if (host->flags & SDHCI_DEVICE_DEAD)
350 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
352 spin_unlock_irqrestore(&host->lock, flags);
354 pm_runtime_mark_last_busy(mmc->parent);
355 pm_runtime_put_autosuspend(mmc->parent);
360 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
362 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
363 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
364 MMC_CAP_BUS_WIDTH_TEST |
365 MMC_CAP_WAIT_WHILE_BUSY;
366 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
367 slot->hw_reset = sdhci_pci_int_hw_reset;
368 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
369 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
370 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_SPT_EMMC) {
371 spt_read_drive_strength(slot->host);
372 slot->select_drive_strength = spt_select_drive_strength;
377 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
379 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
380 MMC_CAP_BUS_WIDTH_TEST |
381 MMC_CAP_WAIT_WHILE_BUSY;
385 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
387 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST |
388 MMC_CAP_WAIT_WHILE_BUSY;
389 slot->cd_con_id = NULL;
391 slot->cd_override_level = true;
392 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
393 slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD)
394 slot->host->mmc_host_ops.get_cd = bxt_get_cd;
399 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
400 .allow_runtime_pm = true,
401 .probe_slot = byt_emmc_probe_slot,
402 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
403 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
404 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
405 SDHCI_QUIRK2_STOP_WITH_TC,
408 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
409 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
410 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
411 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
412 .allow_runtime_pm = true,
413 .probe_slot = byt_sdio_probe_slot,
416 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
417 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
418 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
419 SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
420 SDHCI_QUIRK2_STOP_WITH_TC,
421 .allow_runtime_pm = true,
422 .own_cd_for_runtime_pm = true,
423 .probe_slot = byt_sd_probe_slot,
426 /* Define Host controllers for Intel Merrifield platform */
427 #define INTEL_MRFL_EMMC_0 0
428 #define INTEL_MRFL_EMMC_1 1
430 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
432 if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
433 (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
434 /* SD support is not ready yet */
437 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
443 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
444 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
445 .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 |
446 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
447 .allow_runtime_pm = true,
448 .probe_slot = intel_mrfl_mmc_probe_slot,
451 /* O2Micro extra registers */
452 #define O2_SD_LOCK_WP 0xD3
453 #define O2_SD_MULTI_VCC3V 0xEE
454 #define O2_SD_CLKREQ 0xEC
455 #define O2_SD_CAPS 0xE0
456 #define O2_SD_ADMA1 0xE2
457 #define O2_SD_ADMA2 0xE7
458 #define O2_SD_INF_MOD 0xF1
460 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
465 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
470 * Turn PMOS on [bit 0], set over current detection to 2.4 V
471 * [bit 1:2] and enable over current debouncing [bit 6].
478 return pci_write_config_byte(chip->pdev, 0xAE, scratch);
481 static int jmicron_probe(struct sdhci_pci_chip *chip)
486 if (chip->pdev->revision == 0) {
487 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
488 SDHCI_QUIRK_32BIT_DMA_SIZE |
489 SDHCI_QUIRK_32BIT_ADMA_SIZE |
490 SDHCI_QUIRK_RESET_AFTER_REQUEST |
491 SDHCI_QUIRK_BROKEN_SMALL_PIO;
495 * JMicron chips can have two interfaces to the same hardware
496 * in order to work around limitations in Microsoft's driver.
497 * We need to make sure we only bind to one of them.
499 * This code assumes two things:
501 * 1. The PCI code adds subfunctions in order.
503 * 2. The MMC interface has a lower subfunction number
504 * than the SD interface.
506 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
507 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
508 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
509 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
512 struct pci_dev *sd_dev;
515 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
516 mmcdev, sd_dev)) != NULL) {
517 if ((PCI_SLOT(chip->pdev->devfn) ==
518 PCI_SLOT(sd_dev->devfn)) &&
519 (chip->pdev->bus == sd_dev->bus))
525 dev_info(&chip->pdev->dev, "Refusing to bind to "
526 "secondary interface.\n");
532 * JMicron chips need a bit of a nudge to enable the power
535 ret = jmicron_pmos(chip, 1);
537 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
541 /* quirk for unsable RO-detection on JM388 chips */
542 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
543 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
544 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
549 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
553 scratch = readb(host->ioaddr + 0xC0);
560 writeb(scratch, host->ioaddr + 0xC0);
563 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
565 if (slot->chip->pdev->revision == 0) {
568 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
569 version = (version & SDHCI_VENDOR_VER_MASK) >>
570 SDHCI_VENDOR_VER_SHIFT;
573 * Older versions of the chip have lots of nasty glitches
574 * in the ADMA engine. It's best just to avoid it
578 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
581 /* JM388 MMC doesn't support 1.8V while SD supports it */
582 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
583 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
584 MMC_VDD_29_30 | MMC_VDD_30_31 |
585 MMC_VDD_165_195; /* allow 1.8V */
586 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
587 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
591 * The secondary interface requires a bit set to get the
594 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
595 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
596 jmicron_enable_mmc(slot->host, 1);
598 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
603 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
608 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
609 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
610 jmicron_enable_mmc(slot->host, 0);
613 static int jmicron_suspend(struct sdhci_pci_chip *chip)
617 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
618 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
619 for (i = 0; i < chip->num_slots; i++)
620 jmicron_enable_mmc(chip->slots[i]->host, 0);
626 static int jmicron_resume(struct sdhci_pci_chip *chip)
630 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
631 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
632 for (i = 0; i < chip->num_slots; i++)
633 jmicron_enable_mmc(chip->slots[i]->host, 1);
636 ret = jmicron_pmos(chip, 1);
638 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
645 static const struct sdhci_pci_fixes sdhci_o2 = {
646 .probe = sdhci_pci_o2_probe,
647 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
648 .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
649 .probe_slot = sdhci_pci_o2_probe_slot,
650 .resume = sdhci_pci_o2_resume,
653 static const struct sdhci_pci_fixes sdhci_jmicron = {
654 .probe = jmicron_probe,
656 .probe_slot = jmicron_probe_slot,
657 .remove_slot = jmicron_remove_slot,
659 .suspend = jmicron_suspend,
660 .resume = jmicron_resume,
663 /* SysKonnect CardBus2SDIO extra registers */
664 #define SYSKT_CTRL 0x200
665 #define SYSKT_RDFIFO_STAT 0x204
666 #define SYSKT_WRFIFO_STAT 0x208
667 #define SYSKT_POWER_DATA 0x20c
668 #define SYSKT_POWER_330 0xef
669 #define SYSKT_POWER_300 0xf8
670 #define SYSKT_POWER_184 0xcc
671 #define SYSKT_POWER_CMD 0x20d
672 #define SYSKT_POWER_START (1 << 7)
673 #define SYSKT_POWER_STATUS 0x20e
674 #define SYSKT_POWER_STATUS_OK (1 << 0)
675 #define SYSKT_BOARD_REV 0x210
676 #define SYSKT_CHIP_REV 0x211
677 #define SYSKT_CONF_DATA 0x212
678 #define SYSKT_CONF_DATA_1V8 (1 << 2)
679 #define SYSKT_CONF_DATA_2V5 (1 << 1)
680 #define SYSKT_CONF_DATA_3V3 (1 << 0)
682 static int syskt_probe(struct sdhci_pci_chip *chip)
684 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
685 chip->pdev->class &= ~0x0000FF;
686 chip->pdev->class |= PCI_SDHCI_IFDMA;
691 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
695 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
696 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
697 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
698 "board rev %d.%d, chip rev %d.%d\n",
699 board_rev >> 4, board_rev & 0xf,
700 chip_rev >> 4, chip_rev & 0xf);
701 if (chip_rev >= 0x20)
702 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
704 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
705 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
707 tm = 10; /* Wait max 1 ms */
709 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
710 if (ps & SYSKT_POWER_STATUS_OK)
715 dev_err(&slot->chip->pdev->dev,
716 "power regulator never stabilized");
717 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
724 static const struct sdhci_pci_fixes sdhci_syskt = {
725 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
726 .probe = syskt_probe,
727 .probe_slot = syskt_probe_slot,
730 static int via_probe(struct sdhci_pci_chip *chip)
732 if (chip->pdev->revision == 0x10)
733 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
738 static const struct sdhci_pci_fixes sdhci_via = {
742 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
744 slot->host->mmc->caps2 |= MMC_CAP2_HS200;
748 static const struct sdhci_pci_fixes sdhci_rtsx = {
749 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
750 SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
751 SDHCI_QUIRK2_BROKEN_DDR50,
752 .probe_slot = rtsx_probe_slot,
755 /*AMD chipset generation*/
756 enum amd_chipset_gen {
757 AMD_CHIPSET_BEFORE_ML,
763 static int amd_probe(struct sdhci_pci_chip *chip)
765 struct pci_dev *smbus_dev;
766 enum amd_chipset_gen gen;
768 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
769 PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
771 gen = AMD_CHIPSET_BEFORE_ML;
773 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
774 PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
776 if (smbus_dev->revision < 0x51)
777 gen = AMD_CHIPSET_CZ;
779 gen = AMD_CHIPSET_NL;
781 gen = AMD_CHIPSET_UNKNOWN;
785 if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
786 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
787 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
793 static const struct sdhci_pci_fixes sdhci_amd = {
797 static const struct pci_device_id pci_ids[] = {
799 .vendor = PCI_VENDOR_ID_RICOH,
800 .device = PCI_DEVICE_ID_RICOH_R5C822,
801 .subvendor = PCI_ANY_ID,
802 .subdevice = PCI_ANY_ID,
803 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
807 .vendor = PCI_VENDOR_ID_RICOH,
809 .subvendor = PCI_ANY_ID,
810 .subdevice = PCI_ANY_ID,
811 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
815 .vendor = PCI_VENDOR_ID_RICOH,
817 .subvendor = PCI_ANY_ID,
818 .subdevice = PCI_ANY_ID,
819 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
823 .vendor = PCI_VENDOR_ID_RICOH,
825 .subvendor = PCI_ANY_ID,
826 .subdevice = PCI_ANY_ID,
827 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
831 .vendor = PCI_VENDOR_ID_ENE,
832 .device = PCI_DEVICE_ID_ENE_CB712_SD,
833 .subvendor = PCI_ANY_ID,
834 .subdevice = PCI_ANY_ID,
835 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
839 .vendor = PCI_VENDOR_ID_ENE,
840 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
841 .subvendor = PCI_ANY_ID,
842 .subdevice = PCI_ANY_ID,
843 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
847 .vendor = PCI_VENDOR_ID_ENE,
848 .device = PCI_DEVICE_ID_ENE_CB714_SD,
849 .subvendor = PCI_ANY_ID,
850 .subdevice = PCI_ANY_ID,
851 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
855 .vendor = PCI_VENDOR_ID_ENE,
856 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
857 .subvendor = PCI_ANY_ID,
858 .subdevice = PCI_ANY_ID,
859 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
863 .vendor = PCI_VENDOR_ID_MARVELL,
864 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
865 .subvendor = PCI_ANY_ID,
866 .subdevice = PCI_ANY_ID,
867 .driver_data = (kernel_ulong_t)&sdhci_cafe,
871 .vendor = PCI_VENDOR_ID_JMICRON,
872 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
873 .subvendor = PCI_ANY_ID,
874 .subdevice = PCI_ANY_ID,
875 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
879 .vendor = PCI_VENDOR_ID_JMICRON,
880 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
881 .subvendor = PCI_ANY_ID,
882 .subdevice = PCI_ANY_ID,
883 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
887 .vendor = PCI_VENDOR_ID_JMICRON,
888 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
889 .subvendor = PCI_ANY_ID,
890 .subdevice = PCI_ANY_ID,
891 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
895 .vendor = PCI_VENDOR_ID_JMICRON,
896 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
897 .subvendor = PCI_ANY_ID,
898 .subdevice = PCI_ANY_ID,
899 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
903 .vendor = PCI_VENDOR_ID_SYSKONNECT,
905 .subvendor = PCI_ANY_ID,
906 .subdevice = PCI_ANY_ID,
907 .driver_data = (kernel_ulong_t)&sdhci_syskt,
911 .vendor = PCI_VENDOR_ID_VIA,
913 .subvendor = PCI_ANY_ID,
914 .subdevice = PCI_ANY_ID,
915 .driver_data = (kernel_ulong_t)&sdhci_via,
919 .vendor = PCI_VENDOR_ID_REALTEK,
921 .subvendor = PCI_ANY_ID,
922 .subdevice = PCI_ANY_ID,
923 .driver_data = (kernel_ulong_t)&sdhci_rtsx,
927 .vendor = PCI_VENDOR_ID_INTEL,
928 .device = PCI_DEVICE_ID_INTEL_QRK_SD,
929 .subvendor = PCI_ANY_ID,
930 .subdevice = PCI_ANY_ID,
931 .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
935 .vendor = PCI_VENDOR_ID_INTEL,
936 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
937 .subvendor = PCI_ANY_ID,
938 .subdevice = PCI_ANY_ID,
939 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
943 .vendor = PCI_VENDOR_ID_INTEL,
944 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
945 .subvendor = PCI_ANY_ID,
946 .subdevice = PCI_ANY_ID,
947 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
951 .vendor = PCI_VENDOR_ID_INTEL,
952 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
953 .subvendor = PCI_ANY_ID,
954 .subdevice = PCI_ANY_ID,
955 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
959 .vendor = PCI_VENDOR_ID_INTEL,
960 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
961 .subvendor = PCI_ANY_ID,
962 .subdevice = PCI_ANY_ID,
963 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
967 .vendor = PCI_VENDOR_ID_INTEL,
968 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
969 .subvendor = PCI_ANY_ID,
970 .subdevice = PCI_ANY_ID,
971 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
975 .vendor = PCI_VENDOR_ID_INTEL,
976 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
977 .subvendor = PCI_ANY_ID,
978 .subdevice = PCI_ANY_ID,
979 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
983 .vendor = PCI_VENDOR_ID_INTEL,
984 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
985 .subvendor = PCI_ANY_ID,
986 .subdevice = PCI_ANY_ID,
987 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
991 .vendor = PCI_VENDOR_ID_INTEL,
992 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
993 .subvendor = PCI_ANY_ID,
994 .subdevice = PCI_ANY_ID,
995 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
999 .vendor = PCI_VENDOR_ID_INTEL,
1000 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
1001 .subvendor = PCI_ANY_ID,
1002 .subdevice = PCI_ANY_ID,
1003 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1007 .vendor = PCI_VENDOR_ID_INTEL,
1008 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
1009 .subvendor = PCI_ANY_ID,
1010 .subdevice = PCI_ANY_ID,
1011 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1015 .vendor = PCI_VENDOR_ID_INTEL,
1016 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
1017 .subvendor = PCI_ANY_ID,
1018 .subdevice = PCI_ANY_ID,
1019 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1023 .vendor = PCI_VENDOR_ID_INTEL,
1024 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1025 .subvendor = PCI_ANY_ID,
1026 .subdevice = PCI_ANY_ID,
1027 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1031 .vendor = PCI_VENDOR_ID_INTEL,
1032 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
1033 .subvendor = PCI_ANY_ID,
1034 .subdevice = PCI_ANY_ID,
1035 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1039 .vendor = PCI_VENDOR_ID_INTEL,
1040 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
1041 .subvendor = PCI_ANY_ID,
1042 .subdevice = PCI_ANY_ID,
1043 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1047 .vendor = PCI_VENDOR_ID_INTEL,
1048 .device = PCI_DEVICE_ID_INTEL_BSW_EMMC,
1049 .subvendor = PCI_ANY_ID,
1050 .subdevice = PCI_ANY_ID,
1051 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1055 .vendor = PCI_VENDOR_ID_INTEL,
1056 .device = PCI_DEVICE_ID_INTEL_BSW_SDIO,
1057 .subvendor = PCI_ANY_ID,
1058 .subdevice = PCI_ANY_ID,
1059 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1063 .vendor = PCI_VENDOR_ID_INTEL,
1064 .device = PCI_DEVICE_ID_INTEL_BSW_SD,
1065 .subvendor = PCI_ANY_ID,
1066 .subdevice = PCI_ANY_ID,
1067 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1071 .vendor = PCI_VENDOR_ID_INTEL,
1072 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
1073 .subvendor = PCI_ANY_ID,
1074 .subdevice = PCI_ANY_ID,
1075 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1079 .vendor = PCI_VENDOR_ID_INTEL,
1080 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
1081 .subvendor = PCI_ANY_ID,
1082 .subdevice = PCI_ANY_ID,
1083 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1087 .vendor = PCI_VENDOR_ID_INTEL,
1088 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
1089 .subvendor = PCI_ANY_ID,
1090 .subdevice = PCI_ANY_ID,
1091 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1095 .vendor = PCI_VENDOR_ID_INTEL,
1096 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
1097 .subvendor = PCI_ANY_ID,
1098 .subdevice = PCI_ANY_ID,
1099 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1103 .vendor = PCI_VENDOR_ID_INTEL,
1104 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
1105 .subvendor = PCI_ANY_ID,
1106 .subdevice = PCI_ANY_ID,
1107 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1111 .vendor = PCI_VENDOR_ID_INTEL,
1112 .device = PCI_DEVICE_ID_INTEL_MRFL_MMC,
1113 .subvendor = PCI_ANY_ID,
1114 .subdevice = PCI_ANY_ID,
1115 .driver_data = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
1119 .vendor = PCI_VENDOR_ID_INTEL,
1120 .device = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1121 .subvendor = PCI_ANY_ID,
1122 .subdevice = PCI_ANY_ID,
1123 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1127 .vendor = PCI_VENDOR_ID_INTEL,
1128 .device = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1129 .subvendor = PCI_ANY_ID,
1130 .subdevice = PCI_ANY_ID,
1131 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1135 .vendor = PCI_VENDOR_ID_INTEL,
1136 .device = PCI_DEVICE_ID_INTEL_SPT_SD,
1137 .subvendor = PCI_ANY_ID,
1138 .subdevice = PCI_ANY_ID,
1139 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1143 .vendor = PCI_VENDOR_ID_INTEL,
1144 .device = PCI_DEVICE_ID_INTEL_DNV_EMMC,
1145 .subvendor = PCI_ANY_ID,
1146 .subdevice = PCI_ANY_ID,
1147 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1151 .vendor = PCI_VENDOR_ID_INTEL,
1152 .device = PCI_DEVICE_ID_INTEL_BXT_EMMC,
1153 .subvendor = PCI_ANY_ID,
1154 .subdevice = PCI_ANY_ID,
1155 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1159 .vendor = PCI_VENDOR_ID_INTEL,
1160 .device = PCI_DEVICE_ID_INTEL_BXT_SDIO,
1161 .subvendor = PCI_ANY_ID,
1162 .subdevice = PCI_ANY_ID,
1163 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1167 .vendor = PCI_VENDOR_ID_INTEL,
1168 .device = PCI_DEVICE_ID_INTEL_BXT_SD,
1169 .subvendor = PCI_ANY_ID,
1170 .subdevice = PCI_ANY_ID,
1171 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1175 .vendor = PCI_VENDOR_ID_INTEL,
1176 .device = PCI_DEVICE_ID_INTEL_APL_EMMC,
1177 .subvendor = PCI_ANY_ID,
1178 .subdevice = PCI_ANY_ID,
1179 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1183 .vendor = PCI_VENDOR_ID_INTEL,
1184 .device = PCI_DEVICE_ID_INTEL_APL_SDIO,
1185 .subvendor = PCI_ANY_ID,
1186 .subdevice = PCI_ANY_ID,
1187 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1191 .vendor = PCI_VENDOR_ID_INTEL,
1192 .device = PCI_DEVICE_ID_INTEL_APL_SD,
1193 .subvendor = PCI_ANY_ID,
1194 .subdevice = PCI_ANY_ID,
1195 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1199 .vendor = PCI_VENDOR_ID_O2,
1200 .device = PCI_DEVICE_ID_O2_8120,
1201 .subvendor = PCI_ANY_ID,
1202 .subdevice = PCI_ANY_ID,
1203 .driver_data = (kernel_ulong_t)&sdhci_o2,
1207 .vendor = PCI_VENDOR_ID_O2,
1208 .device = PCI_DEVICE_ID_O2_8220,
1209 .subvendor = PCI_ANY_ID,
1210 .subdevice = PCI_ANY_ID,
1211 .driver_data = (kernel_ulong_t)&sdhci_o2,
1215 .vendor = PCI_VENDOR_ID_O2,
1216 .device = PCI_DEVICE_ID_O2_8221,
1217 .subvendor = PCI_ANY_ID,
1218 .subdevice = PCI_ANY_ID,
1219 .driver_data = (kernel_ulong_t)&sdhci_o2,
1223 .vendor = PCI_VENDOR_ID_O2,
1224 .device = PCI_DEVICE_ID_O2_8320,
1225 .subvendor = PCI_ANY_ID,
1226 .subdevice = PCI_ANY_ID,
1227 .driver_data = (kernel_ulong_t)&sdhci_o2,
1231 .vendor = PCI_VENDOR_ID_O2,
1232 .device = PCI_DEVICE_ID_O2_8321,
1233 .subvendor = PCI_ANY_ID,
1234 .subdevice = PCI_ANY_ID,
1235 .driver_data = (kernel_ulong_t)&sdhci_o2,
1239 .vendor = PCI_VENDOR_ID_O2,
1240 .device = PCI_DEVICE_ID_O2_FUJIN2,
1241 .subvendor = PCI_ANY_ID,
1242 .subdevice = PCI_ANY_ID,
1243 .driver_data = (kernel_ulong_t)&sdhci_o2,
1247 .vendor = PCI_VENDOR_ID_O2,
1248 .device = PCI_DEVICE_ID_O2_SDS0,
1249 .subvendor = PCI_ANY_ID,
1250 .subdevice = PCI_ANY_ID,
1251 .driver_data = (kernel_ulong_t)&sdhci_o2,
1255 .vendor = PCI_VENDOR_ID_O2,
1256 .device = PCI_DEVICE_ID_O2_SDS1,
1257 .subvendor = PCI_ANY_ID,
1258 .subdevice = PCI_ANY_ID,
1259 .driver_data = (kernel_ulong_t)&sdhci_o2,
1263 .vendor = PCI_VENDOR_ID_O2,
1264 .device = PCI_DEVICE_ID_O2_SEABIRD0,
1265 .subvendor = PCI_ANY_ID,
1266 .subdevice = PCI_ANY_ID,
1267 .driver_data = (kernel_ulong_t)&sdhci_o2,
1271 .vendor = PCI_VENDOR_ID_O2,
1272 .device = PCI_DEVICE_ID_O2_SEABIRD1,
1273 .subvendor = PCI_ANY_ID,
1274 .subdevice = PCI_ANY_ID,
1275 .driver_data = (kernel_ulong_t)&sdhci_o2,
1278 .vendor = PCI_VENDOR_ID_AMD,
1279 .device = PCI_ANY_ID,
1280 .class = PCI_CLASS_SYSTEM_SDHCI << 8,
1281 .class_mask = 0xFFFF00,
1282 .subvendor = PCI_ANY_ID,
1283 .subdevice = PCI_ANY_ID,
1284 .driver_data = (kernel_ulong_t)&sdhci_amd,
1286 { /* Generic SD host controller */
1287 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1290 { /* end: all zeroes */ },
1293 MODULE_DEVICE_TABLE(pci, pci_ids);
1295 /*****************************************************************************\
1297 * SDHCI core callbacks *
1299 \*****************************************************************************/
1301 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1303 struct sdhci_pci_slot *slot;
1304 struct pci_dev *pdev;
1307 slot = sdhci_priv(host);
1308 pdev = slot->chip->pdev;
1310 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1311 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1312 (host->flags & SDHCI_USE_SDMA)) {
1313 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1314 "doesn't fully claim to support it.\n");
1317 if (host->flags & SDHCI_USE_64_BIT_DMA) {
1318 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) {
1319 host->flags &= ~SDHCI_USE_64_BIT_DMA;
1321 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1323 dev_warn(&pdev->dev, "Failed to set 64-bit DMA mask\n");
1327 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1331 pci_set_master(pdev);
1336 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1340 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1343 case MMC_BUS_WIDTH_8:
1344 ctrl |= SDHCI_CTRL_8BITBUS;
1345 ctrl &= ~SDHCI_CTRL_4BITBUS;
1347 case MMC_BUS_WIDTH_4:
1348 ctrl |= SDHCI_CTRL_4BITBUS;
1349 ctrl &= ~SDHCI_CTRL_8BITBUS;
1352 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1356 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1359 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1361 struct sdhci_pci_slot *slot = sdhci_priv(host);
1362 int rst_n_gpio = slot->rst_n_gpio;
1364 if (!gpio_is_valid(rst_n_gpio))
1366 gpio_set_value_cansleep(rst_n_gpio, 0);
1367 /* For eMMC, minimum is 1us but give it 10us for good measure */
1369 gpio_set_value_cansleep(rst_n_gpio, 1);
1370 /* For eMMC, minimum is 200us but give it 300us for good measure */
1371 usleep_range(300, 1000);
1374 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1376 struct sdhci_pci_slot *slot = sdhci_priv(host);
1379 slot->hw_reset(host);
1382 static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
1383 struct mmc_card *card,
1384 unsigned int max_dtr, int host_drv,
1385 int card_drv, int *drv_type)
1387 struct sdhci_pci_slot *slot = sdhci_priv(host);
1389 if (!slot->select_drive_strength)
1392 return slot->select_drive_strength(host, card, max_dtr, host_drv,
1393 card_drv, drv_type);
1396 static const struct sdhci_ops sdhci_pci_ops = {
1397 .set_clock = sdhci_set_clock,
1398 .enable_dma = sdhci_pci_enable_dma,
1399 .set_bus_width = sdhci_pci_set_bus_width,
1400 .reset = sdhci_reset,
1401 .set_uhs_signaling = sdhci_set_uhs_signaling,
1402 .hw_reset = sdhci_pci_hw_reset,
1403 .select_drive_strength = sdhci_pci_select_drive_strength,
1406 /*****************************************************************************\
1410 \*****************************************************************************/
1414 static int sdhci_pci_suspend(struct device *dev)
1416 struct pci_dev *pdev = to_pci_dev(dev);
1417 struct sdhci_pci_chip *chip;
1418 struct sdhci_pci_slot *slot;
1419 mmc_pm_flag_t slot_pm_flags;
1420 mmc_pm_flag_t pm_flags = 0;
1423 chip = pci_get_drvdata(pdev);
1427 for (i = 0; i < chip->num_slots; i++) {
1428 slot = chip->slots[i];
1432 ret = sdhci_suspend_host(slot->host);
1435 goto err_pci_suspend;
1437 slot_pm_flags = slot->host->mmc->pm_flags;
1438 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1439 sdhci_enable_irq_wakeups(slot->host);
1441 pm_flags |= slot_pm_flags;
1444 if (chip->fixes && chip->fixes->suspend) {
1445 ret = chip->fixes->suspend(chip);
1447 goto err_pci_suspend;
1450 if (pm_flags & MMC_PM_KEEP_POWER) {
1451 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1452 device_init_wakeup(dev, true);
1454 device_init_wakeup(dev, false);
1456 device_init_wakeup(dev, false);
1462 sdhci_resume_host(chip->slots[i]->host);
1466 static int sdhci_pci_resume(struct device *dev)
1468 struct pci_dev *pdev = to_pci_dev(dev);
1469 struct sdhci_pci_chip *chip;
1470 struct sdhci_pci_slot *slot;
1473 chip = pci_get_drvdata(pdev);
1477 if (chip->fixes && chip->fixes->resume) {
1478 ret = chip->fixes->resume(chip);
1483 for (i = 0; i < chip->num_slots; i++) {
1484 slot = chip->slots[i];
1488 ret = sdhci_resume_host(slot->host);
1496 static int sdhci_pci_runtime_suspend(struct device *dev)
1498 struct pci_dev *pdev = to_pci_dev(dev);
1499 struct sdhci_pci_chip *chip;
1500 struct sdhci_pci_slot *slot;
1503 chip = pci_get_drvdata(pdev);
1507 for (i = 0; i < chip->num_slots; i++) {
1508 slot = chip->slots[i];
1512 ret = sdhci_runtime_suspend_host(slot->host);
1515 goto err_pci_runtime_suspend;
1518 if (chip->fixes && chip->fixes->suspend) {
1519 ret = chip->fixes->suspend(chip);
1521 goto err_pci_runtime_suspend;
1526 err_pci_runtime_suspend:
1528 sdhci_runtime_resume_host(chip->slots[i]->host);
1532 static int sdhci_pci_runtime_resume(struct device *dev)
1534 struct pci_dev *pdev = to_pci_dev(dev);
1535 struct sdhci_pci_chip *chip;
1536 struct sdhci_pci_slot *slot;
1539 chip = pci_get_drvdata(pdev);
1543 if (chip->fixes && chip->fixes->resume) {
1544 ret = chip->fixes->resume(chip);
1549 for (i = 0; i < chip->num_slots; i++) {
1550 slot = chip->slots[i];
1554 ret = sdhci_runtime_resume_host(slot->host);
1562 #else /* CONFIG_PM */
1564 #define sdhci_pci_suspend NULL
1565 #define sdhci_pci_resume NULL
1567 #endif /* CONFIG_PM */
1569 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1570 .suspend = sdhci_pci_suspend,
1571 .resume = sdhci_pci_resume,
1572 SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1573 sdhci_pci_runtime_resume, NULL)
1576 /*****************************************************************************\
1578 * Device probing/removal *
1580 \*****************************************************************************/
1582 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1583 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1586 struct sdhci_pci_slot *slot;
1587 struct sdhci_host *host;
1588 int ret, bar = first_bar + slotno;
1590 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1591 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1592 return ERR_PTR(-ENODEV);
1595 if (pci_resource_len(pdev, bar) < 0x100) {
1596 dev_err(&pdev->dev, "Invalid iomem size. You may "
1597 "experience problems.\n");
1600 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1601 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1602 return ERR_PTR(-ENODEV);
1605 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1606 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1607 return ERR_PTR(-ENODEV);
1610 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1612 dev_err(&pdev->dev, "cannot allocate host\n");
1613 return ERR_CAST(host);
1616 slot = sdhci_priv(host);
1620 slot->pci_bar = bar;
1621 slot->rst_n_gpio = -EINVAL;
1622 slot->cd_gpio = -EINVAL;
1625 /* Retrieve platform data if there is any */
1626 if (*sdhci_pci_get_data)
1627 slot->data = sdhci_pci_get_data(pdev, slotno);
1630 if (slot->data->setup) {
1631 ret = slot->data->setup(slot->data);
1633 dev_err(&pdev->dev, "platform setup failed\n");
1637 slot->rst_n_gpio = slot->data->rst_n_gpio;
1638 slot->cd_gpio = slot->data->cd_gpio;
1641 host->hw_name = "PCI";
1642 host->ops = &sdhci_pci_ops;
1643 host->quirks = chip->quirks;
1644 host->quirks2 = chip->quirks2;
1646 host->irq = pdev->irq;
1648 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1650 dev_err(&pdev->dev, "cannot request region\n");
1654 host->ioaddr = pci_ioremap_bar(pdev, bar);
1655 if (!host->ioaddr) {
1656 dev_err(&pdev->dev, "failed to remap registers\n");
1661 if (chip->fixes && chip->fixes->probe_slot) {
1662 ret = chip->fixes->probe_slot(slot);
1667 if (gpio_is_valid(slot->rst_n_gpio)) {
1668 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1669 gpio_direction_output(slot->rst_n_gpio, 1);
1670 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1671 slot->hw_reset = sdhci_pci_gpio_hw_reset;
1673 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1674 slot->rst_n_gpio = -EINVAL;
1678 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1679 host->mmc->slotno = slotno;
1680 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1682 if (slot->cd_idx >= 0 &&
1683 mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
1684 slot->cd_override_level, 0, NULL)) {
1685 dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
1689 ret = sdhci_add_host(host);
1693 sdhci_pci_add_own_cd(slot);
1696 * Check if the chip needs a separate GPIO for card detect to wake up
1697 * from runtime suspend. If it is not there, don't allow runtime PM.
1698 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1700 if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1701 !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1702 chip->allow_runtime_pm = false;
1707 if (gpio_is_valid(slot->rst_n_gpio))
1708 gpio_free(slot->rst_n_gpio);
1710 if (chip->fixes && chip->fixes->remove_slot)
1711 chip->fixes->remove_slot(slot, 0);
1714 iounmap(host->ioaddr);
1717 pci_release_region(pdev, bar);
1720 if (slot->data && slot->data->cleanup)
1721 slot->data->cleanup(slot->data);
1724 sdhci_free_host(host);
1726 return ERR_PTR(ret);
1729 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1734 sdhci_pci_remove_own_cd(slot);
1737 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1738 if (scratch == (u32)-1)
1741 sdhci_remove_host(slot->host, dead);
1743 if (gpio_is_valid(slot->rst_n_gpio))
1744 gpio_free(slot->rst_n_gpio);
1746 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1747 slot->chip->fixes->remove_slot(slot, dead);
1749 if (slot->data && slot->data->cleanup)
1750 slot->data->cleanup(slot->data);
1752 pci_release_region(slot->chip->pdev, slot->pci_bar);
1754 sdhci_free_host(slot->host);
1757 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1759 pm_runtime_put_noidle(dev);
1760 pm_runtime_allow(dev);
1761 pm_runtime_set_autosuspend_delay(dev, 50);
1762 pm_runtime_use_autosuspend(dev);
1763 pm_suspend_ignore_children(dev, 1);
1766 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1768 pm_runtime_forbid(dev);
1769 pm_runtime_get_noresume(dev);
1772 static int sdhci_pci_probe(struct pci_dev *pdev,
1773 const struct pci_device_id *ent)
1775 struct sdhci_pci_chip *chip;
1776 struct sdhci_pci_slot *slot;
1778 u8 slots, first_bar;
1781 BUG_ON(pdev == NULL);
1782 BUG_ON(ent == NULL);
1784 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1785 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1787 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1791 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1792 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1796 BUG_ON(slots > MAX_SLOTS);
1798 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1802 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1804 if (first_bar > 5) {
1805 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1809 ret = pci_enable_device(pdev);
1813 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1820 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1822 chip->quirks = chip->fixes->quirks;
1823 chip->quirks2 = chip->fixes->quirks2;
1824 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1826 chip->num_slots = slots;
1828 pci_set_drvdata(pdev, chip);
1830 if (chip->fixes && chip->fixes->probe) {
1831 ret = chip->fixes->probe(chip);
1836 slots = chip->num_slots; /* Quirk may have changed this */
1838 for (i = 0; i < slots; i++) {
1839 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1841 for (i--; i >= 0; i--)
1842 sdhci_pci_remove_slot(chip->slots[i]);
1843 ret = PTR_ERR(slot);
1847 chip->slots[i] = slot;
1850 if (chip->allow_runtime_pm)
1851 sdhci_pci_runtime_pm_allow(&pdev->dev);
1856 pci_set_drvdata(pdev, NULL);
1860 pci_disable_device(pdev);
1864 static void sdhci_pci_remove(struct pci_dev *pdev)
1867 struct sdhci_pci_chip *chip;
1869 chip = pci_get_drvdata(pdev);
1872 if (chip->allow_runtime_pm)
1873 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1875 for (i = 0; i < chip->num_slots; i++)
1876 sdhci_pci_remove_slot(chip->slots[i]);
1878 pci_set_drvdata(pdev, NULL);
1882 pci_disable_device(pdev);
1885 static struct pci_driver sdhci_driver = {
1886 .name = "sdhci-pci",
1887 .id_table = pci_ids,
1888 .probe = sdhci_pci_probe,
1889 .remove = sdhci_pci_remove,
1891 .pm = &sdhci_pci_pm_ops
1895 module_pci_driver(sdhci_driver);
1897 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1898 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1899 MODULE_LICENSE("GPL");