1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/uaccess.h>
21 #include <linux/pci.h>
22 #include <linux/pci_ids.h>
24 #include <linux/pci_regs.h>
26 #include <uapi/linux/pcitest.h>
28 #define DRV_MODULE_NAME "pci-endpoint-test"
30 #define IRQ_TYPE_UNDEFINED -1
31 #define IRQ_TYPE_LEGACY 0
32 #define IRQ_TYPE_MSI 1
33 #define IRQ_TYPE_MSIX 2
35 #define PCI_ENDPOINT_TEST_MAGIC 0x0
37 #define PCI_ENDPOINT_TEST_COMMAND 0x4
38 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
39 #define COMMAND_RAISE_MSI_IRQ BIT(1)
40 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
41 #define COMMAND_READ BIT(3)
42 #define COMMAND_WRITE BIT(4)
43 #define COMMAND_COPY BIT(5)
45 #define PCI_ENDPOINT_TEST_STATUS 0x8
46 #define STATUS_READ_SUCCESS BIT(0)
47 #define STATUS_READ_FAIL BIT(1)
48 #define STATUS_WRITE_SUCCESS BIT(2)
49 #define STATUS_WRITE_FAIL BIT(3)
50 #define STATUS_COPY_SUCCESS BIT(4)
51 #define STATUS_COPY_FAIL BIT(5)
52 #define STATUS_IRQ_RAISED BIT(6)
53 #define STATUS_SRC_ADDR_INVALID BIT(7)
54 #define STATUS_DST_ADDR_INVALID BIT(8)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
62 #define PCI_ENDPOINT_TEST_SIZE 0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
68 #define PCI_ENDPOINT_TEST_FLAGS 0x2c
69 #define FLAG_USE_DMA BIT(0)
71 #define PCI_DEVICE_ID_TI_AM654 0xb00c
73 #define is_am654_pci_dev(pdev) \
74 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
76 static DEFINE_IDA(pci_endpoint_test_ida);
78 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
82 module_param(no_msi, bool, 0444);
83 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
85 static int irq_type = IRQ_TYPE_MSI;
86 module_param(irq_type, int, 0444);
87 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
98 struct pci_endpoint_test {
101 void __iomem *bar[PCI_STD_NUM_BARS];
102 struct completion irq_raised;
106 /* mutex to protect the ioctls */
108 struct miscdevice miscdev;
109 enum pci_barno test_reg_bar;
114 struct pci_endpoint_test_data {
115 enum pci_barno test_reg_bar;
120 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
123 return readl(test->base + offset);
126 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
127 u32 offset, u32 value)
129 writel(value, test->base + offset);
132 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
135 return readl(test->bar[bar] + offset);
138 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
139 int bar, u32 offset, u32 value)
141 writel(value, test->bar[bar] + offset);
144 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
146 struct pci_endpoint_test *test = dev_id;
149 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
150 if (reg & STATUS_IRQ_RAISED) {
151 test->last_irq = irq;
152 complete(&test->irq_raised);
153 reg &= ~STATUS_IRQ_RAISED;
155 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
161 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
163 struct pci_dev *pdev = test->pdev;
165 pci_free_irq_vectors(pdev);
166 test->irq_type = IRQ_TYPE_UNDEFINED;
169 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
173 struct pci_dev *pdev = test->pdev;
174 struct device *dev = &pdev->dev;
178 case IRQ_TYPE_LEGACY:
179 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
181 dev_err(dev, "Failed to get Legacy interrupt\n");
184 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
186 dev_err(dev, "Failed to get MSI interrupts\n");
189 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
191 dev_err(dev, "Failed to get MSI-X interrupts\n");
194 dev_err(dev, "Invalid IRQ type selected\n");
202 test->irq_type = type;
203 test->num_irqs = irq;
208 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
211 struct pci_dev *pdev = test->pdev;
212 struct device *dev = &pdev->dev;
214 for (i = 0; i < test->num_irqs; i++)
215 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
220 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
224 struct pci_dev *pdev = test->pdev;
225 struct device *dev = &pdev->dev;
227 for (i = 0; i < test->num_irqs; i++) {
228 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
229 pci_endpoint_test_irqhandler,
230 IRQF_SHARED, test->name, test);
239 case IRQ_TYPE_LEGACY:
240 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
241 pci_irq_vector(pdev, i));
244 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
245 pci_irq_vector(pdev, i),
249 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
250 pci_irq_vector(pdev, i),
258 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
259 enum pci_barno barno)
264 struct pci_dev *pdev = test->pdev;
266 if (!test->bar[barno])
269 size = pci_resource_len(pdev, barno);
271 if (barno == test->test_reg_bar)
274 for (j = 0; j < size; j += 4)
275 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
277 for (j = 0; j < size; j += 4) {
278 val = pci_endpoint_test_bar_readl(test, barno, j);
279 if (val != 0xA0A0A0A0)
286 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
290 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
292 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
293 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
294 COMMAND_RAISE_LEGACY_IRQ);
295 val = wait_for_completion_timeout(&test->irq_raised,
296 msecs_to_jiffies(1000));
303 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
304 u16 msi_num, bool msix)
307 struct pci_dev *pdev = test->pdev;
309 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
310 msix == false ? IRQ_TYPE_MSI :
312 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
313 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
314 msix == false ? COMMAND_RAISE_MSI_IRQ :
315 COMMAND_RAISE_MSIX_IRQ);
316 val = wait_for_completion_timeout(&test->irq_raised,
317 msecs_to_jiffies(1000));
321 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
327 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
330 struct pci_endpoint_test_xfer_param param;
337 dma_addr_t src_phys_addr;
338 dma_addr_t dst_phys_addr;
339 struct pci_dev *pdev = test->pdev;
340 struct device *dev = &pdev->dev;
342 dma_addr_t orig_src_phys_addr;
344 dma_addr_t orig_dst_phys_addr;
346 size_t alignment = test->alignment;
347 int irq_type = test->irq_type;
352 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
354 dev_err(dev, "Failed to get transfer param\n");
359 if (size > SIZE_MAX - alignment)
362 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
364 flags |= FLAG_USE_DMA;
366 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
367 dev_err(dev, "Invalid IRQ type option\n");
371 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
372 if (!orig_src_addr) {
373 dev_err(dev, "Failed to allocate source buffer\n");
378 get_random_bytes(orig_src_addr, size + alignment);
379 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
380 size + alignment, DMA_TO_DEVICE);
381 if (dma_mapping_error(dev, orig_src_phys_addr)) {
382 dev_err(dev, "failed to map source buffer address\n");
384 goto err_src_phys_addr;
387 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
388 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
389 offset = src_phys_addr - orig_src_phys_addr;
390 src_addr = orig_src_addr + offset;
392 src_phys_addr = orig_src_phys_addr;
393 src_addr = orig_src_addr;
396 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
397 lower_32_bits(src_phys_addr));
399 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
400 upper_32_bits(src_phys_addr));
402 src_crc32 = crc32_le(~0, src_addr, size);
404 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
405 if (!orig_dst_addr) {
406 dev_err(dev, "Failed to allocate destination address\n");
411 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
412 size + alignment, DMA_FROM_DEVICE);
413 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
414 dev_err(dev, "failed to map destination buffer address\n");
416 goto err_dst_phys_addr;
419 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
420 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
421 offset = dst_phys_addr - orig_dst_phys_addr;
422 dst_addr = orig_dst_addr + offset;
424 dst_phys_addr = orig_dst_phys_addr;
425 dst_addr = orig_dst_addr;
428 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
429 lower_32_bits(dst_phys_addr));
430 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
431 upper_32_bits(dst_phys_addr));
433 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
436 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
437 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
438 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
439 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
442 wait_for_completion(&test->irq_raised);
444 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
447 dst_crc32 = crc32_le(~0, dst_addr, size);
448 if (dst_crc32 == src_crc32)
452 kfree(orig_dst_addr);
455 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
459 kfree(orig_src_addr);
465 static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
468 struct pci_endpoint_test_xfer_param param;
474 dma_addr_t phys_addr;
475 struct pci_dev *pdev = test->pdev;
476 struct device *dev = &pdev->dev;
478 dma_addr_t orig_phys_addr;
480 size_t alignment = test->alignment;
481 int irq_type = test->irq_type;
486 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
488 dev_err(dev, "Failed to get transfer param\n");
493 if (size > SIZE_MAX - alignment)
496 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
498 flags |= FLAG_USE_DMA;
500 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
501 dev_err(dev, "Invalid IRQ type option\n");
505 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
507 dev_err(dev, "Failed to allocate address\n");
512 get_random_bytes(orig_addr, size + alignment);
514 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
516 if (dma_mapping_error(dev, orig_phys_addr)) {
517 dev_err(dev, "failed to map source buffer address\n");
522 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
523 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
524 offset = phys_addr - orig_phys_addr;
525 addr = orig_addr + offset;
527 phys_addr = orig_phys_addr;
531 crc32 = crc32_le(~0, addr, size);
532 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
535 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
536 lower_32_bits(phys_addr));
537 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
538 upper_32_bits(phys_addr));
540 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
542 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
543 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
544 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
545 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
548 wait_for_completion(&test->irq_raised);
550 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
551 if (reg & STATUS_READ_SUCCESS)
554 dma_unmap_single(dev, orig_phys_addr, size + alignment,
564 static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
567 struct pci_endpoint_test_xfer_param param;
573 dma_addr_t phys_addr;
574 struct pci_dev *pdev = test->pdev;
575 struct device *dev = &pdev->dev;
577 dma_addr_t orig_phys_addr;
579 size_t alignment = test->alignment;
580 int irq_type = test->irq_type;
584 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
586 dev_err(dev, "Failed to get transfer param\n");
591 if (size > SIZE_MAX - alignment)
594 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
596 flags |= FLAG_USE_DMA;
598 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
599 dev_err(dev, "Invalid IRQ type option\n");
603 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
605 dev_err(dev, "Failed to allocate destination address\n");
610 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
612 if (dma_mapping_error(dev, orig_phys_addr)) {
613 dev_err(dev, "failed to map source buffer address\n");
618 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
619 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
620 offset = phys_addr - orig_phys_addr;
621 addr = orig_addr + offset;
623 phys_addr = orig_phys_addr;
627 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
628 lower_32_bits(phys_addr));
629 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
630 upper_32_bits(phys_addr));
632 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
634 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
635 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
636 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
637 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
640 wait_for_completion(&test->irq_raised);
642 dma_unmap_single(dev, orig_phys_addr, size + alignment,
645 crc32 = crc32_le(~0, addr, size);
646 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
655 static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
657 pci_endpoint_test_release_irq(test);
658 pci_endpoint_test_free_irq_vectors(test);
662 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
665 struct pci_dev *pdev = test->pdev;
666 struct device *dev = &pdev->dev;
668 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
669 dev_err(dev, "Invalid IRQ type option\n");
673 if (test->irq_type == req_irq_type)
676 pci_endpoint_test_release_irq(test);
677 pci_endpoint_test_free_irq_vectors(test);
679 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
682 if (!pci_endpoint_test_request_irq(test))
688 pci_endpoint_test_free_irq_vectors(test);
692 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
697 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
698 struct pci_dev *pdev = test->pdev;
700 mutex_lock(&test->mutex);
704 if (bar < 0 || bar > 5)
706 if (is_am654_pci_dev(pdev) && bar == BAR_0)
708 ret = pci_endpoint_test_bar(test, bar);
710 case PCITEST_LEGACY_IRQ:
711 ret = pci_endpoint_test_legacy_irq(test);
715 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
718 ret = pci_endpoint_test_write(test, arg);
721 ret = pci_endpoint_test_read(test, arg);
724 ret = pci_endpoint_test_copy(test, arg);
726 case PCITEST_SET_IRQTYPE:
727 ret = pci_endpoint_test_set_irq(test, arg);
729 case PCITEST_GET_IRQTYPE:
732 case PCITEST_CLEAR_IRQ:
733 ret = pci_endpoint_test_clear_irq(test);
738 mutex_unlock(&test->mutex);
742 static const struct file_operations pci_endpoint_test_fops = {
743 .owner = THIS_MODULE,
744 .unlocked_ioctl = pci_endpoint_test_ioctl,
747 static int pci_endpoint_test_probe(struct pci_dev *pdev,
748 const struct pci_device_id *ent)
755 struct device *dev = &pdev->dev;
756 struct pci_endpoint_test *test;
757 struct pci_endpoint_test_data *data;
758 enum pci_barno test_reg_bar = BAR_0;
759 struct miscdevice *misc_device;
761 if (pci_is_bridge(pdev))
764 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
768 test->test_reg_bar = 0;
771 test->irq_type = IRQ_TYPE_UNDEFINED;
774 irq_type = IRQ_TYPE_LEGACY;
776 data = (struct pci_endpoint_test_data *)ent->driver_data;
778 test_reg_bar = data->test_reg_bar;
779 test->test_reg_bar = test_reg_bar;
780 test->alignment = data->alignment;
781 irq_type = data->irq_type;
784 init_completion(&test->irq_raised);
785 mutex_init(&test->mutex);
787 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
788 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
789 dev_err(dev, "Cannot set DMA mask\n");
793 err = pci_enable_device(pdev);
795 dev_err(dev, "Cannot enable PCI device\n");
799 err = pci_request_regions(pdev, DRV_MODULE_NAME);
801 dev_err(dev, "Cannot obtain PCI resources\n");
802 goto err_disable_pdev;
805 pci_set_master(pdev);
807 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type))
808 goto err_disable_irq;
810 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
811 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
812 base = pci_ioremap_bar(pdev, bar);
814 dev_err(dev, "Failed to read BAR%d\n", bar);
815 WARN_ON(bar == test_reg_bar);
817 test->bar[bar] = base;
821 test->base = test->bar[test_reg_bar];
824 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
829 pci_set_drvdata(pdev, test);
831 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
834 dev_err(dev, "Unable to get id\n");
838 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
839 test->name = kstrdup(name, GFP_KERNEL);
845 if (!pci_endpoint_test_request_irq(test))
846 goto err_kfree_test_name;
848 misc_device = &test->miscdev;
849 misc_device->minor = MISC_DYNAMIC_MINOR;
850 misc_device->name = kstrdup(name, GFP_KERNEL);
851 if (!misc_device->name) {
853 goto err_release_irq;
855 misc_device->fops = &pci_endpoint_test_fops,
857 err = misc_register(misc_device);
859 dev_err(dev, "Failed to register device\n");
866 kfree(misc_device->name);
869 pci_endpoint_test_release_irq(test);
875 ida_simple_remove(&pci_endpoint_test_ida, id);
878 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
880 pci_iounmap(pdev, test->bar[bar]);
884 pci_endpoint_test_free_irq_vectors(test);
885 pci_release_regions(pdev);
888 pci_disable_device(pdev);
893 static void pci_endpoint_test_remove(struct pci_dev *pdev)
897 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
898 struct miscdevice *misc_device = &test->miscdev;
900 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
905 misc_deregister(&test->miscdev);
906 kfree(misc_device->name);
908 ida_simple_remove(&pci_endpoint_test_ida, id);
909 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
911 pci_iounmap(pdev, test->bar[bar]);
914 pci_endpoint_test_release_irq(test);
915 pci_endpoint_test_free_irq_vectors(test);
917 pci_release_regions(pdev);
918 pci_disable_device(pdev);
921 static const struct pci_endpoint_test_data default_data = {
922 .test_reg_bar = BAR_0,
924 .irq_type = IRQ_TYPE_MSI,
927 static const struct pci_endpoint_test_data am654_data = {
928 .test_reg_bar = BAR_2,
930 .irq_type = IRQ_TYPE_MSI,
933 static const struct pci_device_id pci_endpoint_test_tbl[] = {
934 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
935 .driver_data = (kernel_ulong_t)&default_data,
937 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
938 .driver_data = (kernel_ulong_t)&default_data,
940 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
941 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
942 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
943 .driver_data = (kernel_ulong_t)&am654_data
947 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
949 static struct pci_driver pci_endpoint_test_driver = {
950 .name = DRV_MODULE_NAME,
951 .id_table = pci_endpoint_test_tbl,
952 .probe = pci_endpoint_test_probe,
953 .remove = pci_endpoint_test_remove,
955 module_pci_driver(pci_endpoint_test_driver);
957 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
958 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
959 MODULE_LICENSE("GPL v2");