drivers/misc/habanalabs/include/goya/goya_packets.h

   1 /* SPDX-License-Identifier: GPL-2.0
   2  *
   3  * Copyright 2017-2018 HabanaLabs, Ltd.
   4  * All Rights Reserved.
   5  *
   6  */
   7
   8 #ifndef GOYA_PACKETS_H
   9 #define GOYA_PACKETS_H
  10
  11 #include <linux/types.h>
  12
  13 #define PACKET_HEADER_PACKET_ID_SHIFT           56
  14 #define PACKET_HEADER_PACKET_ID_MASK            0x1F00000000000000ull
  15
  16 enum packet_id {
  17         PACKET_WREG_32 = 0x1,
  18         PACKET_WREG_BULK = 0x2,
  19         PACKET_MSG_LONG = 0x3,
  20         PACKET_MSG_SHORT = 0x4,
  21         PACKET_CP_DMA = 0x5,
  22         PACKET_MSG_PROT = 0x7,
  23         PACKET_FENCE = 0x8,
  24         PACKET_LIN_DMA = 0x9,
  25         PACKET_NOP = 0xA,
  26         PACKET_STOP = 0xB,
  27         MAX_PACKET_ID = (PACKET_HEADER_PACKET_ID_MASK >>
  28                                 PACKET_HEADER_PACKET_ID_SHIFT) + 1
  29 };
  30
  31 enum goya_dma_direction {
  32         DMA_HOST_TO_DRAM,
  33         DMA_HOST_TO_SRAM,
  34         DMA_DRAM_TO_SRAM,
  35         DMA_SRAM_TO_DRAM,
  36         DMA_SRAM_TO_HOST,
  37         DMA_DRAM_TO_HOST,
  38         DMA_DRAM_TO_DRAM,
  39         DMA_SRAM_TO_SRAM,
  40         DMA_ENUM_MAX
  41 };
  42
  43 #define GOYA_PKT_CTL_OPCODE_SHIFT       24
  44 #define GOYA_PKT_CTL_OPCODE_MASK        0x1F000000
  45
  46 #define GOYA_PKT_CTL_EB_SHIFT           29
  47 #define GOYA_PKT_CTL_EB_MASK            0x20000000
  48
  49 #define GOYA_PKT_CTL_RB_SHIFT           30
  50 #define GOYA_PKT_CTL_RB_MASK            0x40000000
  51
  52 #define GOYA_PKT_CTL_MB_SHIFT           31
  53 #define GOYA_PKT_CTL_MB_MASK            0x80000000
  54
  55 struct packet_nop {
  56         __le32 reserved;
  57         __le32 ctl;
  58 };
  59
  60 struct packet_stop {
  61         __le32 reserved;
  62         __le32 ctl;
  63 };
  64
  65 #define GOYA_PKT_WREG32_CTL_REG_OFFSET_SHIFT    0
  66 #define GOYA_PKT_WREG32_CTL_REG_OFFSET_MASK     0x0000FFFF
  67
  68 struct packet_wreg32 {
  69         __le32 value;
  70         __le32 ctl;
  71 };
  72
  73 struct packet_wreg_bulk {
  74         __le32 size64;
  75         __le32 ctl;
  76         __le64 values[0]; /* data starts here */
  77 };
  78
  79 struct packet_msg_long {
  80         __le32 value;
  81         __le32 ctl;
  82         __le64 addr;
  83 };
  84
  85 struct packet_msg_short {
  86         __le32 value;
  87         __le32 ctl;
  88 };
  89
  90 struct packet_msg_prot {
  91         __le32 value;
  92         __le32 ctl;
  93         __le64 addr;
  94 };
  95
  96 struct packet_fence {
  97         __le32 cfg;
  98         __le32 ctl;
  99 };
 100
 101 #define GOYA_PKT_LIN_DMA_CTL_WO_SHIFT           0
 102 #define GOYA_PKT_LIN_DMA_CTL_WO_MASK            0x00000001
 103
 104 #define GOYA_PKT_LIN_DMA_CTL_RDCOMP_SHIFT       1
 105 #define GOYA_PKT_LIN_DMA_CTL_RDCOMP_MASK        0x00000002
 106
 107 #define GOYA_PKT_LIN_DMA_CTL_WRCOMP_SHIFT       2
 108 #define GOYA_PKT_LIN_DMA_CTL_WRCOMP_MASK        0x00000004
 109
 110 #define GOYA_PKT_LIN_DMA_CTL_MEMSET_SHIFT       6
 111 #define GOYA_PKT_LIN_DMA_CTL_MEMSET_MASK        0x00000040
 112
 113 #define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_SHIFT      20
 114 #define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_MASK       0x00700000
 115
 116 struct packet_lin_dma {
 117         __le32 tsize;
 118         __le32 ctl;
 119         __le64 src_addr;
 120         __le64 dst_addr;
 121 };
 122
 123 struct packet_cp_dma {
 124         __le32 tsize;
 125         __le32 ctl;
 126         __le64 src_addr;
 127 };
 128
 129 #endif /* GOYA_PACKETS_H */