2 * ST Microelectronics MFD: stmpe's driver
4 * Copyright (C) ST-Ericsson SA 2010
6 * License Terms: GNU General Public License, version 2
7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
10 #include <linux/gpio.h>
11 #include <linux/export.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
16 #include <linux/slab.h>
17 #include <linux/mfd/core.h>
20 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
22 return stmpe->variant->enable(stmpe, blocks, true);
25 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
27 return stmpe->variant->enable(stmpe, blocks, false);
30 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
34 ret = stmpe->ci->read_byte(stmpe, reg);
36 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
38 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
43 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
47 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
49 ret = stmpe->ci->write_byte(stmpe, reg, val);
51 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
56 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
60 ret = __stmpe_reg_read(stmpe, reg);
67 return __stmpe_reg_write(stmpe, reg, ret);
70 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
75 ret = stmpe->ci->read_block(stmpe, reg, length, values);
77 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
79 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
80 stmpe_dump_bytes("stmpe rd: ", values, length);
85 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
90 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
91 stmpe_dump_bytes("stmpe wr: ", values, length);
93 ret = stmpe->ci->write_block(stmpe, reg, length, values);
95 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
101 * stmpe_enable - enable blocks on an STMPE device
102 * @stmpe: Device to work on
103 * @blocks: Mask of blocks (enum stmpe_block values) to enable
105 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
109 mutex_lock(&stmpe->lock);
110 ret = __stmpe_enable(stmpe, blocks);
111 mutex_unlock(&stmpe->lock);
115 EXPORT_SYMBOL_GPL(stmpe_enable);
118 * stmpe_disable - disable blocks on an STMPE device
119 * @stmpe: Device to work on
120 * @blocks: Mask of blocks (enum stmpe_block values) to enable
122 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
126 mutex_lock(&stmpe->lock);
127 ret = __stmpe_disable(stmpe, blocks);
128 mutex_unlock(&stmpe->lock);
132 EXPORT_SYMBOL_GPL(stmpe_disable);
135 * stmpe_reg_read() - read a single STMPE register
136 * @stmpe: Device to read from
137 * @reg: Register to read
139 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
143 mutex_lock(&stmpe->lock);
144 ret = __stmpe_reg_read(stmpe, reg);
145 mutex_unlock(&stmpe->lock);
149 EXPORT_SYMBOL_GPL(stmpe_reg_read);
152 * stmpe_reg_write() - write a single STMPE register
153 * @stmpe: Device to write to
154 * @reg: Register to write
155 * @val: Value to write
157 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
161 mutex_lock(&stmpe->lock);
162 ret = __stmpe_reg_write(stmpe, reg, val);
163 mutex_unlock(&stmpe->lock);
167 EXPORT_SYMBOL_GPL(stmpe_reg_write);
170 * stmpe_set_bits() - set the value of a bitfield in a STMPE register
171 * @stmpe: Device to write to
172 * @reg: Register to write
173 * @mask: Mask of bits to set
176 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
180 mutex_lock(&stmpe->lock);
181 ret = __stmpe_set_bits(stmpe, reg, mask, val);
182 mutex_unlock(&stmpe->lock);
186 EXPORT_SYMBOL_GPL(stmpe_set_bits);
189 * stmpe_block_read() - read multiple STMPE registers
190 * @stmpe: Device to read from
191 * @reg: First register
192 * @length: Number of registers
193 * @values: Buffer to write to
195 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
199 mutex_lock(&stmpe->lock);
200 ret = __stmpe_block_read(stmpe, reg, length, values);
201 mutex_unlock(&stmpe->lock);
205 EXPORT_SYMBOL_GPL(stmpe_block_read);
208 * stmpe_block_write() - write multiple STMPE registers
209 * @stmpe: Device to write to
210 * @reg: First register
211 * @length: Number of registers
212 * @values: Values to write
214 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
219 mutex_lock(&stmpe->lock);
220 ret = __stmpe_block_write(stmpe, reg, length, values);
221 mutex_unlock(&stmpe->lock);
225 EXPORT_SYMBOL_GPL(stmpe_block_write);
228 * stmpe_set_altfunc()- set the alternate function for STMPE pins
229 * @stmpe: Device to configure
230 * @pins: Bitmask of pins to affect
231 * @block: block to enable alternate functions for
233 * @pins is assumed to have a bit set for each of the bits whose alternate
234 * function is to be changed, numbered according to the GPIOXY numbers.
236 * If the GPIO module is not enabled, this function automatically enables it in
237 * order to perform the change.
239 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
241 struct stmpe_variant_info *variant = stmpe->variant;
242 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
243 int af_bits = variant->af_bits;
244 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
245 int mask = (1 << af_bits) - 1;
247 int af, afperreg, ret;
249 if (!variant->get_altfunc)
252 afperreg = 8 / af_bits;
253 mutex_lock(&stmpe->lock);
255 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
259 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
263 af = variant->get_altfunc(stmpe, block);
266 int pin = __ffs(pins);
267 int regoffset = numregs - (pin / afperreg) - 1;
268 int pos = (pin % afperreg) * (8 / afperreg);
270 regs[regoffset] &= ~(mask << pos);
271 regs[regoffset] |= af << pos;
276 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
279 mutex_unlock(&stmpe->lock);
282 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
285 * GPIO (all variants)
288 static struct resource stmpe_gpio_resources[] = {
289 /* Start and end filled dynamically */
291 .flags = IORESOURCE_IRQ,
295 static struct mfd_cell stmpe_gpio_cell = {
296 .name = "stmpe-gpio",
297 .of_compatible = "st,stmpe-gpio",
298 .resources = stmpe_gpio_resources,
299 .num_resources = ARRAY_SIZE(stmpe_gpio_resources),
302 static struct mfd_cell stmpe_gpio_cell_noirq = {
303 .name = "stmpe-gpio",
304 .of_compatible = "st,stmpe-gpio",
305 /* gpio cell resources consist of an irq only so no resources here */
309 * Keypad (1601, 2401, 2403)
312 static struct resource stmpe_keypad_resources[] = {
317 .flags = IORESOURCE_IRQ,
320 .name = "KEYPAD_OVER",
323 .flags = IORESOURCE_IRQ,
327 static struct mfd_cell stmpe_keypad_cell = {
328 .name = "stmpe-keypad",
329 .resources = stmpe_keypad_resources,
330 .num_resources = ARRAY_SIZE(stmpe_keypad_resources),
336 static const u8 stmpe801_regs[] = {
337 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID,
338 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL,
339 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA,
340 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN,
341 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN,
342 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR,
343 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
344 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
348 static struct stmpe_variant_block stmpe801_blocks[] = {
350 .cell = &stmpe_gpio_cell,
352 .block = STMPE_BLOCK_GPIO,
356 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
358 .cell = &stmpe_gpio_cell_noirq,
359 .block = STMPE_BLOCK_GPIO,
363 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
366 if (blocks & STMPE_BLOCK_GPIO)
372 static struct stmpe_variant_info stmpe801 = {
374 .id_val = STMPE801_ID,
377 .regs = stmpe801_regs,
378 .blocks = stmpe801_blocks,
379 .num_blocks = ARRAY_SIZE(stmpe801_blocks),
380 .num_irqs = STMPE801_NR_INTERNAL_IRQS,
381 .enable = stmpe801_enable,
384 static struct stmpe_variant_info stmpe801_noirq = {
386 .id_val = STMPE801_ID,
389 .regs = stmpe801_regs,
390 .blocks = stmpe801_blocks_noirq,
391 .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq),
392 .enable = stmpe801_enable,
396 * Touchscreen (STMPE811 or STMPE610)
399 static struct resource stmpe_ts_resources[] = {
404 .flags = IORESOURCE_IRQ,
410 .flags = IORESOURCE_IRQ,
414 static struct mfd_cell stmpe_ts_cell = {
416 .resources = stmpe_ts_resources,
417 .num_resources = ARRAY_SIZE(stmpe_ts_resources),
421 * STMPE811 or STMPE610
424 static const u8 stmpe811_regs[] = {
425 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID,
426 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL,
427 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN,
428 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA,
429 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA,
430 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN,
431 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN,
432 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR,
433 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE,
434 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE,
435 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
436 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
437 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
438 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED,
441 static struct stmpe_variant_block stmpe811_blocks[] = {
443 .cell = &stmpe_gpio_cell,
444 .irq = STMPE811_IRQ_GPIOC,
445 .block = STMPE_BLOCK_GPIO,
448 .cell = &stmpe_ts_cell,
449 .irq = STMPE811_IRQ_TOUCH_DET,
450 .block = STMPE_BLOCK_TOUCHSCREEN,
454 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
457 unsigned int mask = 0;
459 if (blocks & STMPE_BLOCK_GPIO)
460 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
462 if (blocks & STMPE_BLOCK_ADC)
463 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
465 if (blocks & STMPE_BLOCK_TOUCHSCREEN)
466 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
468 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
472 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
474 /* 0 for touchscreen, 1 for GPIO */
475 return block != STMPE_BLOCK_TOUCHSCREEN;
478 static struct stmpe_variant_info stmpe811 = {
484 .regs = stmpe811_regs,
485 .blocks = stmpe811_blocks,
486 .num_blocks = ARRAY_SIZE(stmpe811_blocks),
487 .num_irqs = STMPE811_NR_INTERNAL_IRQS,
488 .enable = stmpe811_enable,
489 .get_altfunc = stmpe811_get_altfunc,
492 /* Similar to 811, except number of gpios */
493 static struct stmpe_variant_info stmpe610 = {
499 .regs = stmpe811_regs,
500 .blocks = stmpe811_blocks,
501 .num_blocks = ARRAY_SIZE(stmpe811_blocks),
502 .num_irqs = STMPE811_NR_INTERNAL_IRQS,
503 .enable = stmpe811_enable,
504 .get_altfunc = stmpe811_get_altfunc,
511 static const u8 stmpe1601_regs[] = {
512 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID,
513 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB,
514 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB,
515 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB,
516 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB,
517 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB,
518 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB,
519 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
520 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
521 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
522 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
523 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
524 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
525 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB,
528 static struct stmpe_variant_block stmpe1601_blocks[] = {
530 .cell = &stmpe_gpio_cell,
531 .irq = STMPE24XX_IRQ_GPIOC,
532 .block = STMPE_BLOCK_GPIO,
535 .cell = &stmpe_keypad_cell,
536 .irq = STMPE24XX_IRQ_KEYPAD,
537 .block = STMPE_BLOCK_KEYPAD,
541 /* supported autosleep timeout delay (in msecs) */
542 static const int stmpe_autosleep_delay[] = {
543 4, 16, 32, 64, 128, 256, 512, 1024,
546 static int stmpe_round_timeout(int timeout)
550 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
551 if (stmpe_autosleep_delay[i] >= timeout)
556 * requests for delays longer than supported should not return the
557 * longest supported delay
562 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
566 if (!stmpe->variant->enable_autosleep)
569 mutex_lock(&stmpe->lock);
570 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
571 mutex_unlock(&stmpe->lock);
577 * Both stmpe 1601/2403 support same layout for autosleep
579 static int stmpe1601_autosleep(struct stmpe *stmpe,
580 int autosleep_timeout)
584 /* choose the best available timeout */
585 timeout = stmpe_round_timeout(autosleep_timeout);
587 dev_err(stmpe->dev, "invalid timeout\n");
591 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
592 STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
597 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
598 STPME1601_AUTOSLEEP_ENABLE,
599 STPME1601_AUTOSLEEP_ENABLE);
602 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
605 unsigned int mask = 0;
607 if (blocks & STMPE_BLOCK_GPIO)
608 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
610 if (blocks & STMPE_BLOCK_KEYPAD)
611 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
613 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
617 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
620 case STMPE_BLOCK_PWM:
623 case STMPE_BLOCK_KEYPAD:
626 case STMPE_BLOCK_GPIO:
632 static struct stmpe_variant_info stmpe1601 = {
635 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */
638 .regs = stmpe1601_regs,
639 .blocks = stmpe1601_blocks,
640 .num_blocks = ARRAY_SIZE(stmpe1601_blocks),
641 .num_irqs = STMPE1601_NR_INTERNAL_IRQS,
642 .enable = stmpe1601_enable,
643 .get_altfunc = stmpe1601_get_altfunc,
644 .enable_autosleep = stmpe1601_autosleep,
651 static const u8 stmpe24xx_regs[] = {
652 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID,
653 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB,
654 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB,
655 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB,
656 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB,
657 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB,
658 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB,
659 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
660 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
661 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
662 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
663 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
664 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
665 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB,
668 static struct stmpe_variant_block stmpe24xx_blocks[] = {
670 .cell = &stmpe_gpio_cell,
671 .irq = STMPE24XX_IRQ_GPIOC,
672 .block = STMPE_BLOCK_GPIO,
675 .cell = &stmpe_keypad_cell,
676 .irq = STMPE24XX_IRQ_KEYPAD,
677 .block = STMPE_BLOCK_KEYPAD,
681 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
684 unsigned int mask = 0;
686 if (blocks & STMPE_BLOCK_GPIO)
687 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
689 if (blocks & STMPE_BLOCK_KEYPAD)
690 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
692 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
696 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
699 case STMPE_BLOCK_ROTATOR:
702 case STMPE_BLOCK_KEYPAD:
705 case STMPE_BLOCK_GPIO:
711 static struct stmpe_variant_info stmpe2401 = {
717 .regs = stmpe24xx_regs,
718 .blocks = stmpe24xx_blocks,
719 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
720 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
721 .enable = stmpe24xx_enable,
722 .get_altfunc = stmpe24xx_get_altfunc,
725 static struct stmpe_variant_info stmpe2403 = {
731 .regs = stmpe24xx_regs,
732 .blocks = stmpe24xx_blocks,
733 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
734 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
735 .enable = stmpe24xx_enable,
736 .get_altfunc = stmpe24xx_get_altfunc,
737 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */
740 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
741 [STMPE610] = &stmpe610,
742 [STMPE801] = &stmpe801,
743 [STMPE811] = &stmpe811,
744 [STMPE1601] = &stmpe1601,
745 [STMPE2401] = &stmpe2401,
746 [STMPE2403] = &stmpe2403,
750 * These devices can be connected in a 'no-irq' configuration - the irq pin
751 * is not used and the device cannot interrupt the CPU. Here we only list
752 * devices which support this configuration - the driver will fail probing
753 * for any devices not listed here which are configured in this way.
755 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
756 [STMPE801] = &stmpe801_noirq,
759 static irqreturn_t stmpe_irq(int irq, void *data)
761 struct stmpe *stmpe = data;
762 struct stmpe_variant_info *variant = stmpe->variant;
763 int num = DIV_ROUND_UP(variant->num_irqs, 8);
764 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
769 if (variant->id_val == STMPE801_ID) {
770 handle_nested_irq(stmpe->irq_base);
774 ret = stmpe_block_read(stmpe, israddr, num, isr);
778 for (i = 0; i < num; i++) {
779 int bank = num - i - 1;
783 status &= stmpe->ier[bank];
789 int bit = __ffs(status);
790 int line = bank * 8 + bit;
792 handle_nested_irq(stmpe->irq_base + line);
793 status &= ~(1 << bit);
796 stmpe_reg_write(stmpe, israddr + i, clear);
802 static void stmpe_irq_lock(struct irq_data *data)
804 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
806 mutex_lock(&stmpe->irq_lock);
809 static void stmpe_irq_sync_unlock(struct irq_data *data)
811 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
812 struct stmpe_variant_info *variant = stmpe->variant;
813 int num = DIV_ROUND_UP(variant->num_irqs, 8);
816 for (i = 0; i < num; i++) {
817 u8 new = stmpe->ier[i];
818 u8 old = stmpe->oldier[i];
823 stmpe->oldier[i] = new;
824 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
827 mutex_unlock(&stmpe->irq_lock);
830 static void stmpe_irq_mask(struct irq_data *data)
832 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
833 int offset = data->irq - stmpe->irq_base;
834 int regoffset = offset / 8;
835 int mask = 1 << (offset % 8);
837 stmpe->ier[regoffset] &= ~mask;
840 static void stmpe_irq_unmask(struct irq_data *data)
842 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
843 int offset = data->irq - stmpe->irq_base;
844 int regoffset = offset / 8;
845 int mask = 1 << (offset % 8);
847 stmpe->ier[regoffset] |= mask;
850 static struct irq_chip stmpe_irq_chip = {
852 .irq_bus_lock = stmpe_irq_lock,
853 .irq_bus_sync_unlock = stmpe_irq_sync_unlock,
854 .irq_mask = stmpe_irq_mask,
855 .irq_unmask = stmpe_irq_unmask,
858 static int __devinit stmpe_irq_init(struct stmpe *stmpe)
860 struct irq_chip *chip = NULL;
861 int num_irqs = stmpe->variant->num_irqs;
862 int base = stmpe->irq_base;
865 if (stmpe->variant->id_val != STMPE801_ID)
866 chip = &stmpe_irq_chip;
868 for (irq = base; irq < base + num_irqs; irq++) {
869 irq_set_chip_data(irq, stmpe);
870 irq_set_chip_and_handler(irq, chip, handle_edge_irq);
871 irq_set_nested_thread(irq, 1);
873 set_irq_flags(irq, IRQF_VALID);
875 irq_set_noprobe(irq);
882 static void stmpe_irq_remove(struct stmpe *stmpe)
884 int num_irqs = stmpe->variant->num_irqs;
885 int base = stmpe->irq_base;
888 for (irq = base; irq < base + num_irqs; irq++) {
890 set_irq_flags(irq, 0);
892 irq_set_chip_and_handler(irq, NULL, NULL);
893 irq_set_chip_data(irq, NULL);
897 static int __devinit stmpe_chip_init(struct stmpe *stmpe)
899 unsigned int irq_trigger = stmpe->pdata->irq_trigger;
900 int autosleep_timeout = stmpe->pdata->autosleep_timeout;
901 struct stmpe_variant_info *variant = stmpe->variant;
907 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
908 ARRAY_SIZE(data), data);
912 id = (data[0] << 8) | data[1];
913 if ((id & variant->id_mask) != variant->id_val) {
914 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
918 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
920 /* Disable all modules -- subdrivers should enable what they need. */
921 ret = stmpe_disable(stmpe, ~0);
925 if (stmpe->irq >= 0) {
926 if (id == STMPE801_ID)
927 icr = STMPE801_REG_SYS_CTRL_INT_EN;
929 icr = STMPE_ICR_LSB_GIM;
931 /* STMPE801 doesn't support Edge interrupts */
932 if (id != STMPE801_ID) {
933 if (irq_trigger == IRQF_TRIGGER_FALLING ||
934 irq_trigger == IRQF_TRIGGER_RISING)
935 icr |= STMPE_ICR_LSB_EDGE;
938 if (irq_trigger == IRQF_TRIGGER_RISING ||
939 irq_trigger == IRQF_TRIGGER_HIGH) {
940 if (id == STMPE801_ID)
941 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
943 icr |= STMPE_ICR_LSB_HIGH;
946 if (stmpe->pdata->irq_invert_polarity) {
947 if (id == STMPE801_ID)
948 icr ^= STMPE801_REG_SYS_CTRL_INT_HI;
950 icr ^= STMPE_ICR_LSB_HIGH;
954 if (stmpe->pdata->autosleep) {
955 ret = stmpe_autosleep(stmpe, autosleep_timeout);
960 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
963 static int __devinit stmpe_add_device(struct stmpe *stmpe,
964 struct mfd_cell *cell, int irq)
966 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
967 NULL, stmpe->irq_base + irq, NULL);
970 static int __devinit stmpe_devices_init(struct stmpe *stmpe)
972 struct stmpe_variant_info *variant = stmpe->variant;
973 unsigned int platform_blocks = stmpe->pdata->blocks;
977 for (i = 0; i < variant->num_blocks; i++) {
978 struct stmpe_variant_block *block = &variant->blocks[i];
980 if (!(platform_blocks & block->block))
983 platform_blocks &= ~block->block;
984 ret = stmpe_add_device(stmpe, block->cell, block->irq);
991 "platform wants blocks (%#x) not present on variant",
997 /* Called from client specific probe routines */
998 int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
1000 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1001 struct stmpe *stmpe;
1007 stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
1011 mutex_init(&stmpe->irq_lock);
1012 mutex_init(&stmpe->lock);
1014 stmpe->dev = ci->dev;
1015 stmpe->client = ci->client;
1016 stmpe->pdata = pdata;
1017 stmpe->irq_base = pdata->irq_base;
1019 stmpe->partnum = partnum;
1020 stmpe->variant = stmpe_variant_info[partnum];
1021 stmpe->regs = stmpe->variant->regs;
1022 stmpe->num_gpios = stmpe->variant->num_gpios;
1023 dev_set_drvdata(stmpe->dev, stmpe);
1028 if (pdata->irq_over_gpio) {
1029 ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe");
1031 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1036 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1038 stmpe->irq = ci->irq;
1041 if (stmpe->irq < 0) {
1042 /* use alternate variant info for no-irq mode, if supported */
1043 dev_info(stmpe->dev,
1044 "%s configured in no-irq mode by platform data\n",
1045 stmpe->variant->name);
1046 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1048 "%s does not support no-irq mode!\n",
1049 stmpe->variant->name);
1053 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1056 ret = stmpe_chip_init(stmpe);
1060 if (stmpe->irq >= 0) {
1061 ret = stmpe_irq_init(stmpe);
1065 ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq,
1066 pdata->irq_trigger | IRQF_ONESHOT,
1069 dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1075 ret = stmpe_devices_init(stmpe);
1077 dev_err(stmpe->dev, "failed to add children\n");
1078 goto out_removedevs;
1084 mfd_remove_devices(stmpe->dev);
1085 if (stmpe->irq >= 0)
1086 free_irq(stmpe->irq, stmpe);
1088 if (stmpe->irq >= 0)
1089 stmpe_irq_remove(stmpe);
1091 if (pdata->irq_over_gpio)
1092 gpio_free(pdata->irq_gpio);
1098 int stmpe_remove(struct stmpe *stmpe)
1100 mfd_remove_devices(stmpe->dev);
1102 if (stmpe->irq >= 0) {
1103 free_irq(stmpe->irq, stmpe);
1104 stmpe_irq_remove(stmpe);
1107 if (stmpe->pdata->irq_over_gpio)
1108 gpio_free(stmpe->pdata->irq_gpio);
1116 static int stmpe_suspend(struct device *dev)
1118 struct stmpe *stmpe = dev_get_drvdata(dev);
1120 if (stmpe->irq >= 0 && device_may_wakeup(dev))
1121 enable_irq_wake(stmpe->irq);
1126 static int stmpe_resume(struct device *dev)
1128 struct stmpe *stmpe = dev_get_drvdata(dev);
1130 if (stmpe->irq >= 0 && device_may_wakeup(dev))
1131 disable_irq_wake(stmpe->irq);
1136 const struct dev_pm_ops stmpe_dev_pm_ops = {
1137 .suspend = stmpe_suspend,
1138 .resume = stmpe_resume,