1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/mfd/rtsx_pci.h>
29 static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
33 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
37 static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
41 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
42 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
44 if (!rtsx_vendor_setting_valid(reg))
47 pcr->aspm_en = rtsx_reg_to_aspm(reg);
48 pcr->sd30_drive_sel_1v8 =
49 map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg));
50 pcr->card_drive_sel &= 0x3F;
51 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
53 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®);
54 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
55 pcr->sd30_drive_sel_3v3 =
56 map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
59 static void rts5229_force_power_down(struct rtsx_pcr *pcr)
61 rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
64 static int rts5229_extra_init_hw(struct rtsx_pcr *pcr)
66 rtsx_pci_init_cmd(pcr);
68 /* Configure GPIO as output */
69 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
70 /* Reset ASPM state to default value */
71 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
72 /* Force CLKREQ# PIN to drive 0 to request clock */
73 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
74 /* Switch LDO3318 source from DV33 to card_3v3 */
75 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
76 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
77 /* LED shine disabled, set initial shine cycle period */
78 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
79 /* Configure driving */
80 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
81 0xFF, pcr->sd30_drive_sel_3v3);
83 return rtsx_pci_send_cmd(pcr, 100);
86 static int rts5229_optimize_phy(struct rtsx_pcr *pcr)
88 /* Optimize RX sensitivity */
89 return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);
92 static int rts5229_turn_on_led(struct rtsx_pcr *pcr)
94 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
97 static int rts5229_turn_off_led(struct rtsx_pcr *pcr)
99 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
102 static int rts5229_enable_auto_blink(struct rtsx_pcr *pcr)
104 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
107 static int rts5229_disable_auto_blink(struct rtsx_pcr *pcr)
109 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
112 static int rts5229_card_power_on(struct rtsx_pcr *pcr, int card)
116 rtsx_pci_init_cmd(pcr);
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
118 SD_POWER_MASK, SD_PARTIAL_POWER_ON);
119 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
120 LDO3318_PWR_MASK, 0x02);
121 err = rtsx_pci_send_cmd(pcr, 100);
125 /* To avoid too large in-rush current */
128 rtsx_pci_init_cmd(pcr);
129 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
130 SD_POWER_MASK, SD_POWER_ON);
131 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
132 LDO3318_PWR_MASK, 0x06);
133 err = rtsx_pci_send_cmd(pcr, 100);
140 static int rts5229_card_power_off(struct rtsx_pcr *pcr, int card)
142 rtsx_pci_init_cmd(pcr);
143 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
144 SD_POWER_MASK | PMOS_STRG_MASK,
145 SD_POWER_OFF | PMOS_STRG_400mA);
146 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
147 LDO3318_PWR_MASK, 0x00);
148 return rtsx_pci_send_cmd(pcr, 100);
151 static int rts5229_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
155 if (voltage == OUTPUT_3V3) {
156 err = rtsx_pci_write_register(pcr,
157 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
160 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
163 } else if (voltage == OUTPUT_1V8) {
164 err = rtsx_pci_write_register(pcr,
165 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
168 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
178 static const struct pcr_ops rts5229_pcr_ops = {
179 .fetch_vendor_settings = rts5229_fetch_vendor_settings,
180 .extra_init_hw = rts5229_extra_init_hw,
181 .optimize_phy = rts5229_optimize_phy,
182 .turn_on_led = rts5229_turn_on_led,
183 .turn_off_led = rts5229_turn_off_led,
184 .enable_auto_blink = rts5229_enable_auto_blink,
185 .disable_auto_blink = rts5229_disable_auto_blink,
186 .card_power_on = rts5229_card_power_on,
187 .card_power_off = rts5229_card_power_off,
188 .switch_output_voltage = rts5229_switch_output_voltage,
190 .conv_clk_and_div_n = NULL,
191 .force_power_down = rts5229_force_power_down,
194 /* SD Pull Control Enable:
195 * SD_DAT[3:0] ==> pull up
199 * SD_CLK ==> pull down
201 static const u32 rts5229_sd_pull_ctl_enable_tbl1[] = {
202 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
203 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
207 /* For RTS5229 version C */
208 static const u32 rts5229_sd_pull_ctl_enable_tbl2[] = {
209 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
210 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
214 /* SD Pull Control Disable:
215 * SD_DAT[3:0] ==> pull down
217 * SD_WP ==> pull down
218 * SD_CMD ==> pull down
219 * SD_CLK ==> pull down
221 static const u32 rts5229_sd_pull_ctl_disable_tbl1[] = {
222 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
223 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
227 /* For RTS5229 version C */
228 static const u32 rts5229_sd_pull_ctl_disable_tbl2[] = {
229 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
230 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
234 /* MS Pull Control Enable:
236 * others ==> pull down
238 static const u32 rts5229_ms_pull_ctl_enable_tbl[] = {
239 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
240 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
244 /* MS Pull Control Disable:
246 * others ==> pull down
248 static const u32 rts5229_ms_pull_ctl_disable_tbl[] = {
249 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
250 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
254 void rts5229_init_params(struct rtsx_pcr *pcr)
256 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
258 pcr->ops = &rts5229_pcr_ops;
261 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
262 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
263 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
264 pcr->aspm_en = ASPM_L1_EN;
266 pcr->ic_version = rts5229_get_ic_version(pcr);
267 if (pcr->ic_version == IC_VER_C) {
268 pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl2;
269 pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl2;
271 pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl1;
272 pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl1;
274 pcr->ms_pull_ctl_enable_tbl = rts5229_ms_pull_ctl_enable_tbl;
275 pcr->ms_pull_ctl_disable_tbl = rts5229_ms_pull_ctl_disable_tbl;