Merge branch 'hash' of git://ftp.sciencehorizons.net/linux
[linux-2.6-block.git] / drivers / mfd / rc5t583.c
1 /*
2  * Core driver access RC5T583 power management chip.
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
5  * Author: Laxman dewangan <ldewangan@nvidia.com>
6  *
7  * Based on code
8  *      Copyright (C) 2011 RICOH COMPANY,LTD
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms and conditions of the GNU General Public License,
12  * version 2, as published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
21  *
22  */
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/err.h>
29 #include <linux/slab.h>
30 #include <linux/i2c.h>
31 #include <linux/mfd/core.h>
32 #include <linux/mfd/rc5t583.h>
33 #include <linux/regmap.h>
34
35 #define RICOH_ONOFFSEL_REG      0x10
36 #define RICOH_SWCTL_REG         0x5E
37
38 struct deepsleep_control_data {
39         u8 reg_add;
40         u8 ds_pos_bit;
41 };
42
43 #define DEEPSLEEP_INIT(_id, _reg, _pos)         \
44         {                                       \
45                 .reg_add = RC5T583_##_reg,      \
46                 .ds_pos_bit = _pos,             \
47         }
48
49 static struct deepsleep_control_data deepsleep_data[] = {
50         DEEPSLEEP_INIT(DC0, SLPSEQ1, 0),
51         DEEPSLEEP_INIT(DC1, SLPSEQ1, 4),
52         DEEPSLEEP_INIT(DC2, SLPSEQ2, 0),
53         DEEPSLEEP_INIT(DC3, SLPSEQ2, 4),
54         DEEPSLEEP_INIT(LDO0, SLPSEQ3, 0),
55         DEEPSLEEP_INIT(LDO1, SLPSEQ3, 4),
56         DEEPSLEEP_INIT(LDO2, SLPSEQ4, 0),
57         DEEPSLEEP_INIT(LDO3, SLPSEQ4, 4),
58         DEEPSLEEP_INIT(LDO4, SLPSEQ5, 0),
59         DEEPSLEEP_INIT(LDO5, SLPSEQ5, 4),
60         DEEPSLEEP_INIT(LDO6, SLPSEQ6, 0),
61         DEEPSLEEP_INIT(LDO7, SLPSEQ6, 4),
62         DEEPSLEEP_INIT(LDO8, SLPSEQ7, 0),
63         DEEPSLEEP_INIT(LDO9, SLPSEQ7, 4),
64         DEEPSLEEP_INIT(PSO0, SLPSEQ8, 0),
65         DEEPSLEEP_INIT(PSO1, SLPSEQ8, 4),
66         DEEPSLEEP_INIT(PSO2, SLPSEQ9, 0),
67         DEEPSLEEP_INIT(PSO3, SLPSEQ9, 4),
68         DEEPSLEEP_INIT(PSO4, SLPSEQ10, 0),
69         DEEPSLEEP_INIT(PSO5, SLPSEQ10, 4),
70         DEEPSLEEP_INIT(PSO6, SLPSEQ11, 0),
71         DEEPSLEEP_INIT(PSO7, SLPSEQ11, 4),
72 };
73
74 #define EXT_PWR_REQ             \
75         (RC5T583_EXT_PWRREQ1_CONTROL | RC5T583_EXT_PWRREQ2_CONTROL)
76
77 static const struct mfd_cell rc5t583_subdevs[] = {
78         {.name = "rc5t583-gpio",},
79         {.name = "rc5t583-regulator",},
80         {.name = "rc5t583-rtc",      },
81         {.name = "rc5t583-key",      }
82 };
83
84 static int __rc5t583_set_ext_pwrreq1_control(struct device *dev,
85         int id, int ext_pwr, int slots)
86 {
87         int ret;
88         uint8_t sleepseq_val = 0;
89         unsigned int en_bit;
90         unsigned int slot_bit;
91
92         if (id == RC5T583_DS_DC0) {
93                 dev_err(dev, "PWRREQ1 is invalid control for rail %d\n", id);
94                 return -EINVAL;
95         }
96
97         en_bit = deepsleep_data[id].ds_pos_bit;
98         slot_bit = en_bit + 1;
99         ret = rc5t583_read(dev, deepsleep_data[id].reg_add, &sleepseq_val);
100         if (ret < 0) {
101                 dev_err(dev, "Error in reading reg 0x%x\n",
102                                 deepsleep_data[id].reg_add);
103                 return ret;
104         }
105
106         sleepseq_val &= ~(0xF << en_bit);
107         sleepseq_val |= BIT(en_bit);
108         sleepseq_val |= ((slots & 0x7) << slot_bit);
109         ret = rc5t583_set_bits(dev, RICOH_ONOFFSEL_REG, BIT(1));
110         if (ret < 0) {
111                 dev_err(dev, "Error in updating the 0x%02x register\n",
112                                 RICOH_ONOFFSEL_REG);
113                 return ret;
114         }
115
116         ret = rc5t583_write(dev, deepsleep_data[id].reg_add, sleepseq_val);
117         if (ret < 0) {
118                 dev_err(dev, "Error in writing reg 0x%x\n",
119                                 deepsleep_data[id].reg_add);
120                 return ret;
121         }
122
123         if (id == RC5T583_DS_LDO4) {
124                 ret = rc5t583_write(dev, RICOH_SWCTL_REG, 0x1);
125                 if (ret < 0)
126                         dev_err(dev, "Error in writing reg 0x%x\n",
127                                 RICOH_SWCTL_REG);
128         }
129         return ret;
130 }
131
132 static int __rc5t583_set_ext_pwrreq2_control(struct device *dev,
133         int id, int ext_pwr)
134 {
135         int ret;
136
137         if (id != RC5T583_DS_DC0) {
138                 dev_err(dev, "PWRREQ2 is invalid control for rail %d\n", id);
139                 return -EINVAL;
140         }
141
142         ret = rc5t583_set_bits(dev, RICOH_ONOFFSEL_REG, BIT(2));
143         if (ret < 0)
144                 dev_err(dev, "Error in updating the ONOFFSEL 0x10 register\n");
145         return ret;
146 }
147
148 int rc5t583_ext_power_req_config(struct device *dev, int ds_id,
149         int ext_pwr_req, int deepsleep_slot_nr)
150 {
151         if ((ext_pwr_req & EXT_PWR_REQ) == EXT_PWR_REQ)
152                 return -EINVAL;
153
154         if (ext_pwr_req & RC5T583_EXT_PWRREQ1_CONTROL)
155                 return __rc5t583_set_ext_pwrreq1_control(dev, ds_id,
156                                 ext_pwr_req, deepsleep_slot_nr);
157
158         if (ext_pwr_req & RC5T583_EXT_PWRREQ2_CONTROL)
159                 return __rc5t583_set_ext_pwrreq2_control(dev,
160                         ds_id, ext_pwr_req);
161         return 0;
162 }
163 EXPORT_SYMBOL(rc5t583_ext_power_req_config);
164
165 static int rc5t583_clear_ext_power_req(struct rc5t583 *rc5t583,
166         struct rc5t583_platform_data *pdata)
167 {
168         int ret;
169         int i;
170         uint8_t on_off_val = 0;
171
172         /*  Clear ONOFFSEL register */
173         if (pdata->enable_shutdown)
174                 on_off_val = 0x1;
175
176         ret = rc5t583_write(rc5t583->dev, RICOH_ONOFFSEL_REG, on_off_val);
177         if (ret < 0)
178                 dev_warn(rc5t583->dev, "Error in writing reg %d error: %d\n",
179                                         RICOH_ONOFFSEL_REG, ret);
180
181         ret = rc5t583_write(rc5t583->dev, RICOH_SWCTL_REG, 0x0);
182         if (ret < 0)
183                 dev_warn(rc5t583->dev, "Error in writing reg %d error: %d\n",
184                                         RICOH_SWCTL_REG, ret);
185
186         /* Clear sleep sequence register */
187         for (i = RC5T583_SLPSEQ1; i <= RC5T583_SLPSEQ11; ++i) {
188                 ret = rc5t583_write(rc5t583->dev, i, 0x0);
189                 if (ret < 0)
190                         dev_warn(rc5t583->dev,
191                                 "Error in writing reg 0x%02x error: %d\n",
192                                 i, ret);
193         }
194         return 0;
195 }
196
197 static bool volatile_reg(struct device *dev, unsigned int reg)
198 {
199         /* Enable caching in interrupt registers */
200         switch (reg) {
201         case RC5T583_INT_EN_SYS1:
202         case RC5T583_INT_EN_SYS2:
203         case RC5T583_INT_EN_DCDC:
204         case RC5T583_INT_EN_RTC:
205         case RC5T583_INT_EN_ADC1:
206         case RC5T583_INT_EN_ADC2:
207         case RC5T583_INT_EN_ADC3:
208         case RC5T583_GPIO_GPEDGE1:
209         case RC5T583_GPIO_GPEDGE2:
210         case RC5T583_GPIO_EN_INT:
211                 return false;
212
213         case RC5T583_GPIO_MON_IOIN:
214                 /* This is gpio input register */
215                 return true;
216
217         default:
218                 /* Enable caching in gpio registers */
219                 if ((reg >= RC5T583_GPIO_IOSEL) &&
220                                 (reg <= RC5T583_GPIO_GPOFUNC))
221                         return false;
222
223                 /* Enable caching in sleep seq registers */
224                 if ((reg >= RC5T583_SLPSEQ1) && (reg <= RC5T583_SLPSEQ11))
225                         return false;
226
227                 /* Enable caching of regulator registers */
228                 if ((reg >= RC5T583_REG_DC0CTL) && (reg <= RC5T583_REG_SR3CTL))
229                         return false;
230                 if ((reg >= RC5T583_REG_LDOEN1) &&
231                                         (reg <= RC5T583_REG_LDO9DAC_DS))
232                         return false;
233
234                 break;
235         }
236
237         return true;
238 }
239
240 static const struct regmap_config rc5t583_regmap_config = {
241         .reg_bits = 8,
242         .val_bits = 8,
243         .volatile_reg = volatile_reg,
244         .max_register = RC5T583_MAX_REG,
245         .num_reg_defaults_raw = RC5T583_NUM_REGS,
246         .cache_type = REGCACHE_RBTREE,
247 };
248
249 static int rc5t583_i2c_probe(struct i2c_client *i2c,
250                               const struct i2c_device_id *id)
251 {
252         struct rc5t583 *rc5t583;
253         struct rc5t583_platform_data *pdata = dev_get_platdata(&i2c->dev);
254         int ret;
255
256         if (!pdata) {
257                 dev_err(&i2c->dev, "Err: Platform data not found\n");
258                 return -EINVAL;
259         }
260
261         rc5t583 = devm_kzalloc(&i2c->dev, sizeof(struct rc5t583), GFP_KERNEL);
262         if (!rc5t583) {
263                 dev_err(&i2c->dev, "Memory allocation failed\n");
264                 return -ENOMEM;
265         }
266
267         rc5t583->dev = &i2c->dev;
268         i2c_set_clientdata(i2c, rc5t583);
269
270         rc5t583->regmap = devm_regmap_init_i2c(i2c, &rc5t583_regmap_config);
271         if (IS_ERR(rc5t583->regmap)) {
272                 ret = PTR_ERR(rc5t583->regmap);
273                 dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
274                 return ret;
275         }
276
277         ret = rc5t583_clear_ext_power_req(rc5t583, pdata);
278         if (ret < 0)
279                 return ret;
280
281         if (i2c->irq) {
282                 ret = rc5t583_irq_init(rc5t583, i2c->irq, pdata->irq_base);
283                 /* Still continue with warning, if irq init fails */
284                 if (ret)
285                         dev_warn(&i2c->dev, "IRQ init failed: %d\n", ret);
286         }
287
288         ret = devm_mfd_add_devices(rc5t583->dev, -1, rc5t583_subdevs,
289                                    ARRAY_SIZE(rc5t583_subdevs), NULL, 0, NULL);
290         if (ret) {
291                 dev_err(&i2c->dev, "add mfd devices failed: %d\n", ret);
292                 return ret;
293         }
294
295         return 0;
296 }
297
298 static const struct i2c_device_id rc5t583_i2c_id[] = {
299         {.name = "rc5t583", .driver_data = 0},
300         {}
301 };
302
303 MODULE_DEVICE_TABLE(i2c, rc5t583_i2c_id);
304
305 static struct i2c_driver rc5t583_i2c_driver = {
306         .driver = {
307                    .name = "rc5t583",
308                    },
309         .probe = rc5t583_i2c_probe,
310         .id_table = rc5t583_i2c_id,
311 };
312
313 static int __init rc5t583_i2c_init(void)
314 {
315         return i2c_add_driver(&rc5t583_i2c_driver);
316 }
317 subsys_initcall(rc5t583_i2c_init);
318
319 static void __exit rc5t583_i2c_exit(void)
320 {
321         i2c_del_driver(&rc5t583_i2c_driver);
322 }
323
324 module_exit(rc5t583_i2c_exit);
325
326 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
327 MODULE_DESCRIPTION("RICOH RC5T583 power management system device driver");
328 MODULE_LICENSE("GPL v2");