drivers/mfd/mt6397-core.c

   1 /*
   2  * Copyright (c) 2014 MediaTek Inc.
   3  * Author: Flora Fu, MediaTek
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/interrupt.h>
  16 #include <linux/module.h>
  17 #include <linux/of_device.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/regmap.h>
  20 #include <linux/mfd/core.h>
  21 #include <linux/mfd/mt6397/core.h>
  22 #include <linux/mfd/mt6323/core.h>
  23 #include <linux/mfd/mt6397/registers.h>
  24 #include <linux/mfd/mt6323/registers.h>
  25
  26 #define MT6397_RTC_BASE         0xe000
  27 #define MT6397_RTC_SIZE         0x3e
  28
  29 #define MT6323_CID_CODE         0x23
  30 #define MT6391_CID_CODE         0x91
  31 #define MT6397_CID_CODE         0x97
  32
  33 static const struct resource mt6397_rtc_resources[] = {
  34         {
  35                 .start = MT6397_RTC_BASE,
  36                 .end   = MT6397_RTC_BASE + MT6397_RTC_SIZE,
  37                 .flags = IORESOURCE_MEM,
  38         },
  39         {
  40                 .start = MT6397_IRQ_RTC,
  41                 .end   = MT6397_IRQ_RTC,
  42                 .flags = IORESOURCE_IRQ,
  43         },
  44 };
  45
  46 static const struct mfd_cell mt6323_devs[] = {
  47         {
  48                 .name = "mt6323-regulator",
  49                 .of_compatible = "mediatek,mt6323-regulator"
  50         },
  51         {
  52                 .name = "mt6323-led",
  53                 .of_compatible = "mediatek,mt6323-led"
  54         },
  55 };
  56
  57 static const struct mfd_cell mt6397_devs[] = {
  58         {
  59                 .name = "mt6397-rtc",
  60                 .num_resources = ARRAY_SIZE(mt6397_rtc_resources),
  61                 .resources = mt6397_rtc_resources,
  62                 .of_compatible = "mediatek,mt6397-rtc",
  63         }, {
  64                 .name = "mt6397-regulator",
  65                 .of_compatible = "mediatek,mt6397-regulator",
  66         }, {
  67                 .name = "mt6397-codec",
  68                 .of_compatible = "mediatek,mt6397-codec",
  69         }, {
  70                 .name = "mt6397-clk",
  71                 .of_compatible = "mediatek,mt6397-clk",
  72         }, {
  73                 .name = "mt6397-pinctrl",
  74                 .of_compatible = "mediatek,mt6397-pinctrl",
  75         },
  76 };
  77
  78 static void mt6397_irq_lock(struct irq_data *data)
  79 {
  80         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
  81
  82         mutex_lock(&mt6397->irqlock);
  83 }
  84
  85 static void mt6397_irq_sync_unlock(struct irq_data *data)
  86 {
  87         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
  88
  89         regmap_write(mt6397->regmap, mt6397->int_con[0],
  90                      mt6397->irq_masks_cur[0]);
  91         regmap_write(mt6397->regmap, mt6397->int_con[1],
  92                      mt6397->irq_masks_cur[1]);
  93
  94         mutex_unlock(&mt6397->irqlock);
  95 }
  96
  97 static void mt6397_irq_disable(struct irq_data *data)
  98 {
  99         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
 100         int shift = data->hwirq & 0xf;
 101         int reg = data->hwirq >> 4;
 102
 103         mt6397->irq_masks_cur[reg] &= ~BIT(shift);
 104 }
 105
 106 static void mt6397_irq_enable(struct irq_data *data)
 107 {
 108         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
 109         int shift = data->hwirq & 0xf;
 110         int reg = data->hwirq >> 4;
 111
 112         mt6397->irq_masks_cur[reg] |= BIT(shift);
 113 }
 114
 115 #ifdef CONFIG_PM_SLEEP
 116 static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
 117 {
 118         struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
 119         int shift = irq_data->hwirq & 0xf;
 120         int reg = irq_data->hwirq >> 4;
 121
 122         if (on)
 123                 mt6397->wake_mask[reg] |= BIT(shift);
 124         else
 125                 mt6397->wake_mask[reg] &= ~BIT(shift);
 126
 127         return 0;
 128 }
 129 #else
 130 #define mt6397_irq_set_wake NULL
 131 #endif
 132
 133 static struct irq_chip mt6397_irq_chip = {
 134         .name = "mt6397-irq",
 135         .irq_bus_lock = mt6397_irq_lock,
 136         .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
 137         .irq_enable = mt6397_irq_enable,
 138         .irq_disable = mt6397_irq_disable,
 139         .irq_set_wake = mt6397_irq_set_wake,
 140 };
 141
 142 static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
 143                 int irqbase)
 144 {
 145         unsigned int status;
 146         int i, irq, ret;
 147
 148         ret = regmap_read(mt6397->regmap, reg, &status);
 149         if (ret) {
 150                 dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
 151                 return;
 152         }
 153
 154         for (i = 0; i < 16; i++) {
 155                 if (status & BIT(i)) {
 156                         irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
 157                         if (irq)
 158                                 handle_nested_irq(irq);
 159                 }
 160         }
 161
 162         regmap_write(mt6397->regmap, reg, status);
 163 }
 164
 165 static irqreturn_t mt6397_irq_thread(int irq, void *data)
 166 {
 167         struct mt6397_chip *mt6397 = data;
 168
 169         mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
 170         mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
 171
 172         return IRQ_HANDLED;
 173 }
 174
 175 static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
 176                                         irq_hw_number_t hw)
 177 {
 178         struct mt6397_chip *mt6397 = d->host_data;
 179
 180         irq_set_chip_data(irq, mt6397);
 181         irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
 182         irq_set_nested_thread(irq, 1);
 183         irq_set_noprobe(irq);
 184
 185         return 0;
 186 }
 187
 188 static const struct irq_domain_ops mt6397_irq_domain_ops = {
 189         .map = mt6397_irq_domain_map,
 190 };
 191
 192 static int mt6397_irq_init(struct mt6397_chip *mt6397)
 193 {
 194         int ret;
 195
 196         mutex_init(&mt6397->irqlock);
 197
 198         /* Mask all interrupt sources */
 199         regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
 200         regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
 201
 202         mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
 203                 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
 204         if (!mt6397->irq_domain) {
 205                 dev_err(mt6397->dev, "could not create irq domain\n");
 206                 return -ENOMEM;
 207         }
 208
 209         ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL,
 210                 mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397);
 211         if (ret) {
 212                 dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n",
 213                         mt6397->irq, ret);
 214                 return ret;
 215         }
 216
 217         return 0;
 218 }
 219
 220 #ifdef CONFIG_PM_SLEEP
 221 static int mt6397_irq_suspend(struct device *dev)
 222 {
 223         struct mt6397_chip *chip = dev_get_drvdata(dev);
 224
 225         regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
 226         regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
 227
 228         enable_irq_wake(chip->irq);
 229
 230         return 0;
 231 }
 232
 233 static int mt6397_irq_resume(struct device *dev)
 234 {
 235         struct mt6397_chip *chip = dev_get_drvdata(dev);
 236
 237         regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
 238         regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
 239
 240         disable_irq_wake(chip->irq);
 241
 242         return 0;
 243 }
 244 #endif
 245
 246 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
 247                         mt6397_irq_resume);
 248
 249 static int mt6397_probe(struct platform_device *pdev)
 250 {
 251         int ret;
 252         unsigned int id;
 253         struct mt6397_chip *pmic;
 254
 255         pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
 256         if (!pmic)
 257                 return -ENOMEM;
 258
 259         pmic->dev = &pdev->dev;
 260
 261         /*
 262          * mt6397 MFD is child device of soc pmic wrapper.
 263          * Regmap is set from its parent.
 264          */
 265         pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 266         if (!pmic->regmap)
 267                 return -ENODEV;
 268
 269         platform_set_drvdata(pdev, pmic);
 270
 271         ret = regmap_read(pmic->regmap, MT6397_CID, &id);
 272         if (ret) {
 273                 dev_err(pmic->dev, "Failed to read chip id: %d\n", ret);
 274                 return ret;
 275         }
 276
 277         pmic->irq = platform_get_irq(pdev, 0);
 278         if (pmic->irq <= 0)
 279                 return pmic->irq;
 280
 281         switch (id & 0xff) {
 282         case MT6323_CID_CODE:
 283                 pmic->int_con[0] = MT6323_INT_CON0;
 284                 pmic->int_con[1] = MT6323_INT_CON1;
 285                 pmic->int_status[0] = MT6323_INT_STATUS0;
 286                 pmic->int_status[1] = MT6323_INT_STATUS1;
 287                 ret = mt6397_irq_init(pmic);
 288                 if (ret)
 289                         return ret;
 290
 291                 ret = devm_mfd_add_devices(&pdev->dev, -1, mt6323_devs,
 292                                            ARRAY_SIZE(mt6323_devs), NULL,
 293                                            0, NULL);
 294                 break;
 295
 296         case MT6397_CID_CODE:
 297         case MT6391_CID_CODE:
 298                 pmic->int_con[0] = MT6397_INT_CON0;
 299                 pmic->int_con[1] = MT6397_INT_CON1;
 300                 pmic->int_status[0] = MT6397_INT_STATUS0;
 301                 pmic->int_status[1] = MT6397_INT_STATUS1;
 302                 ret = mt6397_irq_init(pmic);
 303                 if (ret)
 304                         return ret;
 305
 306                 ret = devm_mfd_add_devices(&pdev->dev, -1, mt6397_devs,
 307                                            ARRAY_SIZE(mt6397_devs), NULL,
 308                                            0, NULL);
 309                 break;
 310
 311         default:
 312                 dev_err(&pdev->dev, "unsupported chip: %d\n", id);
 313                 ret = -ENODEV;
 314                 break;
 315         }
 316
 317         if (ret) {
 318                 irq_domain_remove(pmic->irq_domain);
 319                 dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
 320         }
 321
 322         return ret;
 323 }
 324
 325 static const struct of_device_id mt6397_of_match[] = {
 326         { .compatible = "mediatek,mt6397" },
 327         { .compatible = "mediatek,mt6323" },
 328         { }
 329 };
 330 MODULE_DEVICE_TABLE(of, mt6397_of_match);
 331
 332 static const struct platform_device_id mt6397_id[] = {
 333         { "mt6397", 0 },
 334         { },
 335 };
 336 MODULE_DEVICE_TABLE(platform, mt6397_id);
 337
 338 static struct platform_driver mt6397_driver = {
 339         .probe = mt6397_probe,
 340         .driver = {
 341                 .name = "mt6397",
 342                 .of_match_table = of_match_ptr(mt6397_of_match),
 343                 .pm = &mt6397_pm_ops,
 344         },
 345         .id_table = mt6397_id,
 346 };
 347
 348 module_platform_driver(mt6397_driver);
 349
 350 MODULE_AUTHOR("Flora Fu, MediaTek");
 351 MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
 352 MODULE_LICENSE("GPL");