drivers/memory/tegra/tegra234.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2022-2023, NVIDIA CORPORATION.  All rights reserved.
   4  */
   5
   6 #include <soc/tegra/mc.h>
   7
   8 #include <dt-bindings/memory/tegra234-mc.h>
   9 #include <linux/interconnect.h>
  10 #include <linux/tegra-icc.h>
  11
  12 #include <soc/tegra/bpmp.h>
  13 #include "mc.h"
  14
  15 /*
  16  * MC Client entries are sorted in the increasing order of the
  17  * override and security register offsets.
  18  */
  19 static const struct tegra_mc_client tegra234_mc_clients[] = {
  20         {
  21                 .id = TEGRA234_MEMORY_CLIENT_HDAR,
  22                 .name = "hdar",
  23                 .bpmp_id = TEGRA_ICC_BPMP_HDA,
  24                 .type = TEGRA_ICC_ISO_AUDIO,
  25                 .sid = TEGRA234_SID_HDA,
  26                 .regs = {
  27                         .sid = {
  28                                 .override = 0xa8,
  29                                 .security = 0xac,
  30                         },
  31                 },
  32         }, {
  33                 .id = TEGRA234_MEMORY_CLIENT_NVENCSRD,
  34                 .name = "nvencsrd",
  35                 .bpmp_id = TEGRA_ICC_BPMP_NVENC,
  36                 .type = TEGRA_ICC_NISO,
  37                 .sid = TEGRA234_SID_NVENC,
  38                 .regs = {
  39                         .sid = {
  40                                 .override = 0xe0,
  41                                 .security = 0xe4,
  42                         },
  43                 },
  44         }, {
  45                 .id = TEGRA234_MEMORY_CLIENT_PCIE6AR,
  46                 .name = "pcie6ar",
  47                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
  48                 .type = TEGRA_ICC_NISO,
  49                 .sid = TEGRA234_SID_PCIE6,
  50                 .regs = {
  51                         .sid = {
  52                                 .override = 0x140,
  53                                 .security = 0x144,
  54                         },
  55                 },
  56         }, {
  57                 .id = TEGRA234_MEMORY_CLIENT_PCIE6AW,
  58                 .name = "pcie6aw",
  59                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
  60                 .type = TEGRA_ICC_NISO,
  61                 .sid = TEGRA234_SID_PCIE6,
  62                 .regs = {
  63                         .sid = {
  64                                 .override = 0x148,
  65                                 .security = 0x14c,
  66                         },
  67                 },
  68         }, {
  69                 .id = TEGRA234_MEMORY_CLIENT_PCIE7AR,
  70                 .name = "pcie7ar",
  71                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
  72                 .type = TEGRA_ICC_NISO,
  73                 .sid = TEGRA234_SID_PCIE7,
  74                 .regs = {
  75                         .sid = {
  76                                 .override = 0x150,
  77                                 .security = 0x154,
  78                         },
  79                 },
  80         }, {
  81                 .id = TEGRA234_MEMORY_CLIENT_NVENCSWR,
  82                 .name = "nvencswr",
  83                 .bpmp_id = TEGRA_ICC_BPMP_NVENC,
  84                 .type = TEGRA_ICC_NISO,
  85                 .sid = TEGRA234_SID_NVENC,
  86                 .regs = {
  87                         .sid = {
  88                                 .override = 0x158,
  89                                 .security = 0x15c,
  90                         },
  91                 },
  92         }, {
  93                 .id = TEGRA234_MEMORY_CLIENT_DLA0RDB,
  94                 .name = "dla0rdb",
  95                 .sid = TEGRA234_SID_NVDLA0,
  96                 .regs = {
  97                         .sid = {
  98                                 .override = 0x160,
  99                                 .security = 0x164,
 100                         },
 101                 },
 102         }, {
 103                 .id = TEGRA234_MEMORY_CLIENT_DLA0RDB1,
 104                 .name = "dla0rdb1",
 105                 .sid = TEGRA234_SID_NVDLA0,
 106                 .regs = {
 107                         .sid = {
 108                                 .override = 0x168,
 109                                 .security = 0x16c,
 110                         },
 111                 },
 112         }, {
 113                 .id = TEGRA234_MEMORY_CLIENT_DLA0WRB,
 114                 .name = "dla0wrb",
 115                 .sid = TEGRA234_SID_NVDLA0,
 116                 .regs = {
 117                         .sid = {
 118                                 .override = 0x170,
 119                                 .security = 0x174,
 120                         },
 121                 },
 122         }, {
 123                 .id = TEGRA234_MEMORY_CLIENT_DLA1RDB,
 124                 .name = "dla0rdb",
 125                 .sid = TEGRA234_SID_NVDLA1,
 126                 .regs = {
 127                         .sid = {
 128                                 .override = 0x178,
 129                                 .security = 0x17c,
 130                         },
 131                 },
 132         }, {
 133                 .id = TEGRA234_MEMORY_CLIENT_PCIE7AW,
 134                 .name = "pcie7aw",
 135                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
 136                 .type = TEGRA_ICC_NISO,
 137                 .sid = TEGRA234_SID_PCIE7,
 138                 .regs = {
 139                         .sid = {
 140                                 .override = 0x180,
 141                                 .security = 0x184,
 142                         },
 143                 },
 144         }, {
 145                 .id = TEGRA234_MEMORY_CLIENT_PCIE8AR,
 146                 .name = "pcie8ar",
 147                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_8,
 148                 .type = TEGRA_ICC_NISO,
 149                 .sid = TEGRA234_SID_PCIE8,
 150                 .regs = {
 151                         .sid = {
 152                                 .override = 0x190,
 153                                 .security = 0x194,
 154                         },
 155                 },
 156         }, {
 157                 .id = TEGRA234_MEMORY_CLIENT_HDAW,
 158                 .name = "hdaw",
 159                 .bpmp_id = TEGRA_ICC_BPMP_HDA,
 160                 .type = TEGRA_ICC_ISO_AUDIO,
 161                 .sid = TEGRA234_SID_HDA,
 162                 .regs = {
 163                         .sid = {
 164                                 .override = 0x1a8,
 165                                 .security = 0x1ac,
 166                         },
 167                 },
 168         }, {
 169                 .id = TEGRA234_MEMORY_CLIENT_PCIE8AW,
 170                 .name = "pcie8aw",
 171                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_8,
 172                 .type = TEGRA_ICC_NISO,
 173                 .sid = TEGRA234_SID_PCIE8,
 174                 .regs = {
 175                         .sid = {
 176                                 .override = 0x1d8,
 177                                 .security = 0x1dc,
 178                         },
 179                 },
 180         }, {
 181                 .id = TEGRA234_MEMORY_CLIENT_PCIE9AR,
 182                 .name = "pcie9ar",
 183                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_9,
 184                 .type = TEGRA_ICC_NISO,
 185                 .sid = TEGRA234_SID_PCIE9,
 186                 .regs = {
 187                         .sid = {
 188                                 .override = 0x1e0,
 189                                 .security = 0x1e4,
 190                         },
 191                 },
 192         }, {
 193                 .id = TEGRA234_MEMORY_CLIENT_PCIE6AR1,
 194                 .name = "pcie6ar1",
 195                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
 196                 .type = TEGRA_ICC_NISO,
 197                 .sid = TEGRA234_SID_PCIE6,
 198                 .regs = {
 199                         .sid = {
 200                                 .override = 0x1e8,
 201                                 .security = 0x1ec,
 202                         },
 203                 },
 204         }, {
 205                 .id = TEGRA234_MEMORY_CLIENT_PCIE9AW,
 206                 .name = "pcie9aw",
 207                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_9,
 208                 .type = TEGRA_ICC_NISO,
 209                 .sid = TEGRA234_SID_PCIE9,
 210                 .regs = {
 211                         .sid = {
 212                                 .override = 0x1f0,
 213                                 .security = 0x1f4,
 214                         },
 215                 },
 216         }, {
 217                 .id = TEGRA234_MEMORY_CLIENT_PCIE10AR,
 218                 .name = "pcie10ar",
 219                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
 220                 .type = TEGRA_ICC_NISO,
 221                 .sid = TEGRA234_SID_PCIE10,
 222                 .regs = {
 223                         .sid = {
 224                                 .override = 0x1f8,
 225                                 .security = 0x1fc,
 226                         },
 227                 },
 228         }, {
 229                 .id = TEGRA234_MEMORY_CLIENT_PCIE10AW,
 230                 .name = "pcie10aw",
 231                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
 232                 .type = TEGRA_ICC_NISO,
 233                 .sid = TEGRA234_SID_PCIE10,
 234                 .regs = {
 235                         .sid = {
 236                                 .override = 0x200,
 237                                 .security = 0x204,
 238                         },
 239                 },
 240         }, {
 241                 .id = TEGRA234_MEMORY_CLIENT_PCIE10AR1,
 242                 .name = "pcie10ar1",
 243                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
 244                 .type = TEGRA_ICC_NISO,
 245                 .sid = TEGRA234_SID_PCIE10,
 246                 .regs = {
 247                         .sid = {
 248                                 .override = 0x240,
 249                                 .security = 0x244,
 250                         },
 251                 },
 252         }, {
 253                 .id = TEGRA234_MEMORY_CLIENT_PCIE7AR1,
 254                 .name = "pcie7ar1",
 255                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
 256                 .type = TEGRA_ICC_NISO,
 257                 .sid = TEGRA234_SID_PCIE7,
 258                 .regs = {
 259                         .sid = {
 260                                 .override = 0x248,
 261                                 .security = 0x24c,
 262                         },
 263                 },
 264         }, {
 265                 .id = TEGRA234_MEMORY_CLIENT_MGBEARD,
 266                 .name = "mgbeard",
 267                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 268                 .type = TEGRA_ICC_NISO,
 269                 .sid = TEGRA234_SID_MGBE,
 270                 .regs = {
 271                         .sid = {
 272                                 .override = 0x2c0,
 273                                 .security = 0x2c4,
 274                         },
 275                 },
 276         }, {
 277                 .id = TEGRA234_MEMORY_CLIENT_MGBEBRD,
 278                 .name = "mgbebrd",
 279                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 280                 .type = TEGRA_ICC_NISO,
 281                 .sid = TEGRA234_SID_MGBE_VF1,
 282                 .regs = {
 283                         .sid = {
 284                                 .override = 0x2c8,
 285                                 .security = 0x2cc,
 286                         },
 287                 },
 288         }, {
 289                 .id = TEGRA234_MEMORY_CLIENT_MGBECRD,
 290                 .name = "mgbecrd",
 291                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 292                 .type = TEGRA_ICC_NISO,
 293                 .sid = TEGRA234_SID_MGBE_VF2,
 294                 .regs = {
 295                         .sid = {
 296                                 .override = 0x2d0,
 297                                 .security = 0x2d4,
 298                         },
 299                 },
 300         }, {
 301                 .id = TEGRA234_MEMORY_CLIENT_MGBEDRD,
 302                 .name = "mgbedrd",
 303                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 304                 .type = TEGRA_ICC_NISO,
 305                 .sid = TEGRA234_SID_MGBE_VF3,
 306                 .regs = {
 307                         .sid = {
 308                                 .override = 0x2d8,
 309                                 .security = 0x2dc,
 310                         },
 311                 },
 312         }, {
 313                 .id = TEGRA234_MEMORY_CLIENT_MGBEAWR,
 314                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 315                 .type = TEGRA_ICC_NISO,
 316                 .name = "mgbeawr",
 317                 .sid = TEGRA234_SID_MGBE,
 318                 .regs = {
 319                         .sid = {
 320                                 .override = 0x2e0,
 321                                 .security = 0x2e4,
 322                         },
 323                 },
 324         }, {
 325                 .id = TEGRA234_MEMORY_CLIENT_MGBEBWR,
 326                 .name = "mgbebwr",
 327                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 328                 .type = TEGRA_ICC_NISO,
 329                 .sid = TEGRA234_SID_MGBE_VF1,
 330                 .regs = {
 331                         .sid = {
 332                                 .override = 0x2f8,
 333                                 .security = 0x2fc,
 334                         },
 335                 },
 336         }, {
 337                 .id = TEGRA234_MEMORY_CLIENT_MGBECWR,
 338                 .name = "mgbecwr",
 339                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 340                 .type = TEGRA_ICC_NISO,
 341                 .sid = TEGRA234_SID_MGBE_VF2,
 342                 .regs = {
 343                         .sid = {
 344                                 .override = 0x308,
 345                                 .security = 0x30c,
 346                         },
 347                 },
 348         }, {
 349                 .id = TEGRA234_MEMORY_CLIENT_SDMMCRAB,
 350                 .name = "sdmmcrab",
 351                 .bpmp_id = TEGRA_ICC_BPMP_SDMMC_4,
 352                 .type = TEGRA_ICC_NISO,
 353                 .sid = TEGRA234_SID_SDMMC4,
 354                 .regs = {
 355                         .sid = {
 356                                 .override = 0x318,
 357                                 .security = 0x31c,
 358                         },
 359                 },
 360         }, {
 361                 .id = TEGRA234_MEMORY_CLIENT_MGBEDWR,
 362                 .name = "mgbedwr",
 363                 .bpmp_id = TEGRA_ICC_BPMP_EQOS,
 364                 .type = TEGRA_ICC_NISO,
 365                 .sid = TEGRA234_SID_MGBE_VF3,
 366                 .regs = {
 367                         .sid = {
 368                                 .override = 0x328,
 369                                 .security = 0x32c,
 370                         },
 371                 },
 372         }, {
 373                 .id = TEGRA234_MEMORY_CLIENT_SDMMCWAB,
 374                 .name = "sdmmcwab",
 375                 .bpmp_id = TEGRA_ICC_BPMP_SDMMC_4,
 376                 .type = TEGRA_ICC_NISO,
 377                 .sid = TEGRA234_SID_SDMMC4,
 378                 .regs = {
 379                         .sid = {
 380                                 .override = 0x338,
 381                                 .security = 0x33c,
 382                         },
 383                 },
 384         }, {
 385                 .id = TEGRA234_MEMORY_CLIENT_VICSRD,
 386                 .name = "vicsrd",
 387                 .bpmp_id = TEGRA_ICC_BPMP_VIC,
 388                 .type = TEGRA_ICC_NISO,
 389                 .sid = TEGRA234_SID_VIC,
 390                 .regs = {
 391                         .sid = {
 392                                 .override = 0x360,
 393                                 .security = 0x364,
 394                         },
 395                 },
 396         }, {
 397                 .id = TEGRA234_MEMORY_CLIENT_VICSWR,
 398                 .name = "vicswr",
 399                 .bpmp_id = TEGRA_ICC_BPMP_VIC,
 400                 .type = TEGRA_ICC_NISO,
 401                 .sid = TEGRA234_SID_VIC,
 402                 .regs = {
 403                         .sid = {
 404                                 .override = 0x368,
 405                                 .security = 0x36c,
 406                         },
 407                 },
 408         }, {
 409                 .id = TEGRA234_MEMORY_CLIENT_DLA1RDB1,
 410                 .name = "dla0rdb1",
 411                 .sid = TEGRA234_SID_NVDLA1,
 412                 .regs = {
 413                         .sid = {
 414                                 .override = 0x370,
 415                                 .security = 0x374,
 416                         },
 417                 },
 418         }, {
 419                 .id = TEGRA234_MEMORY_CLIENT_DLA1WRB,
 420                 .name = "dla0wrb",
 421                 .sid = TEGRA234_SID_NVDLA1,
 422                 .regs = {
 423                         .sid = {
 424                                 .override = 0x378,
 425                                 .security = 0x37c,
 426                         },
 427                 },
 428         }, {
 429                 .id = TEGRA234_MEMORY_CLIENT_VI2W,
 430                 .name = "vi2w",
 431                 .bpmp_id = TEGRA_ICC_BPMP_VI2,
 432                 .type = TEGRA_ICC_ISO_VI,
 433                 .sid = TEGRA234_SID_ISO_VI2,
 434                 .regs = {
 435                         .sid = {
 436                                 .override = 0x380,
 437                                 .security = 0x384,
 438                         },
 439                 },
 440         }, {
 441                 .id = TEGRA234_MEMORY_CLIENT_VI2FALR,
 442                 .name = "vi2falr",
 443                 .bpmp_id = TEGRA_ICC_BPMP_VI2FAL,
 444                 .type = TEGRA_ICC_ISO_VIFAL,
 445                 .sid = TEGRA234_SID_ISO_VI2FALC,
 446                 .regs = {
 447                         .sid = {
 448                                 .override = 0x388,
 449                                 .security = 0x38c,
 450                         },
 451                 },
 452         }, {
 453                 .id = TEGRA234_MEMORY_CLIENT_NVDECSRD,
 454                 .name = "nvdecsrd",
 455                 .bpmp_id = TEGRA_ICC_BPMP_NVDEC,
 456                 .type = TEGRA_ICC_NISO,
 457                 .sid = TEGRA234_SID_NVDEC,
 458                 .regs = {
 459                         .sid = {
 460                                 .override = 0x3c0,
 461                                 .security = 0x3c4,
 462                         },
 463                 },
 464         }, {
 465                 .id = TEGRA234_MEMORY_CLIENT_NVDECSWR,
 466                 .name = "nvdecswr",
 467                 .bpmp_id = TEGRA_ICC_BPMP_NVDEC,
 468                 .type = TEGRA_ICC_NISO,
 469                 .sid = TEGRA234_SID_NVDEC,
 470                 .regs = {
 471                         .sid = {
 472                                 .override = 0x3c8,
 473                                 .security = 0x3cc,
 474                         },
 475                 },
 476         }, {
 477                 .id = TEGRA234_MEMORY_CLIENT_APER,
 478                 .name = "aper",
 479                 .bpmp_id = TEGRA_ICC_BPMP_APE,
 480                 .type = TEGRA_ICC_ISO_AUDIO,
 481                 .sid = TEGRA234_SID_APE,
 482                 .regs = {
 483                         .sid = {
 484                                 .override = 0x3d0,
 485                                 .security = 0x3d4,
 486                         },
 487                 },
 488         }, {
 489                 .id = TEGRA234_MEMORY_CLIENT_APEW,
 490                 .name = "apew",
 491                 .bpmp_id = TEGRA_ICC_BPMP_APE,
 492                 .type = TEGRA_ICC_ISO_AUDIO,
 493                 .sid = TEGRA234_SID_APE,
 494                 .regs = {
 495                         .sid = {
 496                                 .override = 0x3d8,
 497                                 .security = 0x3dc,
 498                         },
 499                 },
 500         }, {
 501                 .id = TEGRA234_MEMORY_CLIENT_VI2FALW,
 502                 .name = "vi2falw",
 503                 .bpmp_id = TEGRA_ICC_BPMP_VI2FAL,
 504                 .type = TEGRA_ICC_ISO_VIFAL,
 505                 .sid = TEGRA234_SID_ISO_VI2FALC,
 506                 .regs = {
 507                         .sid = {
 508                                 .override = 0x3e0,
 509                                 .security = 0x3e4,
 510                         },
 511                 },
 512         }, {
 513                 .id = TEGRA234_MEMORY_CLIENT_NVJPGSRD,
 514                 .name = "nvjpgsrd",
 515                 .bpmp_id = TEGRA_ICC_BPMP_NVJPG_0,
 516                 .type = TEGRA_ICC_NISO,
 517                 .sid = TEGRA234_SID_NVJPG,
 518                 .regs = {
 519                         .sid = {
 520                                 .override = 0x3f0,
 521                                 .security = 0x3f4,
 522                         },
 523                 },
 524         }, {
 525                 .id = TEGRA234_MEMORY_CLIENT_NVJPGSWR,
 526                 .name = "nvjpgswr",
 527                 .bpmp_id = TEGRA_ICC_BPMP_NVJPG_0,
 528                 .type = TEGRA_ICC_NISO,
 529                 .sid = TEGRA234_SID_NVJPG,
 530                         .regs = {
 531                         .sid = {
 532                                 .override = 0x3f8,
 533                                 .security = 0x3fc,
 534                         },
 535                 },
 536         }, {
 537                 .id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR,
 538                 .name = "nvdisplayr",
 539                 .bpmp_id = TEGRA_ICC_BPMP_DISPLAY,
 540                 .type = TEGRA_ICC_ISO_DISPLAY,
 541                 .sid = TEGRA234_SID_ISO_NVDISPLAY,
 542                 .regs = {
 543                         .sid = {
 544                                 .override = 0x490,
 545                                 .security = 0x494,
 546                         },
 547                 },
 548         }, {
 549                 .id = TEGRA234_MEMORY_CLIENT_BPMPR,
 550                 .name = "bpmpr",
 551                 .sid = TEGRA234_SID_BPMP,
 552                 .regs = {
 553                         .sid = {
 554                                 .override = 0x498,
 555                                 .security = 0x49c,
 556                         },
 557                 },
 558         }, {
 559                 .id = TEGRA234_MEMORY_CLIENT_BPMPW,
 560                 .name = "bpmpw",
 561                 .sid = TEGRA234_SID_BPMP,
 562                 .regs = {
 563                         .sid = {
 564                                 .override = 0x4a0,
 565                                 .security = 0x4a4,
 566                         },
 567                 },
 568         }, {
 569                 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAR,
 570                 .name = "bpmpdmar",
 571                 .sid = TEGRA234_SID_BPMP,
 572                 .regs = {
 573                         .sid = {
 574                                 .override = 0x4a8,
 575                                 .security = 0x4ac,
 576                         },
 577                 },
 578         }, {
 579                 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAW,
 580                 .name = "bpmpdmaw",
 581                 .sid = TEGRA234_SID_BPMP,
 582                 .regs = {
 583                         .sid = {
 584                                 .override = 0x4b0,
 585                                 .security = 0x4b4,
 586                         },
 587                 },
 588         }, {
 589                 .id = TEGRA234_MEMORY_CLIENT_APEDMAR,
 590                 .name = "apedmar",
 591                 .bpmp_id = TEGRA_ICC_BPMP_APEDMA,
 592                 .type = TEGRA_ICC_ISO_AUDIO,
 593                 .sid = TEGRA234_SID_APE,
 594                 .regs = {
 595                         .sid = {
 596                                 .override = 0x4f8,
 597                                 .security = 0x4fc,
 598                         },
 599                 },
 600         }, {
 601                 .id = TEGRA234_MEMORY_CLIENT_APEDMAW,
 602                 .name = "apedmaw",
 603                 .bpmp_id = TEGRA_ICC_BPMP_APEDMA,
 604                 .type = TEGRA_ICC_ISO_AUDIO,
 605                 .sid = TEGRA234_SID_APE,
 606                 .regs = {
 607                         .sid = {
 608                                 .override = 0x500,
 609                                 .security = 0x504,
 610                         },
 611                 },
 612         }, {
 613                 .id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR1,
 614                 .name = "nvdisplayr1",
 615                 .bpmp_id = TEGRA_ICC_BPMP_DISPLAY,
 616                 .type = TEGRA_ICC_ISO_DISPLAY,
 617                 .sid = TEGRA234_SID_ISO_NVDISPLAY,
 618                 .regs = {
 619                         .sid = {
 620                                 .override = 0x508,
 621                                 .security = 0x50c,
 622                         },
 623                 },
 624         }, {
 625                 .id = TEGRA234_MEMORY_CLIENT_DLA0RDA,
 626                 .name = "dla0rda",
 627                 .sid = TEGRA234_SID_NVDLA0,
 628                 .regs = {
 629                         .sid = {
 630                                 .override = 0x5f0,
 631                                 .security = 0x5f4,
 632                         },
 633                 },
 634         }, {
 635                 .id = TEGRA234_MEMORY_CLIENT_DLA0FALRDB,
 636                 .name = "dla0falrdb",
 637                 .sid = TEGRA234_SID_NVDLA0,
 638                 .regs = {
 639                         .sid = {
 640                                 .override = 0x5f8,
 641                                 .security = 0x5fc,
 642                         },
 643                 },
 644         }, {
 645                 .id = TEGRA234_MEMORY_CLIENT_DLA0WRA,
 646                 .name = "dla0wra",
 647                 .sid = TEGRA234_SID_NVDLA0,
 648                 .regs = {
 649                         .sid = {
 650                                 .override = 0x600,
 651                                 .security = 0x604,
 652                         },
 653                 },
 654         }, {
 655                 .id = TEGRA234_MEMORY_CLIENT_DLA0FALWRB,
 656                 .name = "dla0falwrb",
 657                 .sid = TEGRA234_SID_NVDLA0,
 658                 .regs = {
 659                         .sid = {
 660                                 .override = 0x608,
 661                                 .security = 0x60c,
 662                         },
 663                 },
 664         }, {
 665                 .id = TEGRA234_MEMORY_CLIENT_DLA1RDA,
 666                 .name = "dla0rda",
 667                 .sid = TEGRA234_SID_NVDLA1,
 668                 .regs = {
 669                         .sid = {
 670                                 .override = 0x610,
 671                                 .security = 0x614,
 672                         },
 673                 },
 674         }, {
 675                 .id = TEGRA234_MEMORY_CLIENT_DLA1FALRDB,
 676                 .name = "dla0falrdb",
 677                 .sid = TEGRA234_SID_NVDLA1,
 678                 .regs = {
 679                         .sid = {
 680                                 .override = 0x618,
 681                                 .security = 0x61c,
 682                         },
 683                 },
 684         }, {
 685                 .id = TEGRA234_MEMORY_CLIENT_DLA1WRA,
 686                 .name = "dla0wra",
 687                 .sid = TEGRA234_SID_NVDLA1,
 688                 .regs = {
 689                         .sid = {
 690                                 .override = 0x620,
 691                                 .security = 0x624,
 692                         },
 693                 },
 694         }, {
 695                 .id = TEGRA234_MEMORY_CLIENT_DLA1FALWRB,
 696                 .name = "dla0falwrb",
 697                 .sid = TEGRA234_SID_NVDLA1,
 698                 .regs = {
 699                         .sid = {
 700                                 .override = 0x628,
 701                                 .security = 0x62c,
 702                         },
 703                 },
 704         }, {
 705                 .id = TEGRA234_MEMORY_CLIENT_PCIE0R,
 706                 .name = "pcie0r",
 707                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_0,
 708                 .type = TEGRA_ICC_NISO,
 709                 .sid = TEGRA234_SID_PCIE0,
 710                 .regs = {
 711                         .sid = {
 712                                 .override = 0x6c0,
 713                                 .security = 0x6c4,
 714                         },
 715                 },
 716         }, {
 717                 .id = TEGRA234_MEMORY_CLIENT_PCIE0W,
 718                 .name = "pcie0w",
 719                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_0,
 720                 .type = TEGRA_ICC_NISO,
 721                 .sid = TEGRA234_SID_PCIE0,
 722                 .regs = {
 723                         .sid = {
 724                                 .override = 0x6c8,
 725                                 .security = 0x6cc,
 726                         },
 727                 },
 728         }, {
 729                 .id = TEGRA234_MEMORY_CLIENT_PCIE1R,
 730                 .name = "pcie1r",
 731                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_1,
 732                 .type = TEGRA_ICC_NISO,
 733                 .sid = TEGRA234_SID_PCIE1,
 734                 .regs = {
 735                         .sid = {
 736                                 .override = 0x6d0,
 737                                 .security = 0x6d4,
 738                         },
 739                 },
 740         }, {
 741                 .id = TEGRA234_MEMORY_CLIENT_PCIE1W,
 742                 .name = "pcie1w",
 743                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_1,
 744                 .type = TEGRA_ICC_NISO,
 745                 .sid = TEGRA234_SID_PCIE1,
 746                 .regs = {
 747                         .sid = {
 748                                 .override = 0x6d8,
 749                                 .security = 0x6dc,
 750                         },
 751                 },
 752         }, {
 753                 .id = TEGRA234_MEMORY_CLIENT_PCIE2AR,
 754                 .name = "pcie2ar",
 755                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_2,
 756                 .type = TEGRA_ICC_NISO,
 757                 .sid = TEGRA234_SID_PCIE2,
 758                 .regs = {
 759                         .sid = {
 760                                 .override = 0x6e0,
 761                                 .security = 0x6e4,
 762                         },
 763                 },
 764         }, {
 765                 .id = TEGRA234_MEMORY_CLIENT_PCIE2AW,
 766                 .name = "pcie2aw",
 767                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_2,
 768                 .type = TEGRA_ICC_NISO,
 769                 .sid = TEGRA234_SID_PCIE2,
 770                 .regs = {
 771                         .sid = {
 772                                 .override = 0x6e8,
 773                                 .security = 0x6ec,
 774                         },
 775                 },
 776         }, {
 777                 .id = TEGRA234_MEMORY_CLIENT_PCIE3R,
 778                 .name = "pcie3r",
 779                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_3,
 780                 .type = TEGRA_ICC_NISO,
 781                 .sid = TEGRA234_SID_PCIE3,
 782                 .regs = {
 783                         .sid = {
 784                                 .override = 0x6f0,
 785                                 .security = 0x6f4,
 786                         },
 787                 },
 788         }, {
 789                 .id = TEGRA234_MEMORY_CLIENT_PCIE3W,
 790                 .name = "pcie3w",
 791                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_3,
 792                 .type = TEGRA_ICC_NISO,
 793                 .sid = TEGRA234_SID_PCIE3,
 794                 .regs = {
 795                         .sid = {
 796                                 .override = 0x6f8,
 797                                 .security = 0x6fc,
 798                         },
 799                 },
 800         }, {
 801                 .id = TEGRA234_MEMORY_CLIENT_PCIE4R,
 802                 .name = "pcie4r",
 803                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_4,
 804                 .type = TEGRA_ICC_NISO,
 805                 .sid = TEGRA234_SID_PCIE4,
 806                 .regs = {
 807                         .sid = {
 808                                 .override = 0x700,
 809                                 .security = 0x704,
 810                         },
 811                 },
 812         }, {
 813                 .id = TEGRA234_MEMORY_CLIENT_PCIE4W,
 814                 .name = "pcie4w",
 815                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_4,
 816                 .type = TEGRA_ICC_NISO,
 817                 .sid = TEGRA234_SID_PCIE4,
 818                 .regs = {
 819                         .sid = {
 820                                 .override = 0x708,
 821                                 .security = 0x70c,
 822                         },
 823                 },
 824         }, {
 825                 .id = TEGRA234_MEMORY_CLIENT_PCIE5R,
 826                 .name = "pcie5r",
 827                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
 828                 .type = TEGRA_ICC_NISO,
 829                 .sid = TEGRA234_SID_PCIE5,
 830                 .regs = {
 831                         .sid = {
 832                                 .override = 0x710,
 833                                 .security = 0x714,
 834                         },
 835                 },
 836         }, {
 837                 .id = TEGRA234_MEMORY_CLIENT_PCIE5W,
 838                 .name = "pcie5w",
 839                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
 840                 .type = TEGRA_ICC_NISO,
 841                 .sid = TEGRA234_SID_PCIE5,
 842                 .regs = {
 843                         .sid = {
 844                                 .override = 0x718,
 845                                 .security = 0x71c,
 846                         },
 847                 },
 848         }, {
 849                 .id = TEGRA234_MEMORY_CLIENT_DLA0RDA1,
 850                 .name = "dla0rda1",
 851                 .sid = TEGRA234_SID_NVDLA0,
 852                 .regs = {
 853                         .sid = {
 854                                 .override = 0x748,
 855                                 .security = 0x74c,
 856                         },
 857                 },
 858         }, {
 859                 .id = TEGRA234_MEMORY_CLIENT_DLA1RDA1,
 860                 .name = "dla0rda1",
 861                 .sid = TEGRA234_SID_NVDLA1,
 862                 .regs = {
 863                         .sid = {
 864                                 .override = 0x750,
 865                                 .security = 0x754,
 866                         },
 867                 },
 868         }, {
 869                 .id = TEGRA234_MEMORY_CLIENT_PCIE5R1,
 870                 .name = "pcie5r1",
 871                 .bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
 872                 .type = TEGRA_ICC_NISO,
 873                 .sid = TEGRA234_SID_PCIE5,
 874                 .regs = {
 875                         .sid = {
 876                                 .override = 0x778,
 877                                 .security = 0x77c,
 878                         },
 879                 },
 880         }, {
 881                 .id = TEGRA234_MEMORY_CLIENT_NVJPG1SRD,
 882                 .name = "nvjpg1srd",
 883                 .bpmp_id = TEGRA_ICC_BPMP_NVJPG_1,
 884                 .type = TEGRA_ICC_NISO,
 885                 .sid = TEGRA234_SID_NVJPG1,
 886                 .regs = {
 887                         .sid = {
 888                                 .override = 0x918,
 889                                 .security = 0x91c,
 890                         },
 891                 },
 892         }, {
 893                 .id = TEGRA234_MEMORY_CLIENT_NVJPG1SWR,
 894                 .name = "nvjpg1swr",
 895                 .bpmp_id = TEGRA_ICC_BPMP_NVJPG_1,
 896                 .type = TEGRA_ICC_NISO,
 897                 .sid = TEGRA234_SID_NVJPG1,
 898                 .regs = {
 899                         .sid = {
 900                                 .override = 0x920,
 901                                 .security = 0x924,
 902                         },
 903                 },
 904         }, {
 905                 .id = TEGRA_ICC_MC_CPU_CLUSTER0,
 906                 .name = "sw_cluster0",
 907                 .bpmp_id = TEGRA_ICC_BPMP_CPU_CLUSTER0,
 908                 .type = TEGRA_ICC_NISO,
 909         }, {
 910                 .id = TEGRA_ICC_MC_CPU_CLUSTER1,
 911                 .name = "sw_cluster1",
 912                 .bpmp_id = TEGRA_ICC_BPMP_CPU_CLUSTER1,
 913                 .type = TEGRA_ICC_NISO,
 914         }, {
 915                 .id = TEGRA_ICC_MC_CPU_CLUSTER2,
 916                 .name = "sw_cluster2",
 917                 .bpmp_id = TEGRA_ICC_BPMP_CPU_CLUSTER2,
 918                 .type = TEGRA_ICC_NISO,
 919         }, {
 920                 .id = TEGRA234_MEMORY_CLIENT_NVL1R,
 921                 .name = "nvl1r",
 922                 .bpmp_id = TEGRA_ICC_BPMP_GPU,
 923                 .type = TEGRA_ICC_NISO,
 924         }, {
 925                 .id = TEGRA234_MEMORY_CLIENT_NVL1W,
 926                 .name = "nvl1w",
 927                 .bpmp_id = TEGRA_ICC_BPMP_GPU,
 928                 .type = TEGRA_ICC_NISO,
 929         },
 930 };
 931
 932 /*
 933  * tegra234_mc_icc_set() - Pass MC client info to the BPMP-FW
 934  * @src: ICC node for Memory Controller's (MC) Client
 935  * @dst: ICC node for Memory Controller (MC)
 936  *
 937  * Passing the current request info from the MC to the BPMP-FW where
 938  * LA and PTSA registers are accessed and the final EMC freq is set
 939  * based on client_id, type, latency and bandwidth.
 940  * icc_set_bw() makes set_bw calls for both MC and EMC providers in
 941  * sequence. Both the calls are protected by 'mutex_lock(&icc_lock)'.
 942  * So, the data passed won't be updated by concurrent set calls from
 943  * other clients.
 944  */
 945 static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst)
 946 {
 947         struct tegra_mc *mc = icc_provider_to_tegra_mc(dst->provider);
 948         struct mrq_bwmgr_int_request bwmgr_req = { 0 };
 949         struct mrq_bwmgr_int_response bwmgr_resp = { 0 };
 950         const struct tegra_mc_client *pclient = src->data;
 951         struct tegra_bpmp_message msg;
 952         int ret;
 953
 954         /*
 955          * Same Src and Dst node will happen during boot from icc_node_add().
 956          * This can be used to pre-initialize and set bandwidth for all clients
 957          * before their drivers are loaded. We are skipping this case as for us,
 958          * the pre-initialization already happened in Bootloader(MB2) and BPMP-FW.
 959          */
 960         if (src->id == dst->id)
 961                 return 0;
 962
 963         if (!mc->bwmgr_mrq_supported)
 964                 return 0;
 965
 966         if (!mc->bpmp) {
 967                 dev_err(mc->dev, "BPMP reference NULL\n");
 968                 return -ENOENT;
 969         }
 970
 971         if (pclient->type == TEGRA_ICC_NISO)
 972                 bwmgr_req.bwmgr_calc_set_req.niso_bw = src->avg_bw;
 973         else
 974                 bwmgr_req.bwmgr_calc_set_req.iso_bw = src->avg_bw;
 975
 976         bwmgr_req.bwmgr_calc_set_req.client_id = pclient->bpmp_id;
 977
 978         bwmgr_req.cmd = CMD_BWMGR_INT_CALC_AND_SET;
 979         bwmgr_req.bwmgr_calc_set_req.mc_floor = src->peak_bw;
 980         bwmgr_req.bwmgr_calc_set_req.floor_unit = BWMGR_INT_UNIT_KBPS;
 981
 982         memset(&msg, 0, sizeof(msg));
 983         msg.mrq = MRQ_BWMGR_INT;
 984         msg.tx.data = &bwmgr_req;
 985         msg.tx.size = sizeof(bwmgr_req);
 986         msg.rx.data = &bwmgr_resp;
 987         msg.rx.size = sizeof(bwmgr_resp);
 988
 989         ret = tegra_bpmp_transfer(mc->bpmp, &msg);
 990         if (ret < 0) {
 991                 dev_err(mc->dev, "BPMP transfer failed: %d\n", ret);
 992                 goto error;
 993         }
 994         if (msg.rx.ret < 0) {
 995                 pr_err("failed to set bandwidth for %u: %d\n",
 996                        bwmgr_req.bwmgr_calc_set_req.client_id, msg.rx.ret);
 997                 ret = -EINVAL;
 998         }
 999
1000 error:
1001         return ret;
1002 }
1003
1004 static int tegra234_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
1005                                      u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
1006 {
1007         struct icc_provider *p = node->provider;
1008         struct tegra_mc *mc = icc_provider_to_tegra_mc(p);
1009
1010         if (!mc->bwmgr_mrq_supported)
1011                 return 0;
1012
1013         if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 ||
1014             node->id == TEGRA_ICC_MC_CPU_CLUSTER1 ||
1015             node->id == TEGRA_ICC_MC_CPU_CLUSTER2) {
1016                 if (mc)
1017                         peak_bw = peak_bw * mc->num_channels;
1018         }
1019
1020         *agg_avg += avg_bw;
1021         *agg_peak = max(*agg_peak, peak_bw);
1022
1023         return 0;
1024 }
1025
1026 static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *peak)
1027 {
1028         *avg = 0;
1029         *peak = 0;
1030
1031         return 0;
1032 }
1033
1034 static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = {
1035         .xlate = tegra_mc_icc_xlate,
1036         .aggregate = tegra234_mc_icc_aggregate,
1037         .get_bw = tegra234_mc_icc_get_init_bw,
1038         .set = tegra234_mc_icc_set,
1039 };
1040
1041 const struct tegra_mc_soc tegra234_mc_soc = {
1042         .num_clients = ARRAY_SIZE(tegra234_mc_clients),
1043         .clients = tegra234_mc_clients,
1044         .num_address_bits = 40,
1045         .num_channels = 16,
1046         .client_id_mask = 0x1ff,
1047         .intmask = MC_INT_DECERR_ROUTE_SANITY |
1048                    MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
1049                    MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
1050                    MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
1051         .has_addr_hi_reg = true,
1052         .ops = &tegra186_mc_ops,
1053         .icc_ops = &tegra234_mc_icc_ops,
1054         .ch_intmask = 0x0000ff00,
1055         .global_intstatus_channel_shift = 8,
1056         /*
1057          * Additionally, there are lite carveouts but those are not currently
1058          * supported.
1059          */
1060         .num_carveouts = 32,
1061 };