drivers/media/video/cx88/cx88-mpeg.c

   1 /*
   2  *
   3  *  Support for the mpeg transport stream transfers
   4  *  PCI function #2 of the cx2388x.
   5  *
   6  *    (c) 2004 Jelle Foks <jelle@foks.8m.com>
   7  *    (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
   8  *    (c) 2004 Gerd Knorr <kraxel@bytesex.org>
   9  *
  10  *  This program is free software; you can redistribute it and/or modify
  11  *  it under the terms of the GNU General Public License as published by
  12  *  the Free Software Foundation; either version 2 of the License, or
  13  *  (at your option) any later version.
  14  *
  15  *  This program is distributed in the hope that it will be useful,
  16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *  GNU General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU General Public License
  21  *  along with this program; if not, write to the Free Software
  22  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/moduleparam.h>
  27 #include <linux/init.h>
  28 #include <linux/device.h>
  29 #include <linux/interrupt.h>
  30 #include <asm/delay.h>
  31
  32 #include "cx88.h"
  33
  34 /* ------------------------------------------------------------------ */
  35
  36 MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards");
  37 MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>");
  38 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  39 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  40 MODULE_LICENSE("GPL");
  41
  42 static unsigned int debug = 0;
  43 module_param(debug,int,0644);
  44 MODULE_PARM_DESC(debug,"enable debug messages [mpeg]");
  45
  46 #define dprintk(level,fmt, arg...)      if (debug >= level) \
  47         printk(KERN_DEBUG "%s/2: " fmt, dev->core->name , ## arg)
  48
  49 /* ------------------------------------------------------------------ */
  50
  51 static int cx8802_start_dma(struct cx8802_dev    *dev,
  52                             struct cx88_dmaqueue *q,
  53                             struct cx88_buffer   *buf)
  54 {
  55         struct cx88_core *core = dev->core;
  56
  57         dprintk(0, "cx8802_start_dma w: %d, h: %d, f: %d\n", dev->width, dev->height, buf->vb.field);
  58
  59         /* setup fifo + format */
  60         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],
  61                                 dev->ts_packet_size, buf->risc.dma);
  62
  63         /* write TS length to chip */
  64         cx_write(MO_TS_LNGTH, buf->vb.width);
  65
  66         /* FIXME: this needs a review.
  67          * also: move to cx88-blackbird + cx88-dvb source files? */
  68
  69         if (cx88_boards[core->board].dvb) {
  70                 /* negedge driven & software reset */
  71                 cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl);
  72                 udelay(100);
  73                 cx_write(MO_PINMUX_IO, 0x00);
  74                 cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01);
  75                 switch (core->board) {
  76                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  77                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  78                 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  79                 case CX88_BOARD_PCHDTV_HD5500:
  80                         cx_write(TS_SOP_STAT, 1<<13);
  81                         break;
  82                 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  83                 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  84                         cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */
  85                         udelay(100);
  86                         break;
  87                 default:
  88                         cx_write(TS_SOP_STAT, 0x00);
  89                         break;
  90                 }
  91                 cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);
  92                 udelay(100);
  93         }
  94
  95         if (cx88_boards[core->board].blackbird) {
  96                 cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */
  97
  98                 cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */
  99                 udelay(100);
 100
 101                 cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */
 102                 cx_write(TS_VALERR_CNTRL, 0x2000);
 103
 104                 cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */
 105                 udelay(100);
 106         }
 107
 108         /* reset counter */
 109         cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);
 110         q->count = 1;
 111
 112         /* enable irqs */
 113         dprintk( 0, "setting the interrupt mask\n" );
 114         cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04);
 115         cx_set(MO_TS_INTMSK,  0x1f0011);
 116
 117         /* start dma */
 118         cx_set(MO_DEV_CNTRL2, (1<<5));
 119         cx_set(MO_TS_DMACNTRL, 0x11);
 120         return 0;
 121 }
 122
 123 static int cx8802_stop_dma(struct cx8802_dev *dev)
 124 {
 125         struct cx88_core *core = dev->core;
 126         dprintk( 0, "cx8802_stop_dma\n" );
 127
 128         /* stop dma */
 129         cx_clear(MO_TS_DMACNTRL, 0x11);
 130
 131         /* disable irqs */
 132         cx_clear(MO_PCI_INTMSK, 0x000004);
 133         cx_clear(MO_TS_INTMSK, 0x1f0011);
 134
 135         /* Reset the controller */
 136         cx_write(TS_GEN_CNTRL, 0xcd);
 137         return 0;
 138 }
 139
 140 static int cx8802_restart_queue(struct cx8802_dev    *dev,
 141                                 struct cx88_dmaqueue *q)
 142 {
 143         struct cx88_buffer *buf;
 144         struct list_head *item;
 145
 146         dprintk( 0, "cx8802_restart_queue\n" );
 147         if (list_empty(&q->active))
 148         {
 149                 dprintk( 0, "cx8802_restart_queue: queue is empty\n" );
 150                 return 0;
 151         }
 152
 153         buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
 154         dprintk(2,"restart_queue [%p/%d]: restart dma\n",
 155                 buf, buf->vb.i);
 156         cx8802_start_dma(dev, q, buf);
 157         list_for_each(item,&q->active) {
 158                 buf = list_entry(item, struct cx88_buffer, vb.queue);
 159                 buf->count = q->count++;
 160         }
 161         mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
 162         return 0;
 163 }
 164
 165 /* ------------------------------------------------------------------ */
 166
 167 int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
 168                         struct cx88_buffer *buf, enum v4l2_field field)
 169 {
 170         int size = dev->ts_packet_size * dev->ts_packet_count;
 171         int rc;
 172
 173         dprintk(1, "%s: %p\n", __FUNCTION__, buf);
 174         if (0 != buf->vb.baddr  &&  buf->vb.bsize < size)
 175                 return -EINVAL;
 176
 177         if (STATE_NEEDS_INIT == buf->vb.state) {
 178                 buf->vb.width  = dev->ts_packet_size;
 179                 buf->vb.height = dev->ts_packet_count;
 180                 buf->vb.size   = size;
 181                 buf->vb.field  = field /*V4L2_FIELD_TOP*/;
 182
 183                 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
 184                         goto fail;
 185                 cx88_risc_databuffer(dev->pci, &buf->risc,
 186                                      buf->vb.dma.sglist,
 187                                      buf->vb.width, buf->vb.height);
 188         }
 189         buf->vb.state = STATE_PREPARED;
 190         return 0;
 191
 192  fail:
 193         cx88_free_buffer(q,buf);
 194         return rc;
 195 }
 196
 197 void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf)
 198 {
 199         struct cx88_buffer    *prev;
 200         struct cx88_dmaqueue  *cx88q = &dev->mpegq;
 201
 202         dprintk( 1, "cx8802_buf_queue\n" );
 203         /* add jump to stopper */
 204         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
 205         buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma);
 206
 207         if (list_empty(&cx88q->active)) {
 208                 dprintk( 0, "queue is empty - first active\n" );
 209                 list_add_tail(&buf->vb.queue,&cx88q->active);
 210                 cx8802_start_dma(dev, cx88q, buf);
 211                 buf->vb.state = STATE_ACTIVE;
 212                 buf->count    = cx88q->count++;
 213                 mod_timer(&cx88q->timeout, jiffies+BUFFER_TIMEOUT);
 214                 dprintk(0,"[%p/%d] %s - first active\n",
 215                         buf, buf->vb.i, __FUNCTION__);
 216
 217         } else {
 218                 dprintk( 1, "queue is not empty - append to active\n" );
 219                 prev = list_entry(cx88q->active.prev, struct cx88_buffer, vb.queue);
 220                 list_add_tail(&buf->vb.queue,&cx88q->active);
 221                 buf->vb.state = STATE_ACTIVE;
 222                 buf->count    = cx88q->count++;
 223                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 224                 dprintk( 1, "[%p/%d] %s - append to active\n",
 225                         buf, buf->vb.i, __FUNCTION__);
 226         }
 227 }
 228
 229 /* ----------------------------------------------------------- */
 230
 231 static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart)
 232 {
 233         struct cx88_dmaqueue *q = &dev->mpegq;
 234         struct cx88_buffer *buf;
 235         unsigned long flags;
 236
 237         spin_lock_irqsave(&dev->slock,flags);
 238         while (!list_empty(&q->active)) {
 239                 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
 240                 list_del(&buf->vb.queue);
 241                 buf->vb.state = STATE_ERROR;
 242                 wake_up(&buf->vb.done);
 243                 dprintk(1,"[%p/%d] %s - dma=0x%08lx\n",
 244                         buf, buf->vb.i, reason, (unsigned long)buf->risc.dma);
 245         }
 246         if (restart)
 247         {
 248                 dprintk(0, "restarting queue\n" );
 249                 cx8802_restart_queue(dev,q);
 250         }
 251         spin_unlock_irqrestore(&dev->slock,flags);
 252 }
 253
 254 void cx8802_cancel_buffers(struct cx8802_dev *dev)
 255 {
 256         struct cx88_dmaqueue *q = &dev->mpegq;
 257
 258         dprintk( 1, "cx8802_cancel_buffers" );
 259         del_timer_sync(&q->timeout);
 260         cx8802_stop_dma(dev);
 261         do_cancel_buffers(dev,"cancel",0);
 262 }
 263
 264 static void cx8802_timeout(unsigned long data)
 265 {
 266         struct cx8802_dev *dev = (struct cx8802_dev*)data;
 267
 268         dprintk(0, "%s\n",__FUNCTION__);
 269
 270         if (debug)
 271                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
 272         cx8802_stop_dma(dev);
 273         do_cancel_buffers(dev,"timeout",1);
 274 }
 275
 276 static char *cx88_mpeg_irqs[32] = {
 277         "ts_risci1", NULL, NULL, NULL,
 278         "ts_risci2", NULL, NULL, NULL,
 279         "ts_oflow",  NULL, NULL, NULL,
 280         "ts_sync",   NULL, NULL, NULL,
 281         "opc_err", "par_err", "rip_err", "pci_abort",
 282         "ts_err?",
 283 };
 284
 285 static void cx8802_mpeg_irq(struct cx8802_dev *dev)
 286 {
 287         struct cx88_core *core = dev->core;
 288         u32 status, mask, count;
 289
 290         dprintk( 1, "cx8802_mpeg_irq\n" );
 291         status = cx_read(MO_TS_INTSTAT);
 292         mask   = cx_read(MO_TS_INTMSK);
 293         if (0 == (status & mask))
 294                 return;
 295
 296         cx_write(MO_TS_INTSTAT, status);
 297
 298         if (debug || (status & mask & ~0xff))
 299                 cx88_print_irqbits(core->name, "irq mpeg ",
 300                                    cx88_mpeg_irqs, status, mask);
 301
 302         /* risc op code error */
 303         if (status & (1 << 16)) {
 304                 printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name);
 305                 cx_clear(MO_TS_DMACNTRL, 0x11);
 306                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
 307         }
 308
 309         /* risc1 y */
 310         if (status & 0x01) {
 311                 dprintk( 1, "wake up\n" );
 312                 spin_lock(&dev->slock);
 313                 count = cx_read(MO_TS_GPCNT);
 314                 cx88_wakeup(dev->core, &dev->mpegq, count);
 315                 spin_unlock(&dev->slock);
 316         }
 317
 318         /* risc2 y */
 319         if (status & 0x10) {
 320                 spin_lock(&dev->slock);
 321                 cx8802_restart_queue(dev,&dev->mpegq);
 322                 spin_unlock(&dev->slock);
 323         }
 324
 325         /* other general errors */
 326         if (status & 0x1f0100) {
 327                 dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 );
 328                 spin_lock(&dev->slock);
 329                 cx8802_stop_dma(dev);
 330                 cx8802_restart_queue(dev,&dev->mpegq);
 331                 spin_unlock(&dev->slock);
 332         }
 333 }
 334
 335 #define MAX_IRQ_LOOP 10
 336
 337 static irqreturn_t cx8802_irq(int irq, void *dev_id, struct pt_regs *regs)
 338 {
 339         struct cx8802_dev *dev = dev_id;
 340         struct cx88_core *core = dev->core;
 341         u32 status;
 342         int loop, handled = 0;
 343
 344         for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
 345                 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04);
 346                 if (0 == status)
 347                         goto out;
 348                 dprintk( 1, "cx8802_irq\n" );
 349                 dprintk( 1, "    loop: %d/%d\n", loop, MAX_IRQ_LOOP );
 350                 dprintk( 1, "    status: %d\n", status );
 351                 handled = 1;
 352                 cx_write(MO_PCI_INTSTAT, status);
 353
 354                 if (status & core->pci_irqmask)
 355                         cx88_core_irq(core,status);
 356                 if (status & 0x04)
 357                         cx8802_mpeg_irq(dev);
 358         };
 359         if (MAX_IRQ_LOOP == loop) {
 360                 dprintk( 0, "clearing mask\n" );
 361                 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
 362                        core->name);
 363                 cx_write(MO_PCI_INTMSK,0);
 364         }
 365
 366  out:
 367         return IRQ_RETVAL(handled);
 368 }
 369
 370 /* ----------------------------------------------------------- */
 371 /* exported stuff                                              */
 372
 373 int cx8802_init_common(struct cx8802_dev *dev)
 374 {
 375         struct cx88_core *core = dev->core;
 376         int err;
 377
 378         /* pci init */
 379         if (pci_enable_device(dev->pci))
 380                 return -EIO;
 381         pci_set_master(dev->pci);
 382         if (!pci_dma_supported(dev->pci,0xffffffff)) {
 383                 printk("%s/2: Oops: no 32bit PCI DMA ???\n",dev->core->name);
 384                 return -EIO;
 385         }
 386
 387         pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev);
 388         pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER,  &dev->pci_lat);
 389         printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, "
 390                "latency: %d, mmio: 0x%lx\n", dev->core->name,
 391                pci_name(dev->pci), dev->pci_rev, dev->pci->irq,
 392                dev->pci_lat,pci_resource_start(dev->pci,0));
 393
 394         /* initialize driver struct */
 395         spin_lock_init(&dev->slock);
 396
 397         /* init dma queue */
 398         INIT_LIST_HEAD(&dev->mpegq.active);
 399         INIT_LIST_HEAD(&dev->mpegq.queued);
 400         dev->mpegq.timeout.function = cx8802_timeout;
 401         dev->mpegq.timeout.data     = (unsigned long)dev;
 402         init_timer(&dev->mpegq.timeout);
 403         cx88_risc_stopper(dev->pci,&dev->mpegq.stopper,
 404                           MO_TS_DMACNTRL,0x11,0x00);
 405
 406         /* get irq */
 407         err = request_irq(dev->pci->irq, cx8802_irq,
 408                           SA_SHIRQ | SA_INTERRUPT, dev->core->name, dev);
 409         if (err < 0) {
 410                 printk(KERN_ERR "%s: can't get IRQ %d\n",
 411                        dev->core->name, dev->pci->irq);
 412                 return err;
 413         }
 414         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
 415
 416         /* everything worked */
 417         pci_set_drvdata(dev->pci,dev);
 418         return 0;
 419 }
 420
 421 void cx8802_fini_common(struct cx8802_dev *dev)
 422 {
 423         dprintk( 2, "cx8802_fini_common\n" );
 424         cx8802_stop_dma(dev);
 425         pci_disable_device(dev->pci);
 426
 427         /* unregister stuff */
 428         free_irq(dev->pci->irq, dev);
 429         pci_set_drvdata(dev->pci, NULL);
 430
 431         /* free memory */
 432         btcx_riscmem_free(dev->pci,&dev->mpegq.stopper);
 433 }
 434
 435 /* ----------------------------------------------------------- */
 436
 437 int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state)
 438 {
 439         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
 440         struct cx88_core *core = dev->core;
 441
 442         /* stop mpeg dma */
 443         spin_lock(&dev->slock);
 444         if (!list_empty(&dev->mpegq.active)) {
 445                 dprintk( 2, "suspend\n" );
 446                 printk("%s: suspend mpeg\n", core->name);
 447                 cx8802_stop_dma(dev);
 448                 del_timer(&dev->mpegq.timeout);
 449         }
 450         spin_unlock(&dev->slock);
 451
 452         /* FIXME -- shutdown device */
 453         cx88_shutdown(dev->core);
 454
 455         pci_save_state(pci_dev);
 456         if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
 457                 pci_disable_device(pci_dev);
 458                 dev->state.disabled = 1;
 459         }
 460         return 0;
 461 }
 462
 463 int cx8802_resume_common(struct pci_dev *pci_dev)
 464 {
 465         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
 466         struct cx88_core *core = dev->core;
 467         int err;
 468
 469         if (dev->state.disabled) {
 470                 err=pci_enable_device(pci_dev);
 471                 if (err) {
 472                         printk(KERN_ERR "%s: can't enable device\n",
 473                                                dev->core->name);
 474                         return err;
 475                 }
 476                 dev->state.disabled = 0;
 477         }
 478         err=pci_set_power_state(pci_dev, PCI_D0);
 479         if (err) {
 480                 printk(KERN_ERR "%s: can't enable device\n",
 481                                                dev->core->name);
 482                 pci_disable_device(pci_dev);
 483                 dev->state.disabled = 1;
 484
 485                 return err;
 486         }
 487         pci_restore_state(pci_dev);
 488
 489         /* FIXME: re-initialize hardware */
 490         cx88_reset(dev->core);
 491
 492         /* restart video+vbi capture */
 493         spin_lock(&dev->slock);
 494         if (!list_empty(&dev->mpegq.active)) {
 495                 printk("%s: resume mpeg\n", core->name);
 496                 cx8802_restart_queue(dev,&dev->mpegq);
 497         }
 498         spin_unlock(&dev->slock);
 499
 500         return 0;
 501 }
 502
 503 /* ----------------------------------------------------------- */
 504
 505 EXPORT_SYMBOL(cx8802_buf_prepare);
 506 EXPORT_SYMBOL(cx8802_buf_queue);
 507 EXPORT_SYMBOL(cx8802_cancel_buffers);
 508
 509 EXPORT_SYMBOL(cx8802_init_common);
 510 EXPORT_SYMBOL(cx8802_fini_common);
 511
 512 EXPORT_SYMBOL(cx8802_suspend_common);
 513 EXPORT_SYMBOL(cx8802_resume_common);
 514
 515 /* ----------------------------------------------------------- */
 516 /*
 517  * Local variables:
 518  * c-basic-offset: 8
 519  * End:
 520  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 521  */