3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 # include "cx88-vp3054-i2c.h"
53 # include "lgdt330x.h"
54 # include "lg_h06xf.h"
64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67 MODULE_LICENSE("GPL");
69 static unsigned int debug = 0;
70 module_param(debug, int, 0644);
71 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
73 #define dprintk(level,fmt, arg...) if (debug >= level) \
74 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
76 /* ------------------------------------------------------------------ */
78 static int dvb_buf_setup(struct videobuf_queue *q,
79 unsigned int *count, unsigned int *size)
81 struct cx8802_dev *dev = q->priv_data;
83 dev->ts_packet_size = 188 * 4;
84 dev->ts_packet_count = 32;
86 *size = dev->ts_packet_size * dev->ts_packet_count;
91 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
92 enum v4l2_field field)
94 struct cx8802_dev *dev = q->priv_data;
95 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
98 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
100 struct cx8802_dev *dev = q->priv_data;
101 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
104 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
106 cx88_free_buffer(q, (struct cx88_buffer*)vb);
109 static struct videobuf_queue_ops dvb_qops = {
110 .buf_setup = dvb_buf_setup,
111 .buf_prepare = dvb_buf_prepare,
112 .buf_queue = dvb_buf_queue,
113 .buf_release = dvb_buf_release,
116 /* ------------------------------------------------------------------ */
119 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
121 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
122 static u8 reset [] = { RESET, 0x80 };
123 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
124 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
125 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
126 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
128 mt352_write(fe, clock_config, sizeof(clock_config));
130 mt352_write(fe, reset, sizeof(reset));
131 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
133 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
134 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
135 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
139 static int dvico_dual_demod_init(struct dvb_frontend *fe)
141 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
142 static u8 reset [] = { RESET, 0x80 };
143 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
144 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
145 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
146 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
148 mt352_write(fe, clock_config, sizeof(clock_config));
150 mt352_write(fe, reset, sizeof(reset));
151 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
153 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
154 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
155 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
160 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
162 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
163 static u8 reset [] = { 0x50, 0x80 };
164 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
165 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
166 0x00, 0xFF, 0x00, 0x40, 0x40 };
167 static u8 dntv_extra[] = { 0xB5, 0x7A };
168 static u8 capt_range_cfg[] = { 0x75, 0x32 };
170 mt352_write(fe, clock_config, sizeof(clock_config));
172 mt352_write(fe, reset, sizeof(reset));
173 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
175 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
177 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
178 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
183 static struct mt352_config dvico_fusionhdtv = {
184 .demod_address = 0x0F,
185 .demod_init = dvico_fusionhdtv_demod_init,
188 static struct mt352_config dntv_live_dvbt_config = {
189 .demod_address = 0x0f,
190 .demod_init = dntv_live_dvbt_demod_init,
193 static struct mt352_config dvico_fusionhdtv_dual = {
194 .demod_address = 0x0F,
195 .demod_init = dvico_dual_demod_init,
198 #ifdef HAVE_VP3054_I2C
199 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
201 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
202 static u8 reset [] = { 0x50, 0x80 };
203 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
204 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
205 0x00, 0xFF, 0x00, 0x40, 0x40 };
206 static u8 dntv_extra[] = { 0xB5, 0x7A };
207 static u8 capt_range_cfg[] = { 0x75, 0x32 };
209 mt352_write(fe, clock_config, sizeof(clock_config));
211 mt352_write(fe, reset, sizeof(reset));
212 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
214 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
216 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
217 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
222 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
224 struct cx8802_dev *dev= fe->dvb->priv;
226 /* this message is to set up ATC and ALC */
227 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
229 { .addr = dev->core->pll_addr, .flags = 0,
230 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
233 if (fe->ops.i2c_gate_ctrl)
234 fe->ops.i2c_gate_ctrl(fe, 1);
235 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
245 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
246 struct dvb_frontend_parameters* params)
248 struct cx8802_dev *dev= fe->dvb->priv;
251 { .addr = dev->core->pll_addr, .flags = 0,
252 .buf = buf, .len = 4 };
255 /* Switch PLL to DVB mode */
256 err = philips_fmd1216_pll_init(fe);
261 dvb_pll_configure(dev->core->pll_desc, buf,
263 params->u.ofdm.bandwidth);
264 if (fe->ops.i2c_gate_ctrl)
265 fe->ops.i2c_gate_ctrl(fe, 1);
266 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
268 printk(KERN_WARNING "cx88-dvb: %s error "
269 "(addr %02x <- %02x, err = %i)\n",
270 __FUNCTION__, dev->core->pll_addr, buf[0], err);
280 static struct mt352_config dntv_live_dvbt_pro_config = {
281 .demod_address = 0x0f,
283 .demod_init = dntv_live_dvbt_pro_demod_init,
289 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
290 struct dvb_frontend_parameters *params)
293 struct cx8802_dev *dev= fe->dvb->priv;
295 { .addr = dev->core->pll_addr, .flags = 0,
296 .buf = pllbuf, .len = 4 };
299 dvb_pll_configure(dev->core->pll_desc, pllbuf,
301 params->u.ofdm.bandwidth);
303 if (fe->ops.i2c_gate_ctrl)
304 fe->ops.i2c_gate_ctrl(fe, 1);
305 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
306 printk(KERN_WARNING "cx88-dvb: %s error "
307 "(addr %02x <- %02x, err = %i)\n",
308 __FUNCTION__, pllbuf[0], pllbuf[1], err);
318 static struct zl10353_config dvico_fusionhdtv_hybrid = {
319 .demod_address = 0x0F,
323 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
324 .demod_address = 0x0F,
329 static struct cx22702_config connexant_refboard_config = {
330 .demod_address = 0x43,
331 .output_mode = CX22702_SERIAL_OUTPUT,
334 static struct cx22702_config hauppauge_novat_config = {
335 .demod_address = 0x43,
336 .output_mode = CX22702_SERIAL_OUTPUT,
338 static struct cx22702_config hauppauge_hvr1100_config = {
339 .demod_address = 0x63,
340 .output_mode = CX22702_SERIAL_OUTPUT,
345 static int or51132_set_ts_param(struct dvb_frontend* fe,
348 struct cx8802_dev *dev= fe->dvb->priv;
349 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
353 static struct or51132_config pchdtv_hd3000 = {
354 .demod_address = 0x15,
355 .set_ts_params = or51132_set_ts_param,
360 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
361 struct dvb_frontend_parameters* params)
363 /* FIXME make this routine use the tuner-simple code.
364 * It could probably be shared with a number of ATSC
365 * frontends. Many share the same tuner with analog TV. */
367 struct cx8802_dev *dev= fe->dvb->priv;
368 struct cx88_core *core = dev->core;
371 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
374 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
375 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
376 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
380 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
381 printk(KERN_WARNING "cx88-dvb: %s error "
382 "(addr %02x <- %02x, err = %i)\n",
383 __FUNCTION__, buf[0], buf[1], err);
392 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
393 struct dvb_frontend_parameters* params)
395 struct cx8802_dev *dev= fe->dvb->priv;
396 struct cx88_core *core = dev->core;
398 /* Put the analog decoder in standby to keep it quiet */
399 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
401 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
404 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
406 struct cx8802_dev *dev= fe->dvb->priv;
407 struct cx88_core *core = dev->core;
409 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
411 cx_clear(MO_GP0_IO, 8);
413 cx_set(MO_GP0_IO, 8);
417 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
419 struct cx8802_dev *dev= fe->dvb->priv;
421 dev->ts_gen_cntrl |= 0x04;
423 dev->ts_gen_cntrl &= ~0x04;
427 static struct lgdt330x_config fusionhdtv_3_gold = {
428 .demod_address = 0x0e,
429 .demod_chip = LGDT3302,
430 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
431 .set_ts_params = lgdt330x_set_ts_param,
434 static struct lgdt330x_config fusionhdtv_5_gold = {
435 .demod_address = 0x0e,
436 .demod_chip = LGDT3303,
437 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
438 .set_ts_params = lgdt330x_set_ts_param,
441 static struct lgdt330x_config pchdtv_hd5500 = {
442 .demod_address = 0x59,
443 .demod_chip = LGDT3303,
444 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
445 .set_ts_params = lgdt330x_set_ts_param,
450 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
453 struct cx8802_dev *dev= fe->dvb->priv;
454 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
458 static int nxt200x_set_pll_input(u8* buf, int input)
467 static struct nxt200x_config ati_hdtvwonder = {
468 .demod_address = 0x0a,
469 .set_pll_input = nxt200x_set_pll_input,
470 .set_ts_params = nxt200x_set_ts_param,
475 static int cx24123_set_ts_param(struct dvb_frontend* fe,
478 struct cx8802_dev *dev= fe->dvb->priv;
479 dev->ts_gen_cntrl = 0x2;
483 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
485 struct cx8802_dev *dev= fe->dvb->priv;
486 struct cx88_core *core = dev->core;
488 if (voltage == SEC_VOLTAGE_OFF) {
489 cx_write(MO_GP0_IO, 0x000006fB);
491 cx_write(MO_GP0_IO, 0x000006f9);
494 if (core->prev_set_voltage)
495 return core->prev_set_voltage(fe, voltage);
499 static struct cx24123_config hauppauge_novas_config = {
500 .demod_address = 0x55,
501 .set_ts_params = cx24123_set_ts_param,
504 static struct cx24123_config kworld_dvbs_100_config = {
505 .demod_address = 0x15,
506 .set_ts_params = cx24123_set_ts_param,
510 static int dvb_register(struct cx8802_dev *dev)
512 /* init struct videobuf_dvb */
513 dev->dvb.name = dev->core->name;
514 dev->ts_gen_cntrl = 0x0c;
517 switch (dev->core->board) {
519 case CX88_BOARD_HAUPPAUGE_DVB_T1:
520 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
521 &dev->core->i2c_adap);
522 if (dev->dvb.frontend != NULL) {
523 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt759x);
526 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
527 case CX88_BOARD_CONEXANT_DVB_T1:
528 case CX88_BOARD_KWORLD_DVB_T_CX22702:
529 case CX88_BOARD_WINFAST_DTV1000:
530 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
531 &dev->core->i2c_adap);
532 if (dev->dvb.frontend != NULL) {
533 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
536 case CX88_BOARD_HAUPPAUGE_HVR1100:
537 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
538 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
539 &dev->core->i2c_adap);
540 if (dev->dvb.frontend != NULL) {
541 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_fmd1216me);
545 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
546 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
548 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
549 &dev->core->i2c_adap);
550 if (dev->dvb.frontend != NULL) {
551 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
556 /* ZL10353 replaces MT352 on later cards */
557 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
558 &dev->core->i2c_adap);
559 if (dev->dvb.frontend != NULL) {
560 dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
564 #endif /* HAVE_MT352 || HAVE_ZL10353 */
566 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
567 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
568 &dev->core->i2c_adap);
569 if (dev->dvb.frontend != NULL) {
570 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_lg_z201);
573 case CX88_BOARD_KWORLD_DVB_T:
574 case CX88_BOARD_DNTV_LIVE_DVB_T:
575 case CX88_BOARD_ADSTECH_DVB_T_PCI:
576 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
577 &dev->core->i2c_adap);
578 if (dev->dvb.frontend != NULL) {
579 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_unknown_1);
582 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
583 #ifdef HAVE_VP3054_I2C
584 dev->core->pll_addr = 0x61;
585 dev->core->pll_desc = &dvb_pll_fmd1216me;
586 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
587 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
588 if (dev->dvb.frontend != NULL) {
589 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
592 printk("%s: built without vp3054 support\n", dev->core->name);
595 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
596 /* The tin box says DEE1601, but it seems to be DTT7579
597 * compatible, with a slightly different MT352 AGC gain. */
598 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
599 &dev->core->i2c_adap);
600 if (dev->dvb.frontend != NULL) {
601 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
606 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
607 dev->core->pll_addr = 0x61;
608 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
609 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
610 &dev->core->i2c_adap);
611 if (dev->dvb.frontend != NULL) {
612 dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
617 case CX88_BOARD_PCHDTV_HD3000:
618 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
619 &dev->core->i2c_adap);
620 if (dev->dvb.frontend != NULL) {
621 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt761x);
626 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
627 dev->ts_gen_cntrl = 0x08;
629 /* Do a hardware reset of chip before using it. */
630 struct cx88_core *core = dev->core;
632 cx_clear(MO_GP0_IO, 1);
634 cx_set(MO_GP0_IO, 1);
637 /* Select RF connector callback */
638 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
639 dev->core->pll_addr = 0x61;
640 dev->core->pll_desc = &dvb_pll_microtune_4042;
641 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
642 &dev->core->i2c_adap);
643 if (dev->dvb.frontend != NULL) {
644 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
648 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
649 dev->ts_gen_cntrl = 0x08;
651 /* Do a hardware reset of chip before using it. */
652 struct cx88_core *core = dev->core;
654 cx_clear(MO_GP0_IO, 1);
656 cx_set(MO_GP0_IO, 9);
658 dev->core->pll_addr = 0x61;
659 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
660 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
661 &dev->core->i2c_adap);
662 if (dev->dvb.frontend != NULL) {
663 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
667 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
668 dev->ts_gen_cntrl = 0x08;
670 /* Do a hardware reset of chip before using it. */
671 struct cx88_core *core = dev->core;
673 cx_clear(MO_GP0_IO, 1);
675 cx_set(MO_GP0_IO, 1);
677 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
678 &dev->core->i2c_adap);
679 if (dev->dvb.frontend != NULL) {
680 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
684 case CX88_BOARD_PCHDTV_HD5500:
685 dev->ts_gen_cntrl = 0x08;
687 /* Do a hardware reset of chip before using it. */
688 struct cx88_core *core = dev->core;
690 cx_clear(MO_GP0_IO, 1);
692 cx_set(MO_GP0_IO, 1);
694 dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
695 &dev->core->i2c_adap);
696 if (dev->dvb.frontend != NULL) {
697 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
703 case CX88_BOARD_ATI_HDTVWONDER:
704 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
705 &dev->core->i2c_adap);
706 if (dev->dvb.frontend != NULL) {
707 dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_tuv1236d);
712 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
713 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
714 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
715 &dev->core->i2c_adap);
716 if (dev->dvb.frontend) {
717 isl6421_attach(dev->dvb.frontend, &dev->core->i2c_adap, 0x08, 0x00, 0x00);
720 case CX88_BOARD_KWORLD_DVBS_100:
721 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
722 &dev->core->i2c_adap);
723 if (dev->dvb.frontend) {
724 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
725 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
730 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
734 if (NULL == dev->dvb.frontend) {
735 printk("%s: frontend initialization failed\n",dev->core->name);
739 if (dev->core->pll_desc) {
740 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
741 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
744 /* Put the analog decoder in standby to keep it quiet */
745 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
747 /* register everything */
748 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
751 /* ----------------------------------------------------------- */
753 static int __devinit dvb_probe(struct pci_dev *pci_dev,
754 const struct pci_device_id *pci_id)
756 struct cx8802_dev *dev;
757 struct cx88_core *core;
761 core = cx88_core_get(pci_dev);
766 if (!cx88_boards[core->board].dvb)
770 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
776 err = cx8802_init_common(dev);
780 #ifdef HAVE_VP3054_I2C
781 err = vp3054_i2c_probe(dev);
787 printk("%s/2: cx2388x based dvb card\n", core->name);
788 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
789 dev->pci, &dev->slock,
790 V4L2_BUF_TYPE_VIDEO_CAPTURE,
792 sizeof(struct cx88_buffer),
794 err = dvb_register(dev);
798 /* Maintain a reference to cx88-video can query the 8802 device. */
803 cx8802_fini_common(dev);
807 cx88_core_put(core,pci_dev);
811 static void __devexit dvb_remove(struct pci_dev *pci_dev)
813 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
815 /* Destroy any 8802 reference. */
816 dev->core->dvbdev = NULL;
819 videobuf_dvb_unregister(&dev->dvb);
821 #ifdef HAVE_VP3054_I2C
822 vp3054_i2c_remove(dev);
826 cx8802_fini_common(dev);
827 cx88_core_put(dev->core,dev->pci);
831 static struct pci_device_id cx8802_pci_tbl[] = {
835 .subvendor = PCI_ANY_ID,
836 .subdevice = PCI_ANY_ID,
838 /* --- end of list --- */
841 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
843 static struct pci_driver dvb_pci_driver = {
845 .id_table = cx8802_pci_tbl,
847 .remove = __devexit_p(dvb_remove),
848 .suspend = cx8802_suspend_common,
849 .resume = cx8802_resume_common,
852 static int dvb_init(void)
854 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
855 (CX88_VERSION_CODE >> 16) & 0xff,
856 (CX88_VERSION_CODE >> 8) & 0xff,
857 CX88_VERSION_CODE & 0xff);
859 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
860 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
862 return pci_register_driver(&dvb_pci_driver);
865 static void dvb_fini(void)
867 pci_unregister_driver(&dvb_pci_driver);
870 module_init(dvb_init);
871 module_exit(dvb_fini);
876 * compile-command: "make DVB=1"