2 * Elonics E4000 silicon tuner driver
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include "e4000_priv.h"
23 static int e4000_init(struct e4000_dev *dev)
25 struct i2c_client *client = dev->client;
28 dev_dbg(&client->dev, "\n");
31 ret = regmap_write(dev->regmap, 0x00, 0x01);
35 /* disable output clock */
36 ret = regmap_write(dev->regmap, 0x06, 0x00);
40 ret = regmap_write(dev->regmap, 0x7a, 0x96);
45 ret = regmap_bulk_write(dev->regmap, 0x7e, "\x01\xfe", 2);
49 ret = regmap_write(dev->regmap, 0x82, 0x00);
53 ret = regmap_write(dev->regmap, 0x24, 0x05);
57 ret = regmap_bulk_write(dev->regmap, 0x87, "\x20\x01", 2);
61 ret = regmap_bulk_write(dev->regmap, 0x9f, "\x7f\x07", 2);
65 /* DC offset control */
66 ret = regmap_write(dev->regmap, 0x2d, 0x1f);
70 ret = regmap_bulk_write(dev->regmap, 0x70, "\x01\x01", 2);
75 ret = regmap_write(dev->regmap, 0x1a, 0x17);
79 ret = regmap_write(dev->regmap, 0x1f, 0x1a);
87 dev_dbg(&client->dev, "failed=%d\n", ret);
91 static int e4000_sleep(struct e4000_dev *dev)
93 struct i2c_client *client = dev->client;
96 dev_dbg(&client->dev, "\n");
100 ret = regmap_write(dev->regmap, 0x00, 0x00);
106 dev_dbg(&client->dev, "failed=%d\n", ret);
110 static int e4000_set_params(struct e4000_dev *dev)
112 struct i2c_client *client = dev->client;
114 unsigned int div_n, k, k_cw, div_out;
116 u8 buf[5], i_data[4], q_data[4];
119 dev_dbg(&client->dev, "tuner is sleeping\n");
123 /* gain control manual */
124 ret = regmap_write(dev->regmap, 0x1a, 0x00);
129 * Fractional-N synthesizer
131 * +----------------------------+
133 * Fref +----+ +-------+ +------+ +---+
134 * ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
135 * +----+ +-------+ +------+ +---+
143 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
144 if (dev->f_frequency <= e4000_pll_lut[i].freq)
147 if (i == ARRAY_SIZE(e4000_pll_lut)) {
152 #define F_REF dev->clk
153 div_out = e4000_pll_lut[i].div_out;
154 f_vco = (u64) dev->f_frequency * div_out;
155 /* calculate PLL integer and fractional control word */
156 div_n = div_u64_rem(f_vco, F_REF, &k);
157 k_cw = div_u64((u64) k * 0x10000, F_REF);
159 dev_dbg(&client->dev,
160 "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
161 dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_n, k,
165 buf[1] = (k_cw >> 0) & 0xff;
166 buf[2] = (k_cw >> 8) & 0xff;
168 buf[4] = e4000_pll_lut[i].div_out_reg;
169 ret = regmap_bulk_write(dev->regmap, 0x09, buf, 5);
173 /* LNA filter (RF filter) */
174 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
175 if (dev->f_frequency <= e400_lna_filter_lut[i].freq)
178 if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
183 ret = regmap_write(dev->regmap, 0x10, e400_lna_filter_lut[i].val);
188 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
189 if (dev->f_bandwidth <= e4000_if_filter_lut[i].freq)
192 if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
197 buf[0] = e4000_if_filter_lut[i].reg11_val;
198 buf[1] = e4000_if_filter_lut[i].reg12_val;
200 ret = regmap_bulk_write(dev->regmap, 0x11, buf, 2);
205 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
206 if (dev->f_frequency <= e4000_band_lut[i].freq)
209 if (i == ARRAY_SIZE(e4000_band_lut)) {
214 ret = regmap_write(dev->regmap, 0x07, e4000_band_lut[i].reg07_val);
218 ret = regmap_write(dev->regmap, 0x78, e4000_band_lut[i].reg78_val);
223 for (i = 0; i < 4; i++) {
225 ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7e\x24", 3);
227 ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7f", 2);
229 ret = regmap_bulk_write(dev->regmap, 0x15, "\x01", 1);
231 ret = regmap_bulk_write(dev->regmap, 0x16, "\x7e", 1);
236 ret = regmap_write(dev->regmap, 0x29, 0x01);
240 ret = regmap_bulk_read(dev->regmap, 0x2a, buf, 3);
244 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
245 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
248 swap(q_data[2], q_data[3]);
249 swap(i_data[2], i_data[3]);
251 ret = regmap_bulk_write(dev->regmap, 0x50, q_data, 4);
255 ret = regmap_bulk_write(dev->regmap, 0x60, i_data, 4);
259 /* gain control auto */
260 ret = regmap_write(dev->regmap, 0x1a, 0x17);
266 dev_dbg(&client->dev, "failed=%d\n", ret);
273 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
274 static const struct v4l2_frequency_band bands[] = {
276 .type = V4L2_TUNER_RF,
278 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
279 .rangelow = 59000000,
280 .rangehigh = 1105000000,
283 .type = V4L2_TUNER_RF,
285 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
286 .rangelow = 1249000000,
287 .rangehigh = 2208000000UL,
291 static inline struct e4000_dev *e4000_subdev_to_dev(struct v4l2_subdev *sd)
293 return container_of(sd, struct e4000_dev, sd);
296 static int e4000_standby(struct v4l2_subdev *sd)
298 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
301 ret = e4000_sleep(dev);
305 return e4000_set_params(dev);
308 static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
310 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
311 struct i2c_client *client = dev->client;
313 dev_dbg(&client->dev, "index=%d\n", v->index);
315 strlcpy(v->name, "Elonics E4000", sizeof(v->name));
316 v->type = V4L2_TUNER_RF;
317 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
318 v->rangelow = bands[0].rangelow;
319 v->rangehigh = bands[1].rangehigh;
323 static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
325 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
326 struct i2c_client *client = dev->client;
328 dev_dbg(&client->dev, "index=%d\n", v->index);
332 static int e4000_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
334 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
335 struct i2c_client *client = dev->client;
337 dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
338 f->frequency = dev->f_frequency;
342 static int e4000_s_frequency(struct v4l2_subdev *sd,
343 const struct v4l2_frequency *f)
345 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
346 struct i2c_client *client = dev->client;
348 dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
349 f->tuner, f->type, f->frequency);
351 dev->f_frequency = clamp_t(unsigned int, f->frequency,
352 bands[0].rangelow, bands[1].rangehigh);
353 return e4000_set_params(dev);
356 static int e4000_enum_freq_bands(struct v4l2_subdev *sd,
357 struct v4l2_frequency_band *band)
359 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
360 struct i2c_client *client = dev->client;
362 dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
363 band->tuner, band->type, band->index);
365 if (band->index >= ARRAY_SIZE(bands))
368 band->capability = bands[band->index].capability;
369 band->rangelow = bands[band->index].rangelow;
370 band->rangehigh = bands[band->index].rangehigh;
374 static const struct v4l2_subdev_tuner_ops e4000_subdev_tuner_ops = {
375 .standby = e4000_standby,
376 .g_tuner = e4000_g_tuner,
377 .s_tuner = e4000_s_tuner,
378 .g_frequency = e4000_g_frequency,
379 .s_frequency = e4000_s_frequency,
380 .enum_freq_bands = e4000_enum_freq_bands,
383 static const struct v4l2_subdev_ops e4000_subdev_ops = {
384 .tuner = &e4000_subdev_tuner_ops,
387 static int e4000_set_lna_gain(struct dvb_frontend *fe)
389 struct e4000_dev *dev = fe->tuner_priv;
390 struct i2c_client *client = dev->client;
394 dev_dbg(&client->dev, "lna auto=%d->%d val=%d->%d\n",
395 dev->lna_gain_auto->cur.val, dev->lna_gain_auto->val,
396 dev->lna_gain->cur.val, dev->lna_gain->val);
398 if (dev->lna_gain_auto->val && dev->if_gain_auto->cur.val)
400 else if (dev->lna_gain_auto->val)
402 else if (dev->if_gain_auto->cur.val)
407 ret = regmap_write(dev->regmap, 0x1a, u8tmp);
411 if (dev->lna_gain_auto->val == false) {
412 ret = regmap_write(dev->regmap, 0x14, dev->lna_gain->val);
419 dev_dbg(&client->dev, "failed=%d\n", ret);
423 static int e4000_set_mixer_gain(struct dvb_frontend *fe)
425 struct e4000_dev *dev = fe->tuner_priv;
426 struct i2c_client *client = dev->client;
430 dev_dbg(&client->dev, "mixer auto=%d->%d val=%d->%d\n",
431 dev->mixer_gain_auto->cur.val, dev->mixer_gain_auto->val,
432 dev->mixer_gain->cur.val, dev->mixer_gain->val);
434 if (dev->mixer_gain_auto->val)
439 ret = regmap_write(dev->regmap, 0x20, u8tmp);
443 if (dev->mixer_gain_auto->val == false) {
444 ret = regmap_write(dev->regmap, 0x15, dev->mixer_gain->val);
451 dev_dbg(&client->dev, "failed=%d\n", ret);
455 static int e4000_set_if_gain(struct dvb_frontend *fe)
457 struct e4000_dev *dev = fe->tuner_priv;
458 struct i2c_client *client = dev->client;
463 dev_dbg(&client->dev, "if auto=%d->%d val=%d->%d\n",
464 dev->if_gain_auto->cur.val, dev->if_gain_auto->val,
465 dev->if_gain->cur.val, dev->if_gain->val);
467 if (dev->if_gain_auto->val && dev->lna_gain_auto->cur.val)
469 else if (dev->lna_gain_auto->cur.val)
471 else if (dev->if_gain_auto->val)
476 ret = regmap_write(dev->regmap, 0x1a, u8tmp);
480 if (dev->if_gain_auto->val == false) {
481 buf[0] = e4000_if_gain_lut[dev->if_gain->val].reg16_val;
482 buf[1] = e4000_if_gain_lut[dev->if_gain->val].reg17_val;
483 ret = regmap_bulk_write(dev->regmap, 0x16, buf, 2);
490 dev_dbg(&client->dev, "failed=%d\n", ret);
494 static int e4000_pll_lock(struct dvb_frontend *fe)
496 struct e4000_dev *dev = fe->tuner_priv;
497 struct i2c_client *client = dev->client;
501 ret = regmap_read(dev->regmap, 0x07, &uitmp);
505 dev->pll_lock->val = (uitmp & 0x01);
509 dev_dbg(&client->dev, "failed=%d\n", ret);
513 static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
515 struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
516 struct i2c_client *client = dev->client;
523 case V4L2_CID_RF_TUNER_PLL_LOCK:
524 ret = e4000_pll_lock(dev->fe);
527 dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
528 ctrl->id, ctrl->name);
535 static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
537 struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
538 struct i2c_client *client = dev->client;
545 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
546 case V4L2_CID_RF_TUNER_BANDWIDTH:
548 * TODO: Auto logic does not work 100% correctly as tuner driver
549 * do not have information to calculate maximum suitable
550 * bandwidth. Calculating it is responsible of master driver.
552 dev->f_bandwidth = dev->bandwidth->val;
553 ret = e4000_set_params(dev);
555 case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
556 case V4L2_CID_RF_TUNER_LNA_GAIN:
557 ret = e4000_set_lna_gain(dev->fe);
559 case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
560 case V4L2_CID_RF_TUNER_MIXER_GAIN:
561 ret = e4000_set_mixer_gain(dev->fe);
563 case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
564 case V4L2_CID_RF_TUNER_IF_GAIN:
565 ret = e4000_set_if_gain(dev->fe);
568 dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
569 ctrl->id, ctrl->name);
576 static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
577 .g_volatile_ctrl = e4000_g_volatile_ctrl,
578 .s_ctrl = e4000_s_ctrl,
585 static int e4000_dvb_set_params(struct dvb_frontend *fe)
587 struct e4000_dev *dev = fe->tuner_priv;
588 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
590 dev->f_frequency = c->frequency;
591 dev->f_bandwidth = c->bandwidth_hz;
592 return e4000_set_params(dev);
595 static int e4000_dvb_init(struct dvb_frontend *fe)
597 return e4000_init(fe->tuner_priv);
600 static int e4000_dvb_sleep(struct dvb_frontend *fe)
602 return e4000_sleep(fe->tuner_priv);
605 static int e4000_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
607 *frequency = 0; /* Zero-IF */
611 static const struct dvb_tuner_ops e4000_dvb_tuner_ops = {
613 .name = "Elonics E4000",
614 .frequency_min_hz = 174 * MHz,
615 .frequency_max_hz = 862 * MHz,
618 .init = e4000_dvb_init,
619 .sleep = e4000_dvb_sleep,
620 .set_params = e4000_dvb_set_params,
622 .get_if_frequency = e4000_dvb_get_if_frequency,
625 static int e4000_probe(struct i2c_client *client,
626 const struct i2c_device_id *id)
628 struct e4000_dev *dev;
629 struct e4000_config *cfg = client->dev.platform_data;
630 struct dvb_frontend *fe = cfg->fe;
633 static const struct regmap_config regmap_config = {
638 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
644 dev->clk = cfg->clock;
645 dev->client = client;
647 dev->regmap = devm_regmap_init_i2c(client, ®map_config);
648 if (IS_ERR(dev->regmap)) {
649 ret = PTR_ERR(dev->regmap);
653 /* check if the tuner is there */
654 ret = regmap_read(dev->regmap, 0x02, &uitmp);
658 dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
665 /* put sleep as chip seems to be in normal mode by default */
666 ret = regmap_write(dev->regmap, 0x00, 0x00);
670 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
671 /* Register controls */
672 v4l2_ctrl_handler_init(&dev->hdl, 9);
673 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
674 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
675 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
676 V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
677 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
678 dev->lna_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
679 V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
680 dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
681 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
682 v4l2_ctrl_auto_cluster(2, &dev->lna_gain_auto, 0, false);
683 dev->mixer_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
684 V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
685 dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
686 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
687 v4l2_ctrl_auto_cluster(2, &dev->mixer_gain_auto, 0, false);
688 dev->if_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
689 V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
690 dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
691 V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
692 v4l2_ctrl_auto_cluster(2, &dev->if_gain_auto, 0, false);
693 dev->pll_lock = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
694 V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
695 if (dev->hdl.error) {
696 ret = dev->hdl.error;
697 dev_err(&client->dev, "Could not initialize controls\n");
698 v4l2_ctrl_handler_free(&dev->hdl);
702 dev->sd.ctrl_handler = &dev->hdl;
703 dev->f_frequency = bands[0].rangelow;
704 dev->f_bandwidth = dev->bandwidth->val;
705 v4l2_i2c_subdev_init(&dev->sd, client, &e4000_subdev_ops);
707 fe->tuner_priv = dev;
708 memcpy(&fe->ops.tuner_ops, &e4000_dvb_tuner_ops,
709 sizeof(fe->ops.tuner_ops));
710 v4l2_set_subdevdata(&dev->sd, client);
711 i2c_set_clientdata(client, &dev->sd);
713 dev_info(&client->dev, "Elonics E4000 successfully identified\n");
718 dev_dbg(&client->dev, "failed=%d\n", ret);
722 static int e4000_remove(struct i2c_client *client)
724 struct v4l2_subdev *sd = i2c_get_clientdata(client);
725 struct e4000_dev *dev = container_of(sd, struct e4000_dev, sd);
727 dev_dbg(&client->dev, "\n");
729 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
730 v4l2_ctrl_handler_free(&dev->hdl);
737 static const struct i2c_device_id e4000_id_table[] = {
741 MODULE_DEVICE_TABLE(i2c, e4000_id_table);
743 static struct i2c_driver e4000_driver = {
746 .suppress_bind_attrs = true,
748 .probe = e4000_probe,
749 .remove = e4000_remove,
750 .id_table = e4000_id_table,
753 module_i2c_driver(e4000_driver);
755 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
756 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
757 MODULE_LICENSE("GPL");