2 * Elonics E4000 silicon tuner driver
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include "e4000_priv.h"
22 #include <linux/math64.h>
24 /* Max transfer size done by I2C transfer functions */
25 #define MAX_XFER_SIZE 64
27 /* write multiple registers */
28 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
31 u8 buf[MAX_XFER_SIZE];
32 struct i2c_msg msg[1] = {
34 .addr = priv->client->addr,
41 if (1 + len > sizeof(buf)) {
42 dev_warn(&priv->client->dev,
43 "%s: i2c wr reg=%04x: len=%d is too big!\n",
44 KBUILD_MODNAME, reg, len);
49 memcpy(&buf[1], val, len);
51 ret = i2c_transfer(priv->client->adapter, msg, 1);
55 dev_warn(&priv->client->dev,
56 "%s: i2c wr failed=%d reg=%02x len=%d\n",
57 KBUILD_MODNAME, ret, reg, len);
63 /* read multiple registers */
64 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
67 u8 buf[MAX_XFER_SIZE];
68 struct i2c_msg msg[2] = {
70 .addr = priv->client->addr,
75 .addr = priv->client->addr,
82 if (len > sizeof(buf)) {
83 dev_warn(&priv->client->dev,
84 "%s: i2c rd reg=%04x: len=%d is too big!\n",
85 KBUILD_MODNAME, reg, len);
89 ret = i2c_transfer(priv->client->adapter, msg, 2);
91 memcpy(val, buf, len);
94 dev_warn(&priv->client->dev,
95 "%s: i2c rd failed=%d reg=%02x len=%d\n",
96 KBUILD_MODNAME, ret, reg, len);
103 /* write single register */
104 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
106 return e4000_wr_regs(priv, reg, &val, 1);
109 /* read single register */
110 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
112 return e4000_rd_regs(priv, reg, val, 1);
115 static int e4000_init(struct dvb_frontend *fe)
117 struct e4000_priv *priv = fe->tuner_priv;
120 dev_dbg(&priv->client->dev, "%s:\n", __func__);
122 if (fe->ops.i2c_gate_ctrl)
123 fe->ops.i2c_gate_ctrl(fe, 1);
125 /* dummy I2C to ensure I2C wakes up */
126 ret = e4000_wr_reg(priv, 0x02, 0x40);
129 ret = e4000_wr_reg(priv, 0x00, 0x01);
133 /* disable output clock */
134 ret = e4000_wr_reg(priv, 0x06, 0x00);
138 ret = e4000_wr_reg(priv, 0x7a, 0x96);
142 /* configure gains */
143 ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2);
147 ret = e4000_wr_reg(priv, 0x82, 0x00);
151 ret = e4000_wr_reg(priv, 0x24, 0x05);
155 ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2);
159 ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2);
163 /* DC offset control */
164 ret = e4000_wr_reg(priv, 0x2d, 0x1f);
168 ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2);
173 ret = e4000_wr_reg(priv, 0x1a, 0x17);
177 ret = e4000_wr_reg(priv, 0x1f, 0x1a);
181 if (fe->ops.i2c_gate_ctrl)
182 fe->ops.i2c_gate_ctrl(fe, 0);
188 if (fe->ops.i2c_gate_ctrl)
189 fe->ops.i2c_gate_ctrl(fe, 0);
191 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
195 static int e4000_sleep(struct dvb_frontend *fe)
197 struct e4000_priv *priv = fe->tuner_priv;
200 dev_dbg(&priv->client->dev, "%s:\n", __func__);
202 priv->active = false;
204 if (fe->ops.i2c_gate_ctrl)
205 fe->ops.i2c_gate_ctrl(fe, 1);
207 ret = e4000_wr_reg(priv, 0x00, 0x00);
211 if (fe->ops.i2c_gate_ctrl)
212 fe->ops.i2c_gate_ctrl(fe, 0);
216 if (fe->ops.i2c_gate_ctrl)
217 fe->ops.i2c_gate_ctrl(fe, 0);
219 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
223 static int e4000_set_params(struct dvb_frontend *fe)
225 struct e4000_priv *priv = fe->tuner_priv;
226 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
227 int ret, i, sigma_delta;
229 u8 buf[5], i_data[4], q_data[4];
231 dev_dbg(&priv->client->dev,
232 "%s: delivery_system=%d frequency=%u bandwidth_hz=%u\n",
233 __func__, c->delivery_system, c->frequency,
236 if (fe->ops.i2c_gate_ctrl)
237 fe->ops.i2c_gate_ctrl(fe, 1);
239 /* gain control manual */
240 ret = e4000_wr_reg(priv, 0x1a, 0x00);
245 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
246 if (c->frequency <= e4000_pll_lut[i].freq)
250 if (i == ARRAY_SIZE(e4000_pll_lut)) {
255 f_vco = 1ull * c->frequency * e4000_pll_lut[i].mul;
256 sigma_delta = div_u64(0x10000ULL * (f_vco % priv->clock), priv->clock);
257 buf[0] = div_u64(f_vco, priv->clock);
258 buf[1] = (sigma_delta >> 0) & 0xff;
259 buf[2] = (sigma_delta >> 8) & 0xff;
261 buf[4] = e4000_pll_lut[i].div;
263 dev_dbg(&priv->client->dev,
264 "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n",
265 __func__, f_vco, buf[0], sigma_delta);
267 ret = e4000_wr_regs(priv, 0x09, buf, 5);
271 /* LNA filter (RF filter) */
272 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
273 if (c->frequency <= e400_lna_filter_lut[i].freq)
277 if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
282 ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val);
287 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
288 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
292 if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
297 buf[0] = e4000_if_filter_lut[i].reg11_val;
298 buf[1] = e4000_if_filter_lut[i].reg12_val;
300 ret = e4000_wr_regs(priv, 0x11, buf, 2);
305 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
306 if (c->frequency <= e4000_band_lut[i].freq)
310 if (i == ARRAY_SIZE(e4000_band_lut)) {
315 ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val);
319 ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val);
324 for (i = 0; i < 4; i++) {
326 ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3);
328 ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2);
330 ret = e4000_wr_regs(priv, 0x15, "\x01", 1);
332 ret = e4000_wr_regs(priv, 0x16, "\x7e", 1);
337 ret = e4000_wr_reg(priv, 0x29, 0x01);
341 ret = e4000_rd_regs(priv, 0x2a, buf, 3);
345 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
346 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
349 swap(q_data[2], q_data[3]);
350 swap(i_data[2], i_data[3]);
352 ret = e4000_wr_regs(priv, 0x50, q_data, 4);
356 ret = e4000_wr_regs(priv, 0x60, i_data, 4);
360 /* gain control auto */
361 ret = e4000_wr_reg(priv, 0x1a, 0x17);
365 if (fe->ops.i2c_gate_ctrl)
366 fe->ops.i2c_gate_ctrl(fe, 0);
370 if (fe->ops.i2c_gate_ctrl)
371 fe->ops.i2c_gate_ctrl(fe, 0);
373 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
377 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
379 struct e4000_priv *priv = fe->tuner_priv;
381 dev_dbg(&priv->client->dev, "%s:\n", __func__);
383 *frequency = 0; /* Zero-IF */
388 static int e4000_set_lna_gain(struct dvb_frontend *fe)
390 struct e4000_priv *priv = fe->tuner_priv;
393 dev_dbg(&priv->client->dev, "%s: lna auto=%d->%d val=%d->%d\n",
394 __func__, priv->lna_gain_auto->cur.val,
395 priv->lna_gain_auto->val, priv->lna_gain->cur.val,
396 priv->lna_gain->val);
398 if (fe->ops.i2c_gate_ctrl)
399 fe->ops.i2c_gate_ctrl(fe, 1);
401 if (priv->lna_gain_auto->val && priv->if_gain_auto->cur.val)
403 else if (priv->lna_gain_auto->val)
405 else if (priv->if_gain_auto->cur.val)
410 ret = e4000_wr_reg(priv, 0x1a, u8tmp);
414 if (priv->lna_gain_auto->val == false) {
415 ret = e4000_wr_reg(priv, 0x14, priv->lna_gain->val);
420 if (fe->ops.i2c_gate_ctrl)
421 fe->ops.i2c_gate_ctrl(fe, 0);
425 if (fe->ops.i2c_gate_ctrl)
426 fe->ops.i2c_gate_ctrl(fe, 0);
428 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
432 static int e4000_set_mixer_gain(struct dvb_frontend *fe)
434 struct e4000_priv *priv = fe->tuner_priv;
437 dev_dbg(&priv->client->dev, "%s: mixer auto=%d->%d val=%d->%d\n",
438 __func__, priv->mixer_gain_auto->cur.val,
439 priv->mixer_gain_auto->val, priv->mixer_gain->cur.val,
440 priv->mixer_gain->val);
442 if (fe->ops.i2c_gate_ctrl)
443 fe->ops.i2c_gate_ctrl(fe, 1);
445 if (priv->mixer_gain_auto->val)
450 ret = e4000_wr_reg(priv, 0x20, u8tmp);
454 if (priv->mixer_gain_auto->val == false) {
455 ret = e4000_wr_reg(priv, 0x15, priv->mixer_gain->val);
460 if (fe->ops.i2c_gate_ctrl)
461 fe->ops.i2c_gate_ctrl(fe, 0);
465 if (fe->ops.i2c_gate_ctrl)
466 fe->ops.i2c_gate_ctrl(fe, 0);
468 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
472 static int e4000_set_if_gain(struct dvb_frontend *fe)
474 struct e4000_priv *priv = fe->tuner_priv;
478 dev_dbg(&priv->client->dev, "%s: if auto=%d->%d val=%d->%d\n",
479 __func__, priv->if_gain_auto->cur.val,
480 priv->if_gain_auto->val, priv->if_gain->cur.val,
483 if (fe->ops.i2c_gate_ctrl)
484 fe->ops.i2c_gate_ctrl(fe, 1);
486 if (priv->if_gain_auto->val && priv->lna_gain_auto->cur.val)
488 else if (priv->lna_gain_auto->cur.val)
490 else if (priv->if_gain_auto->val)
495 ret = e4000_wr_reg(priv, 0x1a, u8tmp);
499 if (priv->if_gain_auto->val == false) {
500 buf[0] = e4000_if_gain_lut[priv->if_gain->val].reg16_val;
501 buf[1] = e4000_if_gain_lut[priv->if_gain->val].reg17_val;
502 ret = e4000_wr_regs(priv, 0x16, buf, 2);
507 if (fe->ops.i2c_gate_ctrl)
508 fe->ops.i2c_gate_ctrl(fe, 0);
512 if (fe->ops.i2c_gate_ctrl)
513 fe->ops.i2c_gate_ctrl(fe, 0);
515 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
519 static int e4000_pll_lock(struct dvb_frontend *fe)
521 struct e4000_priv *priv = fe->tuner_priv;
525 if (priv->active == false)
528 if (fe->ops.i2c_gate_ctrl)
529 fe->ops.i2c_gate_ctrl(fe, 1);
531 ret = e4000_rd_reg(priv, 0x07, &u8tmp);
535 priv->pll_lock->val = (u8tmp & 0x01);
537 if (fe->ops.i2c_gate_ctrl)
538 fe->ops.i2c_gate_ctrl(fe, 0);
541 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
546 static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
548 struct e4000_priv *priv =
549 container_of(ctrl->handler, struct e4000_priv, hdl);
553 case V4L2_CID_RF_TUNER_PLL_LOCK:
554 ret = e4000_pll_lock(priv->fe);
563 static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
565 struct e4000_priv *priv =
566 container_of(ctrl->handler, struct e4000_priv, hdl);
567 struct dvb_frontend *fe = priv->fe;
568 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
570 dev_dbg(&priv->client->dev,
571 "%s: id=%d name=%s val=%d min=%d max=%d step=%d\n",
572 __func__, ctrl->id, ctrl->name, ctrl->val,
573 ctrl->minimum, ctrl->maximum, ctrl->step);
576 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
577 case V4L2_CID_RF_TUNER_BANDWIDTH:
578 c->bandwidth_hz = priv->bandwidth->val;
579 ret = e4000_set_params(priv->fe);
581 case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
582 case V4L2_CID_RF_TUNER_LNA_GAIN:
583 ret = e4000_set_lna_gain(priv->fe);
585 case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
586 case V4L2_CID_RF_TUNER_MIXER_GAIN:
587 ret = e4000_set_mixer_gain(priv->fe);
589 case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
590 case V4L2_CID_RF_TUNER_IF_GAIN:
591 ret = e4000_set_if_gain(priv->fe);
600 static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
601 .g_volatile_ctrl = e4000_g_volatile_ctrl,
602 .s_ctrl = e4000_s_ctrl,
605 static const struct dvb_tuner_ops e4000_tuner_ops = {
607 .name = "Elonics E4000",
608 .frequency_min = 174000000,
609 .frequency_max = 862000000,
613 .sleep = e4000_sleep,
614 .set_params = e4000_set_params,
616 .get_if_frequency = e4000_get_if_frequency,
620 * Use V4L2 subdev to carry V4L2 control handler, even we don't implement
621 * subdev itself, just to avoid reinventing the wheel.
623 static int e4000_probe(struct i2c_client *client,
624 const struct i2c_device_id *id)
626 struct e4000_config *cfg = client->dev.platform_data;
627 struct dvb_frontend *fe = cfg->fe;
628 struct e4000_priv *priv;
632 if (fe->ops.i2c_gate_ctrl)
633 fe->ops.i2c_gate_ctrl(fe, 1);
635 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
638 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
642 priv->clock = cfg->clock;
643 priv->client = client;
646 /* check if the tuner is there */
647 ret = e4000_rd_reg(priv, 0x02, &chip_id);
651 dev_dbg(&priv->client->dev,
652 "%s: chip_id=%02x\n", __func__, chip_id);
654 if (chip_id != 0x40) {
659 /* put sleep as chip seems to be in normal mode by default */
660 ret = e4000_wr_reg(priv, 0x00, 0x00);
664 /* Register controls */
665 v4l2_ctrl_handler_init(&priv->hdl, 9);
666 priv->bandwidth_auto = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
667 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
668 priv->bandwidth = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
669 V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
670 v4l2_ctrl_auto_cluster(2, &priv->bandwidth_auto, 0, false);
671 priv->lna_gain_auto = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
672 V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
673 priv->lna_gain = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
674 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
675 v4l2_ctrl_auto_cluster(2, &priv->lna_gain_auto, 0, false);
676 priv->mixer_gain_auto = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
677 V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
678 priv->mixer_gain = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
679 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
680 v4l2_ctrl_auto_cluster(2, &priv->mixer_gain_auto, 0, false);
681 priv->if_gain_auto = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
682 V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
683 priv->if_gain = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
684 V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
685 v4l2_ctrl_auto_cluster(2, &priv->if_gain_auto, 0, false);
686 priv->pll_lock = v4l2_ctrl_new_std(&priv->hdl, &e4000_ctrl_ops,
687 V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
688 if (priv->hdl.error) {
689 ret = priv->hdl.error;
690 dev_err(&priv->client->dev, "Could not initialize controls\n");
691 v4l2_ctrl_handler_free(&priv->hdl);
695 priv->sd.ctrl_handler = &priv->hdl;
697 dev_info(&priv->client->dev,
698 "%s: Elonics E4000 successfully identified\n",
701 fe->tuner_priv = priv;
702 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
703 sizeof(struct dvb_tuner_ops));
705 v4l2_set_subdevdata(&priv->sd, client);
706 i2c_set_clientdata(client, &priv->sd);
708 if (fe->ops.i2c_gate_ctrl)
709 fe->ops.i2c_gate_ctrl(fe, 0);
713 if (fe->ops.i2c_gate_ctrl)
714 fe->ops.i2c_gate_ctrl(fe, 0);
716 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
721 static int e4000_remove(struct i2c_client *client)
723 struct v4l2_subdev *sd = i2c_get_clientdata(client);
724 struct e4000_priv *priv = container_of(sd, struct e4000_priv, sd);
725 struct dvb_frontend *fe = priv->fe;
727 dev_dbg(&client->dev, "%s:\n", __func__);
728 v4l2_ctrl_handler_free(&priv->hdl);
729 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
730 fe->tuner_priv = NULL;
736 static const struct i2c_device_id e4000_id[] = {
740 MODULE_DEVICE_TABLE(i2c, e4000_id);
742 static struct i2c_driver e4000_driver = {
744 .owner = THIS_MODULE,
747 .probe = e4000_probe,
748 .remove = e4000_remove,
749 .id_table = e4000_id,
752 module_i2c_driver(e4000_driver);
754 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
755 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
756 MODULE_LICENSE("GPL");