1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Linaro Ltd.
6 #include <linux/device.h>
7 #include <linux/firmware.h>
8 #include <linux/kernel.h>
9 #include <linux/iommu.h>
12 #include <linux/of_address.h>
13 #include <linux/platform_device.h>
14 #include <linux/of_device.h>
15 #include <linux/qcom_scm.h>
16 #include <linux/sizes.h>
17 #include <linux/soc/qcom/mdt_loader.h>
21 #include "hfi_venus_io.h"
23 #define VENUS_PAS_ID 9
24 #define VENUS_FW_MEM_SIZE (6 * SZ_1M)
25 #define VENUS_FW_START_ADDR 0x0
27 static void venus_reset_cpu(struct venus_core *core)
29 u32 fw_size = core->fw.mapped_mem_size;
30 void __iomem *base = core->base;
32 writel(0, base + WRAPPER_FW_START_ADDR);
33 writel(fw_size, base + WRAPPER_FW_END_ADDR);
34 writel(0, base + WRAPPER_CPA_START_ADDR);
35 writel(fw_size, base + WRAPPER_CPA_END_ADDR);
36 writel(fw_size, base + WRAPPER_NONPIX_START_ADDR);
37 writel(fw_size, base + WRAPPER_NONPIX_END_ADDR);
38 writel(0x0, base + WRAPPER_CPU_CGC_DIS);
39 writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG);
41 /* Bring ARM9 out of reset */
42 writel(0, base + WRAPPER_A9SS_SW_RESET);
45 int venus_set_hw_state(struct venus_core *core, bool resume)
48 return qcom_scm_set_remote_state(resume, 0);
51 venus_reset_cpu(core);
53 writel(1, core->base + WRAPPER_A9SS_SW_RESET);
58 static int venus_load_fw(struct venus_core *core, const char *fwname,
59 phys_addr_t *mem_phys, size_t *mem_size)
61 const struct firmware *mdt;
62 struct device_node *node;
73 node = of_parse_phandle(dev->of_node, "memory-region", 0);
75 dev_err(dev, "no memory-region specified\n");
79 ret = of_address_to_resource(node, 0, &r);
83 ret = request_firmware(&mdt, fwname, dev);
87 fw_size = qcom_mdt_get_size(mdt);
94 *mem_size = resource_size(&r);
96 if (*mem_size < fw_size || fw_size > VENUS_FW_MEM_SIZE) {
101 mem_va = memremap(r.start, *mem_size, MEMREMAP_WC);
103 dev_err(dev, "unable to map memory region: %pa+%zx\n",
104 &r.start, *mem_size);
110 ret = qcom_mdt_load(dev, mdt, fwname, VENUS_PAS_ID,
111 mem_va, *mem_phys, *mem_size, NULL);
113 ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID,
114 mem_va, *mem_phys, *mem_size, NULL);
118 release_firmware(mdt);
122 static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys,
125 struct iommu_domain *iommu;
131 return -EPROBE_DEFER;
133 iommu = core->fw.iommu_domain;
134 core->fw.mapped_mem_size = mem_size;
136 ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size,
137 IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV);
139 dev_err(dev, "could not map video firmware region\n");
143 venus_reset_cpu(core);
148 static int venus_shutdown_no_tz(struct venus_core *core)
150 const size_t mapped = core->fw.mapped_mem_size;
151 struct iommu_domain *iommu;
154 struct device *dev = core->fw.dev;
155 void __iomem *base = core->base;
157 /* Assert the reset to ARM9 */
158 reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET);
159 reg |= WRAPPER_A9SS_SW_RESET_BIT;
160 writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET);
162 /* Make sure reset is asserted before the mapping is removed */
165 iommu = core->fw.iommu_domain;
167 unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, mapped);
168 if (unmapped != mapped)
169 dev_err(dev, "failed to unmap firmware\n");
174 int venus_boot(struct venus_core *core)
176 struct device *dev = core->dev;
177 phys_addr_t mem_phys;
181 if (!IS_ENABLED(CONFIG_QCOM_MDT_LOADER) ||
182 (core->use_tz && !qcom_scm_is_available()))
183 return -EPROBE_DEFER;
185 ret = venus_load_fw(core, core->res->fwname, &mem_phys, &mem_size);
187 dev_err(dev, "fail to load video firmware\n");
192 ret = qcom_scm_pas_auth_and_reset(VENUS_PAS_ID);
194 ret = venus_boot_no_tz(core, mem_phys, mem_size);
199 int venus_shutdown(struct venus_core *core)
204 ret = qcom_scm_pas_shutdown(VENUS_PAS_ID);
206 ret = venus_shutdown_no_tz(core);
211 int venus_firmware_init(struct venus_core *core)
213 struct platform_device_info info;
214 struct iommu_domain *iommu_dom;
215 struct platform_device *pdev;
216 struct device_node *np;
219 np = of_get_child_by_name(core->dev->of_node, "video-firmware");
225 memset(&info, 0, sizeof(info));
226 info.fwnode = &np->fwnode;
227 info.parent = core->dev;
228 info.name = np->name;
229 info.dma_mask = DMA_BIT_MASK(32);
231 pdev = platform_device_register_full(&info);
234 return PTR_ERR(pdev);
237 pdev->dev.of_node = np;
239 ret = of_dma_configure(&pdev->dev, np, true);
241 dev_err(core->dev, "dma configure fail\n");
245 core->fw.dev = &pdev->dev;
247 iommu_dom = iommu_domain_alloc(&platform_bus_type);
249 dev_err(core->fw.dev, "Failed to allocate iommu domain\n");
254 ret = iommu_attach_device(iommu_dom, core->fw.dev);
256 dev_err(core->fw.dev, "could not attach device\n");
260 core->fw.iommu_domain = iommu_dom;
267 iommu_domain_free(iommu_dom);
269 platform_device_unregister(pdev);
274 void venus_firmware_deinit(struct venus_core *core)
276 struct iommu_domain *iommu;
281 iommu = core->fw.iommu_domain;
283 iommu_detach_device(iommu, core->fw.dev);
284 iommu_domain_free(iommu);
286 platform_device_unregister(to_platform_device(core->fw.dev));