1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Microchip Image Sensor Controller (ISC) driver header file
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
8 * Author: Eugen Hristev <eugen.hristev@microchip.com>
13 #define ISC_CLK_MAX_DIV 255
23 struct regmap *regmap;
24 spinlock_t lock; /* serialize access to clock registers */
31 #define to_isc_clk(v) container_of(v, struct isc_clk, hw)
34 struct vb2_v4l2_buffer vb;
35 struct list_head list;
38 struct isc_subdev_entity {
39 struct v4l2_subdev *sd;
40 struct v4l2_async_subdev *asd;
41 struct device_node *epn;
42 struct v4l2_async_notifier notifier;
46 struct list_head list;
50 * struct isc_format - ISC media bus format information
51 This structure represents the interface between the ISC
52 and the sensor. It's the input format received by
54 * @fourcc: Fourcc code for this format
55 * @mbus_code: V4L2 media bus format code.
56 * @cfa_baycfg: If this format is RAW BAYER, indicate the type of bayer.
57 this is either BGBG, RGRG, etc.
58 * @pfe_cfg0_bps: Number of hardware data lines connected to the ISC
71 #define DPC_DPCENABLE BIT(0)
72 #define DPC_GDCENABLE BIT(1)
73 #define DPC_BLCENABLE BIT(2)
74 #define WB_ENABLE BIT(3)
75 #define CFA_ENABLE BIT(4)
76 #define CC_ENABLE BIT(5)
77 #define GAM_ENABLE BIT(6)
78 #define GAM_BENABLE BIT(7)
79 #define GAM_GENABLE BIT(8)
80 #define GAM_RENABLE BIT(9)
81 #define VHXS_ENABLE BIT(10)
82 #define CSC_ENABLE BIT(11)
83 #define CBC_ENABLE BIT(12)
84 #define SUB422_ENABLE BIT(13)
85 #define SUB420_ENABLE BIT(14)
87 #define GAM_ENABLES (GAM_RENABLE | GAM_GENABLE | GAM_BENABLE | GAM_ENABLE)
90 * struct fmt_config - ISC format configuration and internal pipeline
91 This structure represents the internal configuration
93 It also holds the format that ISC will present to v4l2.
94 * @sd_format: Pointer to an isc_format struct that holds the sensor
96 * @fourcc: Fourcc code for this format.
97 * @bpp: Bytes per pixel in the current format.
98 * @rlp_cfg_mode: Configuration of the RLP (rounding, limiting packaging)
99 * @dcfg_imode: Configuration of the input of the DMA module
100 * @dctrl_dview: Configuration of the output of the DMA module
101 * @bits_pipeline: Configuration of the pipeline, which modules are enabled
104 struct isc_format *sd_format;
116 #define HIST_ENTRIES 512
117 #define HIST_BAYER (ISC_HIS_CFG_MODE_B + 1)
126 struct v4l2_ctrl_handler handler;
131 #define ISC_WB_NONE 0
132 #define ISC_WB_AUTO 1
133 #define ISC_WB_ONETIME 2
136 /* one for each component : GR, R, GB, B */
137 u32 gain[HIST_BAYER];
138 s32 offset[HIST_BAYER];
140 u32 hist_entry[HIST_ENTRIES];
141 u32 hist_count[HIST_BAYER];
144 #define HIST_MIN_INDEX 0
145 #define HIST_MAX_INDEX 1
146 u32 hist_minmax[HIST_BAYER][2];
149 #define ISC_PIPE_LINE_NODE_NUM 15
152 * struct isc_reg_offsets - ISC device register offsets
153 * @csc: Offset for the CSC register
154 * @cbc: Offset for the CBC register
155 * @sub422: Offset for the SUB422 register
156 * @sub420: Offset for the SUB420 register
157 * @rlp: Offset for the RLP register
158 * @his: Offset for the HIS related registers
159 * @dma: Offset for the DMA related registers
160 * @version: Offset for the version register
161 * @his_entry: Offset for the HIS entries registers
163 struct isc_reg_offsets {
176 * struct isc_device - ISC device driver data/config struct
177 * @regmap: Register map
178 * @hclock: Hclock clock input (refer datasheet)
179 * @ispck: iscpck clock (refer datasheet)
180 * @isc_clks: ISC clocks
181 * @ispck_required: ISC requires ISP Clock initialization
182 * @dcfg: DMA master configuration, architecture dependent
184 * @dev: Registered device driver
185 * @v4l2_dev: v4l2 registered device
186 * @video_dev: registered video device
188 * @vb2_vidq: video buffer 2 video queue
189 * @dma_queue_lock: lock to serialize the dma buffer queue
190 * @dma_queue: the queue for dma buffers
191 * @cur_frm: current isc frame/buffer
192 * @sequence: current frame number
193 * @stop: true if isc is not streaming, false if streaming
194 * @comp: completion reference that signals frame completion
196 * @fmt: current v42l format
197 * @user_formats: list of formats that are supported and agreed with sd
198 * @num_user_formats: how many formats are in user_formats
200 * @config: current ISC format configuration
201 * @try_config: the current ISC try format , not yet activated
203 * @ctrls: holds information about ISC controls
204 * @do_wb_ctrl: control regarding the DO_WHITE_BALANCE button
205 * @awb_work: workqueue reference for autowhitebalance histogram
208 * @lock: lock for serializing userspace file operations
209 * with ISC operations
210 * @awb_lock: lock for serializing awb work queue operations
211 * with DMA/buffer operations
213 * @pipeline: configuration of the ISC pipeline
215 * @current_subdev: current subdevice: the sensor
216 * @subdev_entities: list of subdevice entitites
218 * @gamma_table: pointer to the table with gamma values, has
219 * gamma_max sets of GAMMA_ENTRIES entries each
220 * @gamma_max: maximum number of sets of inside the gamma_table
222 * @max_width: maximum frame width, dependent on the internal RAM
223 * @max_height: maximum frame height, dependent on the internal RAM
225 * @config_dpc: pointer to a function that initializes product
226 * specific DPC module
227 * @config_csc: pointer to a function that initializes product
228 * specific CSC module
229 * @config_cbc: pointer to a function that initializes product
230 * specific CBC module
231 * @config_cc: pointer to a function that initializes product
233 * @config_gam: pointer to a function that initializes product
234 * specific GAMMA module
235 * @config_rlp: pointer to a function that initializes product
236 * specific RLP module
237 * @config_ctrls: pointer to a functoin that initializes product
238 * specific v4l2 controls.
240 * @adapt_pipeline: pointer to a function that adapts the pipeline bits
241 * to the product specific pipeline
243 * @offsets: struct holding the product specific register offsets
244 * @controller_formats: pointer to the array of possible formats that the
245 * controller can output
246 * @formats_list: pointer to the array of possible formats that can
247 * be used as an input to the controller
248 * @controller_formats_size: size of controller_formats array
249 * @formats_list_size: size of formats_list array
252 struct regmap *regmap;
255 struct isc_clk isc_clks[2];
260 struct v4l2_device v4l2_dev;
261 struct video_device video_dev;
263 struct vb2_queue vb2_vidq;
264 spinlock_t dma_queue_lock; /* serialize access to dma queue */
265 struct list_head dma_queue;
266 struct isc_buffer *cur_frm;
267 unsigned int sequence;
269 struct completion comp;
271 struct v4l2_format fmt;
272 struct isc_format **user_formats;
273 unsigned int num_user_formats;
275 struct fmt_config config;
276 struct fmt_config try_config;
278 struct isc_ctrls ctrls;
279 struct work_struct awb_work;
281 struct mutex lock; /* serialize access to file operations */
282 spinlock_t awb_lock; /* serialize access to DMA buffers from awb work queue */
284 struct regmap_field *pipeline[ISC_PIPE_LINE_NODE_NUM];
286 struct isc_subdev_entity *current_subdev;
287 struct list_head subdev_entities;
290 #define ISC_CTRL_DO_WB 1
291 #define ISC_CTRL_R_GAIN 2
292 #define ISC_CTRL_B_GAIN 3
293 #define ISC_CTRL_GR_GAIN 4
294 #define ISC_CTRL_GB_GAIN 5
295 #define ISC_CTRL_R_OFF 6
296 #define ISC_CTRL_B_OFF 7
297 #define ISC_CTRL_GR_OFF 8
298 #define ISC_CTRL_GB_OFF 9
299 struct v4l2_ctrl *awb_ctrl;
300 struct v4l2_ctrl *do_wb_ctrl;
301 struct v4l2_ctrl *r_gain_ctrl;
302 struct v4l2_ctrl *b_gain_ctrl;
303 struct v4l2_ctrl *gr_gain_ctrl;
304 struct v4l2_ctrl *gb_gain_ctrl;
305 struct v4l2_ctrl *r_off_ctrl;
306 struct v4l2_ctrl *b_off_ctrl;
307 struct v4l2_ctrl *gr_off_ctrl;
308 struct v4l2_ctrl *gb_off_ctrl;
311 #define GAMMA_ENTRIES 64
312 /* pointer to the defined gamma table */
313 const u32 (*gamma_table)[GAMMA_ENTRIES];
320 void (*config_dpc)(struct isc_device *isc);
321 void (*config_csc)(struct isc_device *isc);
322 void (*config_cbc)(struct isc_device *isc);
323 void (*config_cc)(struct isc_device *isc);
324 void (*config_gam)(struct isc_device *isc);
325 void (*config_rlp)(struct isc_device *isc);
327 void (*config_ctrls)(struct isc_device *isc,
328 const struct v4l2_ctrl_ops *ops);
330 void (*adapt_pipeline)(struct isc_device *isc);
333 struct isc_reg_offsets offsets;
334 const struct isc_format *controller_formats;
335 struct isc_format *formats_list;
336 u32 controller_formats_size;
337 u32 formats_list_size;
340 extern const struct regmap_config isc_regmap_config;
341 extern const struct v4l2_async_notifier_operations isc_async_ops;
343 irqreturn_t isc_interrupt(int irq, void *dev_id);
344 int isc_pipeline_init(struct isc_device *isc);
345 int isc_clk_init(struct isc_device *isc);
346 void isc_subdev_cleanup(struct isc_device *isc);
347 void isc_clk_cleanup(struct isc_device *isc);