2 * ddbridge.c: Digital Devices PCIe bridge driver
4 * Copyright (C) 2010-2011 Digital Devices GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * To obtain the license, point your browser to
17 * http://www.gnu.org/copyleft/gpl.html
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/poll.h>
27 #include <linux/pci.h>
28 #include <linux/pci_ids.h>
29 #include <linux/timer.h>
30 #include <linux/i2c.h>
31 #include <linux/swab.h>
32 #include <linux/vmalloc.h>
35 #include "ddbridge-regs.h"
37 #include "tda18271c2dd.h"
43 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
45 /* MSI had problems with lost interrupts, fixed but needs testing */
48 /******************************************************************************/
50 static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
52 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
53 .buf = val, .len = 1 } };
54 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
57 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val)
59 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
60 .buf = ®, .len = 1 },
61 {.addr = adr, .flags = I2C_M_RD,
62 .buf = val, .len = 1 } };
63 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
66 static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
69 u8 msg[2] = {reg>>8, reg&0xff};
70 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
71 .buf = msg, .len = 2},
72 {.addr = adr, .flags = I2C_M_RD,
73 .buf = val, .len = 1} };
74 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
77 static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
79 struct ddb *dev = i2c->dev;
84 ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND);
85 stat = wait_event_timeout(i2c->wq, i2c->done == 1, HZ);
87 printk(KERN_ERR "I2C timeout\n");
89 u32 istat = ddbreadl(INTERRUPT_STATUS);
90 printk(KERN_ERR "IRS %08x\n", istat);
91 ddbwritel(istat, INTERRUPT_ACK);
95 val = ddbreadl(i2c->regs+I2C_COMMAND);
101 static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
102 struct i2c_msg msg[], int num)
104 struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
105 struct ddb *dev = i2c->dev;
111 if (num == 2 && msg[1].flags & I2C_M_RD &&
112 !(msg[0].flags & I2C_M_RD)) {
113 memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf,
114 msg[0].buf, msg[0].len);
115 ddbwritel(msg[0].len|(msg[1].len << 16),
116 i2c->regs+I2C_TASKLENGTH);
117 if (!ddb_i2c_cmd(i2c, addr, 1)) {
118 memcpy_fromio(msg[1].buf,
119 dev->regs + I2C_TASKMEM_BASE + i2c->rbuf,
125 if (num == 1 && !(msg[0].flags & I2C_M_RD)) {
126 ddbcpyto(I2C_TASKMEM_BASE + i2c->wbuf, msg[0].buf, msg[0].len);
127 ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH);
128 if (!ddb_i2c_cmd(i2c, addr, 2))
131 if (num == 1 && (msg[0].flags & I2C_M_RD)) {
132 ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);
133 if (!ddb_i2c_cmd(i2c, addr, 3)) {
134 ddbcpyfrom(msg[0].buf,
135 I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len);
143 static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
145 return I2C_FUNC_SMBUS_EMUL;
148 static struct i2c_algorithm ddb_i2c_algo = {
149 .master_xfer = ddb_i2c_master_xfer,
150 .functionality = ddb_i2c_functionality,
153 static void ddb_i2c_release(struct ddb *dev)
157 struct i2c_adapter *adap;
159 for (i = 0; i < dev->info->port_num; i++) {
162 i2c_del_adapter(adap);
166 static int ddb_i2c_init(struct ddb *dev)
170 struct i2c_adapter *adap;
172 for (i = 0; i < dev->info->port_num; i++) {
176 i2c->wbuf = i * (I2C_TASKMEM_SIZE / 4);
177 i2c->rbuf = i2c->wbuf + (I2C_TASKMEM_SIZE / 8);
178 i2c->regs = 0x80 + i * 0x20;
179 ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING);
180 ddbwritel((i2c->rbuf << 16) | i2c->wbuf,
181 i2c->regs + I2C_TASKADDRESS);
182 init_waitqueue_head(&i2c->wq);
185 i2c_set_adapdata(adap, i2c);
186 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
187 adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
189 #ifdef I2C_CLASS_TV_ANALOG
190 adap->class = I2C_CLASS_TV_ANALOG;
193 strcpy(adap->name, "ddbridge");
194 adap->algo = &ddb_i2c_algo;
195 adap->algo_data = (void *)i2c;
196 adap->dev.parent = &dev->pdev->dev;
197 stat = i2c_add_adapter(adap);
202 for (j = 0; j < i; j++) {
205 i2c_del_adapter(adap);
211 /******************************************************************************/
212 /******************************************************************************/
213 /******************************************************************************/
216 static void set_table(struct ddb *dev, u32 off,
217 dma_addr_t *pbuf, u32 num)
222 base = DMA_BASE_ADDRESS_TABLE + off;
223 for (i = 0; i < num; i++) {
225 ddbwritel(mem & 0xffffffff, base + i * 8);
226 ddbwritel(mem >> 32, base + i * 8 + 4);
231 static void ddb_address_table(struct ddb *dev)
237 for (i = 0; i < dev->info->port_num * 2; i++) {
238 base = DMA_BASE_ADDRESS_TABLE + i * 0x100;
239 pbuf = dev->input[i].pbuf;
240 for (j = 0; j < dev->input[i].dma_buf_num; j++) {
242 ddbwritel(mem & 0xffffffff, base + j * 8);
243 ddbwritel(mem >> 32, base + j * 8 + 4);
246 for (i = 0; i < dev->info->port_num; i++) {
247 base = DMA_BASE_ADDRESS_TABLE + 0x800 + i * 0x100;
248 pbuf = dev->output[i].pbuf;
249 for (j = 0; j < dev->output[i].dma_buf_num; j++) {
251 ddbwritel(mem & 0xffffffff, base + j * 8);
252 ddbwritel(mem >> 32, base + j * 8 + 4);
257 static void io_free(struct pci_dev *pdev, u8 **vbuf,
258 dma_addr_t *pbuf, u32 size, int num)
262 for (i = 0; i < num; i++) {
264 pci_free_consistent(pdev, size, vbuf[i], pbuf[i]);
270 static int io_alloc(struct pci_dev *pdev, u8 **vbuf,
271 dma_addr_t *pbuf, u32 size, int num)
275 for (i = 0; i < num; i++) {
276 vbuf[i] = pci_alloc_consistent(pdev, size, &pbuf[i]);
283 static int ddb_buffers_alloc(struct ddb *dev)
286 struct ddb_port *port;
288 for (i = 0; i < dev->info->port_num; i++) {
289 port = &dev->port[i];
290 switch (port->class) {
292 if (io_alloc(dev->pdev, port->input[0]->vbuf,
293 port->input[0]->pbuf,
294 port->input[0]->dma_buf_size,
295 port->input[0]->dma_buf_num) < 0)
297 if (io_alloc(dev->pdev, port->input[1]->vbuf,
298 port->input[1]->pbuf,
299 port->input[1]->dma_buf_size,
300 port->input[1]->dma_buf_num) < 0)
304 if (io_alloc(dev->pdev, port->input[0]->vbuf,
305 port->input[0]->pbuf,
306 port->input[0]->dma_buf_size,
307 port->input[0]->dma_buf_num) < 0)
309 if (io_alloc(dev->pdev, port->output->vbuf,
311 port->output->dma_buf_size,
312 port->output->dma_buf_num) < 0)
319 ddb_address_table(dev);
323 static void ddb_buffers_free(struct ddb *dev)
326 struct ddb_port *port;
328 for (i = 0; i < dev->info->port_num; i++) {
329 port = &dev->port[i];
330 io_free(dev->pdev, port->input[0]->vbuf,
331 port->input[0]->pbuf,
332 port->input[0]->dma_buf_size,
333 port->input[0]->dma_buf_num);
334 io_free(dev->pdev, port->input[1]->vbuf,
335 port->input[1]->pbuf,
336 port->input[1]->dma_buf_size,
337 port->input[1]->dma_buf_num);
338 io_free(dev->pdev, port->output->vbuf,
340 port->output->dma_buf_size,
341 port->output->dma_buf_num);
345 static void ddb_input_start(struct ddb_input *input)
347 struct ddb *dev = input->port->dev;
349 spin_lock_irq(&input->lock);
354 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
355 ddbwritel(2, TS_INPUT_CONTROL(input->nr));
356 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
358 ddbwritel((1 << 16) |
359 (input->dma_buf_num << 11) |
360 (input->dma_buf_size >> 7),
361 DMA_BUFFER_SIZE(input->nr));
362 ddbwritel(0, DMA_BUFFER_ACK(input->nr));
364 ddbwritel(1, DMA_BASE_WRITE);
365 ddbwritel(3, DMA_BUFFER_CONTROL(input->nr));
366 ddbwritel(9, TS_INPUT_CONTROL(input->nr));
368 spin_unlock_irq(&input->lock);
371 static void ddb_input_stop(struct ddb_input *input)
373 struct ddb *dev = input->port->dev;
375 spin_lock_irq(&input->lock);
376 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
377 ddbwritel(0, DMA_BUFFER_CONTROL(input->nr));
379 spin_unlock_irq(&input->lock);
382 static void ddb_output_start(struct ddb_output *output)
384 struct ddb *dev = output->port->dev;
386 spin_lock_irq(&output->lock);
389 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
390 ddbwritel(2, TS_OUTPUT_CONTROL(output->nr));
391 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
392 ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr));
393 ddbwritel((1 << 16) |
394 (output->dma_buf_num << 11) |
395 (output->dma_buf_size >> 7),
396 DMA_BUFFER_SIZE(output->nr + 8));
397 ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8));
399 ddbwritel(1, DMA_BASE_READ);
400 ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8));
401 /* ddbwritel(0xbd, TS_OUTPUT_CONTROL(output->nr)); */
402 ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr));
404 spin_unlock_irq(&output->lock);
407 static void ddb_output_stop(struct ddb_output *output)
409 struct ddb *dev = output->port->dev;
411 spin_lock_irq(&output->lock);
412 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
413 ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8));
415 spin_unlock_irq(&output->lock);
418 static u32 ddb_output_free(struct ddb_output *output)
420 u32 idx, off, stat = output->stat;
423 idx = (stat >> 11) & 0x1f;
424 off = (stat & 0x7ff) << 7;
426 if (output->cbuf != idx) {
427 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
428 (output->dma_buf_size - output->coff <= 188))
432 diff = off - output->coff;
433 if (diff <= 0 || diff > 188)
438 static ssize_t ddb_output_write(struct ddb_output *output,
439 const __user u8 *buf, size_t count)
441 struct ddb *dev = output->port->dev;
442 u32 idx, off, stat = output->stat;
443 u32 left = count, len;
445 idx = (stat >> 11) & 0x1f;
446 off = (stat & 0x7ff) << 7;
449 len = output->dma_buf_size - output->coff;
450 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
456 if (output->cbuf == idx) {
457 if (off > output->coff) {
459 len = off - output->coff;
470 if (copy_from_user(output->vbuf[output->cbuf] + output->coff,
476 if (output->coff == output->dma_buf_size) {
478 output->cbuf = ((output->cbuf + 1) % output->dma_buf_num);
480 ddbwritel((output->cbuf << 11) | (output->coff >> 7),
481 DMA_BUFFER_ACK(output->nr + 8));
486 static u32 ddb_input_avail(struct ddb_input *input)
488 struct ddb *dev = input->port->dev;
489 u32 idx, off, stat = input->stat;
490 u32 ctrl = ddbreadl(DMA_BUFFER_CONTROL(input->nr));
492 idx = (stat >> 11) & 0x1f;
493 off = (stat & 0x7ff) << 7;
496 printk(KERN_ERR "IA %d %d %08x\n", idx, off, ctrl);
497 ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr));
500 if (input->cbuf != idx)
505 static ssize_t ddb_input_read(struct ddb_input *input, __user u8 *buf, size_t count)
507 struct ddb *dev = input->port->dev;
509 u32 idx, free, stat = input->stat;
512 idx = (stat >> 11) & 0x1f;
515 if (input->cbuf == idx)
517 free = input->dma_buf_size - input->coff;
520 ret = copy_to_user(buf, input->vbuf[input->cbuf] +
525 if (input->coff == input->dma_buf_size) {
527 input->cbuf = (input->cbuf+1) % input->dma_buf_num;
530 ddbwritel((input->cbuf << 11) | (input->coff >> 7),
531 DMA_BUFFER_ACK(input->nr));
536 /******************************************************************************/
537 /******************************************************************************/
538 /******************************************************************************/
541 static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe)
545 for (i = 0; i < dev->info->port_num * 2; i++) {
546 if (dev->input[i].fe == fe)
547 return &dev->input[i];
553 static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
555 struct ddb_input *input = fe->sec_priv;
556 struct ddb_port *port = input->port;
560 mutex_lock(&port->i2c_gate_lock);
561 status = input->gate_ctrl(fe, 1);
563 status = input->gate_ctrl(fe, 0);
564 mutex_unlock(&port->i2c_gate_lock);
569 static int demod_attach_drxk(struct ddb_input *input)
571 struct i2c_adapter *i2c = &input->port->i2c->adap;
572 struct dvb_frontend *fe;
573 struct drxk_config config;
575 memset(&config, 0, sizeof(config));
576 config.microcode_name = "drxk_a3.mc";
577 config.qam_demod_parameter_count = 4;
578 config.adr = 0x29 + (input->nr & 1);
580 fe = input->fe = dvb_attach(drxk_attach, &config, i2c);
582 printk(KERN_ERR "No DRXK found!\n");
585 fe->sec_priv = input;
586 input->gate_ctrl = fe->ops.i2c_gate_ctrl;
587 fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
591 static int tuner_attach_tda18271(struct ddb_input *input)
593 struct i2c_adapter *i2c = &input->port->i2c->adap;
594 struct dvb_frontend *fe;
596 if (input->fe->ops.i2c_gate_ctrl)
597 input->fe->ops.i2c_gate_ctrl(input->fe, 1);
598 fe = dvb_attach(tda18271c2dd_attach, input->fe, i2c, 0x60);
600 printk(KERN_ERR "No TDA18271 found!\n");
603 if (input->fe->ops.i2c_gate_ctrl)
604 input->fe->ops.i2c_gate_ctrl(input->fe, 0);
608 /******************************************************************************/
609 /******************************************************************************/
610 /******************************************************************************/
612 static struct stv090x_config stv0900 = {
614 .demod_mode = STV090x_DUAL,
615 .clk_mode = STV090x_CLK_EXT,
620 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
621 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
623 .repeater_level = STV090x_RPTLEVEL_16,
625 .adc1_range = STV090x_ADC_1Vpp,
626 .adc2_range = STV090x_ADC_1Vpp,
628 .diseqc_envelope_mode = true,
631 static struct stv090x_config stv0900_aa = {
633 .demod_mode = STV090x_DUAL,
634 .clk_mode = STV090x_CLK_EXT,
639 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
640 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
642 .repeater_level = STV090x_RPTLEVEL_16,
644 .adc1_range = STV090x_ADC_1Vpp,
645 .adc2_range = STV090x_ADC_1Vpp,
647 .diseqc_envelope_mode = true,
650 static struct stv6110x_config stv6110a = {
656 static struct stv6110x_config stv6110b = {
662 static int demod_attach_stv0900(struct ddb_input *input, int type)
664 struct i2c_adapter *i2c = &input->port->i2c->adap;
665 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
667 input->fe = dvb_attach(stv090x_attach, feconf, i2c,
668 (input->nr & 1) ? STV090x_DEMODULATOR_1
669 : STV090x_DEMODULATOR_0);
671 printk(KERN_ERR "No STV0900 found!\n");
674 if (!dvb_attach(lnbh24_attach, input->fe, i2c, 0,
676 (0x09 - type) : (0x0b - type))) {
677 printk(KERN_ERR "No LNBH24 found!\n");
683 static int tuner_attach_stv6110(struct ddb_input *input, int type)
685 struct i2c_adapter *i2c = &input->port->i2c->adap;
686 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
687 struct stv6110x_config *tunerconf = (input->nr & 1) ?
688 &stv6110b : &stv6110a;
689 const struct stv6110x_devctl *ctl;
691 ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c);
693 printk(KERN_ERR "No STV6110X found!\n");
696 printk(KERN_INFO "attach tuner input %d adr %02x\n",
697 input->nr, tunerconf->addr);
699 feconf->tuner_init = ctl->tuner_init;
700 feconf->tuner_sleep = ctl->tuner_sleep;
701 feconf->tuner_set_mode = ctl->tuner_set_mode;
702 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
703 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
704 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
705 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
706 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
707 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
708 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
709 feconf->tuner_get_status = ctl->tuner_get_status;
714 static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
715 int (*start_feed)(struct dvb_demux_feed *),
716 int (*stop_feed)(struct dvb_demux_feed *),
719 dvbdemux->priv = priv;
721 dvbdemux->filternum = 256;
722 dvbdemux->feednum = 256;
723 dvbdemux->start_feed = start_feed;
724 dvbdemux->stop_feed = stop_feed;
725 dvbdemux->write_to_decoder = NULL;
726 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
727 DMX_SECTION_FILTERING |
728 DMX_MEMORY_BASED_FILTERING);
729 return dvb_dmx_init(dvbdemux);
732 static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
733 struct dvb_demux *dvbdemux,
734 struct dmx_frontend *hw_frontend,
735 struct dmx_frontend *mem_frontend,
736 struct dvb_adapter *dvb_adapter)
740 dmxdev->filternum = 256;
741 dmxdev->demux = &dvbdemux->dmx;
742 dmxdev->capabilities = 0;
743 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
747 hw_frontend->source = DMX_FRONTEND_0;
748 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
749 mem_frontend->source = DMX_MEMORY_FE;
750 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
751 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
754 static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
756 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
757 struct ddb_input *input = dvbdmx->priv;
760 ddb_input_start(input);
762 return ++input->users;
765 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
767 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
768 struct ddb_input *input = dvbdmx->priv;
773 ddb_input_stop(input);
778 static void dvb_input_detach(struct ddb_input *input)
780 struct dvb_adapter *adap = &input->adap;
781 struct dvb_demux *dvbdemux = &input->demux;
783 switch (input->attached) {
786 dvb_unregister_frontend(input->fe2);
788 dvb_unregister_frontend(input->fe);
789 dvb_frontend_detach(input->fe);
793 dvb_net_release(&input->dvbnet);
796 dvbdemux->dmx.close(&dvbdemux->dmx);
797 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
798 &input->hw_frontend);
799 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
800 &input->mem_frontend);
801 dvb_dmxdev_release(&input->dmxdev);
804 dvb_dmx_release(&input->demux);
807 dvb_unregister_adapter(adap);
812 static int dvb_input_attach(struct ddb_input *input)
815 struct ddb_port *port = input->port;
816 struct dvb_adapter *adap = &input->adap;
817 struct dvb_demux *dvbdemux = &input->demux;
819 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
820 &input->port->dev->pdev->dev,
823 printk(KERN_ERR "ddbridge: Could not register adapter.Check if you enabled enough adapters in dvb-core!\n");
828 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
835 ret = my_dvb_dmxdev_ts_card_init(&input->dmxdev, &input->demux,
837 &input->mem_frontend, adap);
842 ret = dvb_net_init(adap, &input->dvbnet, input->dmxdev.demux);
848 switch (port->type) {
849 case DDB_TUNER_DVBS_ST:
850 if (demod_attach_stv0900(input, 0) < 0)
852 if (tuner_attach_stv6110(input, 0) < 0)
855 if (dvb_register_frontend(adap, input->fe) < 0)
859 case DDB_TUNER_DVBS_ST_AA:
860 if (demod_attach_stv0900(input, 1) < 0)
862 if (tuner_attach_stv6110(input, 1) < 0)
865 if (dvb_register_frontend(adap, input->fe) < 0)
869 case DDB_TUNER_DVBCT_TR:
870 if (demod_attach_drxk(input) < 0)
872 if (tuner_attach_tda18271(input) < 0)
874 if (dvb_register_frontend(adap, input->fe) < 0)
877 if (dvb_register_frontend(adap, input->fe2) < 0)
879 input->fe2->tuner_priv = input->fe->tuner_priv;
880 memcpy(&input->fe2->ops.tuner_ops,
881 &input->fe->ops.tuner_ops,
882 sizeof(struct dvb_tuner_ops));
890 /****************************************************************************/
891 /****************************************************************************/
893 static ssize_t ts_write(struct file *file, const __user char *buf,
894 size_t count, loff_t *ppos)
896 struct dvb_device *dvbdev = file->private_data;
897 struct ddb_output *output = dvbdev->priv;
902 if (ddb_output_free(output) < 188) {
903 if (file->f_flags & O_NONBLOCK)
905 if (wait_event_interruptible(
906 output->wq, ddb_output_free(output) >= 188) < 0)
909 stat = ddb_output_write(output, buf, left);
915 return (left == count) ? -EAGAIN : (count - left);
918 static ssize_t ts_read(struct file *file, __user char *buf,
919 size_t count, loff_t *ppos)
921 struct dvb_device *dvbdev = file->private_data;
922 struct ddb_output *output = dvbdev->priv;
923 struct ddb_input *input = output->port->input[0];
926 count -= count % 188;
929 if (ddb_input_avail(input) < 188) {
930 if (file->f_flags & O_NONBLOCK)
932 if (wait_event_interruptible(
933 input->wq, ddb_input_avail(input) >= 188) < 0)
936 read = ddb_input_read(input, buf, left);
942 return (left == count) ? -EAGAIN : (count - left);
945 static unsigned int ts_poll(struct file *file, poll_table *wait)
948 struct dvb_device *dvbdev = file->private_data;
949 struct ddb_output *output = dvbdev->priv;
950 struct ddb_input *input = output->port->input[0];
952 unsigned int mask = 0;
955 if (data_avail_to_read)
956 mask |= POLLIN | POLLRDNORM;
957 if (data_avail_to_write)
958 mask |= POLLOUT | POLLWRNORM;
960 poll_wait(file, &read_queue, wait);
961 poll_wait(file, &write_queue, wait);
966 static const struct file_operations ci_fops = {
967 .owner = THIS_MODULE,
970 .open = dvb_generic_open,
971 .release = dvb_generic_release,
975 static struct dvb_device dvbdev_ci = {
982 /****************************************************************************/
983 /****************************************************************************/
984 /****************************************************************************/
986 static void input_tasklet(unsigned long data)
988 struct ddb_input *input = (struct ddb_input *) data;
989 struct ddb *dev = input->port->dev;
991 spin_lock(&input->lock);
992 if (!input->running) {
993 spin_unlock(&input->lock);
996 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
998 if (input->port->class == DDB_PORT_TUNER) {
999 if (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))
1000 printk(KERN_ERR "Overflow input %d\n", input->nr);
1001 while (input->cbuf != ((input->stat >> 11) & 0x1f)
1002 || (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))) {
1003 dvb_dmx_swfilter_packets(&input->demux,
1004 input->vbuf[input->cbuf],
1005 input->dma_buf_size / 188);
1007 input->cbuf = (input->cbuf + 1) % input->dma_buf_num;
1008 ddbwritel((input->cbuf << 11),
1009 DMA_BUFFER_ACK(input->nr));
1010 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1013 if (input->port->class == DDB_PORT_CI)
1014 wake_up(&input->wq);
1015 spin_unlock(&input->lock);
1018 static void output_tasklet(unsigned long data)
1020 struct ddb_output *output = (struct ddb_output *) data;
1021 struct ddb *dev = output->port->dev;
1023 spin_lock(&output->lock);
1024 if (!output->running) {
1025 spin_unlock(&output->lock);
1028 output->stat = ddbreadl(DMA_BUFFER_CURRENT(output->nr + 8));
1029 wake_up(&output->wq);
1030 spin_unlock(&output->lock);
1034 static struct cxd2099_cfg cxd_cfg = {
1041 static int ddb_ci_attach(struct ddb_port *port)
1045 ret = dvb_register_adapter(&port->output->adap,
1048 &port->dev->pdev->dev,
1052 port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
1054 dvb_unregister_adapter(&port->output->adap);
1057 ddb_input_start(port->input[0]);
1058 ddb_output_start(port->output);
1059 dvb_ca_en50221_init(&port->output->adap,
1061 ret = dvb_register_device(&port->output->adap, &port->output->dev,
1062 &dvbdev_ci, (void *) port->output,
1067 static int ddb_port_attach(struct ddb_port *port)
1071 switch (port->class) {
1072 case DDB_PORT_TUNER:
1073 ret = dvb_input_attach(port->input[0]);
1076 ret = dvb_input_attach(port->input[1]);
1079 ret = ddb_ci_attach(port);
1085 printk(KERN_ERR "port_attach on port %d failed\n", port->nr);
1089 static int ddb_ports_attach(struct ddb *dev)
1092 struct ddb_port *port;
1094 for (i = 0; i < dev->info->port_num; i++) {
1095 port = &dev->port[i];
1096 ret = ddb_port_attach(port);
1103 static void ddb_ports_detach(struct ddb *dev)
1106 struct ddb_port *port;
1108 for (i = 0; i < dev->info->port_num; i++) {
1109 port = &dev->port[i];
1110 switch (port->class) {
1111 case DDB_PORT_TUNER:
1112 dvb_input_detach(port->input[0]);
1113 dvb_input_detach(port->input[1]);
1116 dvb_unregister_device(port->output->dev);
1118 ddb_input_stop(port->input[0]);
1119 ddb_output_stop(port->output);
1120 dvb_ca_en50221_release(port->en);
1123 dvb_unregister_adapter(&port->output->adap);
1130 /****************************************************************************/
1131 /****************************************************************************/
1133 static int port_has_ci(struct ddb_port *port)
1136 return i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1;
1139 static int port_has_stv0900(struct ddb_port *port)
1142 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1147 static int port_has_stv0900_aa(struct ddb_port *port)
1150 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, &val) < 0)
1155 static int port_has_drxks(struct ddb_port *port)
1158 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1160 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1165 static void ddb_port_probe(struct ddb_port *port)
1167 struct ddb *dev = port->dev;
1168 char *modname = "NO MODULE";
1170 port->class = DDB_PORT_NONE;
1172 if (port_has_ci(port)) {
1174 port->class = DDB_PORT_CI;
1175 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1176 } else if (port_has_stv0900(port)) {
1177 modname = "DUAL DVB-S2";
1178 port->class = DDB_PORT_TUNER;
1179 port->type = DDB_TUNER_DVBS_ST;
1180 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1181 } else if (port_has_stv0900_aa(port)) {
1182 modname = "DUAL DVB-S2";
1183 port->class = DDB_PORT_TUNER;
1184 port->type = DDB_TUNER_DVBS_ST_AA;
1185 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1186 } else if (port_has_drxks(port)) {
1187 modname = "DUAL DVB-C/T";
1188 port->class = DDB_PORT_TUNER;
1189 port->type = DDB_TUNER_DVBCT_TR;
1190 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1192 printk(KERN_INFO "Port %d (TAB %d): %s\n",
1193 port->nr, port->nr+1, modname);
1196 static void ddb_input_init(struct ddb_port *port, int nr)
1198 struct ddb *dev = port->dev;
1199 struct ddb_input *input = &dev->input[nr];
1203 input->dma_buf_num = INPUT_DMA_BUFS;
1204 input->dma_buf_size = INPUT_DMA_SIZE;
1205 ddbwritel(0, TS_INPUT_CONTROL(nr));
1206 ddbwritel(2, TS_INPUT_CONTROL(nr));
1207 ddbwritel(0, TS_INPUT_CONTROL(nr));
1208 ddbwritel(0, DMA_BUFFER_ACK(nr));
1209 tasklet_init(&input->tasklet, input_tasklet, (unsigned long) input);
1210 spin_lock_init(&input->lock);
1211 init_waitqueue_head(&input->wq);
1214 static void ddb_output_init(struct ddb_port *port, int nr)
1216 struct ddb *dev = port->dev;
1217 struct ddb_output *output = &dev->output[nr];
1219 output->port = port;
1220 output->dma_buf_num = OUTPUT_DMA_BUFS;
1221 output->dma_buf_size = OUTPUT_DMA_SIZE;
1223 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1224 ddbwritel(2, TS_OUTPUT_CONTROL(nr));
1225 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1226 tasklet_init(&output->tasklet, output_tasklet, (unsigned long) output);
1227 init_waitqueue_head(&output->wq);
1230 static void ddb_ports_init(struct ddb *dev)
1233 struct ddb_port *port;
1235 for (i = 0; i < dev->info->port_num; i++) {
1236 port = &dev->port[i];
1239 port->i2c = &dev->i2c[i];
1240 port->input[0] = &dev->input[2 * i];
1241 port->input[1] = &dev->input[2 * i + 1];
1242 port->output = &dev->output[i];
1244 mutex_init(&port->i2c_gate_lock);
1245 ddb_port_probe(port);
1246 ddb_input_init(port, 2 * i);
1247 ddb_input_init(port, 2 * i + 1);
1248 ddb_output_init(port, i);
1252 static void ddb_ports_release(struct ddb *dev)
1255 struct ddb_port *port;
1257 for (i = 0; i < dev->info->port_num; i++) {
1258 port = &dev->port[i];
1260 tasklet_kill(&port->input[0]->tasklet);
1261 tasklet_kill(&port->input[1]->tasklet);
1262 tasklet_kill(&port->output->tasklet);
1266 /****************************************************************************/
1267 /****************************************************************************/
1268 /****************************************************************************/
1270 static void irq_handle_i2c(struct ddb *dev, int n)
1272 struct ddb_i2c *i2c = &dev->i2c[n];
1278 static irqreturn_t irq_handler(int irq, void *dev_id)
1280 struct ddb *dev = (struct ddb *) dev_id;
1281 u32 s = ddbreadl(INTERRUPT_STATUS);
1287 ddbwritel(s, INTERRUPT_ACK);
1290 irq_handle_i2c(dev, 0);
1292 irq_handle_i2c(dev, 1);
1294 irq_handle_i2c(dev, 2);
1296 irq_handle_i2c(dev, 3);
1299 tasklet_schedule(&dev->input[0].tasklet);
1301 tasklet_schedule(&dev->input[1].tasklet);
1303 tasklet_schedule(&dev->input[2].tasklet);
1305 tasklet_schedule(&dev->input[3].tasklet);
1307 tasklet_schedule(&dev->input[4].tasklet);
1309 tasklet_schedule(&dev->input[5].tasklet);
1311 tasklet_schedule(&dev->input[6].tasklet);
1313 tasklet_schedule(&dev->input[7].tasklet);
1316 tasklet_schedule(&dev->output[0].tasklet);
1318 tasklet_schedule(&dev->output[1].tasklet);
1320 tasklet_schedule(&dev->output[2].tasklet);
1322 tasklet_schedule(&dev->output[3].tasklet);
1324 /* if (s & 0x000f0000) printk(KERN_DEBUG "%08x\n", istat); */
1325 } while ((s = ddbreadl(INTERRUPT_STATUS)));
1330 /******************************************************************************/
1331 /******************************************************************************/
1332 /******************************************************************************/
1334 static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
1339 ddbwritel(1, SPI_CONTROL);
1341 /* FIXME: check for big-endian */
1342 data = swab32(*(u32 *)wbuf);
1345 ddbwritel(data, SPI_DATA);
1346 while (ddbreadl(SPI_CONTROL) & 0x0004)
1351 ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1353 ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1356 shift = ((4 - wlen) * 8);
1365 ddbwritel(data, SPI_DATA);
1366 while (ddbreadl(SPI_CONTROL) & 0x0004)
1370 ddbwritel(0, SPI_CONTROL);
1374 ddbwritel(1, SPI_CONTROL);
1377 ddbwritel(0xffffffff, SPI_DATA);
1378 while (ddbreadl(SPI_CONTROL) & 0x0004)
1380 data = ddbreadl(SPI_DATA);
1381 *(u32 *) rbuf = swab32(data);
1385 ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL);
1386 ddbwritel(0xffffffff, SPI_DATA);
1387 while (ddbreadl(SPI_CONTROL) & 0x0004)
1390 data = ddbreadl(SPI_DATA);
1391 ddbwritel(0, SPI_CONTROL);
1394 data <<= ((4 - rlen) * 8);
1397 *rbuf = ((data >> 24) & 0xff);
1405 #define DDB_MAGIC 'd'
1407 struct ddb_flashio {
1408 __user __u8 *write_buf;
1410 __user __u8 *read_buf;
1414 #define IOCTL_DDB_FLASHIO _IOWR(DDB_MAGIC, 0x00, struct ddb_flashio)
1416 #define DDB_NAME "ddbridge"
1419 static struct ddb *ddbs[32];
1420 static struct class *ddb_class;
1421 static int ddb_major;
1423 static int ddb_open(struct inode *inode, struct file *file)
1425 struct ddb *dev = ddbs[iminor(inode)];
1427 file->private_data = dev;
1431 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1433 struct ddb *dev = file->private_data;
1434 __user void *parg = (__user void *)arg;
1438 case IOCTL_DDB_FLASHIO:
1440 struct ddb_flashio fio;
1443 if (copy_from_user(&fio, parg, sizeof(fio)))
1446 if (fio.write_len > 1028 || fio.read_len > 1028)
1448 if (fio.write_len + fio.read_len > 1028)
1451 wbuf = &dev->iobuf[0];
1452 rbuf = wbuf + fio.write_len;
1454 if (copy_from_user(wbuf, fio.write_buf, fio.write_len))
1456 res = flashio(dev, wbuf, fio.write_len, rbuf, fio.read_len);
1459 if (copy_to_user(fio.read_buf, rbuf, fio.read_len))
1469 static const struct file_operations ddb_fops = {
1470 .unlocked_ioctl = ddb_ioctl,
1474 static char *ddb_devnode(struct device *device, umode_t *mode)
1476 struct ddb *dev = dev_get_drvdata(device);
1478 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
1481 static int ddb_class_create(void)
1483 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
1487 ddb_class = class_create(THIS_MODULE, DDB_NAME);
1488 if (IS_ERR(ddb_class)) {
1489 unregister_chrdev(ddb_major, DDB_NAME);
1490 return PTR_ERR(ddb_class);
1492 ddb_class->devnode = ddb_devnode;
1496 static void ddb_class_destroy(void)
1498 class_destroy(ddb_class);
1499 unregister_chrdev(ddb_major, DDB_NAME);
1502 static int ddb_device_create(struct ddb *dev)
1504 dev->nr = ddb_num++;
1505 dev->ddb_dev = device_create(ddb_class, NULL,
1506 MKDEV(ddb_major, dev->nr),
1507 dev, "ddbridge%d", dev->nr);
1508 ddbs[dev->nr] = dev;
1509 if (IS_ERR(dev->ddb_dev))
1514 static void ddb_device_destroy(struct ddb *dev)
1517 if (IS_ERR(dev->ddb_dev))
1519 device_destroy(ddb_class, MKDEV(ddb_major, 0));
1523 /****************************************************************************/
1524 /****************************************************************************/
1525 /****************************************************************************/
1527 static void ddb_unmap(struct ddb *dev)
1535 static void ddb_remove(struct pci_dev *pdev)
1537 struct ddb *dev = pci_get_drvdata(pdev);
1539 ddb_ports_detach(dev);
1540 ddb_i2c_release(dev);
1542 ddbwritel(0, INTERRUPT_ENABLE);
1543 free_irq(dev->pdev->irq, dev);
1544 #ifdef CONFIG_PCI_MSI
1546 pci_disable_msi(dev->pdev);
1548 ddb_ports_release(dev);
1549 ddb_buffers_free(dev);
1550 ddb_device_destroy(dev);
1553 pci_set_drvdata(pdev, NULL);
1554 pci_disable_device(pdev);
1558 static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1562 int irq_flag = IRQF_SHARED;
1564 if (pci_enable_device(pdev) < 0)
1567 dev = vzalloc(sizeof(struct ddb));
1572 pci_set_drvdata(pdev, dev);
1573 dev->info = (struct ddb_info *) id->driver_data;
1574 printk(KERN_INFO "DDBridge driver detected: %s\n", dev->info->name);
1576 dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
1577 pci_resource_len(dev->pdev, 0));
1582 printk(KERN_INFO "HW %08x FW %08x\n", ddbreadl(0), ddbreadl(4));
1584 #ifdef CONFIG_PCI_MSI
1585 if (pci_msi_enabled())
1586 stat = pci_enable_msi(dev->pdev);
1588 printk(KERN_INFO ": MSI not available.\n");
1594 stat = request_irq(dev->pdev->irq, irq_handler,
1595 irq_flag, "DDBridge", (void *) dev);
1598 ddbwritel(0, DMA_BASE_WRITE);
1599 ddbwritel(0, DMA_BASE_READ);
1600 ddbwritel(0xffffffff, INTERRUPT_ACK);
1601 ddbwritel(0xfff0f, INTERRUPT_ENABLE);
1602 ddbwritel(0, MSI1_ENABLE);
1604 if (ddb_i2c_init(dev) < 0)
1606 ddb_ports_init(dev);
1607 if (ddb_buffers_alloc(dev) < 0) {
1608 printk(KERN_INFO ": Could not allocate buffer memory\n");
1611 if (ddb_ports_attach(dev) < 0)
1613 ddb_device_create(dev);
1617 ddb_ports_detach(dev);
1618 printk(KERN_ERR "fail3\n");
1619 ddb_ports_release(dev);
1621 printk(KERN_ERR "fail2\n");
1622 ddb_buffers_free(dev);
1624 printk(KERN_ERR "fail1\n");
1626 pci_disable_msi(dev->pdev);
1628 free_irq(dev->pdev->irq, dev);
1630 printk(KERN_ERR "fail\n");
1632 pci_set_drvdata(pdev, NULL);
1633 pci_disable_device(pdev);
1637 /******************************************************************************/
1638 /******************************************************************************/
1639 /******************************************************************************/
1641 static const struct ddb_info ddb_none = {
1643 .name = "Digital Devices PCIe bridge",
1646 static const struct ddb_info ddb_octopus = {
1647 .type = DDB_OCTOPUS,
1648 .name = "Digital Devices Octopus DVB adapter",
1652 static const struct ddb_info ddb_octopus_le = {
1653 .type = DDB_OCTOPUS,
1654 .name = "Digital Devices Octopus LE DVB adapter",
1658 static const struct ddb_info ddb_octopus_mini = {
1659 .type = DDB_OCTOPUS,
1660 .name = "Digital Devices Octopus Mini",
1664 static const struct ddb_info ddb_v6 = {
1665 .type = DDB_OCTOPUS,
1666 .name = "Digital Devices Cine S2 V6 DVB adapter",
1669 static const struct ddb_info ddb_v6_5 = {
1670 .type = DDB_OCTOPUS,
1671 .name = "Digital Devices Cine S2 V6.5 DVB adapter",
1675 static const struct ddb_info ddb_dvbct = {
1676 .type = DDB_OCTOPUS,
1677 .name = "Digital Devices DVBCT V6.1 DVB adapter",
1681 static const struct ddb_info ddb_satixS2v3 = {
1682 .type = DDB_OCTOPUS,
1683 .name = "Mystique SaTiX-S2 V3 DVB adapter",
1687 static const struct ddb_info ddb_octopusv3 = {
1688 .type = DDB_OCTOPUS,
1689 .name = "Digital Devices Octopus V3 DVB adapter",
1693 #define DDVID 0xdd01 /* Digital Devices Vendor ID */
1695 #define DDB_ID(_vend, _dev, _subvend, _subdev, _driverdata) { \
1696 .vendor = _vend, .device = _dev, \
1697 .subvendor = _subvend, .subdevice = _subdev, \
1698 .driver_data = (unsigned long)&_driverdata }
1700 static const struct pci_device_id ddb_id_tbl[] = {
1701 DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
1702 DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
1703 DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le),
1704 DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus_mini),
1705 DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
1706 DDB_ID(DDVID, 0x0003, DDVID, 0x0021, ddb_v6_5),
1707 DDB_ID(DDVID, 0x0003, DDVID, 0x0030, ddb_dvbct),
1708 DDB_ID(DDVID, 0x0003, DDVID, 0xdb03, ddb_satixS2v3),
1709 DDB_ID(DDVID, 0x0005, DDVID, 0x0004, ddb_octopusv3),
1710 /* in case sub-ids got deleted in flash */
1711 DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
1714 MODULE_DEVICE_TABLE(pci, ddb_id_tbl);
1717 static struct pci_driver ddb_pci_driver = {
1719 .id_table = ddb_id_tbl,
1721 .remove = ddb_remove,
1724 static __init int module_init_ddbridge(void)
1728 printk(KERN_INFO "Digital Devices PCIE bridge driver, Copyright (C) 2010-11 Digital Devices GmbH\n");
1730 ret = ddb_class_create();
1733 ret = pci_register_driver(&ddb_pci_driver);
1735 ddb_class_destroy();
1739 static __exit void module_exit_ddbridge(void)
1741 pci_unregister_driver(&ddb_pci_driver);
1742 ddb_class_destroy();
1745 module_init(module_init_ddbridge);
1746 module_exit(module_exit_ddbridge);
1748 MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
1749 MODULE_AUTHOR("Ralph Metzler");
1750 MODULE_LICENSE("GPL");
1751 MODULE_VERSION("0.5");