2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/delay.h>
22 #include <media/cx25840.h>
23 #include <linux/firmware.h>
24 #include <misc/altera.h>
27 #include "tuner-xc2028.h"
28 #include "netup-eeprom.h"
29 #include "netup-init.h"
30 #include "altera-ci.h"
33 #include "cx23888-ir.h"
35 static unsigned int netup_card_rev = 4;
36 module_param(netup_card_rev, int, 0644);
37 MODULE_PARM_DESC(netup_card_rev,
38 "NetUP Dual DVB-T/C CI card revision");
39 static unsigned int enable_885_ir;
40 module_param(enable_885_ir, int, 0644);
41 MODULE_PARM_DESC(enable_885_ir,
42 "Enable integrated IR controller for supported\n"
43 "\t\t CX2388[57] boards that are wired for it:\n"
44 "\t\t\tHVR-1250 (reported safe)\n"
45 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46 "\t\t\tTeVii S470 (reported unsafe)\n"
47 "\t\t This can cause an interrupt storm with some cards.\n"
48 "\t\t Default: 0 [Disabled]");
50 /* ------------------------------------------------------------------ */
51 /* board config info */
53 struct cx23885_board cx23885_boards[] = {
54 [CX23885_BOARD_UNKNOWN] = {
55 .name = "UNKNOWN/GENERIC",
56 /* Ensure safe default for unknown boards */
59 .type = CX23885_VMUX_COMPOSITE1,
62 .type = CX23885_VMUX_COMPOSITE2,
65 .type = CX23885_VMUX_COMPOSITE3,
68 .type = CX23885_VMUX_COMPOSITE4,
72 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73 .name = "Hauppauge WinTV-HVR1800lp",
74 .portc = CX23885_MPEG_DVB,
76 .type = CX23885_VMUX_TELEVISION,
80 .type = CX23885_VMUX_DEBUG,
84 .type = CX23885_VMUX_COMPOSITE1,
88 .type = CX23885_VMUX_SVIDEO,
93 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94 .name = "Hauppauge WinTV-HVR1800",
95 .porta = CX23885_ANALOG_VIDEO,
96 .portb = CX23885_MPEG_ENCODER,
97 .portc = CX23885_MPEG_DVB,
98 .tuner_type = TUNER_PHILIPS_TDA8290,
99 .tuner_addr = 0x42, /* 0x84 >> 1 */
102 .type = CX23885_VMUX_TELEVISION,
103 .vmux = CX25840_VIN7_CH3 |
106 .amux = CX25840_AUDIO8,
109 .type = CX23885_VMUX_COMPOSITE1,
110 .vmux = CX25840_VIN7_CH3 |
113 .amux = CX25840_AUDIO7,
116 .type = CX23885_VMUX_SVIDEO,
117 .vmux = CX25840_VIN7_CH3 |
121 .amux = CX25840_AUDIO7,
125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126 .name = "Hauppauge WinTV-HVR1250",
127 .porta = CX23885_ANALOG_VIDEO,
128 .portc = CX23885_MPEG_DVB,
129 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130 .tuner_type = TUNER_PHILIPS_TDA8290,
131 .tuner_addr = 0x42, /* 0x84 >> 1 */
136 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137 .type = CX23885_VMUX_TELEVISION,
138 .vmux = CX25840_VIN7_CH3 |
141 .amux = CX25840_AUDIO8,
145 .type = CX23885_VMUX_COMPOSITE1,
146 .vmux = CX25840_VIN7_CH3 |
149 .amux = CX25840_AUDIO7,
152 .type = CX23885_VMUX_SVIDEO,
153 .vmux = CX25840_VIN7_CH3 |
157 .amux = CX25840_AUDIO7,
161 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162 .name = "DViCO FusionHDTV5 Express",
163 .portb = CX23885_MPEG_DVB,
165 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166 .name = "Hauppauge WinTV-HVR1500Q",
167 .portc = CX23885_MPEG_DVB,
169 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170 .name = "Hauppauge WinTV-HVR1500",
171 .porta = CX23885_ANALOG_VIDEO,
172 .portc = CX23885_MPEG_DVB,
173 .tuner_type = TUNER_XC2028,
174 .tuner_addr = 0x61, /* 0xc2 >> 1 */
176 .type = CX23885_VMUX_TELEVISION,
177 .vmux = CX25840_VIN7_CH3 |
182 .type = CX23885_VMUX_COMPOSITE1,
183 .vmux = CX25840_VIN7_CH3 |
188 .type = CX23885_VMUX_SVIDEO,
189 .vmux = CX25840_VIN7_CH3 |
196 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197 .name = "Hauppauge WinTV-HVR1200",
198 .portc = CX23885_MPEG_DVB,
200 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201 .name = "Hauppauge WinTV-HVR1700",
202 .portc = CX23885_MPEG_DVB,
204 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205 .name = "Hauppauge WinTV-HVR1400",
206 .portc = CX23885_MPEG_DVB,
208 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209 .name = "DViCO FusionHDTV7 Dual Express",
210 .portb = CX23885_MPEG_DVB,
211 .portc = CX23885_MPEG_DVB,
213 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214 .name = "DViCO FusionHDTV DVB-T Dual Express",
215 .portb = CX23885_MPEG_DVB,
216 .portc = CX23885_MPEG_DVB,
218 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219 .name = "Leadtek Winfast PxDVR3200 H",
220 .portc = CX23885_MPEG_DVB,
222 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223 .name = "Leadtek Winfast PxPVR2200",
224 .porta = CX23885_ANALOG_VIDEO,
225 .tuner_type = TUNER_XC2028,
229 .type = CX23885_VMUX_TELEVISION,
230 .vmux = CX25840_VIN2_CH1 |
232 .amux = CX25840_AUDIO8,
235 .type = CX23885_VMUX_COMPOSITE1,
236 .vmux = CX25840_COMPOSITE1,
237 .amux = CX25840_AUDIO7,
240 .type = CX23885_VMUX_SVIDEO,
241 .vmux = CX25840_SVIDEO_LUMA3 |
242 CX25840_SVIDEO_CHROMA4,
243 .amux = CX25840_AUDIO7,
246 .type = CX23885_VMUX_COMPONENT,
247 .vmux = CX25840_VIN7_CH1 |
250 CX25840_COMPONENT_ON,
251 .amux = CX25840_AUDIO7,
255 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256 .name = "Leadtek Winfast PxDVR3200 H XC4000",
257 .porta = CX23885_ANALOG_VIDEO,
258 .portc = CX23885_MPEG_DVB,
259 .tuner_type = TUNER_XC4000,
262 .radio_addr = ADDR_UNSET,
264 .type = CX23885_VMUX_TELEVISION,
265 .vmux = CX25840_VIN2_CH1 |
269 .type = CX23885_VMUX_COMPOSITE1,
270 .vmux = CX25840_COMPOSITE1,
272 .type = CX23885_VMUX_SVIDEO,
273 .vmux = CX25840_SVIDEO_LUMA3 |
274 CX25840_SVIDEO_CHROMA4,
276 .type = CX23885_VMUX_COMPONENT,
277 .vmux = CX25840_VIN7_CH1 |
280 CX25840_COMPONENT_ON,
283 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284 .name = "Compro VideoMate E650F",
285 .portc = CX23885_MPEG_DVB,
287 [CX23885_BOARD_TBS_6920] = {
288 .name = "TurboSight TBS 6920",
289 .portb = CX23885_MPEG_DVB,
291 [CX23885_BOARD_TBS_6980] = {
292 .name = "TurboSight TBS 6980",
293 .portb = CX23885_MPEG_DVB,
294 .portc = CX23885_MPEG_DVB,
296 [CX23885_BOARD_TBS_6981] = {
297 .name = "TurboSight TBS 6981",
298 .portb = CX23885_MPEG_DVB,
299 .portc = CX23885_MPEG_DVB,
301 [CX23885_BOARD_TEVII_S470] = {
302 .name = "TeVii S470",
303 .portb = CX23885_MPEG_DVB,
305 [CX23885_BOARD_DVBWORLD_2005] = {
306 .name = "DVBWorld DVB-S2 2005",
307 .portb = CX23885_MPEG_DVB,
309 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
311 .name = "NetUP Dual DVB-S2 CI",
312 .portb = CX23885_MPEG_DVB,
313 .portc = CX23885_MPEG_DVB,
315 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316 .name = "Hauppauge WinTV-HVR1270",
317 .portc = CX23885_MPEG_DVB,
319 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320 .name = "Hauppauge WinTV-HVR1275",
321 .portc = CX23885_MPEG_DVB,
323 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324 .name = "Hauppauge WinTV-HVR1255",
325 .porta = CX23885_ANALOG_VIDEO,
326 .portc = CX23885_MPEG_DVB,
327 .tuner_type = TUNER_ABSENT,
328 .tuner_addr = 0x42, /* 0x84 >> 1 */
331 .type = CX23885_VMUX_TELEVISION,
332 .vmux = CX25840_VIN7_CH3 |
336 .amux = CX25840_AUDIO8,
338 .type = CX23885_VMUX_COMPOSITE1,
339 .vmux = CX25840_VIN7_CH3 |
342 .amux = CX25840_AUDIO7,
344 .type = CX23885_VMUX_SVIDEO,
345 .vmux = CX25840_VIN7_CH3 |
349 .amux = CX25840_AUDIO7,
352 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353 .name = "Hauppauge WinTV-HVR1255",
354 .porta = CX23885_ANALOG_VIDEO,
355 .portc = CX23885_MPEG_DVB,
356 .tuner_type = TUNER_ABSENT,
357 .tuner_addr = 0x42, /* 0x84 >> 1 */
360 .type = CX23885_VMUX_TELEVISION,
361 .vmux = CX25840_VIN7_CH3 |
365 .amux = CX25840_AUDIO8,
367 .type = CX23885_VMUX_SVIDEO,
368 .vmux = CX25840_VIN7_CH3 |
372 .amux = CX25840_AUDIO7,
375 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376 .name = "Hauppauge WinTV-HVR1210",
377 .portc = CX23885_MPEG_DVB,
379 [CX23885_BOARD_MYGICA_X8506] = {
380 .name = "Mygica X8506 DMB-TH",
381 .tuner_type = TUNER_XC5000,
384 .porta = CX23885_ANALOG_VIDEO,
385 .portb = CX23885_MPEG_DVB,
388 .type = CX23885_VMUX_TELEVISION,
389 .vmux = CX25840_COMPOSITE2,
392 .type = CX23885_VMUX_COMPOSITE1,
393 .vmux = CX25840_COMPOSITE8,
396 .type = CX23885_VMUX_SVIDEO,
397 .vmux = CX25840_SVIDEO_LUMA3 |
398 CX25840_SVIDEO_CHROMA4,
401 .type = CX23885_VMUX_COMPONENT,
402 .vmux = CX25840_COMPONENT_ON |
409 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410 .name = "Magic-Pro ProHDTV Extreme 2",
411 .tuner_type = TUNER_XC5000,
414 .porta = CX23885_ANALOG_VIDEO,
415 .portb = CX23885_MPEG_DVB,
418 .type = CX23885_VMUX_TELEVISION,
419 .vmux = CX25840_COMPOSITE2,
422 .type = CX23885_VMUX_COMPOSITE1,
423 .vmux = CX25840_COMPOSITE8,
426 .type = CX23885_VMUX_SVIDEO,
427 .vmux = CX25840_SVIDEO_LUMA3 |
428 CX25840_SVIDEO_CHROMA4,
431 .type = CX23885_VMUX_COMPONENT,
432 .vmux = CX25840_COMPONENT_ON |
439 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440 .name = "Hauppauge WinTV-HVR1850",
441 .porta = CX23885_ANALOG_VIDEO,
442 .portb = CX23885_MPEG_ENCODER,
443 .portc = CX23885_MPEG_DVB,
444 .tuner_type = TUNER_ABSENT,
445 .tuner_addr = 0x42, /* 0x84 >> 1 */
448 .type = CX23885_VMUX_TELEVISION,
449 .vmux = CX25840_VIN7_CH3 |
453 .amux = CX25840_AUDIO8,
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_VIN7_CH3 |
459 .amux = CX25840_AUDIO7,
461 .type = CX23885_VMUX_SVIDEO,
462 .vmux = CX25840_VIN7_CH3 |
466 .amux = CX25840_AUDIO7,
469 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470 .name = "Compro VideoMate E800",
471 .portc = CX23885_MPEG_DVB,
473 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474 .name = "Hauppauge WinTV-HVR1290",
475 .portc = CX23885_MPEG_DVB,
477 [CX23885_BOARD_MYGICA_X8558PRO] = {
478 .name = "Mygica X8558 PRO DMB-TH",
479 .portb = CX23885_MPEG_DVB,
480 .portc = CX23885_MPEG_DVB,
482 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483 .name = "LEADTEK WinFast PxTV1200",
484 .porta = CX23885_ANALOG_VIDEO,
485 .tuner_type = TUNER_XC2028,
489 .type = CX23885_VMUX_TELEVISION,
490 .vmux = CX25840_VIN2_CH1 |
494 .type = CX23885_VMUX_COMPOSITE1,
495 .vmux = CX25840_COMPOSITE1,
497 .type = CX23885_VMUX_SVIDEO,
498 .vmux = CX25840_SVIDEO_LUMA3 |
499 CX25840_SVIDEO_CHROMA4,
501 .type = CX23885_VMUX_COMPONENT,
502 .vmux = CX25840_VIN7_CH1 |
505 CX25840_COMPONENT_ON,
508 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509 .name = "GoTView X5 3D Hybrid",
510 .tuner_type = TUNER_XC5000,
513 .porta = CX23885_ANALOG_VIDEO,
514 .portb = CX23885_MPEG_DVB,
516 .type = CX23885_VMUX_TELEVISION,
517 .vmux = CX25840_VIN2_CH1 |
521 .type = CX23885_VMUX_COMPOSITE1,
522 .vmux = CX23885_VMUX_COMPOSITE1,
524 .type = CX23885_VMUX_SVIDEO,
525 .vmux = CX25840_SVIDEO_LUMA3 |
526 CX25840_SVIDEO_CHROMA4,
529 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
531 .name = "NetUP Dual DVB-T/C-CI RF",
532 .porta = CX23885_ANALOG_VIDEO,
533 .portb = CX23885_MPEG_DVB,
534 .portc = CX23885_MPEG_DVB,
537 .tuner_type = TUNER_XC5000,
540 .type = CX23885_VMUX_TELEVISION,
541 .vmux = CX25840_COMPOSITE1,
544 [CX23885_BOARD_MPX885] = {
546 .porta = CX23885_ANALOG_VIDEO,
548 .type = CX23885_VMUX_COMPOSITE1,
549 .vmux = CX25840_COMPOSITE1,
550 .amux = CX25840_AUDIO6,
553 .type = CX23885_VMUX_COMPOSITE2,
554 .vmux = CX25840_COMPOSITE2,
555 .amux = CX25840_AUDIO6,
558 .type = CX23885_VMUX_COMPOSITE3,
559 .vmux = CX25840_COMPOSITE3,
560 .amux = CX25840_AUDIO7,
563 .type = CX23885_VMUX_COMPOSITE4,
564 .vmux = CX25840_COMPOSITE4,
565 .amux = CX25840_AUDIO7,
569 [CX23885_BOARD_MYGICA_X8507] = {
570 .name = "Mygica X8502/X8507 ISDB-T",
571 .tuner_type = TUNER_XC5000,
574 .porta = CX23885_ANALOG_VIDEO,
575 .portb = CX23885_MPEG_DVB,
578 .type = CX23885_VMUX_TELEVISION,
579 .vmux = CX25840_COMPOSITE2,
580 .amux = CX25840_AUDIO8,
583 .type = CX23885_VMUX_COMPOSITE1,
584 .vmux = CX25840_COMPOSITE8,
585 .amux = CX25840_AUDIO7,
588 .type = CX23885_VMUX_SVIDEO,
589 .vmux = CX25840_SVIDEO_LUMA3 |
590 CX25840_SVIDEO_CHROMA4,
591 .amux = CX25840_AUDIO7,
594 .type = CX23885_VMUX_COMPONENT,
595 .vmux = CX25840_COMPONENT_ON |
599 .amux = CX25840_AUDIO7,
603 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604 .name = "TerraTec Cinergy T PCIe Dual",
605 .portb = CX23885_MPEG_DVB,
606 .portc = CX23885_MPEG_DVB,
608 [CX23885_BOARD_TEVII_S471] = {
609 .name = "TeVii S471",
610 .portb = CX23885_MPEG_DVB,
612 [CX23885_BOARD_PROF_8000] = {
613 .name = "Prof Revolution DVB-S2 8000",
614 .portb = CX23885_MPEG_DVB,
616 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617 .name = "Hauppauge WinTV-HVR4400",
618 .porta = CX23885_ANALOG_VIDEO,
619 .portb = CX23885_MPEG_DVB,
620 .portc = CX23885_MPEG_DVB,
621 .tuner_type = TUNER_NXP_TDA18271,
622 .tuner_addr = 0x60, /* 0xc0 >> 1 */
625 [CX23885_BOARD_AVERMEDIA_HC81R] = {
626 .name = "AVerTV Hybrid Express Slim HC81R",
627 .tuner_type = TUNER_XC2028,
628 .tuner_addr = 0x61, /* 0xc2 >> 1 */
630 .porta = CX23885_ANALOG_VIDEO,
632 .type = CX23885_VMUX_TELEVISION,
633 .vmux = CX25840_VIN2_CH1 |
637 .amux = CX25840_AUDIO8,
639 .type = CX23885_VMUX_SVIDEO,
640 .vmux = CX25840_VIN8_CH1 |
644 .amux = CX25840_AUDIO6,
646 .type = CX23885_VMUX_COMPONENT,
647 .vmux = CX25840_VIN1_CH1 |
651 .amux = CX25840_AUDIO6,
654 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
655 .name = "DViCO FusionHDTV DVB-T Dual Express2",
656 .portb = CX23885_MPEG_DVB,
657 .portc = CX23885_MPEG_DVB,
659 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
660 .name = "Hauppauge ImpactVCB-e",
661 .tuner_type = TUNER_ABSENT,
662 .porta = CX23885_ANALOG_VIDEO,
664 .type = CX23885_VMUX_COMPOSITE1,
665 .vmux = CX25840_VIN7_CH3 |
668 .amux = CX25840_AUDIO7,
670 .type = CX23885_VMUX_SVIDEO,
671 .vmux = CX25840_VIN7_CH3 |
675 .amux = CX25840_AUDIO7,
678 [CX23885_BOARD_DVBSKY_T9580] = {
679 .name = "DVBSky T9580",
680 .portb = CX23885_MPEG_DVB,
681 .portc = CX23885_MPEG_DVB,
683 [CX23885_BOARD_DVBSKY_T980C] = {
684 .name = "DVBSky T980C",
685 .portb = CX23885_MPEG_DVB,
687 [CX23885_BOARD_DVBSKY_S950C] = {
688 .name = "DVBSky S950C",
689 .portb = CX23885_MPEG_DVB,
691 [CX23885_BOARD_TT_CT2_4500_CI] = {
692 .name = "Technotrend TT-budget CT2-4500 CI",
693 .portb = CX23885_MPEG_DVB,
695 [CX23885_BOARD_DVBSKY_S950] = {
696 .name = "DVBSky S950",
697 .portb = CX23885_MPEG_DVB,
699 [CX23885_BOARD_DVBSKY_S952] = {
700 .name = "DVBSky S952",
701 .portb = CX23885_MPEG_DVB,
702 .portc = CX23885_MPEG_DVB,
704 [CX23885_BOARD_DVBSKY_T982] = {
705 .name = "DVBSky T982",
706 .portb = CX23885_MPEG_DVB,
707 .portc = CX23885_MPEG_DVB,
710 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
712 /* ------------------------------------------------------------------ */
713 /* PCI subsystem IDs */
715 struct cx23885_subid cx23885_subids[] = {
719 .card = CX23885_BOARD_UNKNOWN,
723 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
727 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
731 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
735 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
739 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
743 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
747 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
751 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
755 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
759 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
763 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
767 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
771 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
775 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
779 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
783 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
787 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
791 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
795 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
799 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
803 .card = CX23885_BOARD_TBS_6920,
807 .card = CX23885_BOARD_TBS_6980,
811 .card = CX23885_BOARD_TBS_6981,
815 .card = CX23885_BOARD_TEVII_S470,
819 .card = CX23885_BOARD_DVBWORLD_2005,
823 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
827 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
831 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
835 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
839 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
843 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
847 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
851 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
855 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
859 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
863 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
867 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
871 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
875 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
879 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
883 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
887 .card = CX23885_BOARD_MYGICA_X8506,
891 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
895 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
899 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
903 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
907 .card = CX23885_BOARD_MYGICA_X8558PRO,
911 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
915 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
919 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
923 .card = CX23885_BOARD_MYGICA_X8507,
927 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
931 .card = CX23885_BOARD_TEVII_S471,
935 .card = CX23885_BOARD_PROF_8000,
939 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
943 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
947 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
951 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
955 .card = CX23885_BOARD_AVERMEDIA_HC81R,
959 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
963 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
967 .card = CX23885_BOARD_DVBSKY_T9580,
971 .card = CX23885_BOARD_DVBSKY_T980C,
975 .card = CX23885_BOARD_DVBSKY_S950C,
979 .card = CX23885_BOARD_TT_CT2_4500_CI,
983 .card = CX23885_BOARD_DVBSKY_S950,
987 .card = CX23885_BOARD_DVBSKY_S952,
991 .card = CX23885_BOARD_DVBSKY_T982,
994 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
996 void cx23885_card_list(struct cx23885_dev *dev)
1000 if (0 == dev->pci->subsystem_vendor &&
1001 0 == dev->pci->subsystem_device) {
1003 "%s: Board has no valid PCIe Subsystem ID and can't\n"
1004 "%s: be autodetected. Pass card=<n> insmod option\n"
1005 "%s: to workaround that. Redirect complaints to the\n"
1006 "%s: vendor of the TV card. Best regards,\n"
1008 dev->name, dev->name, dev->name, dev->name, dev->name);
1011 "%s: Your board isn't known (yet) to the driver.\n"
1012 "%s: Try to pick one of the existing card configs via\n"
1013 "%s: card=<n> insmod option. Updating to the latest\n"
1014 "%s: version might help as well.\n",
1015 dev->name, dev->name, dev->name, dev->name);
1017 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1019 for (i = 0; i < cx23885_bcount; i++)
1020 printk(KERN_INFO "%s: card=%d -> %s\n",
1021 dev->name, i, cx23885_boards[i].name);
1024 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1028 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
1031 /* Make sure we support the board model */
1034 /* WinTV-HVR1270 (PCIe, Retail, half height)
1035 * ATSC/QAM and basic analog, IR Blast */
1037 /* WinTV-HVR1210 (PCIe, Retail, half height)
1038 * DVB-T and basic analog, IR Blast */
1040 /* WinTV-HVR1270 (PCIe, Retail, half height)
1041 * ATSC/QAM and basic analog, IR Recv */
1043 /* WinTV-HVR1210 (PCIe, Retail, half height)
1044 * DVB-T and basic analog, IR Recv */
1046 /* WinTV-HVR1275 (PCIe, Retail, half height)
1047 * ATSC/QAM and basic analog, IR Recv */
1049 /* WinTV-HVR1210 (PCIe, Retail, half height)
1050 * DVB-T and basic analog, IR Recv */
1052 /* WinTV-HVR1270 (PCIe, Retail, full height)
1053 * ATSC/QAM and basic analog, IR Blast */
1055 /* WinTV-HVR1210 (PCIe, Retail, full height)
1056 * DVB-T and basic analog, IR Blast */
1058 /* WinTV-HVR1270 (PCIe, Retail, full height)
1059 * ATSC/QAM and basic analog, IR Recv */
1061 /* WinTV-HVR1210 (PCIe, Retail, full height)
1062 * DVB-T and basic analog, IR Recv */
1064 /* WinTV-HVR1275 (PCIe, Retail, full height)
1065 * ATSC/QAM and basic analog, IR Recv */
1067 /* WinTV-HVR1210 (PCIe, Retail, full height)
1068 * DVB-T and basic analog, IR Recv */
1070 /* WinTV-HVR1200 (PCIe, Retail, full height)
1071 * DVB-T and basic analog */
1073 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1076 /* WinTV-HVR1200 (PCIe, OEM, half height)
1077 * DVB-T and basic analog */
1079 /* WinTV-HVR1200 (PCIe, OEM, half height)
1080 * DVB-T and basic analog */
1082 /* WinTV-HVR1200 (PCIe, OEM, full height)
1083 * DVB-T and basic analog */
1085 /* WinTV-HVR1200 (PCIe, OEM, half height)
1086 * DVB-T and basic analog */
1088 /* WinTV-HVR1200 (PCIe, OEM, full height)
1089 * DVB-T and basic analog */
1091 /* WinTV-HVR1200 (PCIe, OEM, full height)
1092 * DVB-T and basic analog */
1094 /* WinTV-HVR1200 (PCIe, OEM, half height)
1095 * DVB-T and basic analog */
1097 /* WinTV-HVR1200 (PCIe, OEM, full height)
1098 * DVB-T and basic analog */
1100 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1101 channel ATSC and MPEG2 HW Encoder */
1103 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1106 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1109 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1112 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1115 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1116 Dual channel ATSC and MPEG2 HW Encoder */
1118 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1119 Dual channel ATSC and MPEG2 HW Encoder */
1121 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1122 Dual channel ATSC and MPEG2 HW Encoder */
1124 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1125 Dual channel ATSC and MPEG2 HW Encoder */
1127 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1128 Dual channel ATSC and MPEG2 HW Encoder */
1130 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1131 ATSC and Basic analog */
1133 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1134 ATSC and Basic analog */
1136 /* WinTV-HVR1250 (PCIe, No IR, half height,
1137 ATSC [at least] and Basic analog) */
1139 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1140 ATSC and Basic analog */
1142 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1143 ATSC and Basic analog */
1145 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1146 ATSC and Basic analog */
1148 /* WinTV-HVR1400 (Express Card, Retail, IR,
1149 * DVB-T and Basic analog */
1151 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1152 * DVB-T and MPEG2 HW Encoder */
1154 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1155 * DVB-T and MPEG2 HW Encoder */
1158 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1159 Dual channel ATSC and MPEG2 HW Encoder */
1162 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1163 Dual channel ATSC and Basic analog */
1166 printk(KERN_WARNING "%s: warning: "
1167 "unknown hauppauge model #%d\n",
1168 dev->name, tv.model);
1172 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1173 dev->name, tv.model);
1176 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1177 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1178 doesn't respond to any command. */
1179 static void tbs_card_init(struct cx23885_dev *dev)
1183 0xe0, 0x06, 0x66, 0x33, 0x65,
1184 0x01, 0x17, 0x06, 0xde};
1186 switch (dev->board) {
1187 case CX23885_BOARD_TBS_6980:
1188 case CX23885_BOARD_TBS_6981:
1189 cx_set(GP0_IO, 0x00070007);
1190 usleep_range(1000, 10000);
1191 cx_clear(GP0_IO, 2);
1192 usleep_range(1000, 10000);
1193 for (i = 0; i < 9 * 8; i++) {
1194 cx_clear(GP0_IO, 7);
1195 usleep_range(1000, 10000);
1197 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1198 usleep_range(1000, 10000);
1205 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1207 struct cx23885_tsport *port = priv;
1208 struct cx23885_dev *dev = port->dev;
1211 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1215 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1220 switch (dev->board) {
1221 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1222 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1223 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1224 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1225 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1226 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1227 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1228 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1229 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1230 /* Tuner Reset Command */
1233 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1234 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1235 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1236 /* Two identical tuners on two different i2c buses,
1237 * we need to reset the correct gpio. */
1240 else if (port->nr == 2)
1243 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1244 /* Tuner Reset Command */
1247 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1248 altera_ci_tuner_reset(dev, port->nr);
1250 case CX23885_BOARD_AVERMEDIA_HC81R:
1251 /* XC3028L Reset Command */
1257 /* Drive the tuner into reset and back out */
1258 cx_clear(GP0_IO, bitmask);
1260 cx_set(GP0_IO, bitmask);
1266 void cx23885_gpio_setup(struct cx23885_dev *dev)
1268 switch (dev->board) {
1269 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1270 /* GPIO-0 cx24227 demodulator reset */
1271 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1273 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1274 /* GPIO-0 cx24227 demodulator */
1275 /* GPIO-2 xc3028 tuner */
1277 /* Put the parts into reset */
1278 cx_set(GP0_IO, 0x00050000);
1279 cx_clear(GP0_IO, 0x00000005);
1282 /* Bring the parts out of reset */
1283 cx_set(GP0_IO, 0x00050005);
1285 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1286 /* GPIO-0 cx24227 demodulator reset */
1287 /* GPIO-2 xc5000 tuner reset */
1288 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1290 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1291 /* GPIO-0 656_CLK */
1293 /* GPIO-2 8295A Reset */
1294 /* GPIO-3-10 cx23417 data0-7 */
1295 /* GPIO-11-14 cx23417 addr0-3 */
1296 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1299 /* CX23417 GPIO's */
1300 /* EIO15 Zilog Reset */
1301 /* EIO14 S5H1409/CX24227 Reset */
1302 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1304 /* Put the demod into reset and protect the eeprom */
1305 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1308 /* Bring the demod and blaster out of reset */
1309 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1312 /* Force the TDA8295A into reset and back */
1313 cx23885_gpio_enable(dev, GPIO_2, 1);
1314 cx23885_gpio_set(dev, GPIO_2);
1316 cx23885_gpio_clear(dev, GPIO_2);
1318 cx23885_gpio_set(dev, GPIO_2);
1321 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1322 /* GPIO-0 tda10048 demodulator reset */
1323 /* GPIO-2 tda18271 tuner reset */
1325 /* Put the parts into reset and back */
1326 cx_set(GP0_IO, 0x00050000);
1328 cx_clear(GP0_IO, 0x00000005);
1330 cx_set(GP0_IO, 0x00050005);
1332 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1333 /* GPIO-0 TDA10048 demodulator reset */
1334 /* GPIO-2 TDA8295A Reset */
1335 /* GPIO-3-10 cx23417 data0-7 */
1336 /* GPIO-11-14 cx23417 addr0-3 */
1337 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1339 /* The following GPIO's are on the interna AVCore (cx25840) */
1341 /* GPIO-20 IR_TX 416/DVBT Select */
1342 /* GPIO-21 IIS DAT */
1343 /* GPIO-22 IIS WCLK */
1344 /* GPIO-23 IIS BCLK */
1346 /* Put the parts into reset and back */
1347 cx_set(GP0_IO, 0x00050000);
1349 cx_clear(GP0_IO, 0x00000005);
1351 cx_set(GP0_IO, 0x00050005);
1353 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1354 /* GPIO-0 Dibcom7000p demodulator reset */
1355 /* GPIO-2 xc3028L tuner reset */
1358 /* Put the parts into reset and back */
1359 cx_set(GP0_IO, 0x00050000);
1361 cx_clear(GP0_IO, 0x00000005);
1363 cx_set(GP0_IO, 0x00050005);
1365 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1366 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1367 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1368 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1369 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1371 /* Put the parts into reset and back */
1372 cx_set(GP0_IO, 0x000f0000);
1374 cx_clear(GP0_IO, 0x0000000f);
1376 cx_set(GP0_IO, 0x000f000f);
1378 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1379 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1380 /* GPIO-0 portb xc3028 reset */
1381 /* GPIO-1 portb zl10353 reset */
1382 /* GPIO-2 portc xc3028 reset */
1383 /* GPIO-3 portc zl10353 reset */
1385 /* Put the parts into reset and back */
1386 cx_set(GP0_IO, 0x000f0000);
1388 cx_clear(GP0_IO, 0x0000000f);
1390 cx_set(GP0_IO, 0x000f000f);
1392 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1393 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1394 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1395 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1396 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1397 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1398 /* GPIO-2 xc3028 tuner reset */
1400 /* The following GPIO's are on the internal AVCore (cx25840) */
1401 /* GPIO-? zl10353 demod reset */
1403 /* Put the parts into reset and back */
1404 cx_set(GP0_IO, 0x00040000);
1406 cx_clear(GP0_IO, 0x00000004);
1408 cx_set(GP0_IO, 0x00040004);
1410 case CX23885_BOARD_TBS_6920:
1411 case CX23885_BOARD_TBS_6980:
1412 case CX23885_BOARD_TBS_6981:
1413 case CX23885_BOARD_PROF_8000:
1414 cx_write(MC417_CTL, 0x00000036);
1415 cx_write(MC417_OEN, 0x00001000);
1416 cx_set(MC417_RWD, 0x00000002);
1418 cx_clear(MC417_RWD, 0x00000800);
1420 cx_set(MC417_RWD, 0x00000800);
1423 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1424 /* GPIO-0 INTA from CiMax1
1425 GPIO-1 INTB from CiMax2
1427 GPIO-3 to GPIO-10 data/addr for CA
1428 GPIO-11 ~CS0 to CiMax1
1429 GPIO-12 ~CS1 to CiMax2
1430 GPIO-13 ADL0 load LSB addr
1431 GPIO-14 ADL1 load MSB addr
1432 GPIO-15 ~RDY from CiMax
1433 GPIO-17 ~RD to CiMax
1434 GPIO-18 ~WR to CiMax
1436 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1437 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1438 cx_clear(GP0_IO, 0x00030004);
1439 mdelay(100);/* reset delay */
1440 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1441 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1442 /* GPIO-15 IN as ~ACK, rest as OUT */
1443 cx_write(MC417_OEN, 0x00001000);
1444 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1445 cx_write(MC417_RWD, 0x0000c300);
1447 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1449 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1450 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1451 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1452 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1453 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1454 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1455 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1456 /* GPIO-9 Demod reset */
1458 /* Put the parts into reset and back */
1459 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1460 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1461 cx23885_gpio_clear(dev, GPIO_9);
1463 cx23885_gpio_set(dev, GPIO_9);
1465 case CX23885_BOARD_MYGICA_X8506:
1466 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1467 case CX23885_BOARD_MYGICA_X8507:
1468 /* GPIO-0 (0)Analog / (1)Digital TV */
1469 /* GPIO-1 reset XC5000 */
1470 /* GPIO-2 demod reset */
1471 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1472 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1474 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1477 case CX23885_BOARD_MYGICA_X8558PRO:
1478 /* GPIO-0 reset first ATBM8830 */
1479 /* GPIO-1 reset second ATBM8830 */
1480 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1481 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1483 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1486 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1487 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1488 /* GPIO-0 656_CLK */
1491 /* GPIO-3-10 cx23417 data0-7 */
1492 /* GPIO-11-14 cx23417 addr0-3 */
1493 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1495 /* GPIO-20 C_IR_TX */
1496 /* GPIO-21 I2S DAT */
1497 /* GPIO-22 I2S WCLK */
1498 /* GPIO-23 I2S BCLK */
1499 /* ALT GPIO: EXP GPIO LATCH */
1501 /* CX23417 GPIO's */
1502 /* GPIO-14 S5H1411/CX24228 Reset */
1503 /* GPIO-13 EEPROM write protect */
1504 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1506 /* Put the demod into reset and protect the eeprom */
1507 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1510 /* Bring the demod out of reset */
1511 mc417_gpio_set(dev, GPIO_14);
1515 /* Connected to IF / Mux */
1517 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1518 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1520 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1523 GPIO-2 ~reset chips out
1524 GPIO-3 to GPIO-10 data/addr for CA in/out
1534 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1535 /* GPIO-0 as INT, reset & TMS low */
1536 cx_clear(GP0_IO, 0x00010006);
1537 mdelay(100);/* reset delay */
1538 cx_set(GP0_IO, 0x00000004); /* reset high */
1539 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1540 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1541 cx_write(MC417_OEN, 0x00005000);
1542 /* ~RD, ~WR high; ADDR low; ~CS high */
1543 cx_write(MC417_RWD, 0x00000d00);
1545 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1547 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1548 /* GPIO-8 tda10071 demod reset */
1549 /* GPIO-9 si2165 demod reset */
1551 /* Put the parts into reset and back */
1552 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1554 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1556 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1560 case CX23885_BOARD_AVERMEDIA_HC81R:
1561 cx_clear(MC417_CTL, 1);
1562 /* GPIO-0,1,2 setup direction as output */
1563 cx_set(GP0_IO, 0x00070000);
1565 /* AF9013 demod reset */
1566 cx_set(GP0_IO, 0x00010001);
1568 cx_clear(GP0_IO, 0x00010001);
1570 cx_set(GP0_IO, 0x00010001);
1573 cx_clear(GP0_IO, 0x00030003);
1575 cx_set(GP0_IO, 0x00020002);
1577 cx_set(GP0_IO, 0x00010001);
1579 cx_clear(GP0_IO, 0x00020002);
1580 /* XC3028L tuner reset */
1581 cx_set(GP0_IO, 0x00040004);
1582 cx_clear(GP0_IO, 0x00040004);
1583 cx_set(GP0_IO, 0x00040004);
1586 case CX23885_BOARD_DVBSKY_T9580:
1587 case CX23885_BOARD_DVBSKY_S952:
1588 case CX23885_BOARD_DVBSKY_T982:
1589 /* enable GPIO3-18 pins */
1590 cx_write(MC417_CTL, 0x00000037);
1591 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1592 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1594 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1596 case CX23885_BOARD_DVBSKY_T980C:
1597 case CX23885_BOARD_DVBSKY_S950C:
1598 case CX23885_BOARD_TT_CT2_4500_CI:
1600 * GPIO-0 INTA from CiMax, input
1601 * GPIO-1 reset CiMax, output, high active
1602 * GPIO-2 reset demod, output, low active
1603 * GPIO-3 to GPIO-10 data/addr for CAM
1604 * GPIO-11 ~CS0 to CiMax1
1605 * GPIO-12 ~CS1 to CiMax2
1606 * GPIO-13 ADL0 load LSB addr
1607 * GPIO-14 ADL1 load MSB addr
1608 * GPIO-15 ~RDY from CiMax
1609 * GPIO-17 ~RD to CiMax
1610 * GPIO-18 ~WR to CiMax
1613 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1614 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1615 mdelay(100); /* reset delay */
1616 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1617 cx_clear(GP0_IO, 0x00010002);
1618 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1620 /* GPIO-15 IN as ~ACK, rest as OUT */
1621 cx_write(MC417_OEN, 0x00001000);
1623 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1624 cx_write(MC417_RWD, 0x0000c300);
1627 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1629 case CX23885_BOARD_DVBSKY_S950:
1630 cx23885_gpio_enable(dev, GPIO_2, 1);
1631 cx23885_gpio_clear(dev, GPIO_2);
1633 cx23885_gpio_set(dev, GPIO_2);
1638 int cx23885_ir_init(struct cx23885_dev *dev)
1640 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1642 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1643 .pin = CX23885_PIN_IR_RX_GPIO19,
1644 .function = CX23885_PAD_IR_RX,
1646 .strength = CX25840_PIN_DRIVE_MEDIUM,
1648 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1649 .pin = CX23885_PIN_IR_TX_GPIO20,
1650 .function = CX23885_PAD_IR_TX,
1652 .strength = CX25840_PIN_DRIVE_MEDIUM,
1655 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1657 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1659 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1660 .pin = CX23885_PIN_IR_RX_GPIO19,
1661 .function = CX23885_PAD_IR_RX,
1663 .strength = CX25840_PIN_DRIVE_MEDIUM,
1666 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1668 struct v4l2_subdev_ir_parameters params;
1670 switch (dev->board) {
1671 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1672 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1673 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1674 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1675 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1676 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1677 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1678 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1679 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1680 /* FIXME: Implement me */
1682 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1683 ret = cx23888_ir_probe(dev);
1686 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1687 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1688 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1690 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1691 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1692 ret = cx23888_ir_probe(dev);
1695 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1696 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1697 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1699 * For these boards we need to invert the Tx output via the
1700 * IR controller to have the LED off while idle
1702 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1703 params.enable = false;
1704 params.shutdown = false;
1705 params.invert_level = true;
1706 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1707 params.shutdown = true;
1708 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1710 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1711 case CX23885_BOARD_TEVII_S470:
1712 case CX23885_BOARD_MYGICA_X8507:
1713 case CX23885_BOARD_TBS_6980:
1714 case CX23885_BOARD_TBS_6981:
1715 case CX23885_BOARD_DVBSKY_T9580:
1716 case CX23885_BOARD_DVBSKY_T980C:
1717 case CX23885_BOARD_DVBSKY_S950C:
1718 case CX23885_BOARD_TT_CT2_4500_CI:
1719 case CX23885_BOARD_DVBSKY_S950:
1720 case CX23885_BOARD_DVBSKY_S952:
1721 case CX23885_BOARD_DVBSKY_T982:
1724 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1725 if (dev->sd_ir == NULL) {
1729 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1730 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1732 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1735 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1736 if (dev->sd_ir == NULL) {
1740 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1741 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1743 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1744 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1745 request_module("ir-kbd-i2c");
1752 void cx23885_ir_fini(struct cx23885_dev *dev)
1754 switch (dev->board) {
1755 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1756 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1757 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1758 cx23885_irq_remove(dev, PCI_MSK_IR);
1759 cx23888_ir_remove(dev);
1762 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1763 case CX23885_BOARD_TEVII_S470:
1764 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1765 case CX23885_BOARD_MYGICA_X8507:
1766 case CX23885_BOARD_TBS_6980:
1767 case CX23885_BOARD_TBS_6981:
1768 case CX23885_BOARD_DVBSKY_T9580:
1769 case CX23885_BOARD_DVBSKY_T980C:
1770 case CX23885_BOARD_DVBSKY_S950C:
1771 case CX23885_BOARD_TT_CT2_4500_CI:
1772 case CX23885_BOARD_DVBSKY_S950:
1773 case CX23885_BOARD_DVBSKY_S952:
1774 case CX23885_BOARD_DVBSKY_T982:
1775 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1776 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1782 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1786 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1788 data = ((cx_read(GP0_IO)) & (~0x00000002));
1789 data |= (tms ? 0x00020002 : 0x00020000);
1790 cx_write(GP0_IO, data);
1793 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1794 data |= (tdi ? 0x00008000 : 0);
1795 cx_write(MC417_RWD, data);
1797 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1799 cx_write(MC417_RWD, data | 0x00002000);
1802 cx_write(MC417_RWD, data);
1807 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1809 switch (dev->board) {
1810 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1811 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1812 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1814 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1816 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1817 case CX23885_BOARD_TEVII_S470:
1818 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1819 case CX23885_BOARD_MYGICA_X8507:
1820 case CX23885_BOARD_TBS_6980:
1821 case CX23885_BOARD_TBS_6981:
1822 case CX23885_BOARD_DVBSKY_T9580:
1823 case CX23885_BOARD_DVBSKY_T980C:
1824 case CX23885_BOARD_DVBSKY_S950C:
1825 case CX23885_BOARD_TT_CT2_4500_CI:
1826 case CX23885_BOARD_DVBSKY_S950:
1827 case CX23885_BOARD_DVBSKY_S952:
1828 case CX23885_BOARD_DVBSKY_T982:
1830 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1835 void cx23885_card_setup(struct cx23885_dev *dev)
1837 struct cx23885_tsport *ts1 = &dev->ts1;
1838 struct cx23885_tsport *ts2 = &dev->ts2;
1840 static u8 eeprom[256];
1842 if (dev->i2c_bus[0].i2c_rc == 0) {
1843 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1844 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1845 eeprom, sizeof(eeprom));
1848 switch (dev->board) {
1849 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1850 if (dev->i2c_bus[0].i2c_rc == 0) {
1851 if (eeprom[0x80] != 0x84)
1852 hauppauge_eeprom(dev, eeprom+0xc0);
1854 hauppauge_eeprom(dev, eeprom+0x80);
1857 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1858 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1859 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1860 if (dev->i2c_bus[0].i2c_rc == 0)
1861 hauppauge_eeprom(dev, eeprom+0x80);
1863 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1864 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1865 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1866 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1867 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1868 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1869 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1870 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1871 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1872 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1873 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1874 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1875 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1876 if (dev->i2c_bus[0].i2c_rc == 0)
1877 hauppauge_eeprom(dev, eeprom+0xc0);
1881 switch (dev->board) {
1882 case CX23885_BOARD_AVERMEDIA_HC81R:
1883 /* Defaults for VID B */
1884 ts1->gen_ctrl_val = 0x4; /* Parallel */
1885 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1886 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1887 /* Defaults for VID C */
1888 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1889 ts2->gen_ctrl_val = 0x10e;
1890 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1891 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1893 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1894 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1895 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1896 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1897 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1898 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1899 /* break omitted intentionally */
1900 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1901 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1902 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1903 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1905 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1906 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1907 /* Defaults for VID B - Analog encoder */
1908 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1909 ts1->gen_ctrl_val = 0x10e;
1910 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1911 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1913 /* APB_TSVALERR_POL (active low)*/
1914 ts1->vld_misc_val = 0x2000;
1915 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1916 cx_write(0x130184, 0xc);
1918 /* Defaults for VID C */
1919 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1920 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1921 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1923 case CX23885_BOARD_TBS_6920:
1924 ts1->gen_ctrl_val = 0x4; /* Parallel */
1925 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1926 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1928 case CX23885_BOARD_TEVII_S470:
1929 case CX23885_BOARD_TEVII_S471:
1930 case CX23885_BOARD_DVBWORLD_2005:
1931 case CX23885_BOARD_PROF_8000:
1932 case CX23885_BOARD_DVBSKY_T980C:
1933 case CX23885_BOARD_DVBSKY_S950C:
1934 case CX23885_BOARD_TT_CT2_4500_CI:
1935 case CX23885_BOARD_DVBSKY_S950:
1936 ts1->gen_ctrl_val = 0x5; /* Parallel */
1937 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1938 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1940 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1941 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1942 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1943 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1944 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1945 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1946 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1947 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1948 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1950 case CX23885_BOARD_TBS_6980:
1951 case CX23885_BOARD_TBS_6981:
1952 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1953 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1954 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1955 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1956 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1957 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1960 case CX23885_BOARD_MYGICA_X8506:
1961 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1962 case CX23885_BOARD_MYGICA_X8507:
1963 ts1->gen_ctrl_val = 0x5; /* Parallel */
1964 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1965 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1967 case CX23885_BOARD_MYGICA_X8558PRO:
1968 ts1->gen_ctrl_val = 0x5; /* Parallel */
1969 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1970 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1971 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1972 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1973 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1975 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1976 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1977 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1978 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1979 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1980 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1981 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1983 case CX23885_BOARD_DVBSKY_T9580:
1984 case CX23885_BOARD_DVBSKY_T982:
1985 ts1->gen_ctrl_val = 0x5; /* Parallel */
1986 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1987 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1988 ts2->gen_ctrl_val = 0x8; /* Serial bus */
1989 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1990 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1992 case CX23885_BOARD_DVBSKY_S952:
1993 ts1->gen_ctrl_val = 0x5; /* Parallel */
1994 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1995 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1996 ts2->gen_ctrl_val = 0xe; /* Serial bus */
1997 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1998 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2000 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2001 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2002 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2003 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2004 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2005 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2006 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2007 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2008 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2009 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2010 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2011 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2012 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2013 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2014 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2015 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2016 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2017 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2018 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2019 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2021 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2022 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2023 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2026 /* Certain boards support analog, or require the avcore to be
2027 * loaded, ensure this happens.
2029 switch (dev->board) {
2030 case CX23885_BOARD_TEVII_S470:
2031 /* Currently only enabled for the integrated IR controller */
2034 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2035 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2036 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2037 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2038 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2039 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2040 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2041 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2042 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2043 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2044 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2045 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2046 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2047 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2048 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2049 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2050 case CX23885_BOARD_MYGICA_X8506:
2051 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2052 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2053 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2054 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2055 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2056 case CX23885_BOARD_MPX885:
2057 case CX23885_BOARD_MYGICA_X8507:
2058 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2059 case CX23885_BOARD_AVERMEDIA_HC81R:
2060 case CX23885_BOARD_TBS_6980:
2061 case CX23885_BOARD_TBS_6981:
2062 case CX23885_BOARD_DVBSKY_T9580:
2063 case CX23885_BOARD_DVBSKY_T980C:
2064 case CX23885_BOARD_DVBSKY_S950C:
2065 case CX23885_BOARD_TT_CT2_4500_CI:
2066 case CX23885_BOARD_DVBSKY_S950:
2067 case CX23885_BOARD_DVBSKY_S952:
2068 case CX23885_BOARD_DVBSKY_T982:
2069 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2070 &dev->i2c_bus[2].i2c_adap,
2071 "cx25840", 0x88 >> 1, NULL);
2072 if (dev->sd_cx25840) {
2073 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2074 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2079 /* AUX-PLL 27MHz CLK */
2080 switch (dev->board) {
2081 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2082 netup_initialize(dev);
2084 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2086 const struct firmware *fw;
2087 const char *filename = "dvb-netup-altera-01.fw";
2088 char *action = "configure";
2089 static struct netup_card_info cinfo;
2090 struct altera_config netup_config = {
2093 .jtag_io = netup_jtag_io,
2096 netup_initialize(dev);
2098 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2100 cinfo.rev = netup_card_rev;
2102 switch (cinfo.rev) {
2104 filename = "dvb-netup-altera-04.fw";
2107 filename = "dvb-netup-altera-01.fw";
2110 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2111 cinfo.rev, filename);
2113 ret = request_firmware(&fw, filename, &dev->pci->dev);
2115 printk(KERN_ERR "did not find the firmware file. (%s) "
2116 "Please see linux/Documentation/dvb/ for more details "
2117 "on firmware-problems.", filename);
2119 altera_init(&netup_config, fw);
2121 release_firmware(fw);