2 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2014-2017 Mentor Graphics Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clkdev.h>
14 #include <linux/ctype.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/i2c.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/types.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-subdev.h>
32 /* min/typical/max system clock (xclk) frequencies */
33 #define OV5640_XCLK_MIN 6000000
34 #define OV5640_XCLK_MAX 54000000
36 #define OV5640_DEFAULT_SLAVE_ID 0x3c
38 #define OV5640_REG_SYS_RESET02 0x3002
39 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
40 #define OV5640_REG_SYS_CTRL0 0x3008
41 #define OV5640_REG_CHIP_ID 0x300a
42 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
43 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
44 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
45 #define OV5640_REG_PAD_OUTPUT00 0x3019
46 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
47 #define OV5640_REG_SC_PLL_CTRL0 0x3034
48 #define OV5640_REG_SC_PLL_CTRL1 0x3035
49 #define OV5640_REG_SC_PLL_CTRL2 0x3036
50 #define OV5640_REG_SC_PLL_CTRL3 0x3037
51 #define OV5640_REG_SLAVE_ID 0x3100
52 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
53 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
54 #define OV5640_REG_AWB_R_GAIN 0x3400
55 #define OV5640_REG_AWB_G_GAIN 0x3402
56 #define OV5640_REG_AWB_B_GAIN 0x3404
57 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
58 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
59 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
60 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
61 #define OV5640_REG_AEC_PK_MANUAL 0x3503
62 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
63 #define OV5640_REG_AEC_PK_VTS 0x350c
64 #define OV5640_REG_TIMING_DVPHO 0x3808
65 #define OV5640_REG_TIMING_DVPVO 0x380a
66 #define OV5640_REG_TIMING_HTS 0x380c
67 #define OV5640_REG_TIMING_VTS 0x380e
68 #define OV5640_REG_TIMING_TC_REG20 0x3820
69 #define OV5640_REG_TIMING_TC_REG21 0x3821
70 #define OV5640_REG_AEC_CTRL00 0x3a00
71 #define OV5640_REG_AEC_B50_STEP 0x3a08
72 #define OV5640_REG_AEC_B60_STEP 0x3a0a
73 #define OV5640_REG_AEC_CTRL0D 0x3a0d
74 #define OV5640_REG_AEC_CTRL0E 0x3a0e
75 #define OV5640_REG_AEC_CTRL0F 0x3a0f
76 #define OV5640_REG_AEC_CTRL10 0x3a10
77 #define OV5640_REG_AEC_CTRL11 0x3a11
78 #define OV5640_REG_AEC_CTRL1B 0x3a1b
79 #define OV5640_REG_AEC_CTRL1E 0x3a1e
80 #define OV5640_REG_AEC_CTRL1F 0x3a1f
81 #define OV5640_REG_HZ5060_CTRL00 0x3c00
82 #define OV5640_REG_HZ5060_CTRL01 0x3c01
83 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
84 #define OV5640_REG_FRAME_CTRL01 0x4202
85 #define OV5640_REG_FORMAT_CONTROL00 0x4300
86 #define OV5640_REG_POLARITY_CTRL00 0x4740
87 #define OV5640_REG_MIPI_CTRL00 0x4800
88 #define OV5640_REG_DEBUG_MODE 0x4814
89 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
90 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
91 #define OV5640_REG_SDE_CTRL0 0x5580
92 #define OV5640_REG_SDE_CTRL1 0x5581
93 #define OV5640_REG_SDE_CTRL3 0x5583
94 #define OV5640_REG_SDE_CTRL4 0x5584
95 #define OV5640_REG_SDE_CTRL5 0x5585
96 #define OV5640_REG_AVG_READOUT 0x56a1
99 OV5640_MODE_QCIF_176_144 = 0,
100 OV5640_MODE_QVGA_320_240,
101 OV5640_MODE_VGA_640_480,
102 OV5640_MODE_NTSC_720_480,
103 OV5640_MODE_PAL_720_576,
104 OV5640_MODE_XGA_1024_768,
105 OV5640_MODE_720P_1280_720,
106 OV5640_MODE_1080P_1920_1080,
107 OV5640_MODE_QSXGA_2592_1944,
111 enum ov5640_frame_rate {
115 OV5640_NUM_FRAMERATES,
118 enum ov5640_format_mux {
119 OV5640_FMT_MUX_YUV422 = 0,
121 OV5640_FMT_MUX_DITHER,
122 OV5640_FMT_MUX_RAW_DPC,
123 OV5640_FMT_MUX_SNR_RAW,
124 OV5640_FMT_MUX_RAW_CIP,
127 struct ov5640_pixfmt {
132 static const struct ov5640_pixfmt ov5640_formats[] = {
133 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
134 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
135 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
136 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
137 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
138 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
139 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
140 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
141 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
145 * FIXME: remove this when a subdev API becomes available
146 * to set the MIPI CSI-2 virtual channel.
148 static unsigned int virtual_channel;
149 module_param(virtual_channel, uint, 0444);
150 MODULE_PARM_DESC(virtual_channel,
151 "MIPI CSI-2 virtual channel (0..3), default 0");
153 static const int ov5640_framerates[] = {
154 [OV5640_15_FPS] = 15,
155 [OV5640_30_FPS] = 30,
156 [OV5640_60_FPS] = 60,
159 /* regulator supplies */
160 static const char * const ov5640_supply_name[] = {
161 "DOVDD", /* Digital I/O (1.8V) supply */
162 "DVDD", /* Digital Core (1.5V) supply */
163 "AVDD", /* Analog (2.8V) supply */
166 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
169 * Image size under 1280 * 960 are SUBSAMPLING
170 * Image size upper 1280 * 960 are SCALING
172 enum ov5640_downsize_mode {
184 struct ov5640_mode_info {
185 enum ov5640_mode_id id;
186 enum ov5640_downsize_mode dn_mode;
191 const struct reg_value *reg_data;
195 struct ov5640_ctrls {
196 struct v4l2_ctrl_handler handler;
198 struct v4l2_ctrl *auto_exp;
199 struct v4l2_ctrl *exposure;
202 struct v4l2_ctrl *auto_wb;
203 struct v4l2_ctrl *blue_balance;
204 struct v4l2_ctrl *red_balance;
207 struct v4l2_ctrl *auto_gain;
208 struct v4l2_ctrl *gain;
210 struct v4l2_ctrl *brightness;
211 struct v4l2_ctrl *light_freq;
212 struct v4l2_ctrl *saturation;
213 struct v4l2_ctrl *contrast;
214 struct v4l2_ctrl *hue;
215 struct v4l2_ctrl *test_pattern;
216 struct v4l2_ctrl *hflip;
217 struct v4l2_ctrl *vflip;
221 struct i2c_client *i2c_client;
222 struct v4l2_subdev sd;
223 struct media_pad pad;
224 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
225 struct clk *xclk; /* system clock to OV5640 */
228 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
229 struct gpio_desc *reset_gpio;
230 struct gpio_desc *pwdn_gpio;
233 /* lock to protect all members below */
238 struct v4l2_mbus_framefmt fmt;
239 bool pending_fmt_change;
241 const struct ov5640_mode_info *current_mode;
242 const struct ov5640_mode_info *last_mode;
243 enum ov5640_frame_rate current_fr;
244 struct v4l2_fract frame_interval;
246 struct ov5640_ctrls ctrls;
248 u32 prev_sysclk, prev_hts;
249 u32 ae_low, ae_high, ae_target;
251 bool pending_mode_change;
255 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
257 return container_of(sd, struct ov5640_dev, sd);
260 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
262 return &container_of(ctrl->handler, struct ov5640_dev,
267 * FIXME: all of these register tables are likely filled with
268 * entries that set the register to their power-on default values,
269 * and which are otherwise not touched by this driver. Those entries
270 * should be identified and removed to speed register load time
273 /* YUV422 UYVY VGA@30fps */
274 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
275 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
276 {0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0},
277 {0x3630, 0x36, 0, 0},
278 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
279 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
280 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
281 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
282 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
283 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
284 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
285 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
286 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
287 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
288 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
289 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
290 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
291 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
292 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
293 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
294 {0x3810, 0x00, 0, 0},
295 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
296 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
297 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
298 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
299 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
300 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
301 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
302 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
303 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
304 {0x501f, 0x00, 0, 0}, {0x4713, 0x03, 0, 0}, {0x4407, 0x04, 0, 0},
305 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
306 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
307 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
308 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
309 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
310 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
311 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
312 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
313 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
314 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
315 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
316 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
317 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
318 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
319 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
320 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
321 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
322 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
323 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
324 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
325 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
326 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
327 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
328 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
329 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
330 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
331 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
332 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
333 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
334 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
335 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
336 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
337 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
338 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
339 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
340 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
341 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
342 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
343 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
344 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
345 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
346 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
347 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
348 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
349 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
350 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
351 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
352 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
353 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
354 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
355 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
356 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
359 static const struct reg_value ov5640_setting_VGA_640_480[] = {
360 {0x3c07, 0x08, 0, 0},
361 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
362 {0x3814, 0x31, 0, 0},
363 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
364 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
365 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
366 {0x3810, 0x00, 0, 0},
367 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
368 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
369 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
370 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
371 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
372 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
373 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
374 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
375 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
378 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
379 {0x3c07, 0x08, 0, 0},
380 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
381 {0x3814, 0x31, 0, 0},
382 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
383 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
384 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
385 {0x3810, 0x00, 0, 0},
386 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
387 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
388 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
389 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
390 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
391 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
392 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
393 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
394 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
397 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
398 {0x3c07, 0x08, 0, 0},
399 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
400 {0x3814, 0x31, 0, 0},
401 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
402 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
403 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
404 {0x3810, 0x00, 0, 0},
405 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
406 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
407 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
408 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
409 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
410 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
411 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
412 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
413 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
416 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
417 {0x3c07, 0x08, 0, 0},
418 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
419 {0x3814, 0x31, 0, 0},
420 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
421 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
422 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
423 {0x3810, 0x00, 0, 0},
424 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
425 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
426 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
427 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
428 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
429 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
430 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
431 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
432 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
435 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
436 {0x3c07, 0x08, 0, 0},
437 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
438 {0x3814, 0x31, 0, 0},
439 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
440 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
441 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
442 {0x3810, 0x00, 0, 0},
443 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
444 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
445 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
446 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
447 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
448 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
449 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
450 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
451 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
454 static const struct reg_value ov5640_setting_PAL_720_576[] = {
455 {0x3c07, 0x08, 0, 0},
456 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
457 {0x3814, 0x31, 0, 0},
458 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
459 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
460 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
461 {0x3810, 0x00, 0, 0},
462 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
463 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
464 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
465 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
466 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
467 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
468 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
469 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
470 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
473 static const struct reg_value ov5640_setting_720P_1280_720[] = {
474 {0x3c07, 0x07, 0, 0},
475 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
476 {0x3814, 0x31, 0, 0},
477 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
478 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
479 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
480 {0x3810, 0x00, 0, 0},
481 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
482 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
483 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
484 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
485 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
486 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
487 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
488 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
489 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
492 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
493 {0x3008, 0x42, 0, 0},
494 {0x3c07, 0x08, 0, 0},
495 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
496 {0x3814, 0x11, 0, 0},
497 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
498 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
499 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
500 {0x3810, 0x00, 0, 0},
501 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
502 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
503 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
504 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
505 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
506 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
507 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
508 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
509 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
510 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
511 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
512 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
513 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
514 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
515 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
516 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
517 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
518 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
519 {0x3a15, 0x60, 0, 0}, {0x4713, 0x02, 0, 0}, {0x4407, 0x04, 0, 0},
520 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
521 {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
524 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
525 {0x3c07, 0x08, 0, 0},
526 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
527 {0x3814, 0x11, 0, 0},
528 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
529 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
530 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
531 {0x3810, 0x00, 0, 0},
532 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
533 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
534 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
535 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
536 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
537 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
538 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
539 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
540 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
543 /* power-on sensor init reg table */
544 static const struct ov5640_mode_info ov5640_mode_init_data = {
545 0, SUBSAMPLING, 640, 1896, 480, 984,
546 ov5640_init_setting_30fps_VGA,
547 ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
550 static const struct ov5640_mode_info
551 ov5640_mode_data[OV5640_NUM_MODES] = {
552 {OV5640_MODE_QCIF_176_144, SUBSAMPLING,
554 ov5640_setting_QCIF_176_144,
555 ARRAY_SIZE(ov5640_setting_QCIF_176_144)},
556 {OV5640_MODE_QVGA_320_240, SUBSAMPLING,
558 ov5640_setting_QVGA_320_240,
559 ARRAY_SIZE(ov5640_setting_QVGA_320_240)},
560 {OV5640_MODE_VGA_640_480, SUBSAMPLING,
561 640, 1896, 480, 1080,
562 ov5640_setting_VGA_640_480,
563 ARRAY_SIZE(ov5640_setting_VGA_640_480)},
564 {OV5640_MODE_NTSC_720_480, SUBSAMPLING,
566 ov5640_setting_NTSC_720_480,
567 ARRAY_SIZE(ov5640_setting_NTSC_720_480)},
568 {OV5640_MODE_PAL_720_576, SUBSAMPLING,
570 ov5640_setting_PAL_720_576,
571 ARRAY_SIZE(ov5640_setting_PAL_720_576)},
572 {OV5640_MODE_XGA_1024_768, SUBSAMPLING,
573 1024, 1896, 768, 1080,
574 ov5640_setting_XGA_1024_768,
575 ARRAY_SIZE(ov5640_setting_XGA_1024_768)},
576 {OV5640_MODE_720P_1280_720, SUBSAMPLING,
577 1280, 1892, 720, 740,
578 ov5640_setting_720P_1280_720,
579 ARRAY_SIZE(ov5640_setting_720P_1280_720)},
580 {OV5640_MODE_1080P_1920_1080, SCALING,
581 1920, 2500, 1080, 1120,
582 ov5640_setting_1080P_1920_1080,
583 ARRAY_SIZE(ov5640_setting_1080P_1920_1080)},
584 {OV5640_MODE_QSXGA_2592_1944, SCALING,
585 2592, 2844, 1944, 1968,
586 ov5640_setting_QSXGA_2592_1944,
587 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944)},
590 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
592 struct i2c_client *client = sensor->i2c_client;
597 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
600 buf[0] = OV5640_REG_SLAVE_ID >> 8;
601 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
602 buf[2] = client->addr << 1;
604 msg.addr = OV5640_DEFAULT_SLAVE_ID;
607 msg.len = sizeof(buf);
609 ret = i2c_transfer(client->adapter, &msg, 1);
611 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
618 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
620 struct i2c_client *client = sensor->i2c_client;
629 msg.addr = client->addr;
630 msg.flags = client->flags;
632 msg.len = sizeof(buf);
634 ret = i2c_transfer(client->adapter, &msg, 1);
636 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
644 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
646 struct i2c_client *client = sensor->i2c_client;
647 struct i2c_msg msg[2];
654 msg[0].addr = client->addr;
655 msg[0].flags = client->flags;
657 msg[0].len = sizeof(buf);
659 msg[1].addr = client->addr;
660 msg[1].flags = client->flags | I2C_M_RD;
664 ret = i2c_transfer(client->adapter, msg, 2);
666 dev_err(&client->dev, "%s: error: reg=%x\n",
675 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
680 ret = ov5640_read_reg(sensor, reg, &hi);
683 ret = ov5640_read_reg(sensor, reg + 1, &lo);
687 *val = ((u16)hi << 8) | (u16)lo;
691 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
695 ret = ov5640_write_reg(sensor, reg, val >> 8);
699 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
702 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
708 ret = ov5640_read_reg(sensor, reg, &readval);
716 return ov5640_write_reg(sensor, reg, val);
720 * After trying the various combinations, reading various
721 * documentations spreaded around the net, and from the various
722 * feedback, the clock tree is probably as follows:
728 * +->| PLL1 | - reg 0x3036, for the multiplier
729 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
731 * +->| System Clock | - reg 0x3035, bits 4-7
734 * +->| MIPI Divider | - reg 0x3035, bits 0-3
736 * | +----------------> MIPI SCLK
738 * | +->| / 2 |-------> MIPI BIT CLK
741 * +->| PLL Root Div | - reg 0x3037, bit 4
744 * +->| Bit Div | - reg 0x3035, bits 0-3
747 * +->| SCLK Div | - reg 0x3108, bits 0-1
749 * | +---------------> SCLK
751 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
753 * | +---------------> SCLK 2X
755 * +->| PCLK Div | - reg 0x3108, bits 4-5
758 * +->| P_DIV | - reg 0x3035, bits 0-3
760 * +------------> PCLK
762 * This is deviating from the datasheet at least for the register
763 * 0x3108, since it's said here that the PCLK would be clocked from
766 * There seems to be also (unverified) constraints:
767 * - the PLL pre-divider output rate should be in the 4-27MHz range
768 * - the PLL multiplier output rate should be in the 500-1000MHz range
769 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
771 * In the two latter cases, these constraints are met since our
772 * factors are hardcoded. If we were to change that, we would need to
773 * take this into account. The only varying parts are the PLL
774 * multiplier and the system clock divider, which are shared between
775 * all these clocks so won't cause any issue.
779 * This is supposed to be ranging from 1 to 8, but the value is always
780 * set to 3 in the vendor kernels.
782 #define OV5640_PLL_PREDIV 3
784 #define OV5640_PLL_MULT_MIN 4
785 #define OV5640_PLL_MULT_MAX 252
788 * This is supposed to be ranging from 1 to 16, but the value is
789 * always set to either 1 or 2 in the vendor kernels.
791 #define OV5640_SYSDIV_MIN 1
792 #define OV5640_SYSDIV_MAX 16
795 * Hardcode these values for scaler and non-scaler modes.
796 * FIXME: to be re-calcualted for 1 data lanes setups
798 #define OV5640_MIPI_DIV_PCLK 2
799 #define OV5640_MIPI_DIV_SCLK 1
802 * This is supposed to be ranging from 1 to 2, but the value is always
803 * set to 2 in the vendor kernels.
805 #define OV5640_PLL_ROOT_DIV 2
806 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
809 * We only supports 8-bit formats at the moment
811 #define OV5640_BIT_DIV 2
812 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
815 * This is supposed to be ranging from 1 to 8, but the value is always
816 * set to 2 in the vendor kernels.
818 #define OV5640_SCLK_ROOT_DIV 2
821 * This is hardcoded so that the consistency is maintained between SCLK and
824 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
827 * This is supposed to be ranging from 1 to 8, but the value is always
828 * set to 1 in the vendor kernels.
830 #define OV5640_PCLK_ROOT_DIV 1
831 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
833 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
834 u8 pll_prediv, u8 pll_mult,
837 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
839 /* PLL1 output cannot exceed 1GHz. */
840 if (sysclk / 1000000 > 1000)
843 return sysclk / sysdiv;
846 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
848 u8 *pll_prediv, u8 *pll_mult,
851 unsigned long best = ~0;
852 u8 best_sysdiv = 1, best_mult = 1;
853 u8 _sysdiv, _pll_mult;
855 for (_sysdiv = OV5640_SYSDIV_MIN;
856 _sysdiv <= OV5640_SYSDIV_MAX;
858 for (_pll_mult = OV5640_PLL_MULT_MIN;
859 _pll_mult <= OV5640_PLL_MULT_MAX;
864 * The PLL multiplier cannot be odd if above
867 if (_pll_mult > 127 && (_pll_mult % 2))
870 _rate = ov5640_compute_sys_clk(sensor,
875 * We have reached the maximum allowed PLL1 output,
882 * Prefer rates above the expected clock rate than
883 * below, even if that means being less precise.
888 if (abs(rate - _rate) < abs(rate - best)) {
890 best_sysdiv = _sysdiv;
891 best_mult = _pll_mult;
900 *sysdiv = best_sysdiv;
901 *pll_prediv = OV5640_PLL_PREDIV;
902 *pll_mult = best_mult;
908 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
909 * for the MIPI CSI-2 output.
911 * @rate: The requested bandwidth per lane in bytes per second.
912 * 'Bandwidth Per Lane' is calculated as:
913 * bpl = HTOT * VTOT * FPS * bpp / num_lanes;
915 * This function use the requested bandwidth to calculate:
916 * - sample_rate = bpl / (bpp / num_lanes);
917 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
919 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
921 * with these fixed parameters:
923 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
926 * The MIPI clock generation differs for modes that use the scaler and modes
927 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
930 * - mipi_sclk = bpl / MIPI_DIV / 2;
933 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
934 * from the pixel clock, and thus:
936 * - sample_rate = bpl / (bpp / num_lanes);
937 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
938 * = bpl / (4 * MIPI_DIV / num_lanes);
939 * - MIPI_DIV = bpp / (4 * num_lanes);
941 * FIXME: this have been tested with 16bpp and 2 lanes setup only.
942 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
943 * above formula for setups with 1 lane or image formats with different bpp.
945 * FIXME: this deviates from the sensor manual documentation which is quite
946 * thin on the MIPI clock tree generation part.
948 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
951 const struct ov5640_mode_info *mode = sensor->current_mode;
952 u8 prediv, mult, sysdiv;
957 * 1280x720 is reported to use 'SUBSAMPLING' only,
958 * but according to the sensor manual it goes through the
959 * scaler before subsampling.
961 if (mode->dn_mode == SCALING ||
962 (mode->id == OV5640_MODE_720P_1280_720))
963 mipi_div = OV5640_MIPI_DIV_SCLK;
965 mipi_div = OV5640_MIPI_DIV_PCLK;
967 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
969 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
970 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
972 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
973 0xff, sysdiv << 4 | mipi_div);
977 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
981 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
982 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
986 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
987 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
990 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
992 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
993 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
995 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
996 OV5640_PCLK_ROOT_DIV;
998 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1000 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1001 *bit_div = OV5640_BIT_DIV;
1002 *pclk_div = OV5640_PCLK_ROOT_DIV;
1004 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1007 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1009 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1012 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1013 &bit_div, &pclk_div);
1018 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1024 * We need to set sysdiv according to the clock, and to clear
1027 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1032 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1037 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1038 0x1f, prediv | ((pll_rdiv - 1) << 4));
1042 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1043 (ilog2(pclk_div) << 4));
1046 /* download ov5640 settings to sensor through i2c */
1047 static int ov5640_set_timings(struct ov5640_dev *sensor,
1048 const struct ov5640_mode_info *mode)
1052 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1056 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1060 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1064 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1067 static int ov5640_load_regs(struct ov5640_dev *sensor,
1068 const struct ov5640_mode_info *mode)
1070 const struct reg_value *regs = mode->reg_data;
1077 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1078 delay_ms = regs->delay_ms;
1079 reg_addr = regs->reg_addr;
1084 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1086 ret = ov5640_write_reg(sensor, reg_addr, val);
1091 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1094 return ov5640_set_timings(sensor, mode);
1097 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1099 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1100 BIT(0), on ? 0 : BIT(0));
1103 /* read exposure, in number of line periods */
1104 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1109 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1112 exp = ((int)temp & 0x0f) << 16;
1113 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1116 exp |= ((int)temp << 8);
1117 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1125 /* write exposure, given number of line periods */
1126 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1132 ret = ov5640_write_reg(sensor,
1133 OV5640_REG_AEC_PK_EXPOSURE_LO,
1137 ret = ov5640_write_reg(sensor,
1138 OV5640_REG_AEC_PK_EXPOSURE_MED,
1139 (exposure >> 8) & 0xff);
1142 return ov5640_write_reg(sensor,
1143 OV5640_REG_AEC_PK_EXPOSURE_HI,
1144 (exposure >> 16) & 0x0f);
1147 static int ov5640_get_gain(struct ov5640_dev *sensor)
1152 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1156 return gain & 0x3ff;
1159 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1161 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1165 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1167 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1168 BIT(1), on ? 0 : BIT(1));
1171 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1174 unsigned int flags = sensor->ep.bus.parallel.flags;
1180 * Note about parallel port configuration.
1182 * When configured in parallel mode, the OV5640 will
1183 * output 10 bits data on DVP data lines [9:0].
1184 * If only 8 bits data are wanted, the 8 bits data lines
1185 * of the camera interface must be physically connected
1186 * on the DVP data lines [9:2].
1188 * Control lines polarity can be configured through
1189 * devicetree endpoint control lines properties.
1190 * If no endpoint control lines properties are set,
1191 * polarity will be as below:
1192 * - VSYNC: active high
1193 * - HREF: active low
1194 * - PCLK: active low
1199 * configure parallel port control lines polarity
1202 * - [5]: PCLK polarity (0: active low, 1: active high)
1203 * - [1]: HREF polarity (0: active low, 1: active high)
1204 * - [0]: VSYNC polarity (mismatch here between
1205 * datasheet and hardware, 0 is active high
1206 * and 1 is active low...)
1208 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1210 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1212 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1215 ret = ov5640_write_reg(sensor,
1216 OV5640_REG_POLARITY_CTRL00,
1226 * powerdown MIPI TX/RX PHY & disable MIPI
1233 ret = ov5640_write_reg(sensor,
1234 OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
1239 * enable VSYNC/HREF/PCLK DVP control lines
1240 * & D[9:6] DVP data lines
1242 * PAD OUTPUT ENABLE 01
1243 * - 6: VSYNC output enable
1244 * - 5: HREF output enable
1245 * - 4: PCLK output enable
1246 * - [3:0]: D[9:6] output enable
1248 ret = ov5640_write_reg(sensor,
1249 OV5640_REG_PAD_OUTPUT_ENABLE01,
1255 * enable D[5:0] DVP data lines
1257 * PAD OUTPUT ENABLE 02
1258 * - [7:2]: D[5:0] output enable
1260 return ov5640_write_reg(sensor,
1261 OV5640_REG_PAD_OUTPUT_ENABLE02,
1265 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1270 * Enable/disable the MIPI interface
1272 * 0x300e = on ? 0x45 : 0x40
1274 * FIXME: the sensor manual (version 2.03) reports
1275 * [7:5] = 000 : 1 data lane mode
1276 * [7:5] = 001 : 2 data lanes mode
1277 * But this settings do not work, while the following ones
1278 * have been validated for 2 data lanes mode.
1280 * [7:5] = 010 : 2 data lanes mode
1281 * [4] = 0 : Power up MIPI HS Tx
1282 * [3] = 0 : Power up MIPI LS Rx
1283 * [2] = 1/0 : MIPI interface enable/disable
1284 * [1:0] = 01/00: FIXME: 'debug'
1286 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1291 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1295 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1297 /* calculate sysclk */
1298 u32 xvclk = sensor->xclk_freq / 10000;
1299 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1300 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1301 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1305 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1308 temp2 = temp1 & 0x0f;
1309 if (temp2 == 8 || temp2 == 10)
1310 bit_div2x = temp2 / 2;
1312 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1315 sysdiv = temp1 >> 4;
1319 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1324 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1327 prediv = temp1 & 0x0f;
1328 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1330 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1333 temp2 = temp1 & 0x03;
1334 sclk_rdiv = sclk_rdiv_map[temp2];
1336 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1339 VCO = xvclk * multiplier / prediv;
1341 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1346 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1348 /* read HTS from register settings */
1352 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1356 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1359 static int ov5640_get_hts(struct ov5640_dev *sensor)
1361 /* read HTS from register settings */
1365 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1371 static int ov5640_get_vts(struct ov5640_dev *sensor)
1376 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1382 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1384 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1387 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1389 /* get banding filter value */
1390 int ret, light_freq = 0;
1393 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1399 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1412 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1428 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1430 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1433 /* read preview PCLK */
1434 ret = ov5640_get_sysclk(sensor);
1439 sensor->prev_sysclk = ret;
1440 /* read preview HTS */
1441 ret = ov5640_get_hts(sensor);
1446 sensor->prev_hts = ret;
1448 /* read preview VTS */
1449 ret = ov5640_get_vts(sensor);
1454 /* calculate banding filter */
1456 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1457 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1462 max_band60 = (int)((prev_vts - 4) / band_step60);
1463 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1468 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1469 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1474 max_band50 = (int)((prev_vts - 4) / band_step50);
1475 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1478 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1480 /* stable in high */
1481 u32 fast_high, fast_low;
1484 sensor->ae_low = target * 23 / 25; /* 0.92 */
1485 sensor->ae_high = target * 27 / 25; /* 1.08 */
1487 fast_high = sensor->ae_high << 1;
1488 if (fast_high > 255)
1491 fast_low = sensor->ae_low >> 1;
1493 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1496 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1499 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1502 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1505 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1508 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1511 static int ov5640_get_binning(struct ov5640_dev *sensor)
1516 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1520 return temp & BIT(0);
1523 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1529 * - [0]: Horizontal binning enable
1531 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1532 BIT(0), enable ? BIT(0) : 0);
1537 * - [0]: Undocumented, but hardcoded init sequences
1538 * are always setting REG21/REG20 bit 0 to same value...
1540 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1541 BIT(0), enable ? BIT(0) : 0);
1544 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1546 struct i2c_client *client = sensor->i2c_client;
1547 u8 temp, channel = virtual_channel;
1551 dev_err(&client->dev,
1552 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1557 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1561 temp |= (channel << 6);
1562 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1565 static const struct ov5640_mode_info *
1566 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1567 int width, int height, bool nearest)
1569 const struct ov5640_mode_info *mode;
1571 mode = v4l2_find_nearest_size(ov5640_mode_data,
1572 ARRAY_SIZE(ov5640_mode_data),
1577 (!nearest && (mode->hact != width || mode->vact != height)))
1580 /* Only 640x480 can operate at 60fps (for now) */
1581 if (fr == OV5640_60_FPS &&
1582 !(mode->hact == 640 && mode->vact == 480))
1589 * sensor changes between scaling and subsampling, go through
1590 * exposure calculation
1592 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1593 const struct ov5640_mode_info *mode)
1595 u32 prev_shutter, prev_gain16;
1596 u32 cap_shutter, cap_gain16;
1597 u32 cap_sysclk, cap_hts, cap_vts;
1598 u32 light_freq, cap_bandfilt, cap_maxband;
1599 u32 cap_gain16_shutter;
1603 if (!mode->reg_data)
1606 /* read preview shutter */
1607 ret = ov5640_get_exposure(sensor);
1611 ret = ov5640_get_binning(sensor);
1614 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1615 mode->id != OV5640_MODE_1080P_1920_1080)
1618 /* read preview gain */
1619 ret = ov5640_get_gain(sensor);
1625 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1629 /* turn off night mode for capture */
1630 ret = ov5640_set_night_mode(sensor);
1634 /* Write capture setting */
1635 ret = ov5640_load_regs(sensor, mode);
1639 /* read capture VTS */
1640 ret = ov5640_get_vts(sensor);
1644 ret = ov5640_get_hts(sensor);
1651 ret = ov5640_get_sysclk(sensor);
1658 /* calculate capture banding filter */
1659 ret = ov5640_get_light_freq(sensor);
1664 if (light_freq == 60) {
1666 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1669 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1672 if (!sensor->prev_sysclk) {
1673 ret = ov5640_get_sysclk(sensor);
1678 sensor->prev_sysclk = ret;
1684 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1686 /* calculate capture shutter/gain16 */
1687 if (average > sensor->ae_low && average < sensor->ae_high) {
1688 /* in stable range */
1689 cap_gain16_shutter =
1690 prev_gain16 * prev_shutter *
1691 cap_sysclk / sensor->prev_sysclk *
1692 sensor->prev_hts / cap_hts *
1693 sensor->ae_target / average;
1695 cap_gain16_shutter =
1696 prev_gain16 * prev_shutter *
1697 cap_sysclk / sensor->prev_sysclk *
1698 sensor->prev_hts / cap_hts;
1701 /* gain to shutter */
1702 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1703 /* shutter < 1/100 */
1704 cap_shutter = cap_gain16_shutter / 16;
1705 if (cap_shutter < 1)
1708 cap_gain16 = cap_gain16_shutter / cap_shutter;
1709 if (cap_gain16 < 16)
1712 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1713 /* exposure reach max */
1714 cap_shutter = cap_bandfilt * cap_maxband;
1718 cap_gain16 = cap_gain16_shutter / cap_shutter;
1720 /* 1/100 < (cap_shutter = n/100) =< max */
1722 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1727 cap_gain16 = cap_gain16_shutter / cap_shutter;
1731 /* set capture gain */
1732 ret = ov5640_set_gain(sensor, cap_gain16);
1736 /* write capture shutter */
1737 if (cap_shutter > (cap_vts - 4)) {
1738 cap_vts = cap_shutter + 4;
1739 ret = ov5640_set_vts(sensor, cap_vts);
1745 return ov5640_set_exposure(sensor, cap_shutter);
1749 * if sensor changes inside scaling or subsampling
1750 * change mode directly
1752 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1753 const struct ov5640_mode_info *mode)
1755 if (!mode->reg_data)
1758 /* Write capture setting */
1759 return ov5640_load_regs(sensor, mode);
1762 static int ov5640_set_mode(struct ov5640_dev *sensor)
1764 const struct ov5640_mode_info *mode = sensor->current_mode;
1765 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1766 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1767 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1768 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1772 dn_mode = mode->dn_mode;
1773 orig_dn_mode = orig_mode->dn_mode;
1775 /* auto gain and exposure must be turned off when changing modes */
1777 ret = ov5640_set_autogain(sensor, false);
1783 ret = ov5640_set_autoexposure(sensor, false);
1785 goto restore_auto_gain;
1789 * All the formats we support have 16 bits per pixel, seems to require
1790 * the same rate than YUV, so we can just use 16 bpp all the time.
1792 rate = mode->vtot * mode->htot * 16;
1793 rate *= ov5640_framerates[sensor->current_fr];
1794 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1795 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1796 ret = ov5640_set_mipi_pclk(sensor, rate);
1798 rate = rate / sensor->ep.bus.parallel.bus_width;
1799 ret = ov5640_set_dvp_pclk(sensor, rate);
1805 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1806 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1808 * change between subsampling and scaling
1809 * go through exposure calculation
1811 ret = ov5640_set_mode_exposure_calc(sensor, mode);
1814 * change inside subsampling or scaling
1815 * download firmware directly
1817 ret = ov5640_set_mode_direct(sensor, mode);
1820 goto restore_auto_exp_gain;
1822 /* restore auto gain and exposure */
1824 ov5640_set_autogain(sensor, true);
1826 ov5640_set_autoexposure(sensor, true);
1828 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1831 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1834 ret = ov5640_get_light_freq(sensor);
1837 ret = ov5640_set_bandingfilter(sensor);
1840 ret = ov5640_set_virtual_channel(sensor);
1844 sensor->pending_mode_change = false;
1845 sensor->last_mode = mode;
1849 restore_auto_exp_gain:
1851 ov5640_set_autoexposure(sensor, true);
1854 ov5640_set_autogain(sensor, true);
1859 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1860 struct v4l2_mbus_framefmt *format);
1862 /* restore the last set video mode after chip power-on */
1863 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1867 /* first load the initial register values */
1868 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1871 sensor->last_mode = &ov5640_mode_init_data;
1873 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1874 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1875 ilog2(OV5640_SCLK_ROOT_DIV));
1879 /* now restore the last capture mode */
1880 ret = ov5640_set_mode(sensor);
1884 return ov5640_set_framefmt(sensor, &sensor->fmt);
1887 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1889 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1892 static void ov5640_reset(struct ov5640_dev *sensor)
1894 if (!sensor->reset_gpio)
1897 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1899 /* camera power cycle */
1900 ov5640_power(sensor, false);
1901 usleep_range(5000, 10000);
1902 ov5640_power(sensor, true);
1903 usleep_range(5000, 10000);
1905 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1906 usleep_range(1000, 2000);
1908 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1909 usleep_range(5000, 10000);
1912 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1914 struct i2c_client *client = sensor->i2c_client;
1917 ret = clk_prepare_enable(sensor->xclk);
1919 dev_err(&client->dev, "%s: failed to enable clock\n",
1924 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1927 dev_err(&client->dev, "%s: failed to enable regulators\n",
1932 ov5640_reset(sensor);
1933 ov5640_power(sensor, true);
1935 ret = ov5640_init_slave_id(sensor);
1942 ov5640_power(sensor, false);
1943 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1945 clk_disable_unprepare(sensor->xclk);
1949 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1951 ov5640_power(sensor, false);
1952 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1953 clk_disable_unprepare(sensor->xclk);
1956 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
1961 ret = ov5640_set_power_on(sensor);
1965 ret = ov5640_restore_mode(sensor);
1969 /* We're done here for DVP bus, while CSI-2 needs setup. */
1970 if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1974 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
1977 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
1978 * "ov5640_set_stream_mipi()")
1979 * [4] = 0 : Power up MIPI HS Tx
1980 * [3] = 0 : Power up MIPI LS Rx
1981 * [2] = 0 : MIPI interface disabled
1983 ret = ov5640_write_reg(sensor,
1984 OV5640_REG_IO_MIPI_CTRL00, 0x40);
1989 * Gate clock and set LP11 in 'no packets mode' (idle)
1992 * [5] = 1 : Gate clock when 'no packets'
1993 * [2] = 1 : MIPI bus in LP11 when 'no packets'
1995 ret = ov5640_write_reg(sensor,
1996 OV5640_REG_MIPI_CTRL00, 0x24);
2001 * Set data lanes and clock in LP11 when 'sleeping'
2004 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2005 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2006 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2008 ret = ov5640_write_reg(sensor,
2009 OV5640_REG_PAD_OUTPUT00, 0x70);
2013 /* Give lanes some time to coax into LP11 state. */
2014 usleep_range(500, 1000);
2017 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
2018 /* Reset MIPI bus settings to their default values. */
2019 ov5640_write_reg(sensor,
2020 OV5640_REG_IO_MIPI_CTRL00, 0x58);
2021 ov5640_write_reg(sensor,
2022 OV5640_REG_MIPI_CTRL00, 0x04);
2023 ov5640_write_reg(sensor,
2024 OV5640_REG_PAD_OUTPUT00, 0x00);
2027 ov5640_set_power_off(sensor);
2033 ov5640_set_power_off(sensor);
2037 /* --------------- Subdev Operations --------------- */
2039 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2041 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2044 mutex_lock(&sensor->lock);
2047 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2048 * update the power state.
2050 if (sensor->power_count == !on) {
2051 ret = ov5640_set_power(sensor, !!on);
2056 /* Update the power count. */
2057 sensor->power_count += on ? 1 : -1;
2058 WARN_ON(sensor->power_count < 0);
2060 mutex_unlock(&sensor->lock);
2062 if (on && !ret && sensor->power_count == 1) {
2063 /* restore controls */
2064 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2070 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2071 struct v4l2_fract *fi,
2072 u32 width, u32 height)
2074 const struct ov5640_mode_info *mode;
2075 enum ov5640_frame_rate rate = OV5640_30_FPS;
2076 int minfps, maxfps, best_fps, fps;
2079 minfps = ov5640_framerates[OV5640_15_FPS];
2080 maxfps = ov5640_framerates[OV5640_60_FPS];
2082 if (fi->numerator == 0) {
2083 fi->denominator = maxfps;
2085 rate = OV5640_60_FPS;
2089 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2093 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2094 int curr_fps = ov5640_framerates[i];
2096 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2097 best_fps = curr_fps;
2103 fi->denominator = best_fps;
2106 mode = ov5640_find_mode(sensor, rate, width, height, false);
2107 return mode ? rate : -EINVAL;
2110 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2111 struct v4l2_subdev_pad_config *cfg,
2112 struct v4l2_subdev_format *format)
2114 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2115 struct v4l2_mbus_framefmt *fmt;
2117 if (format->pad != 0)
2120 mutex_lock(&sensor->lock);
2122 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2123 fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2128 format->format = *fmt;
2130 mutex_unlock(&sensor->lock);
2135 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2136 struct v4l2_mbus_framefmt *fmt,
2137 enum ov5640_frame_rate fr,
2138 const struct ov5640_mode_info **new_mode)
2140 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2141 const struct ov5640_mode_info *mode;
2144 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2147 fmt->width = mode->hact;
2148 fmt->height = mode->vact;
2153 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2154 if (ov5640_formats[i].code == fmt->code)
2156 if (i >= ARRAY_SIZE(ov5640_formats))
2159 fmt->code = ov5640_formats[i].code;
2160 fmt->colorspace = ov5640_formats[i].colorspace;
2161 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2162 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2163 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2168 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2169 struct v4l2_subdev_pad_config *cfg,
2170 struct v4l2_subdev_format *format)
2172 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2173 const struct ov5640_mode_info *new_mode;
2174 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2175 struct v4l2_mbus_framefmt *fmt;
2178 if (format->pad != 0)
2181 mutex_lock(&sensor->lock);
2183 if (sensor->streaming) {
2188 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2189 sensor->current_fr, &new_mode);
2193 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2194 fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2200 if (new_mode != sensor->current_mode) {
2201 sensor->current_mode = new_mode;
2202 sensor->pending_mode_change = true;
2204 if (mbus_fmt->code != sensor->fmt.code)
2205 sensor->pending_fmt_change = true;
2208 mutex_unlock(&sensor->lock);
2212 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2213 struct v4l2_mbus_framefmt *format)
2216 bool is_jpeg = false;
2219 switch (format->code) {
2220 case MEDIA_BUS_FMT_UYVY8_2X8:
2223 mux = OV5640_FMT_MUX_YUV422;
2225 case MEDIA_BUS_FMT_YUYV8_2X8:
2228 mux = OV5640_FMT_MUX_YUV422;
2230 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2231 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2233 mux = OV5640_FMT_MUX_RGB;
2235 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2236 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2238 mux = OV5640_FMT_MUX_RGB;
2240 case MEDIA_BUS_FMT_JPEG_1X8:
2243 mux = OV5640_FMT_MUX_YUV422;
2246 case MEDIA_BUS_FMT_SBGGR8_1X8:
2247 /* Raw, BGBG... / GRGR... */
2249 mux = OV5640_FMT_MUX_RAW_DPC;
2251 case MEDIA_BUS_FMT_SGBRG8_1X8:
2252 /* Raw bayer, GBGB... / RGRG... */
2254 mux = OV5640_FMT_MUX_RAW_DPC;
2256 case MEDIA_BUS_FMT_SGRBG8_1X8:
2257 /* Raw bayer, GRGR... / BGBG... */
2259 mux = OV5640_FMT_MUX_RAW_DPC;
2261 case MEDIA_BUS_FMT_SRGGB8_1X8:
2262 /* Raw bayer, RGRG... / GBGB... */
2264 mux = OV5640_FMT_MUX_RAW_DPC;
2270 /* FORMAT CONTROL00: YUV and RGB formatting */
2271 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2275 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2276 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2282 * - [5]: JPEG enable
2284 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2285 BIT(5), is_jpeg ? BIT(5) : 0);
2291 * - [4]: Reset JFIFO
2292 * - [3]: Reset SFIFO
2295 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2296 BIT(4) | BIT(3) | BIT(2),
2297 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2303 * - [5]: Enable JPEG 2x clock
2304 * - [3]: Enable JPEG clock
2306 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2308 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2315 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2320 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2324 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2326 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2332 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2337 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2341 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2344 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2350 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2355 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2359 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2363 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2366 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2372 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2376 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2377 BIT(0), awb ? 0 : 1);
2382 u16 red = (u16)sensor->ctrls.red_balance->val;
2383 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2385 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2388 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2394 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2395 enum v4l2_exposure_auto_type auto_exposure)
2397 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2398 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2401 if (ctrls->auto_exp->is_new) {
2402 ret = ov5640_set_autoexposure(sensor, auto_exp);
2407 if (!auto_exp && ctrls->exposure->is_new) {
2410 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2414 ret = ov5640_get_vts(sensor);
2420 if (ctrls->exposure->val < max_exp)
2421 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2427 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2429 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2432 if (ctrls->auto_gain->is_new) {
2433 ret = ov5640_set_autogain(sensor, auto_gain);
2438 if (!auto_gain && ctrls->gain->is_new)
2439 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2444 static const char * const test_pattern_menu[] = {
2449 #define OV5640_TEST_ENABLE BIT(7)
2450 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2451 #define OV5640_TEST_TRANSPARENT BIT(5)
2452 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2453 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2454 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2455 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2456 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2457 #define OV5640_TEST_BAR (0 << 0)
2458 #define OV5640_TEST_RANDOM (1 << 0)
2459 #define OV5640_TEST_SQUARE (2 << 0)
2460 #define OV5640_TEST_BLACK (3 << 0)
2462 static const u8 test_pattern_val[] = {
2464 OV5640_TEST_ENABLE | OV5640_TEST_TRANSPARENT |
2465 OV5640_TEST_BAR_VERT_CHANGE_1 |
2469 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2471 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2472 test_pattern_val[value]);
2475 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2479 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2480 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2485 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2486 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2490 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2493 * If sensor is mounted upside down, mirror logic is inversed.
2495 * Sensor is a BSI (Back Side Illuminated) one,
2496 * so image captured is physically mirrored.
2497 * This is why mirror logic is inversed in
2498 * order to cancel this mirror effect.
2504 * - [1]: Sensor mirror
2506 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2508 (!(value ^ sensor->upside_down)) ?
2509 (BIT(2) | BIT(1)) : 0);
2512 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2514 /* If sensor is mounted upside down, flip logic is inversed */
2519 * - [1]: Sensor vflip
2521 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2523 (value ^ sensor->upside_down) ?
2524 (BIT(2) | BIT(1)) : 0);
2527 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2529 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2530 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2533 /* v4l2_ctrl_lock() locks our own mutex */
2536 case V4L2_CID_AUTOGAIN:
2537 val = ov5640_get_gain(sensor);
2540 sensor->ctrls.gain->val = val;
2542 case V4L2_CID_EXPOSURE_AUTO:
2543 val = ov5640_get_exposure(sensor);
2546 sensor->ctrls.exposure->val = val;
2553 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2555 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2556 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2559 /* v4l2_ctrl_lock() locks our own mutex */
2562 * If the device is not powered up by the host driver do
2563 * not apply any controls to H/W at this time. Instead
2564 * the controls will be restored right after power-up.
2566 if (sensor->power_count == 0)
2570 case V4L2_CID_AUTOGAIN:
2571 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2573 case V4L2_CID_EXPOSURE_AUTO:
2574 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2576 case V4L2_CID_AUTO_WHITE_BALANCE:
2577 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2580 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2582 case V4L2_CID_CONTRAST:
2583 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2585 case V4L2_CID_SATURATION:
2586 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2588 case V4L2_CID_TEST_PATTERN:
2589 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2591 case V4L2_CID_POWER_LINE_FREQUENCY:
2592 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2594 case V4L2_CID_HFLIP:
2595 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2597 case V4L2_CID_VFLIP:
2598 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2608 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2609 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
2610 .s_ctrl = ov5640_s_ctrl,
2613 static int ov5640_init_controls(struct ov5640_dev *sensor)
2615 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2616 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2617 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2620 v4l2_ctrl_handler_init(hdl, 32);
2622 /* we can use our own mutex for the ctrl lock */
2623 hdl->lock = &sensor->lock;
2625 /* Auto/manual white balance */
2626 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2627 V4L2_CID_AUTO_WHITE_BALANCE,
2629 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2631 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2633 /* Auto/manual exposure */
2634 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2635 V4L2_CID_EXPOSURE_AUTO,
2636 V4L2_EXPOSURE_MANUAL, 0,
2637 V4L2_EXPOSURE_AUTO);
2638 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2640 /* Auto/manual gain */
2641 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2643 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2646 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2648 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2650 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2652 ctrls->test_pattern =
2653 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2654 ARRAY_SIZE(test_pattern_menu) - 1,
2655 0, 0, test_pattern_menu);
2656 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2658 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2662 v4l2_ctrl_new_std_menu(hdl, ops,
2663 V4L2_CID_POWER_LINE_FREQUENCY,
2664 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2665 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2672 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2673 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2675 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2676 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2677 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2679 sensor->sd.ctrl_handler = hdl;
2683 v4l2_ctrl_handler_free(hdl);
2687 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2688 struct v4l2_subdev_pad_config *cfg,
2689 struct v4l2_subdev_frame_size_enum *fse)
2693 if (fse->index >= OV5640_NUM_MODES)
2697 ov5640_mode_data[fse->index].hact;
2698 fse->max_width = fse->min_width;
2700 ov5640_mode_data[fse->index].vact;
2701 fse->max_height = fse->min_height;
2706 static int ov5640_enum_frame_interval(
2707 struct v4l2_subdev *sd,
2708 struct v4l2_subdev_pad_config *cfg,
2709 struct v4l2_subdev_frame_interval_enum *fie)
2711 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2712 struct v4l2_fract tpf;
2717 if (fie->index >= OV5640_NUM_FRAMERATES)
2721 tpf.denominator = ov5640_framerates[fie->index];
2723 ret = ov5640_try_frame_interval(sensor, &tpf,
2724 fie->width, fie->height);
2728 fie->interval = tpf;
2732 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2733 struct v4l2_subdev_frame_interval *fi)
2735 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2737 mutex_lock(&sensor->lock);
2738 fi->interval = sensor->frame_interval;
2739 mutex_unlock(&sensor->lock);
2744 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2745 struct v4l2_subdev_frame_interval *fi)
2747 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2748 const struct ov5640_mode_info *mode;
2749 int frame_rate, ret = 0;
2754 mutex_lock(&sensor->lock);
2756 if (sensor->streaming) {
2761 mode = sensor->current_mode;
2763 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2764 mode->hact, mode->vact);
2765 if (frame_rate < 0) {
2766 /* Always return a valid frame interval value */
2767 fi->interval = sensor->frame_interval;
2771 mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2778 if (mode != sensor->current_mode ||
2779 frame_rate != sensor->current_fr) {
2780 sensor->current_fr = frame_rate;
2781 sensor->frame_interval = fi->interval;
2782 sensor->current_mode = mode;
2783 sensor->pending_mode_change = true;
2786 mutex_unlock(&sensor->lock);
2790 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2791 struct v4l2_subdev_pad_config *cfg,
2792 struct v4l2_subdev_mbus_code_enum *code)
2796 if (code->index >= ARRAY_SIZE(ov5640_formats))
2799 code->code = ov5640_formats[code->index].code;
2803 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2805 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2808 mutex_lock(&sensor->lock);
2810 if (sensor->streaming == !enable) {
2811 if (enable && sensor->pending_mode_change) {
2812 ret = ov5640_set_mode(sensor);
2817 if (enable && sensor->pending_fmt_change) {
2818 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2821 sensor->pending_fmt_change = false;
2824 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2825 ret = ov5640_set_stream_mipi(sensor, enable);
2827 ret = ov5640_set_stream_dvp(sensor, enable);
2830 sensor->streaming = enable;
2833 mutex_unlock(&sensor->lock);
2837 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2838 .s_power = ov5640_s_power,
2839 .log_status = v4l2_ctrl_subdev_log_status,
2840 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2841 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2844 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2845 .g_frame_interval = ov5640_g_frame_interval,
2846 .s_frame_interval = ov5640_s_frame_interval,
2847 .s_stream = ov5640_s_stream,
2850 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2851 .enum_mbus_code = ov5640_enum_mbus_code,
2852 .get_fmt = ov5640_get_fmt,
2853 .set_fmt = ov5640_set_fmt,
2854 .enum_frame_size = ov5640_enum_frame_size,
2855 .enum_frame_interval = ov5640_enum_frame_interval,
2858 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2859 .core = &ov5640_core_ops,
2860 .video = &ov5640_video_ops,
2861 .pad = &ov5640_pad_ops,
2864 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2868 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2869 sensor->supplies[i].supply = ov5640_supply_name[i];
2871 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2872 OV5640_NUM_SUPPLIES,
2876 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2878 struct i2c_client *client = sensor->i2c_client;
2882 ret = ov5640_set_power_on(sensor);
2886 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
2888 dev_err(&client->dev, "%s: failed to read chip identifier\n",
2893 if (chip_id != 0x5640) {
2894 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
2900 ov5640_set_power_off(sensor);
2904 static int ov5640_probe(struct i2c_client *client,
2905 const struct i2c_device_id *id)
2907 struct device *dev = &client->dev;
2908 struct fwnode_handle *endpoint;
2909 struct ov5640_dev *sensor;
2910 struct v4l2_mbus_framefmt *fmt;
2914 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
2918 sensor->i2c_client = client;
2921 * default init sequence initialize sensor to
2922 * YUV422 UYVY VGA@30fps
2925 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
2926 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2927 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2928 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2929 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2932 fmt->field = V4L2_FIELD_NONE;
2933 sensor->frame_interval.numerator = 1;
2934 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
2935 sensor->current_fr = OV5640_30_FPS;
2936 sensor->current_mode =
2937 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
2938 sensor->last_mode = sensor->current_mode;
2940 sensor->ae_target = 52;
2942 /* optional indication of physical rotation of sensor */
2943 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
2948 sensor->upside_down = true;
2953 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
2958 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
2961 dev_err(dev, "endpoint node not found\n");
2965 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
2966 fwnode_handle_put(endpoint);
2968 dev_err(dev, "Could not parse endpoint\n");
2972 /* get system clock (xclk) */
2973 sensor->xclk = devm_clk_get(dev, "xclk");
2974 if (IS_ERR(sensor->xclk)) {
2975 dev_err(dev, "failed to get xclk\n");
2976 return PTR_ERR(sensor->xclk);
2979 sensor->xclk_freq = clk_get_rate(sensor->xclk);
2980 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
2981 sensor->xclk_freq > OV5640_XCLK_MAX) {
2982 dev_err(dev, "xclk frequency out of range: %d Hz\n",
2987 /* request optional power down pin */
2988 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
2990 /* request optional reset pin */
2991 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2994 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
2996 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2997 V4L2_SUBDEV_FL_HAS_EVENTS;
2998 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
2999 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3000 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3004 ret = ov5640_get_regulators(sensor);
3008 mutex_init(&sensor->lock);
3010 ret = ov5640_check_chip_id(sensor);
3012 goto entity_cleanup;
3014 ret = ov5640_init_controls(sensor);
3016 goto entity_cleanup;
3018 ret = v4l2_async_register_subdev(&sensor->sd);
3025 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3027 mutex_destroy(&sensor->lock);
3028 media_entity_cleanup(&sensor->sd.entity);
3032 static int ov5640_remove(struct i2c_client *client)
3034 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3035 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3037 v4l2_async_unregister_subdev(&sensor->sd);
3038 mutex_destroy(&sensor->lock);
3039 media_entity_cleanup(&sensor->sd.entity);
3040 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3045 static const struct i2c_device_id ov5640_id[] = {
3049 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3051 static const struct of_device_id ov5640_dt_ids[] = {
3052 { .compatible = "ovti,ov5640" },
3055 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3057 static struct i2c_driver ov5640_i2c_driver = {
3060 .of_match_table = ov5640_dt_ids,
3062 .id_table = ov5640_id,
3063 .probe = ov5640_probe,
3064 .remove = ov5640_remove,
3067 module_i2c_driver(ov5640_i2c_driver);
3069 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3070 MODULE_LICENSE("GPL");