drivers/media/i2c/ov13858.c

   1 /*
   2  * Copyright (c) 2017 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License version
   6  * 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include <linux/acpi.h>
  16 #include <linux/i2c.h>
  17 #include <linux/module.h>
  18 #include <linux/pm_runtime.h>
  19 #include <media/v4l2-ctrls.h>
  20 #include <media/v4l2-device.h>
  21
  22 #define OV13858_REG_VALUE_08BIT         1
  23 #define OV13858_REG_VALUE_16BIT         2
  24 #define OV13858_REG_VALUE_24BIT         3
  25
  26 #define OV13858_REG_MODE_SELECT         0x0100
  27 #define OV13858_MODE_STANDBY            0x00
  28 #define OV13858_MODE_STREAMING          0x01
  29
  30 #define OV13858_REG_SOFTWARE_RST        0x0103
  31 #define OV13858_SOFTWARE_RST            0x01
  32
  33 /* PLL1 generates PCLK and MIPI_PHY_CLK */
  34 #define OV13858_REG_PLL1_CTRL_0         0x0300
  35 #define OV13858_REG_PLL1_CTRL_1         0x0301
  36 #define OV13858_REG_PLL1_CTRL_2         0x0302
  37 #define OV13858_REG_PLL1_CTRL_3         0x0303
  38 #define OV13858_REG_PLL1_CTRL_4         0x0304
  39 #define OV13858_REG_PLL1_CTRL_5         0x0305
  40
  41 /* PLL2 generates DAC_CLK, SCLK and SRAM_CLK */
  42 #define OV13858_REG_PLL2_CTRL_B         0x030b
  43 #define OV13858_REG_PLL2_CTRL_C         0x030c
  44 #define OV13858_REG_PLL2_CTRL_D         0x030d
  45 #define OV13858_REG_PLL2_CTRL_E         0x030e
  46 #define OV13858_REG_PLL2_CTRL_F         0x030f
  47 #define OV13858_REG_PLL2_CTRL_12        0x0312
  48 #define OV13858_REG_MIPI_SC_CTRL0       0x3016
  49 #define OV13858_REG_MIPI_SC_CTRL1       0x3022
  50
  51 /* Chip ID */
  52 #define OV13858_REG_CHIP_ID             0x300a
  53 #define OV13858_CHIP_ID                 0x00d855
  54
  55 /* V_TIMING internal */
  56 #define OV13858_REG_VTS                 0x380e
  57 #define OV13858_VTS_30FPS               0x0c8e /* 30 fps */
  58 #define OV13858_VTS_60FPS               0x0648 /* 60 fps */
  59 #define OV13858_VTS_MAX                 0x7fff
  60
  61 /* HBLANK control - read only */
  62 #define OV13858_PPL_270MHZ              2244
  63 #define OV13858_PPL_540MHZ              4488
  64
  65 /* Exposure control */
  66 #define OV13858_REG_EXPOSURE            0x3500
  67 #define OV13858_EXPOSURE_MIN            4
  68 #define OV13858_EXPOSURE_STEP           1
  69 #define OV13858_EXPOSURE_DEFAULT        0x640
  70
  71 /* Analog gain control */
  72 #define OV13858_REG_ANALOG_GAIN         0x3508
  73 #define OV13858_ANA_GAIN_MIN            0
  74 #define OV13858_ANA_GAIN_MAX            0x1fff
  75 #define OV13858_ANA_GAIN_STEP           1
  76 #define OV13858_ANA_GAIN_DEFAULT        0x80
  77
  78 /* Digital gain control */
  79 #define OV13858_REG_B_MWB_GAIN          0x5100
  80 #define OV13858_REG_G_MWB_GAIN          0x5102
  81 #define OV13858_REG_R_MWB_GAIN          0x5104
  82 #define OV13858_DGTL_GAIN_MIN           0
  83 #define OV13858_DGTL_GAIN_MAX           16384   /* Max = 16 X */
  84 #define OV13858_DGTL_GAIN_DEFAULT       1024    /* Default gain = 1 X */
  85 #define OV13858_DGTL_GAIN_STEP          1       /* Each step = 1/1024 */
  86
  87 /* Test Pattern Control */
  88 #define OV13858_REG_TEST_PATTERN        0x4503
  89 #define OV13858_TEST_PATTERN_ENABLE     BIT(7)
  90 #define OV13858_TEST_PATTERN_MASK       0xfc
  91
  92 /* Number of frames to skip */
  93 #define OV13858_NUM_OF_SKIP_FRAMES      2
  94
  95 struct ov13858_reg {
  96         u16 address;
  97         u8 val;
  98 };
  99
 100 struct ov13858_reg_list {
 101         u32 num_of_regs;
 102         const struct ov13858_reg *regs;
 103 };
 104
 105 /* Link frequency config */
 106 struct ov13858_link_freq_config {
 107         u32 pixels_per_line;
 108
 109         /* PLL registers for this link frequency */
 110         struct ov13858_reg_list reg_list;
 111 };
 112
 113 /* Mode : resolution and related config&values */
 114 struct ov13858_mode {
 115         /* Frame width */
 116         u32 width;
 117         /* Frame height */
 118         u32 height;
 119
 120         /* V-timing */
 121         u32 vts_def;
 122         u32 vts_min;
 123
 124         /* Index of Link frequency config to be used */
 125         u32 link_freq_index;
 126         /* Default register values */
 127         struct ov13858_reg_list reg_list;
 128 };
 129
 130 /* 4224x3136 needs 1080Mbps/lane, 4 lanes */
 131 static const struct ov13858_reg mipi_data_rate_1080mbps[] = {
 132         /* PLL1 registers */
 133         {OV13858_REG_PLL1_CTRL_0, 0x07},
 134         {OV13858_REG_PLL1_CTRL_1, 0x01},
 135         {OV13858_REG_PLL1_CTRL_2, 0xc2},
 136         {OV13858_REG_PLL1_CTRL_3, 0x00},
 137         {OV13858_REG_PLL1_CTRL_4, 0x00},
 138         {OV13858_REG_PLL1_CTRL_5, 0x01},
 139
 140         /* PLL2 registers */
 141         {OV13858_REG_PLL2_CTRL_B, 0x05},
 142         {OV13858_REG_PLL2_CTRL_C, 0x01},
 143         {OV13858_REG_PLL2_CTRL_D, 0x0e},
 144         {OV13858_REG_PLL2_CTRL_E, 0x05},
 145         {OV13858_REG_PLL2_CTRL_F, 0x01},
 146         {OV13858_REG_PLL2_CTRL_12, 0x01},
 147         {OV13858_REG_MIPI_SC_CTRL0, 0x72},
 148         {OV13858_REG_MIPI_SC_CTRL1, 0x01},
 149 };
 150
 151 /*
 152  * 2112x1568, 2112x1188, 1056x784 need 540Mbps/lane,
 153  * 4 lanes
 154  */
 155 static const struct ov13858_reg mipi_data_rate_540mbps[] = {
 156         /* PLL1 registers */
 157         {OV13858_REG_PLL1_CTRL_0, 0x07},
 158         {OV13858_REG_PLL1_CTRL_1, 0x01},
 159         {OV13858_REG_PLL1_CTRL_2, 0xc2},
 160         {OV13858_REG_PLL1_CTRL_3, 0x01},
 161         {OV13858_REG_PLL1_CTRL_4, 0x00},
 162         {OV13858_REG_PLL1_CTRL_5, 0x01},
 163
 164         /* PLL2 registers */
 165         {OV13858_REG_PLL2_CTRL_B, 0x05},
 166         {OV13858_REG_PLL2_CTRL_C, 0x01},
 167         {OV13858_REG_PLL2_CTRL_D, 0x0e},
 168         {OV13858_REG_PLL2_CTRL_E, 0x05},
 169         {OV13858_REG_PLL2_CTRL_F, 0x01},
 170         {OV13858_REG_PLL2_CTRL_12, 0x01},
 171         {OV13858_REG_MIPI_SC_CTRL0, 0x72},
 172         {OV13858_REG_MIPI_SC_CTRL1, 0x01},
 173 };
 174
 175 static const struct ov13858_reg mode_4224x3136_regs[] = {
 176         {0x3013, 0x32},
 177         {0x301b, 0xf0},
 178         {0x301f, 0xd0},
 179         {0x3106, 0x15},
 180         {0x3107, 0x23},
 181         {0x350a, 0x00},
 182         {0x350e, 0x00},
 183         {0x3510, 0x00},
 184         {0x3511, 0x02},
 185         {0x3512, 0x00},
 186         {0x3600, 0x2b},
 187         {0x3601, 0x52},
 188         {0x3602, 0x60},
 189         {0x3612, 0x05},
 190         {0x3613, 0xa4},
 191         {0x3620, 0x80},
 192         {0x3621, 0x10},
 193         {0x3622, 0x30},
 194         {0x3624, 0x1c},
 195         {0x3640, 0x10},
 196         {0x3641, 0x70},
 197         {0x3660, 0x04},
 198         {0x3661, 0x80},
 199         {0x3662, 0x12},
 200         {0x3664, 0x73},
 201         {0x3665, 0xa7},
 202         {0x366e, 0xff},
 203         {0x366f, 0xf4},
 204         {0x3674, 0x00},
 205         {0x3679, 0x0c},
 206         {0x367f, 0x01},
 207         {0x3680, 0x0c},
 208         {0x3681, 0x50},
 209         {0x3682, 0x50},
 210         {0x3683, 0xa9},
 211         {0x3684, 0xa9},
 212         {0x3709, 0x5f},
 213         {0x3714, 0x24},
 214         {0x371a, 0x3e},
 215         {0x3737, 0x04},
 216         {0x3738, 0xcc},
 217         {0x3739, 0x12},
 218         {0x373d, 0x26},
 219         {0x3764, 0x20},
 220         {0x3765, 0x20},
 221         {0x37a1, 0x36},
 222         {0x37a8, 0x3b},
 223         {0x37ab, 0x31},
 224         {0x37c2, 0x04},
 225         {0x37c3, 0xf1},
 226         {0x37c5, 0x00},
 227         {0x37d8, 0x03},
 228         {0x37d9, 0x0c},
 229         {0x37da, 0xc2},
 230         {0x37dc, 0x02},
 231         {0x37e0, 0x00},
 232         {0x37e1, 0x0a},
 233         {0x37e2, 0x14},
 234         {0x37e3, 0x04},
 235         {0x37e4, 0x2a},
 236         {0x37e5, 0x03},
 237         {0x37e6, 0x04},
 238         {0x3800, 0x00},
 239         {0x3801, 0x00},
 240         {0x3802, 0x00},
 241         {0x3803, 0x08},
 242         {0x3804, 0x10},
 243         {0x3805, 0x9f},
 244         {0x3806, 0x0c},
 245         {0x3807, 0x57},
 246         {0x3808, 0x10},
 247         {0x3809, 0x80},
 248         {0x380a, 0x0c},
 249         {0x380b, 0x40},
 250         {0x380c, 0x04},
 251         {0x380d, 0x62},
 252         {0x380e, 0x0c},
 253         {0x380f, 0x8e},
 254         {0x3811, 0x04},
 255         {0x3813, 0x05},
 256         {0x3814, 0x01},
 257         {0x3815, 0x01},
 258         {0x3816, 0x01},
 259         {0x3817, 0x01},
 260         {0x3820, 0xa8},
 261         {0x3821, 0x00},
 262         {0x3822, 0xc2},
 263         {0x3823, 0x18},
 264         {0x3826, 0x11},
 265         {0x3827, 0x1c},
 266         {0x3829, 0x03},
 267         {0x3832, 0x00},
 268         {0x3c80, 0x00},
 269         {0x3c87, 0x01},
 270         {0x3c8c, 0x19},
 271         {0x3c8d, 0x1c},
 272         {0x3c90, 0x00},
 273         {0x3c91, 0x00},
 274         {0x3c92, 0x00},
 275         {0x3c93, 0x00},
 276         {0x3c94, 0x40},
 277         {0x3c95, 0x54},
 278         {0x3c96, 0x34},
 279         {0x3c97, 0x04},
 280         {0x3c98, 0x00},
 281         {0x3d8c, 0x73},
 282         {0x3d8d, 0xc0},
 283         {0x3f00, 0x0b},
 284         {0x3f03, 0x00},
 285         {0x4001, 0xe0},
 286         {0x4008, 0x00},
 287         {0x4009, 0x0f},
 288         {0x4011, 0xf0},
 289         {0x4017, 0x08},
 290         {0x4050, 0x04},
 291         {0x4051, 0x0b},
 292         {0x4052, 0x00},
 293         {0x4053, 0x80},
 294         {0x4054, 0x00},
 295         {0x4055, 0x80},
 296         {0x4056, 0x00},
 297         {0x4057, 0x80},
 298         {0x4058, 0x00},
 299         {0x4059, 0x80},
 300         {0x405e, 0x20},
 301         {0x4500, 0x07},
 302         {0x4503, 0x00},
 303         {0x450a, 0x04},
 304         {0x4809, 0x04},
 305         {0x480c, 0x12},
 306         {0x481f, 0x30},
 307         {0x4833, 0x10},
 308         {0x4837, 0x0e},
 309         {0x4902, 0x01},
 310         {0x4d00, 0x03},
 311         {0x4d01, 0xc9},
 312         {0x4d02, 0xbc},
 313         {0x4d03, 0xd7},
 314         {0x4d04, 0xf0},
 315         {0x4d05, 0xa2},
 316         {0x5000, 0xfd},
 317         {0x5001, 0x01},
 318         {0x5040, 0x39},
 319         {0x5041, 0x10},
 320         {0x5042, 0x10},
 321         {0x5043, 0x84},
 322         {0x5044, 0x62},
 323         {0x5180, 0x00},
 324         {0x5181, 0x10},
 325         {0x5182, 0x02},
 326         {0x5183, 0x0f},
 327         {0x5200, 0x1b},
 328         {0x520b, 0x07},
 329         {0x520c, 0x0f},
 330         {0x5300, 0x04},
 331         {0x5301, 0x0c},
 332         {0x5302, 0x0c},
 333         {0x5303, 0x0f},
 334         {0x5304, 0x00},
 335         {0x5305, 0x70},
 336         {0x5306, 0x00},
 337         {0x5307, 0x80},
 338         {0x5308, 0x00},
 339         {0x5309, 0xa5},
 340         {0x530a, 0x00},
 341         {0x530b, 0xd3},
 342         {0x530c, 0x00},
 343         {0x530d, 0xf0},
 344         {0x530e, 0x01},
 345         {0x530f, 0x10},
 346         {0x5310, 0x01},
 347         {0x5311, 0x20},
 348         {0x5312, 0x01},
 349         {0x5313, 0x20},
 350         {0x5314, 0x01},
 351         {0x5315, 0x20},
 352         {0x5316, 0x08},
 353         {0x5317, 0x08},
 354         {0x5318, 0x10},
 355         {0x5319, 0x88},
 356         {0x531a, 0x88},
 357         {0x531b, 0xa9},
 358         {0x531c, 0xaa},
 359         {0x531d, 0x0a},
 360         {0x5405, 0x02},
 361         {0x5406, 0x67},
 362         {0x5407, 0x01},
 363         {0x5408, 0x4a},
 364 };
 365
 366 static const struct ov13858_reg mode_2112x1568_regs[] = {
 367         {0x3013, 0x32},
 368         {0x301b, 0xf0},
 369         {0x301f, 0xd0},
 370         {0x3106, 0x15},
 371         {0x3107, 0x23},
 372         {0x350a, 0x00},
 373         {0x350e, 0x00},
 374         {0x3510, 0x00},
 375         {0x3511, 0x02},
 376         {0x3512, 0x00},
 377         {0x3600, 0x2b},
 378         {0x3601, 0x52},
 379         {0x3602, 0x60},
 380         {0x3612, 0x05},
 381         {0x3613, 0xa4},
 382         {0x3620, 0x80},
 383         {0x3621, 0x10},
 384         {0x3622, 0x30},
 385         {0x3624, 0x1c},
 386         {0x3640, 0x10},
 387         {0x3641, 0x70},
 388         {0x3660, 0x04},
 389         {0x3661, 0x80},
 390         {0x3662, 0x10},
 391         {0x3664, 0x73},
 392         {0x3665, 0xa7},
 393         {0x366e, 0xff},
 394         {0x366f, 0xf4},
 395         {0x3674, 0x00},
 396         {0x3679, 0x0c},
 397         {0x367f, 0x01},
 398         {0x3680, 0x0c},
 399         {0x3681, 0x50},
 400         {0x3682, 0x50},
 401         {0x3683, 0xa9},
 402         {0x3684, 0xa9},
 403         {0x3709, 0x5f},
 404         {0x3714, 0x28},
 405         {0x371a, 0x3e},
 406         {0x3737, 0x08},
 407         {0x3738, 0xcc},
 408         {0x3739, 0x20},
 409         {0x373d, 0x26},
 410         {0x3764, 0x20},
 411         {0x3765, 0x20},
 412         {0x37a1, 0x36},
 413         {0x37a8, 0x3b},
 414         {0x37ab, 0x31},
 415         {0x37c2, 0x14},
 416         {0x37c3, 0xf1},
 417         {0x37c5, 0x00},
 418         {0x37d8, 0x03},
 419         {0x37d9, 0x0c},
 420         {0x37da, 0xc2},
 421         {0x37dc, 0x02},
 422         {0x37e0, 0x00},
 423         {0x37e1, 0x0a},
 424         {0x37e2, 0x14},
 425         {0x37e3, 0x08},
 426         {0x37e4, 0x38},
 427         {0x37e5, 0x03},
 428         {0x37e6, 0x08},
 429         {0x3800, 0x00},
 430         {0x3801, 0x00},
 431         {0x3802, 0x00},
 432         {0x3803, 0x00},
 433         {0x3804, 0x10},
 434         {0x3805, 0x9f},
 435         {0x3806, 0x0c},
 436         {0x3807, 0x5f},
 437         {0x3808, 0x08},
 438         {0x3809, 0x40},
 439         {0x380a, 0x06},
 440         {0x380b, 0x20},
 441         {0x380c, 0x04},
 442         {0x380d, 0x62},
 443         {0x380e, 0x0c},
 444         {0x380f, 0x8e},
 445         {0x3811, 0x04},
 446         {0x3813, 0x05},
 447         {0x3814, 0x03},
 448         {0x3815, 0x01},
 449         {0x3816, 0x03},
 450         {0x3817, 0x01},
 451         {0x3820, 0xab},
 452         {0x3821, 0x00},
 453         {0x3822, 0xc2},
 454         {0x3823, 0x18},
 455         {0x3826, 0x04},
 456         {0x3827, 0x90},
 457         {0x3829, 0x07},
 458         {0x3832, 0x00},
 459         {0x3c80, 0x00},
 460         {0x3c87, 0x01},
 461         {0x3c8c, 0x19},
 462         {0x3c8d, 0x1c},
 463         {0x3c90, 0x00},
 464         {0x3c91, 0x00},
 465         {0x3c92, 0x00},
 466         {0x3c93, 0x00},
 467         {0x3c94, 0x40},
 468         {0x3c95, 0x54},
 469         {0x3c96, 0x34},
 470         {0x3c97, 0x04},
 471         {0x3c98, 0x00},
 472         {0x3d8c, 0x73},
 473         {0x3d8d, 0xc0},
 474         {0x3f00, 0x0b},
 475         {0x3f03, 0x00},
 476         {0x4001, 0xe0},
 477         {0x4008, 0x00},
 478         {0x4009, 0x0d},
 479         {0x4011, 0xf0},
 480         {0x4017, 0x08},
 481         {0x4050, 0x04},
 482         {0x4051, 0x0b},
 483         {0x4052, 0x00},
 484         {0x4053, 0x80},
 485         {0x4054, 0x00},
 486         {0x4055, 0x80},
 487         {0x4056, 0x00},
 488         {0x4057, 0x80},
 489         {0x4058, 0x00},
 490         {0x4059, 0x80},
 491         {0x405e, 0x20},
 492         {0x4500, 0x07},
 493         {0x4503, 0x00},
 494         {0x450a, 0x04},
 495         {0x4809, 0x04},
 496         {0x480c, 0x12},
 497         {0x481f, 0x30},
 498         {0x4833, 0x10},
 499         {0x4837, 0x1c},
 500         {0x4902, 0x01},
 501         {0x4d00, 0x03},
 502         {0x4d01, 0xc9},
 503         {0x4d02, 0xbc},
 504         {0x4d03, 0xd7},
 505         {0x4d04, 0xf0},
 506         {0x4d05, 0xa2},
 507         {0x5000, 0xfd},
 508         {0x5001, 0x01},
 509         {0x5040, 0x39},
 510         {0x5041, 0x10},
 511         {0x5042, 0x10},
 512         {0x5043, 0x84},
 513         {0x5044, 0x62},
 514         {0x5180, 0x00},
 515         {0x5181, 0x10},
 516         {0x5182, 0x02},
 517         {0x5183, 0x0f},
 518         {0x5200, 0x1b},
 519         {0x520b, 0x07},
 520         {0x520c, 0x0f},
 521         {0x5300, 0x04},
 522         {0x5301, 0x0c},
 523         {0x5302, 0x0c},
 524         {0x5303, 0x0f},
 525         {0x5304, 0x00},
 526         {0x5305, 0x70},
 527         {0x5306, 0x00},
 528         {0x5307, 0x80},
 529         {0x5308, 0x00},
 530         {0x5309, 0xa5},
 531         {0x530a, 0x00},
 532         {0x530b, 0xd3},
 533         {0x530c, 0x00},
 534         {0x530d, 0xf0},
 535         {0x530e, 0x01},
 536         {0x530f, 0x10},
 537         {0x5310, 0x01},
 538         {0x5311, 0x20},
 539         {0x5312, 0x01},
 540         {0x5313, 0x20},
 541         {0x5314, 0x01},
 542         {0x5315, 0x20},
 543         {0x5316, 0x08},
 544         {0x5317, 0x08},
 545         {0x5318, 0x10},
 546         {0x5319, 0x88},
 547         {0x531a, 0x88},
 548         {0x531b, 0xa9},
 549         {0x531c, 0xaa},
 550         {0x531d, 0x0a},
 551         {0x5405, 0x02},
 552         {0x5406, 0x67},
 553         {0x5407, 0x01},
 554         {0x5408, 0x4a},
 555 };
 556
 557 static const struct ov13858_reg mode_2112x1188_regs[] = {
 558         {0x3013, 0x32},
 559         {0x301b, 0xf0},
 560         {0x301f, 0xd0},
 561         {0x3106, 0x15},
 562         {0x3107, 0x23},
 563         {0x350a, 0x00},
 564         {0x350e, 0x00},
 565         {0x3510, 0x00},
 566         {0x3511, 0x02},
 567         {0x3512, 0x00},
 568         {0x3600, 0x2b},
 569         {0x3601, 0x52},
 570         {0x3602, 0x60},
 571         {0x3612, 0x05},
 572         {0x3613, 0xa4},
 573         {0x3620, 0x80},
 574         {0x3621, 0x10},
 575         {0x3622, 0x30},
 576         {0x3624, 0x1c},
 577         {0x3640, 0x10},
 578         {0x3641, 0x70},
 579         {0x3660, 0x04},
 580         {0x3661, 0x80},
 581         {0x3662, 0x10},
 582         {0x3664, 0x73},
 583         {0x3665, 0xa7},
 584         {0x366e, 0xff},
 585         {0x366f, 0xf4},
 586         {0x3674, 0x00},
 587         {0x3679, 0x0c},
 588         {0x367f, 0x01},
 589         {0x3680, 0x0c},
 590         {0x3681, 0x50},
 591         {0x3682, 0x50},
 592         {0x3683, 0xa9},
 593         {0x3684, 0xa9},
 594         {0x3709, 0x5f},
 595         {0x3714, 0x28},
 596         {0x371a, 0x3e},
 597         {0x3737, 0x08},
 598         {0x3738, 0xcc},
 599         {0x3739, 0x20},
 600         {0x373d, 0x26},
 601         {0x3764, 0x20},
 602         {0x3765, 0x20},
 603         {0x37a1, 0x36},
 604         {0x37a8, 0x3b},
 605         {0x37ab, 0x31},
 606         {0x37c2, 0x14},
 607         {0x37c3, 0xf1},
 608         {0x37c5, 0x00},
 609         {0x37d8, 0x03},
 610         {0x37d9, 0x0c},
 611         {0x37da, 0xc2},
 612         {0x37dc, 0x02},
 613         {0x37e0, 0x00},
 614         {0x37e1, 0x0a},
 615         {0x37e2, 0x14},
 616         {0x37e3, 0x08},
 617         {0x37e4, 0x38},
 618         {0x37e5, 0x03},
 619         {0x37e6, 0x08},
 620         {0x3800, 0x00},
 621         {0x3801, 0x00},
 622         {0x3802, 0x01},
 623         {0x3803, 0x84},
 624         {0x3804, 0x10},
 625         {0x3805, 0x9f},
 626         {0x3806, 0x0a},
 627         {0x3807, 0xd3},
 628         {0x3808, 0x08},
 629         {0x3809, 0x40},
 630         {0x380a, 0x04},
 631         {0x380b, 0xa4},
 632         {0x380c, 0x04},
 633         {0x380d, 0x62},
 634         {0x380e, 0x0c},
 635         {0x380f, 0x8e},
 636         {0x3811, 0x08},
 637         {0x3813, 0x03},
 638         {0x3814, 0x03},
 639         {0x3815, 0x01},
 640         {0x3816, 0x03},
 641         {0x3817, 0x01},
 642         {0x3820, 0xab},
 643         {0x3821, 0x00},
 644         {0x3822, 0xc2},
 645         {0x3823, 0x18},
 646         {0x3826, 0x04},
 647         {0x3827, 0x90},
 648         {0x3829, 0x07},
 649         {0x3832, 0x00},
 650         {0x3c80, 0x00},
 651         {0x3c87, 0x01},
 652         {0x3c8c, 0x19},
 653         {0x3c8d, 0x1c},
 654         {0x3c90, 0x00},
 655         {0x3c91, 0x00},
 656         {0x3c92, 0x00},
 657         {0x3c93, 0x00},
 658         {0x3c94, 0x40},
 659         {0x3c95, 0x54},
 660         {0x3c96, 0x34},
 661         {0x3c97, 0x04},
 662         {0x3c98, 0x00},
 663         {0x3d8c, 0x73},
 664         {0x3d8d, 0xc0},
 665         {0x3f00, 0x0b},
 666         {0x3f03, 0x00},
 667         {0x4001, 0xe0},
 668         {0x4008, 0x00},
 669         {0x4009, 0x0d},
 670         {0x4011, 0xf0},
 671         {0x4017, 0x08},
 672         {0x4050, 0x04},
 673         {0x4051, 0x0b},
 674         {0x4052, 0x00},
 675         {0x4053, 0x80},
 676         {0x4054, 0x00},
 677         {0x4055, 0x80},
 678         {0x4056, 0x00},
 679         {0x4057, 0x80},
 680         {0x4058, 0x00},
 681         {0x4059, 0x80},
 682         {0x405e, 0x20},
 683         {0x4500, 0x07},
 684         {0x4503, 0x00},
 685         {0x450a, 0x04},
 686         {0x4809, 0x04},
 687         {0x480c, 0x12},
 688         {0x481f, 0x30},
 689         {0x4833, 0x10},
 690         {0x4837, 0x1c},
 691         {0x4902, 0x01},
 692         {0x4d00, 0x03},
 693         {0x4d01, 0xc9},
 694         {0x4d02, 0xbc},
 695         {0x4d03, 0xd7},
 696         {0x4d04, 0xf0},
 697         {0x4d05, 0xa2},
 698         {0x5000, 0xfd},
 699         {0x5001, 0x01},
 700         {0x5040, 0x39},
 701         {0x5041, 0x10},
 702         {0x5042, 0x10},
 703         {0x5043, 0x84},
 704         {0x5044, 0x62},
 705         {0x5180, 0x00},
 706         {0x5181, 0x10},
 707         {0x5182, 0x02},
 708         {0x5183, 0x0f},
 709         {0x5200, 0x1b},
 710         {0x520b, 0x07},
 711         {0x520c, 0x0f},
 712         {0x5300, 0x04},
 713         {0x5301, 0x0c},
 714         {0x5302, 0x0c},
 715         {0x5303, 0x0f},
 716         {0x5304, 0x00},
 717         {0x5305, 0x70},
 718         {0x5306, 0x00},
 719         {0x5307, 0x80},
 720         {0x5308, 0x00},
 721         {0x5309, 0xa5},
 722         {0x530a, 0x00},
 723         {0x530b, 0xd3},
 724         {0x530c, 0x00},
 725         {0x530d, 0xf0},
 726         {0x530e, 0x01},
 727         {0x530f, 0x10},
 728         {0x5310, 0x01},
 729         {0x5311, 0x20},
 730         {0x5312, 0x01},
 731         {0x5313, 0x20},
 732         {0x5314, 0x01},
 733         {0x5315, 0x20},
 734         {0x5316, 0x08},
 735         {0x5317, 0x08},
 736         {0x5318, 0x10},
 737         {0x5319, 0x88},
 738         {0x531a, 0x88},
 739         {0x531b, 0xa9},
 740         {0x531c, 0xaa},
 741         {0x531d, 0x0a},
 742         {0x5405, 0x02},
 743         {0x5406, 0x67},
 744         {0x5407, 0x01},
 745         {0x5408, 0x4a},
 746 };
 747
 748 static const struct ov13858_reg mode_1056x784_regs[] = {
 749         {0x3013, 0x32},
 750         {0x301b, 0xf0},
 751         {0x301f, 0xd0},
 752         {0x3106, 0x15},
 753         {0x3107, 0x23},
 754         {0x350a, 0x00},
 755         {0x350e, 0x00},
 756         {0x3510, 0x00},
 757         {0x3511, 0x02},
 758         {0x3512, 0x00},
 759         {0x3600, 0x2b},
 760         {0x3601, 0x52},
 761         {0x3602, 0x60},
 762         {0x3612, 0x05},
 763         {0x3613, 0xa4},
 764         {0x3620, 0x80},
 765         {0x3621, 0x10},
 766         {0x3622, 0x30},
 767         {0x3624, 0x1c},
 768         {0x3640, 0x10},
 769         {0x3641, 0x70},
 770         {0x3660, 0x04},
 771         {0x3661, 0x80},
 772         {0x3662, 0x08},
 773         {0x3664, 0x73},
 774         {0x3665, 0xa7},
 775         {0x366e, 0xff},
 776         {0x366f, 0xf4},
 777         {0x3674, 0x00},
 778         {0x3679, 0x0c},
 779         {0x367f, 0x01},
 780         {0x3680, 0x0c},
 781         {0x3681, 0x50},
 782         {0x3682, 0x50},
 783         {0x3683, 0xa9},
 784         {0x3684, 0xa9},
 785         {0x3709, 0x5f},
 786         {0x3714, 0x30},
 787         {0x371a, 0x3e},
 788         {0x3737, 0x08},
 789         {0x3738, 0xcc},
 790         {0x3739, 0x20},
 791         {0x373d, 0x26},
 792         {0x3764, 0x20},
 793         {0x3765, 0x20},
 794         {0x37a1, 0x36},
 795         {0x37a8, 0x3b},
 796         {0x37ab, 0x31},
 797         {0x37c2, 0x2c},
 798         {0x37c3, 0xf1},
 799         {0x37c5, 0x00},
 800         {0x37d8, 0x03},
 801         {0x37d9, 0x06},
 802         {0x37da, 0xc2},
 803         {0x37dc, 0x02},
 804         {0x37e0, 0x00},
 805         {0x37e1, 0x0a},
 806         {0x37e2, 0x14},
 807         {0x37e3, 0x08},
 808         {0x37e4, 0x36},
 809         {0x37e5, 0x03},
 810         {0x37e6, 0x08},
 811         {0x3800, 0x00},
 812         {0x3801, 0x00},
 813         {0x3802, 0x00},
 814         {0x3803, 0x00},
 815         {0x3804, 0x10},
 816         {0x3805, 0x9f},
 817         {0x3806, 0x0c},
 818         {0x3807, 0x5f},
 819         {0x3808, 0x04},
 820         {0x3809, 0x20},
 821         {0x380a, 0x03},
 822         {0x380b, 0x10},
 823         {0x380c, 0x04},
 824         {0x380d, 0x62},
 825         {0x380e, 0x0c},
 826         {0x380f, 0x8e},
 827         {0x3811, 0x04},
 828         {0x3813, 0x05},
 829         {0x3814, 0x07},
 830         {0x3815, 0x01},
 831         {0x3816, 0x07},
 832         {0x3817, 0x01},
 833         {0x3820, 0xac},
 834         {0x3821, 0x00},
 835         {0x3822, 0xc2},
 836         {0x3823, 0x18},
 837         {0x3826, 0x04},
 838         {0x3827, 0x48},
 839         {0x3829, 0x03},
 840         {0x3832, 0x00},
 841         {0x3c80, 0x00},
 842         {0x3c87, 0x01},
 843         {0x3c8c, 0x19},
 844         {0x3c8d, 0x1c},
 845         {0x3c90, 0x00},
 846         {0x3c91, 0x00},
 847         {0x3c92, 0x00},
 848         {0x3c93, 0x00},
 849         {0x3c94, 0x40},
 850         {0x3c95, 0x54},
 851         {0x3c96, 0x34},
 852         {0x3c97, 0x04},
 853         {0x3c98, 0x00},
 854         {0x3d8c, 0x73},
 855         {0x3d8d, 0xc0},
 856         {0x3f00, 0x0b},
 857         {0x3f03, 0x00},
 858         {0x4001, 0xe0},
 859         {0x4008, 0x00},
 860         {0x4009, 0x05},
 861         {0x4011, 0xf0},
 862         {0x4017, 0x08},
 863         {0x4050, 0x02},
 864         {0x4051, 0x05},
 865         {0x4052, 0x00},
 866         {0x4053, 0x80},
 867         {0x4054, 0x00},
 868         {0x4055, 0x80},
 869         {0x4056, 0x00},
 870         {0x4057, 0x80},
 871         {0x4058, 0x00},
 872         {0x4059, 0x80},
 873         {0x405e, 0x20},
 874         {0x4500, 0x07},
 875         {0x4503, 0x00},
 876         {0x450a, 0x04},
 877         {0x4809, 0x04},
 878         {0x480c, 0x12},
 879         {0x481f, 0x30},
 880         {0x4833, 0x10},
 881         {0x4837, 0x1e},
 882         {0x4902, 0x02},
 883         {0x4d00, 0x03},
 884         {0x4d01, 0xc9},
 885         {0x4d02, 0xbc},
 886         {0x4d03, 0xd7},
 887         {0x4d04, 0xf0},
 888         {0x4d05, 0xa2},
 889         {0x5000, 0xfd},
 890         {0x5001, 0x01},
 891         {0x5040, 0x39},
 892         {0x5041, 0x10},
 893         {0x5042, 0x10},
 894         {0x5043, 0x84},
 895         {0x5044, 0x62},
 896         {0x5180, 0x00},
 897         {0x5181, 0x10},
 898         {0x5182, 0x02},
 899         {0x5183, 0x0f},
 900         {0x5200, 0x1b},
 901         {0x520b, 0x07},
 902         {0x520c, 0x0f},
 903         {0x5300, 0x04},
 904         {0x5301, 0x0c},
 905         {0x5302, 0x0c},
 906         {0x5303, 0x0f},
 907         {0x5304, 0x00},
 908         {0x5305, 0x70},
 909         {0x5306, 0x00},
 910         {0x5307, 0x80},
 911         {0x5308, 0x00},
 912         {0x5309, 0xa5},
 913         {0x530a, 0x00},
 914         {0x530b, 0xd3},
 915         {0x530c, 0x00},
 916         {0x530d, 0xf0},
 917         {0x530e, 0x01},
 918         {0x530f, 0x10},
 919         {0x5310, 0x01},
 920         {0x5311, 0x20},
 921         {0x5312, 0x01},
 922         {0x5313, 0x20},
 923         {0x5314, 0x01},
 924         {0x5315, 0x20},
 925         {0x5316, 0x08},
 926         {0x5317, 0x08},
 927         {0x5318, 0x10},
 928         {0x5319, 0x88},
 929         {0x531a, 0x88},
 930         {0x531b, 0xa9},
 931         {0x531c, 0xaa},
 932         {0x531d, 0x0a},
 933         {0x5405, 0x02},
 934         {0x5406, 0x67},
 935         {0x5407, 0x01},
 936         {0x5408, 0x4a},
 937 };
 938
 939 static const char * const ov13858_test_pattern_menu[] = {
 940         "Disabled",
 941         "Vertical Color Bar Type 1",
 942         "Vertical Color Bar Type 2",
 943         "Vertical Color Bar Type 3",
 944         "Vertical Color Bar Type 4"
 945 };
 946
 947 /* Configurations for supported link frequencies */
 948 #define OV13858_NUM_OF_LINK_FREQS       2
 949 #define OV13858_LINK_FREQ_540MHZ        540000000ULL
 950 #define OV13858_LINK_FREQ_270MHZ        270000000ULL
 951 #define OV13858_LINK_FREQ_INDEX_0       0
 952 #define OV13858_LINK_FREQ_INDEX_1       1
 953
 954 /*
 955  * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
 956  * data rate => double data rate; number of lanes => 4; bits per pixel => 10
 957  */
 958 static u64 link_freq_to_pixel_rate(u64 f)
 959 {
 960         f *= 2 * 4;
 961         do_div(f, 10);
 962
 963         return f;
 964 }
 965
 966 /* Menu items for LINK_FREQ V4L2 control */
 967 static const s64 link_freq_menu_items[OV13858_NUM_OF_LINK_FREQS] = {
 968         OV13858_LINK_FREQ_540MHZ,
 969         OV13858_LINK_FREQ_270MHZ
 970 };
 971
 972 /* Link frequency configs */
 973 static const struct ov13858_link_freq_config
 974                         link_freq_configs[OV13858_NUM_OF_LINK_FREQS] = {
 975         {
 976                 .pixels_per_line = OV13858_PPL_540MHZ,
 977                 .reg_list = {
 978                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_1080mbps),
 979                         .regs = mipi_data_rate_1080mbps,
 980                 }
 981         },
 982         {
 983                 .pixels_per_line = OV13858_PPL_270MHZ,
 984                 .reg_list = {
 985                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_540mbps),
 986                         .regs = mipi_data_rate_540mbps,
 987                 }
 988         }
 989 };
 990
 991 /* Mode configs */
 992 static const struct ov13858_mode supported_modes[] = {
 993         {
 994                 .width = 4224,
 995                 .height = 3136,
 996                 .vts_def = OV13858_VTS_30FPS,
 997                 .vts_min = OV13858_VTS_30FPS,
 998                 .reg_list = {
 999                         .num_of_regs = ARRAY_SIZE(mode_4224x3136_regs),
1000                         .regs = mode_4224x3136_regs,
1001                 },
1002                 .link_freq_index = OV13858_LINK_FREQ_INDEX_0,
1003         },
1004         {
1005                 .width = 2112,
1006                 .height = 1568,
1007                 .vts_def = OV13858_VTS_30FPS,
1008                 .vts_min = 1608,
1009                 .reg_list = {
1010                         .num_of_regs = ARRAY_SIZE(mode_2112x1568_regs),
1011                         .regs = mode_2112x1568_regs,
1012                 },
1013                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1014         },
1015         {
1016                 .width = 2112,
1017                 .height = 1188,
1018                 .vts_def = OV13858_VTS_30FPS,
1019                 .vts_min = 1608,
1020                 .reg_list = {
1021                         .num_of_regs = ARRAY_SIZE(mode_2112x1188_regs),
1022                         .regs = mode_2112x1188_regs,
1023                 },
1024                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1025         },
1026         {
1027                 .width = 1056,
1028                 .height = 784,
1029                 .vts_def = OV13858_VTS_30FPS,
1030                 .vts_min = 804,
1031                 .reg_list = {
1032                         .num_of_regs = ARRAY_SIZE(mode_1056x784_regs),
1033                         .regs = mode_1056x784_regs,
1034                 },
1035                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1036         }
1037 };
1038
1039 struct ov13858 {
1040         struct v4l2_subdev sd;
1041         struct media_pad pad;
1042
1043         struct v4l2_ctrl_handler ctrl_handler;
1044         /* V4L2 Controls */
1045         struct v4l2_ctrl *link_freq;
1046         struct v4l2_ctrl *pixel_rate;
1047         struct v4l2_ctrl *vblank;
1048         struct v4l2_ctrl *hblank;
1049         struct v4l2_ctrl *exposure;
1050
1051         /* Current mode */
1052         const struct ov13858_mode *cur_mode;
1053
1054         /* Mutex for serialized access */
1055         struct mutex mutex;
1056
1057         /* Streaming on/off */
1058         bool streaming;
1059 };
1060
1061 #define to_ov13858(_sd) container_of(_sd, struct ov13858, sd)
1062
1063 /* Read registers up to 4 at a time */
1064 static int ov13858_read_reg(struct ov13858 *ov13858, u16 reg, u32 len,
1065                             u32 *val)
1066 {
1067         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1068         struct i2c_msg msgs[2];
1069         u8 *data_be_p;
1070         int ret;
1071         __be32 data_be = 0;
1072         __be16 reg_addr_be = cpu_to_be16(reg);
1073
1074         if (len > 4)
1075                 return -EINVAL;
1076
1077         data_be_p = (u8 *)&data_be;
1078         /* Write register address */
1079         msgs[0].addr = client->addr;
1080         msgs[0].flags = 0;
1081         msgs[0].len = 2;
1082         msgs[0].buf = (u8 *)&reg_addr_be;
1083
1084         /* Read data from register */
1085         msgs[1].addr = client->addr;
1086         msgs[1].flags = I2C_M_RD;
1087         msgs[1].len = len;
1088         msgs[1].buf = &data_be_p[4 - len];
1089
1090         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1091         if (ret != ARRAY_SIZE(msgs))
1092                 return -EIO;
1093
1094         *val = be32_to_cpu(data_be);
1095
1096         return 0;
1097 }
1098
1099 /* Write registers up to 4 at a time */
1100 static int ov13858_write_reg(struct ov13858 *ov13858, u16 reg, u32 len,
1101                              u32 __val)
1102 {
1103         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1104         int buf_i, val_i;
1105         u8 buf[6], *val_p;
1106         __be32 val;
1107
1108         if (len > 4)
1109                 return -EINVAL;
1110
1111         buf[0] = reg >> 8;
1112         buf[1] = reg & 0xff;
1113
1114         val = cpu_to_be32(__val);
1115         val_p = (u8 *)&val;
1116         buf_i = 2;
1117         val_i = 4 - len;
1118
1119         while (val_i < 4)
1120                 buf[buf_i++] = val_p[val_i++];
1121
1122         if (i2c_master_send(client, buf, len + 2) != len + 2)
1123                 return -EIO;
1124
1125         return 0;
1126 }
1127
1128 /* Write a list of registers */
1129 static int ov13858_write_regs(struct ov13858 *ov13858,
1130                               const struct ov13858_reg *regs, u32 len)
1131 {
1132         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1133         int ret;
1134         u32 i;
1135
1136         for (i = 0; i < len; i++) {
1137                 ret = ov13858_write_reg(ov13858, regs[i].address, 1,
1138                                         regs[i].val);
1139                 if (ret) {
1140                         dev_err_ratelimited(
1141                                 &client->dev,
1142                                 "Failed to write reg 0x%4.4x. error = %d\n",
1143                                 regs[i].address, ret);
1144
1145                         return ret;
1146                 }
1147         }
1148
1149         return 0;
1150 }
1151
1152 static int ov13858_write_reg_list(struct ov13858 *ov13858,
1153                                   const struct ov13858_reg_list *r_list)
1154 {
1155         return ov13858_write_regs(ov13858, r_list->regs, r_list->num_of_regs);
1156 }
1157
1158 /* Open sub-device */
1159 static int ov13858_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1160 {
1161         struct ov13858 *ov13858 = to_ov13858(sd);
1162         struct v4l2_mbus_framefmt *try_fmt = v4l2_subdev_get_try_format(sd,
1163                                                                         fh->pad,
1164                                                                         0);
1165
1166         mutex_lock(&ov13858->mutex);
1167
1168         /* Initialize try_fmt */
1169         try_fmt->width = ov13858->cur_mode->width;
1170         try_fmt->height = ov13858->cur_mode->height;
1171         try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1172         try_fmt->field = V4L2_FIELD_NONE;
1173
1174         /* No crop or compose */
1175         mutex_unlock(&ov13858->mutex);
1176
1177         return 0;
1178 }
1179
1180 static int ov13858_update_digital_gain(struct ov13858 *ov13858, u32 d_gain)
1181 {
1182         int ret;
1183
1184         ret = ov13858_write_reg(ov13858, OV13858_REG_B_MWB_GAIN,
1185                                 OV13858_REG_VALUE_16BIT, d_gain);
1186         if (ret)
1187                 return ret;
1188
1189         ret = ov13858_write_reg(ov13858, OV13858_REG_G_MWB_GAIN,
1190                                 OV13858_REG_VALUE_16BIT, d_gain);
1191         if (ret)
1192                 return ret;
1193
1194         ret = ov13858_write_reg(ov13858, OV13858_REG_R_MWB_GAIN,
1195                                 OV13858_REG_VALUE_16BIT, d_gain);
1196
1197         return ret;
1198 }
1199
1200 static int ov13858_enable_test_pattern(struct ov13858 *ov13858, u32 pattern)
1201 {
1202         int ret;
1203         u32 val;
1204
1205         ret = ov13858_read_reg(ov13858, OV13858_REG_TEST_PATTERN,
1206                                OV13858_REG_VALUE_08BIT, &val);
1207         if (ret)
1208                 return ret;
1209
1210         if (pattern) {
1211                 val &= OV13858_TEST_PATTERN_MASK;
1212                 val |= (pattern - 1) | OV13858_TEST_PATTERN_ENABLE;
1213         } else {
1214                 val &= ~OV13858_TEST_PATTERN_ENABLE;
1215         }
1216
1217         return ov13858_write_reg(ov13858, OV13858_REG_TEST_PATTERN,
1218                                  OV13858_REG_VALUE_08BIT, val);
1219 }
1220
1221 static int ov13858_set_ctrl(struct v4l2_ctrl *ctrl)
1222 {
1223         struct ov13858 *ov13858 = container_of(ctrl->handler,
1224                                                struct ov13858, ctrl_handler);
1225         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1226         s64 max;
1227         int ret;
1228
1229         /* Propagate change of current control to all related controls */
1230         switch (ctrl->id) {
1231         case V4L2_CID_VBLANK:
1232                 /* Update max exposure while meeting expected vblanking */
1233                 max = ov13858->cur_mode->height + ctrl->val - 8;
1234                 __v4l2_ctrl_modify_range(ov13858->exposure,
1235                                          ov13858->exposure->minimum,
1236                                          max, ov13858->exposure->step, max);
1237                 break;
1238         };
1239
1240         /*
1241          * Applying V4L2 control value only happens
1242          * when power is up for streaming
1243          */
1244         if (pm_runtime_get_if_in_use(&client->dev) <= 0)
1245                 return 0;
1246
1247         ret = 0;
1248         switch (ctrl->id) {
1249         case V4L2_CID_ANALOGUE_GAIN:
1250                 ret = ov13858_write_reg(ov13858, OV13858_REG_ANALOG_GAIN,
1251                                         OV13858_REG_VALUE_16BIT, ctrl->val);
1252                 break;
1253         case V4L2_CID_DIGITAL_GAIN:
1254                 ret = ov13858_update_digital_gain(ov13858, ctrl->val);
1255                 break;
1256         case V4L2_CID_EXPOSURE:
1257                 ret = ov13858_write_reg(ov13858, OV13858_REG_EXPOSURE,
1258                                         OV13858_REG_VALUE_24BIT,
1259                                         ctrl->val << 4);
1260                 break;
1261         case V4L2_CID_VBLANK:
1262                 /* Update VTS that meets expected vertical blanking */
1263                 ret = ov13858_write_reg(ov13858, OV13858_REG_VTS,
1264                                         OV13858_REG_VALUE_16BIT,
1265                                         ov13858->cur_mode->height
1266                                           + ctrl->val);
1267                 break;
1268         case V4L2_CID_TEST_PATTERN:
1269                 ret = ov13858_enable_test_pattern(ov13858, ctrl->val);
1270                 break;
1271         default:
1272                 dev_info(&client->dev,
1273                          "ctrl(id:0x%x,val:0x%x) is not handled\n",
1274                          ctrl->id, ctrl->val);
1275                 break;
1276         };
1277
1278         pm_runtime_put(&client->dev);
1279
1280         return ret;
1281 }
1282
1283 static const struct v4l2_ctrl_ops ov13858_ctrl_ops = {
1284         .s_ctrl = ov13858_set_ctrl,
1285 };
1286
1287 static int ov13858_enum_mbus_code(struct v4l2_subdev *sd,
1288                                   struct v4l2_subdev_pad_config *cfg,
1289                                   struct v4l2_subdev_mbus_code_enum *code)
1290 {
1291         /* Only one bayer order(GRBG) is supported */
1292         if (code->index > 0)
1293                 return -EINVAL;
1294
1295         code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1296
1297         return 0;
1298 }
1299
1300 static int ov13858_enum_frame_size(struct v4l2_subdev *sd,
1301                                    struct v4l2_subdev_pad_config *cfg,
1302                                    struct v4l2_subdev_frame_size_enum *fse)
1303 {
1304         if (fse->index >= ARRAY_SIZE(supported_modes))
1305                 return -EINVAL;
1306
1307         if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1308                 return -EINVAL;
1309
1310         fse->min_width = supported_modes[fse->index].width;
1311         fse->max_width = fse->min_width;
1312         fse->min_height = supported_modes[fse->index].height;
1313         fse->max_height = fse->min_height;
1314
1315         return 0;
1316 }
1317
1318 static void ov13858_update_pad_format(const struct ov13858_mode *mode,
1319                                       struct v4l2_subdev_format *fmt)
1320 {
1321         fmt->format.width = mode->width;
1322         fmt->format.height = mode->height;
1323         fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1324         fmt->format.field = V4L2_FIELD_NONE;
1325 }
1326
1327 static int ov13858_do_get_pad_format(struct ov13858 *ov13858,
1328                                      struct v4l2_subdev_pad_config *cfg,
1329                                      struct v4l2_subdev_format *fmt)
1330 {
1331         struct v4l2_mbus_framefmt *framefmt;
1332         struct v4l2_subdev *sd = &ov13858->sd;
1333
1334         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1335                 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1336                 fmt->format = *framefmt;
1337         } else {
1338                 ov13858_update_pad_format(ov13858->cur_mode, fmt);
1339         }
1340
1341         return 0;
1342 }
1343
1344 static int ov13858_get_pad_format(struct v4l2_subdev *sd,
1345                                   struct v4l2_subdev_pad_config *cfg,
1346                                   struct v4l2_subdev_format *fmt)
1347 {
1348         struct ov13858 *ov13858 = to_ov13858(sd);
1349         int ret;
1350
1351         mutex_lock(&ov13858->mutex);
1352         ret = ov13858_do_get_pad_format(ov13858, cfg, fmt);
1353         mutex_unlock(&ov13858->mutex);
1354
1355         return ret;
1356 }
1357
1358 static int
1359 ov13858_set_pad_format(struct v4l2_subdev *sd,
1360                        struct v4l2_subdev_pad_config *cfg,
1361                        struct v4l2_subdev_format *fmt)
1362 {
1363         struct ov13858 *ov13858 = to_ov13858(sd);
1364         const struct ov13858_mode *mode;
1365         struct v4l2_mbus_framefmt *framefmt;
1366         s32 vblank_def;
1367         s32 vblank_min;
1368         s64 h_blank;
1369         s64 pixel_rate;
1370         s64 link_freq;
1371
1372         mutex_lock(&ov13858->mutex);
1373
1374         /* Only one raw bayer(GRBG) order is supported */
1375         if (fmt->format.code != MEDIA_BUS_FMT_SGRBG10_1X10)
1376                 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1377
1378         mode = v4l2_find_nearest_size(supported_modes, width, height,
1379                                       fmt->format.width, fmt->format.height);
1380         ov13858_update_pad_format(mode, fmt);
1381         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1382                 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1383                 *framefmt = fmt->format;
1384         } else {
1385                 ov13858->cur_mode = mode;
1386                 __v4l2_ctrl_s_ctrl(ov13858->link_freq, mode->link_freq_index);
1387                 link_freq = link_freq_menu_items[mode->link_freq_index];
1388                 pixel_rate = link_freq_to_pixel_rate(link_freq);
1389                 __v4l2_ctrl_s_ctrl_int64(ov13858->pixel_rate, pixel_rate);
1390
1391                 /* Update limits and set FPS to default */
1392                 vblank_def = ov13858->cur_mode->vts_def -
1393                              ov13858->cur_mode->height;
1394                 vblank_min = ov13858->cur_mode->vts_min -
1395                              ov13858->cur_mode->height;
1396                 __v4l2_ctrl_modify_range(
1397                         ov13858->vblank, vblank_min,
1398                         OV13858_VTS_MAX - ov13858->cur_mode->height, 1,
1399                         vblank_def);
1400                 __v4l2_ctrl_s_ctrl(ov13858->vblank, vblank_def);
1401                 h_blank =
1402                         link_freq_configs[mode->link_freq_index].pixels_per_line
1403                          - ov13858->cur_mode->width;
1404                 __v4l2_ctrl_modify_range(ov13858->hblank, h_blank,
1405                                          h_blank, 1, h_blank);
1406         }
1407
1408         mutex_unlock(&ov13858->mutex);
1409
1410         return 0;
1411 }
1412
1413 static int ov13858_get_skip_frames(struct v4l2_subdev *sd, u32 *frames)
1414 {
1415         *frames = OV13858_NUM_OF_SKIP_FRAMES;
1416
1417         return 0;
1418 }
1419
1420 /* Start streaming */
1421 static int ov13858_start_streaming(struct ov13858 *ov13858)
1422 {
1423         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1424         const struct ov13858_reg_list *reg_list;
1425         int ret, link_freq_index;
1426
1427         /* Get out of from software reset */
1428         ret = ov13858_write_reg(ov13858, OV13858_REG_SOFTWARE_RST,
1429                                 OV13858_REG_VALUE_08BIT, OV13858_SOFTWARE_RST);
1430         if (ret) {
1431                 dev_err(&client->dev, "%s failed to set powerup registers\n",
1432                         __func__);
1433                 return ret;
1434         }
1435
1436         /* Setup PLL */
1437         link_freq_index = ov13858->cur_mode->link_freq_index;
1438         reg_list = &link_freq_configs[link_freq_index].reg_list;
1439         ret = ov13858_write_reg_list(ov13858, reg_list);
1440         if (ret) {
1441                 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1442                 return ret;
1443         }
1444
1445         /* Apply default values of current mode */
1446         reg_list = &ov13858->cur_mode->reg_list;
1447         ret = ov13858_write_reg_list(ov13858, reg_list);
1448         if (ret) {
1449                 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1450                 return ret;
1451         }
1452
1453         /* Apply customized values from user */
1454         ret =  __v4l2_ctrl_handler_setup(ov13858->sd.ctrl_handler);
1455         if (ret)
1456                 return ret;
1457
1458         return ov13858_write_reg(ov13858, OV13858_REG_MODE_SELECT,
1459                                  OV13858_REG_VALUE_08BIT,
1460                                  OV13858_MODE_STREAMING);
1461 }
1462
1463 /* Stop streaming */
1464 static int ov13858_stop_streaming(struct ov13858 *ov13858)
1465 {
1466         return ov13858_write_reg(ov13858, OV13858_REG_MODE_SELECT,
1467                                  OV13858_REG_VALUE_08BIT, OV13858_MODE_STANDBY);
1468 }
1469
1470 static int ov13858_set_stream(struct v4l2_subdev *sd, int enable)
1471 {
1472         struct ov13858 *ov13858 = to_ov13858(sd);
1473         struct i2c_client *client = v4l2_get_subdevdata(sd);
1474         int ret = 0;
1475
1476         mutex_lock(&ov13858->mutex);
1477         if (ov13858->streaming == enable) {
1478                 mutex_unlock(&ov13858->mutex);
1479                 return 0;
1480         }
1481
1482         if (enable) {
1483                 ret = pm_runtime_get_sync(&client->dev);
1484                 if (ret < 0) {
1485                         pm_runtime_put_noidle(&client->dev);
1486                         goto err_unlock;
1487                 }
1488
1489                 /*
1490                  * Apply default & customized values
1491                  * and then start streaming.
1492                  */
1493                 ret = ov13858_start_streaming(ov13858);
1494                 if (ret)
1495                         goto err_rpm_put;
1496         } else {
1497                 ov13858_stop_streaming(ov13858);
1498                 pm_runtime_put(&client->dev);
1499         }
1500
1501         ov13858->streaming = enable;
1502         mutex_unlock(&ov13858->mutex);
1503
1504         return ret;
1505
1506 err_rpm_put:
1507         pm_runtime_put(&client->dev);
1508 err_unlock:
1509         mutex_unlock(&ov13858->mutex);
1510
1511         return ret;
1512 }
1513
1514 static int __maybe_unused ov13858_suspend(struct device *dev)
1515 {
1516         struct i2c_client *client = to_i2c_client(dev);
1517         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1518         struct ov13858 *ov13858 = to_ov13858(sd);
1519
1520         if (ov13858->streaming)
1521                 ov13858_stop_streaming(ov13858);
1522
1523         return 0;
1524 }
1525
1526 static int __maybe_unused ov13858_resume(struct device *dev)
1527 {
1528         struct i2c_client *client = to_i2c_client(dev);
1529         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1530         struct ov13858 *ov13858 = to_ov13858(sd);
1531         int ret;
1532
1533         if (ov13858->streaming) {
1534                 ret = ov13858_start_streaming(ov13858);
1535                 if (ret)
1536                         goto error;
1537         }
1538
1539         return 0;
1540
1541 error:
1542         ov13858_stop_streaming(ov13858);
1543         ov13858->streaming = false;
1544         return ret;
1545 }
1546
1547 /* Verify chip ID */
1548 static int ov13858_identify_module(struct ov13858 *ov13858)
1549 {
1550         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1551         int ret;
1552         u32 val;
1553
1554         ret = ov13858_read_reg(ov13858, OV13858_REG_CHIP_ID,
1555                                OV13858_REG_VALUE_24BIT, &val);
1556         if (ret)
1557                 return ret;
1558
1559         if (val != OV13858_CHIP_ID) {
1560                 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1561                         OV13858_CHIP_ID, val);
1562                 return -EIO;
1563         }
1564
1565         return 0;
1566 }
1567
1568 static const struct v4l2_subdev_video_ops ov13858_video_ops = {
1569         .s_stream = ov13858_set_stream,
1570 };
1571
1572 static const struct v4l2_subdev_pad_ops ov13858_pad_ops = {
1573         .enum_mbus_code = ov13858_enum_mbus_code,
1574         .get_fmt = ov13858_get_pad_format,
1575         .set_fmt = ov13858_set_pad_format,
1576         .enum_frame_size = ov13858_enum_frame_size,
1577 };
1578
1579 static const struct v4l2_subdev_sensor_ops ov13858_sensor_ops = {
1580         .g_skip_frames = ov13858_get_skip_frames,
1581 };
1582
1583 static const struct v4l2_subdev_ops ov13858_subdev_ops = {
1584         .video = &ov13858_video_ops,
1585         .pad = &ov13858_pad_ops,
1586         .sensor = &ov13858_sensor_ops,
1587 };
1588
1589 static const struct media_entity_operations ov13858_subdev_entity_ops = {
1590         .link_validate = v4l2_subdev_link_validate,
1591 };
1592
1593 static const struct v4l2_subdev_internal_ops ov13858_internal_ops = {
1594         .open = ov13858_open,
1595 };
1596
1597 /* Initialize control handlers */
1598 static int ov13858_init_controls(struct ov13858 *ov13858)
1599 {
1600         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1601         struct v4l2_ctrl_handler *ctrl_hdlr;
1602         s64 exposure_max;
1603         s64 vblank_def;
1604         s64 vblank_min;
1605         s64 hblank;
1606         s64 pixel_rate_min;
1607         s64 pixel_rate_max;
1608         const struct ov13858_mode *mode;
1609         int ret;
1610
1611         ctrl_hdlr = &ov13858->ctrl_handler;
1612         ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1613         if (ret)
1614                 return ret;
1615
1616         mutex_init(&ov13858->mutex);
1617         ctrl_hdlr->lock = &ov13858->mutex;
1618         ov13858->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1619                                 &ov13858_ctrl_ops,
1620                                 V4L2_CID_LINK_FREQ,
1621                                 OV13858_NUM_OF_LINK_FREQS - 1,
1622                                 0,
1623                                 link_freq_menu_items);
1624         ov13858->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1625
1626         pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]);
1627         pixel_rate_min = link_freq_to_pixel_rate(link_freq_menu_items[1]);
1628         /* By default, PIXEL_RATE is read only */
1629         ov13858->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops,
1630                                                 V4L2_CID_PIXEL_RATE,
1631                                                 pixel_rate_min, pixel_rate_max,
1632                                                 1, pixel_rate_max);
1633
1634         mode = ov13858->cur_mode;
1635         vblank_def = mode->vts_def - mode->height;
1636         vblank_min = mode->vts_min - mode->height;
1637         ov13858->vblank = v4l2_ctrl_new_std(
1638                                 ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_VBLANK,
1639                                 vblank_min, OV13858_VTS_MAX - mode->height, 1,
1640                                 vblank_def);
1641
1642         hblank = link_freq_configs[mode->link_freq_index].pixels_per_line -
1643                  mode->width;
1644         ov13858->hblank = v4l2_ctrl_new_std(
1645                                 ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_HBLANK,
1646                                 hblank, hblank, 1, hblank);
1647         ov13858->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1648
1649         exposure_max = mode->vts_def - 8;
1650         ov13858->exposure = v4l2_ctrl_new_std(
1651                                 ctrl_hdlr, &ov13858_ctrl_ops,
1652                                 V4L2_CID_EXPOSURE, OV13858_EXPOSURE_MIN,
1653                                 exposure_max, OV13858_EXPOSURE_STEP,
1654                                 OV13858_EXPOSURE_DEFAULT);
1655
1656         v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1657                           OV13858_ANA_GAIN_MIN, OV13858_ANA_GAIN_MAX,
1658                           OV13858_ANA_GAIN_STEP, OV13858_ANA_GAIN_DEFAULT);
1659
1660         /* Digital gain */
1661         v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1662                           OV13858_DGTL_GAIN_MIN, OV13858_DGTL_GAIN_MAX,
1663                           OV13858_DGTL_GAIN_STEP, OV13858_DGTL_GAIN_DEFAULT);
1664
1665         v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov13858_ctrl_ops,
1666                                      V4L2_CID_TEST_PATTERN,
1667                                      ARRAY_SIZE(ov13858_test_pattern_menu) - 1,
1668                                      0, 0, ov13858_test_pattern_menu);
1669         if (ctrl_hdlr->error) {
1670                 ret = ctrl_hdlr->error;
1671                 dev_err(&client->dev, "%s control init failed (%d)\n",
1672                         __func__, ret);
1673                 goto error;
1674         }
1675
1676         ov13858->sd.ctrl_handler = ctrl_hdlr;
1677
1678         return 0;
1679
1680 error:
1681         v4l2_ctrl_handler_free(ctrl_hdlr);
1682         mutex_destroy(&ov13858->mutex);
1683
1684         return ret;
1685 }
1686
1687 static void ov13858_free_controls(struct ov13858 *ov13858)
1688 {
1689         v4l2_ctrl_handler_free(ov13858->sd.ctrl_handler);
1690         mutex_destroy(&ov13858->mutex);
1691 }
1692
1693 static int ov13858_probe(struct i2c_client *client,
1694                          const struct i2c_device_id *devid)
1695 {
1696         struct ov13858 *ov13858;
1697         int ret;
1698         u32 val = 0;
1699
1700         device_property_read_u32(&client->dev, "clock-frequency", &val);
1701         if (val != 19200000)
1702                 return -EINVAL;
1703
1704         ov13858 = devm_kzalloc(&client->dev, sizeof(*ov13858), GFP_KERNEL);
1705         if (!ov13858)
1706                 return -ENOMEM;
1707
1708         /* Initialize subdev */
1709         v4l2_i2c_subdev_init(&ov13858->sd, client, &ov13858_subdev_ops);
1710
1711         /* Check module identity */
1712         ret = ov13858_identify_module(ov13858);
1713         if (ret) {
1714                 dev_err(&client->dev, "failed to find sensor: %d\n", ret);
1715                 return ret;
1716         }
1717
1718         /* Set default mode to max resolution */
1719         ov13858->cur_mode = &supported_modes[0];
1720
1721         ret = ov13858_init_controls(ov13858);
1722         if (ret)
1723                 return ret;
1724
1725         /* Initialize subdev */
1726         ov13858->sd.internal_ops = &ov13858_internal_ops;
1727         ov13858->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1728         ov13858->sd.entity.ops = &ov13858_subdev_entity_ops;
1729         ov13858->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1730
1731         /* Initialize source pad */
1732         ov13858->pad.flags = MEDIA_PAD_FL_SOURCE;
1733         ret = media_entity_pads_init(&ov13858->sd.entity, 1, &ov13858->pad);
1734         if (ret) {
1735                 dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1736                 goto error_handler_free;
1737         }
1738
1739         ret = v4l2_async_register_subdev_sensor_common(&ov13858->sd);
1740         if (ret < 0)
1741                 goto error_media_entity;
1742
1743         /*
1744          * Device is already turned on by i2c-core with ACPI domain PM.
1745          * Enable runtime PM and turn off the device.
1746          */
1747         pm_runtime_get_noresume(&client->dev);
1748         pm_runtime_set_active(&client->dev);
1749         pm_runtime_enable(&client->dev);
1750         pm_runtime_put(&client->dev);
1751
1752         return 0;
1753
1754 error_media_entity:
1755         media_entity_cleanup(&ov13858->sd.entity);
1756
1757 error_handler_free:
1758         ov13858_free_controls(ov13858);
1759         dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1760
1761         return ret;
1762 }
1763
1764 static int ov13858_remove(struct i2c_client *client)
1765 {
1766         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1767         struct ov13858 *ov13858 = to_ov13858(sd);
1768
1769         v4l2_async_unregister_subdev(sd);
1770         media_entity_cleanup(&sd->entity);
1771         ov13858_free_controls(ov13858);
1772
1773         /*
1774          * Disable runtime PM but keep the device turned on.
1775          * i2c-core with ACPI domain PM will turn off the device.
1776          */
1777         pm_runtime_get_sync(&client->dev);
1778         pm_runtime_disable(&client->dev);
1779         pm_runtime_set_suspended(&client->dev);
1780         pm_runtime_put_noidle(&client->dev);
1781
1782         return 0;
1783 }
1784
1785 static const struct i2c_device_id ov13858_id_table[] = {
1786         {"ov13858", 0},
1787         {},
1788 };
1789
1790 MODULE_DEVICE_TABLE(i2c, ov13858_id_table);
1791
1792 static const struct dev_pm_ops ov13858_pm_ops = {
1793         SET_SYSTEM_SLEEP_PM_OPS(ov13858_suspend, ov13858_resume)
1794 };
1795
1796 #ifdef CONFIG_ACPI
1797 static const struct acpi_device_id ov13858_acpi_ids[] = {
1798         {"OVTID858"},
1799         { /* sentinel */ }
1800 };
1801
1802 MODULE_DEVICE_TABLE(acpi, ov13858_acpi_ids);
1803 #endif
1804
1805 static struct i2c_driver ov13858_i2c_driver = {
1806         .driver = {
1807                 .name = "ov13858",
1808                 .owner = THIS_MODULE,
1809                 .pm = &ov13858_pm_ops,
1810                 .acpi_match_table = ACPI_PTR(ov13858_acpi_ids),
1811         },
1812         .probe = ov13858_probe,
1813         .remove = ov13858_remove,
1814         .id_table = ov13858_id_table,
1815 };
1816
1817 module_i2c_driver(ov13858_i2c_driver);
1818
1819 MODULE_AUTHOR("Kan, Chris <chris.kan@intel.com>");
1820 MODULE_AUTHOR("Rapolu, Chiranjeevi <chiranjeevi.rapolu@intel.com>");
1821 MODULE_AUTHOR("Yang, Hyungwoo <hyungwoo.yang@intel.com>");
1822 MODULE_DESCRIPTION("Omnivision ov13858 sensor driver");
1823 MODULE_LICENSE("GPL v2");