2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include "mn88472_priv.h"
19 static int mn88472_get_tune_settings(struct dvb_frontend *fe,
20 struct dvb_frontend_tune_settings *s)
22 s->min_delay_ms = 1000;
26 static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
28 struct i2c_client *client = fe->demodulator_priv;
29 struct mn88472_dev *dev = i2c_get_clientdata(client);
30 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
32 unsigned int utmp, utmp1, utmp2;
40 switch (c->delivery_system) {
42 ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
45 if ((utmp & 0x0f) >= 0x09)
46 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
47 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
52 ret = regmap_read(dev->regmap[2], 0x92, &utmp);
55 if ((utmp & 0x0f) >= 0x0d)
56 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
57 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
58 else if ((utmp & 0x0f) >= 0x0a)
59 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
61 else if ((utmp & 0x0f) >= 0x07)
62 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
66 case SYS_DVBC_ANNEX_A:
67 ret = regmap_read(dev->regmap[1], 0x84, &utmp);
70 if ((utmp & 0x0f) >= 0x08)
71 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
72 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
82 if (*status & FE_HAS_SIGNAL) {
83 for (i = 0; i < 2; i++) {
84 ret = regmap_bulk_read(dev->regmap[2], 0x8e + i,
90 utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
91 dev_dbg(&client->dev, "strength=%u\n", utmp1);
93 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
94 c->strength.stat[0].uvalue = utmp1;
96 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
100 if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
102 ret = regmap_bulk_read(dev->regmap[0], 0x9c, buf, 2);
106 utmp = buf[0] << 8 | buf[1] << 0;
108 /* CNR[dB]: 10 * log10(65536 / value) + 2 */
109 /* log10(65536) = 80807124, 0.2 = 3355443 */
110 stmp = ((u64)80807124 - intlog10(utmp) + 3355443)
113 dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
118 c->cnr.stat[0].svalue = stmp;
119 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
120 } else if (*status & FE_HAS_VITERBI &&
121 c->delivery_system == SYS_DVBT2) {
123 for (i = 0; i < 3; i++) {
124 ret = regmap_bulk_read(dev->regmap[2], 0xbc + i,
130 utmp = buf[1] << 8 | buf[2] << 0;
131 utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
134 /* CNR[dB]: 10 * log10(16384 / value) - 6 */
135 /* log10(16384) = 70706234, 0.6 = 10066330 */
136 stmp = ((u64)70706234 - intlog10(utmp)
137 - 10066330) * 10000 >> 24;
138 dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
141 /* CNR[dB]: 10 * log10(65536 / value) + 2 */
142 /* log10(65536) = 80807124, 0.2 = 3355443 */
143 stmp = ((u64)80807124 - intlog10(utmp)
144 + 3355443) * 10000 >> 24;
146 dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
153 c->cnr.stat[0].svalue = stmp;
154 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
155 } else if (*status & FE_HAS_VITERBI &&
156 c->delivery_system == SYS_DVBC_ANNEX_A) {
158 ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
162 utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
163 utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
164 if (utmp1 && utmp2) {
165 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
166 /* log10(8) = 15151336 */
167 stmp = ((u64)15151336 + intlog10(utmp1)
168 - intlog10(utmp2)) * 10000 >> 24;
170 dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
176 c->cnr.stat[0].svalue = stmp;
177 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
179 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
183 if (*status & FE_HAS_SYNC) {
184 ret = regmap_bulk_read(dev->regmap[0], 0xe1, buf, 4);
188 utmp1 = buf[0] << 8 | buf[1] << 0;
189 utmp2 = buf[2] << 8 | buf[3] << 0;
190 dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
193 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
194 c->block_error.stat[0].uvalue += utmp1;
195 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
196 c->block_count.stat[0].uvalue += utmp2;
198 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
199 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
204 dev_dbg(&client->dev, "failed=%d\n", ret);
208 static int mn88472_set_frontend(struct dvb_frontend *fe)
210 struct i2c_client *client = fe->demodulator_priv;
211 struct mn88472_dev *dev = i2c_get_clientdata(client);
212 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
216 u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
217 u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
220 dev_dbg(&client->dev,
221 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
222 c->delivery_system, c->modulation, c->frequency,
223 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
230 switch (c->delivery_system) {
232 delivery_system_val = 0x02;
233 reg_bank0_b4_val = 0x00;
234 reg_bank0_cd_val = 0x1f;
235 reg_bank0_d4_val = 0x0a;
236 reg_bank0_d6_val = 0x48;
239 delivery_system_val = 0x03;
240 reg_bank0_b4_val = 0xf6;
241 reg_bank0_cd_val = 0x01;
242 reg_bank0_d4_val = 0x09;
243 reg_bank0_d6_val = 0x46;
245 case SYS_DVBC_ANNEX_A:
246 delivery_system_val = 0x04;
247 reg_bank0_b4_val = 0x00;
248 reg_bank0_cd_val = 0x17;
249 reg_bank0_d4_val = 0x09;
250 reg_bank0_d6_val = 0x48;
257 switch (c->delivery_system) {
260 switch (c->bandwidth_hz) {
262 bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
263 bandwidth_val = 0x03;
266 bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
267 bandwidth_val = 0x02;
270 bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
271 bandwidth_val = 0x01;
274 bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
275 bandwidth_val = 0x00;
282 case SYS_DVBC_ANNEX_A:
283 bandwidth_vals_ptr = NULL;
284 bandwidth_val = 0x00;
291 if (fe->ops.tuner_ops.set_params) {
292 ret = fe->ops.tuner_ops.set_params(fe);
297 if (fe->ops.tuner_ops.get_if_frequency) {
298 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
302 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
308 ret = regmap_write(dev->regmap[2], 0x00, 0x66);
311 ret = regmap_write(dev->regmap[2], 0x01, 0x00);
314 ret = regmap_write(dev->regmap[2], 0x02, 0x01);
317 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
320 ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
325 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
326 buf[0] = (utmp >> 16) & 0xff;
327 buf[1] = (utmp >> 8) & 0xff;
328 buf[2] = (utmp >> 0) & 0xff;
329 for (i = 0; i < 3; i++) {
330 ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
336 if (bandwidth_vals_ptr) {
337 for (i = 0; i < 7; i++) {
338 ret = regmap_write(dev->regmap[2], 0x13 + i,
339 bandwidth_vals_ptr[i]);
345 ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
348 ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
351 ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
354 ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
358 switch (c->delivery_system) {
360 ret = regmap_write(dev->regmap[0], 0x07, 0x26);
363 ret = regmap_write(dev->regmap[0], 0x00, 0xba);
366 ret = regmap_write(dev->regmap[0], 0x01, 0x13);
371 ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
374 ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
377 ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
380 ret = regmap_write(dev->regmap[2], 0x32,
381 (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
386 case SYS_DVBC_ANNEX_A:
393 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
399 dev_dbg(&client->dev, "failed=%d\n", ret);
403 static int mn88472_init(struct dvb_frontend *fe)
405 struct i2c_client *client = fe->demodulator_priv;
406 struct mn88472_dev *dev = i2c_get_clientdata(client);
409 const struct firmware *firmware;
410 const char *name = MN88472_FIRMWARE;
412 dev_dbg(&client->dev, "\n");
415 ret = regmap_write(dev->regmap[2], 0x05, 0x00);
418 ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
421 ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
425 /* Check if firmware is already running */
426 ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
432 ret = request_firmware(&firmware, name, &client->dev);
434 dev_err(&client->dev, "firmware file '%s' not found\n", name);
438 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
440 ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
442 goto err_release_firmware;
444 for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
445 len = min(dev->i2c_write_max - 1, rem);
446 ret = regmap_bulk_write(dev->regmap[0], 0xf6,
447 &firmware->data[firmware->size - rem],
450 dev_err(&client->dev, "firmware download failed %d\n",
452 goto err_release_firmware;
456 /* Parity check of firmware */
457 ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
459 goto err_release_firmware;
462 dev_err(&client->dev, "firmware did not run\n");
463 goto err_release_firmware;
466 ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
468 goto err_release_firmware;
470 release_firmware(firmware);
473 switch (dev->ts_mode) {
477 case PARALLEL_TS_MODE:
484 ret = regmap_write(dev->regmap[2], 0x08, utmp);
488 switch (dev->ts_clk) {
489 case VARIABLE_TS_CLOCK:
499 ret = regmap_write(dev->regmap[0], 0xd9, utmp);
506 err_release_firmware:
507 release_firmware(firmware);
509 dev_dbg(&client->dev, "failed=%d\n", ret);
513 static int mn88472_sleep(struct dvb_frontend *fe)
515 struct i2c_client *client = fe->demodulator_priv;
516 struct mn88472_dev *dev = i2c_get_clientdata(client);
519 dev_dbg(&client->dev, "\n");
522 ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
525 ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
528 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
534 dev_dbg(&client->dev, "failed=%d\n", ret);
538 static const struct dvb_frontend_ops mn88472_ops = {
539 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
541 .name = "Panasonic MN88472",
542 .symbol_rate_min = 1000000,
543 .symbol_rate_max = 7200000,
544 .caps = FE_CAN_FEC_1_2 |
557 FE_CAN_TRANSMISSION_MODE_AUTO |
558 FE_CAN_GUARD_INTERVAL_AUTO |
559 FE_CAN_HIERARCHY_AUTO |
561 FE_CAN_2G_MODULATION |
565 .get_tune_settings = mn88472_get_tune_settings,
567 .init = mn88472_init,
568 .sleep = mn88472_sleep,
570 .set_frontend = mn88472_set_frontend,
572 .read_status = mn88472_read_status,
575 static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
577 struct mn88472_dev *dev = i2c_get_clientdata(client);
579 dev_dbg(&client->dev, "\n");
584 static int mn88472_probe(struct i2c_client *client,
585 const struct i2c_device_id *id)
587 struct mn88472_config *pdata = client->dev.platform_data;
588 struct mn88472_dev *dev;
589 struct dtv_frontend_properties *c;
592 static const struct regmap_config regmap_config = {
597 dev_dbg(&client->dev, "\n");
599 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
605 dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
606 dev->clk = pdata->xtal;
607 dev->ts_mode = pdata->ts_mode;
608 dev->ts_clk = pdata->ts_clock;
609 dev->client[0] = client;
610 dev->regmap[0] = regmap_init_i2c(dev->client[0], ®map_config);
611 if (IS_ERR(dev->regmap[0])) {
612 ret = PTR_ERR(dev->regmap[0]);
617 * Chip has three I2C addresses for different register banks. Used
618 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
619 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
621 * Also, register bank 2 do not support sequential I/O. Only single
622 * register write or read is allowed to that bank.
624 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
625 if (!dev->client[1]) {
627 dev_err(&client->dev, "I2C registration failed\n");
629 goto err_regmap_0_regmap_exit;
631 dev->regmap[1] = regmap_init_i2c(dev->client[1], ®map_config);
632 if (IS_ERR(dev->regmap[1])) {
633 ret = PTR_ERR(dev->regmap[1]);
634 goto err_client_1_i2c_unregister_device;
636 i2c_set_clientdata(dev->client[1], dev);
638 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
639 if (!dev->client[2]) {
641 dev_err(&client->dev, "2nd I2C registration failed\n");
643 goto err_regmap_1_regmap_exit;
645 dev->regmap[2] = regmap_init_i2c(dev->client[2], ®map_config);
646 if (IS_ERR(dev->regmap[2])) {
647 ret = PTR_ERR(dev->regmap[2]);
648 goto err_client_2_i2c_unregister_device;
650 i2c_set_clientdata(dev->client[2], dev);
652 /* Check demod answers with correct chip id */
653 ret = regmap_read(dev->regmap[2], 0xff, &utmp);
655 goto err_regmap_2_regmap_exit;
657 dev_dbg(&client->dev, "chip id=%02x\n", utmp);
661 goto err_regmap_2_regmap_exit;
664 /* Sleep because chip is active by default */
665 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
667 goto err_regmap_2_regmap_exit;
669 /* Create dvb frontend */
670 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
671 dev->fe.demodulator_priv = client;
672 *pdata->fe = &dev->fe;
673 i2c_set_clientdata(client, dev);
675 /* Init stats to indicate which stats are supported */
676 c = &dev->fe.dtv_property_cache;
679 c->block_error.len = 1;
680 c->block_count.len = 1;
682 /* Setup callbacks */
683 pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
685 dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
688 err_regmap_2_regmap_exit:
689 regmap_exit(dev->regmap[2]);
690 err_client_2_i2c_unregister_device:
691 i2c_unregister_device(dev->client[2]);
692 err_regmap_1_regmap_exit:
693 regmap_exit(dev->regmap[1]);
694 err_client_1_i2c_unregister_device:
695 i2c_unregister_device(dev->client[1]);
696 err_regmap_0_regmap_exit:
697 regmap_exit(dev->regmap[0]);
701 dev_dbg(&client->dev, "failed=%d\n", ret);
705 static int mn88472_remove(struct i2c_client *client)
707 struct mn88472_dev *dev = i2c_get_clientdata(client);
709 dev_dbg(&client->dev, "\n");
711 regmap_exit(dev->regmap[2]);
712 i2c_unregister_device(dev->client[2]);
714 regmap_exit(dev->regmap[1]);
715 i2c_unregister_device(dev->client[1]);
717 regmap_exit(dev->regmap[0]);
724 static const struct i2c_device_id mn88472_id_table[] = {
728 MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
730 static struct i2c_driver mn88472_driver = {
733 .suppress_bind_attrs = true,
735 .probe = mn88472_probe,
736 .remove = mn88472_remove,
737 .id_table = mn88472_id_table,
740 module_i2c_driver(mn88472_driver);
742 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
743 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
744 MODULE_LICENSE("GPL");
745 MODULE_FIRMWARE(MN88472_FIRMWARE);