2 bool "Mailbox Hardware Support"
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
11 tristate "ARM MHU Mailbox"
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
19 tristate "i.MX Mailbox"
20 depends on ARCH_MXC || COMPILE_TEST
22 Mailbox implementation for i.MX Messaging Unit (MU).
25 tristate "Platform MHU Mailbox"
29 Say Y here if you want to build a platform specific variant MHU
31 The controller has a maximum of 3 mailbox channels, the last of
32 which can be used in Secure mode only.
35 bool "ARM PL320 Mailbox"
38 An implementation of the ARM PL320 Interprocessor Communication
39 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
40 send short messages between Highbank's A9 cores and the EnergyCore
41 Management Engine, primarily for cpufreq. Say Y here if you want
42 to use the PL320 IPCM support.
44 config ARMADA_37XX_RWTM_MBOX
45 tristate "Armada 37xx rWTM BIU Mailbox"
46 depends on ARCH_MVEBU || COMPILE_TEST
49 Mailbox implementation for communication with the the firmware
50 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
51 SOC. Say Y here if you are building for such a device (for example
52 the Turris Mox router).
55 tristate "OMAP2+ Mailbox framework support"
56 depends on ARCH_OMAP2PLUS
58 Mailbox implementation for OMAP family chips with hardware for
59 interprocessor communication involving DSP, IVA1.0 and IVA2 in
60 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
61 want to use OMAP2+ Mailbox framework support.
63 config OMAP_MBOX_KFIFO_SIZE
64 int "Mailbox kfifo default buffer size (bytes)"
65 depends on OMAP2PLUS_MBOX
68 Specify the default size of mailbox's kfifo buffers (bytes).
69 This can also be changed at runtime (via the mbox_kfifo_size
73 bool "Rockchip Soc Intergrated Mailbox Support"
74 depends on ARCH_ROCKCHIP || COMPILE_TEST
76 This driver provides support for inter-processor communication
77 between CPU cores and MCU processor on Some Rockchip SOCs.
78 Please check it that the Soc you use have Mailbox hardware.
79 Say Y here if you want to use the Rockchip Mailbox support.
82 bool "Platform Communication Channel Driver"
86 ACPI 5.0+ spec defines a generic mode of communication
87 between the OS and a platform such as the BMC. This medium
88 (PCC) is typically used by CPPC (ACPI CPU Performance management),
89 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
90 states). Select this driver if your platform implements the
91 PCC clients mentioned above.
94 tristate "Altera Mailbox"
97 An implementation of the Altera Mailbox soft core. It is used
98 to send message between processors. Say Y here if you want to use the
99 Altera mailbox support.
102 tristate "BCM2835 Mailbox"
103 depends on ARCH_BCM2835
105 An implementation of the BCM2385 Mailbox. It is used to invoke
106 the services of the Videocore. Say Y here if you want to use the
110 tristate "STI Mailbox framework support"
111 depends on ARCH_STI && OF
113 Mailbox implementation for STMicroelectonics family chips with
114 hardware for interprocessor communication.
116 config TI_MESSAGE_MANAGER
117 tristate "Texas Instruments Message Manager Driver"
118 depends on ARCH_KEYSTONE || ARCH_K3
120 An implementation of Message Manager slave driver for Keystone
121 and K3 architecture SoCs from Texas Instruments. Message Manager
122 is a communication entity found on few of Texas Instrument's keystone
123 and K3 architecture SoCs. These may be used for communication between
124 multiple processors within the SoC. Select this driver if your
125 platform has support for the hardware block.
128 tristate "Hi3660 Mailbox" if EXPERT
129 depends on (ARCH_HISI || COMPILE_TEST)
133 An implementation of the hi3660 mailbox. It is used to send message
134 between application processors and other processors/MCU/DSP. Select
135 Y here if you want to use Hi3660 mailbox controller.
138 tristate "Hi6220 Mailbox" if EXPERT
139 depends on (ARCH_HISI || COMPILE_TEST)
143 An implementation of the hi6220 mailbox. It is used to send message
144 between application processors and MCU. Say Y here if you want to
145 build Hi6220 mailbox controller driver.
148 tristate "Mailbox Test Client"
152 Test client to help with testing new Controller driver
156 tristate "Qualcomm APCS IPC driver"
157 depends on ARCH_QCOM || COMPILE_TEST
159 Say y here to enable support for the APCS IPC mailbox driver,
160 providing an interface for invoking the inter-process communication
161 signals from the application processor to other masters.
163 config TEGRA_HSP_MBOX
164 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
165 depends on ARCH_TEGRA
167 The Tegra HSP driver is used for the interprocessor communication
168 between different remote processors and host processors on Tegra186
169 and later SoCs. Say Y here if you want to have this support.
172 config XGENE_SLIMPRO_MBOX
173 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
174 depends on ARCH_XGENE
176 An implementation of the APM X-Gene Interprocessor Communication
177 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
178 It is used to send short messages between ARM64-bit cores and
179 the SLIMpro Management Engine, primarily for PM. Say Y here if you
180 want to use the APM X-Gene SLIMpro IPCM support.
183 tristate "Broadcom FlexSparx DMA Mailbox"
184 depends on ARCH_BCM_IPROC || COMPILE_TEST
186 Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
187 which provides access to various offload engines on Broadcom
188 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
190 config BCM_FLEXRM_MBOX
191 tristate "Broadcom FlexRM Mailbox"
193 depends on ARCH_BCM_IPROC || COMPILE_TEST
194 select GENERIC_MSI_IRQ_DOMAIN
195 default m if ARCH_BCM_IPROC
197 Mailbox implementation of the Broadcom FlexRM ring manager,
198 which provides access to various offload engines on Broadcom
199 SoCs. Say Y here if you want to use the Broadcom FlexRM.
202 tristate "STM32 IPCC Mailbox"
203 depends on MACH_STM32MP157
205 Mailbox implementation for STMicroelectonics STM32 family chips
206 with hardware for Inter-Processor Communication Controller (IPCC)
207 between processors. Say Y here if you want to have this support.
210 tristate "MediaTek CMDQ Mailbox Support"
211 depends on ARCH_MEDIATEK || COMPILE_TEST
214 Say yes here to add support for the MediaTek Command Queue (CMDQ)
215 mailbox driver. The CMDQ is used to help read/write registers with
216 critical time limitation, such as updating display configuration
219 config ZYNQMP_IPI_MBOX
220 bool "Xilinx ZynqMP IPI Mailbox"
221 depends on ARCH_ZYNQMP && OF
223 Say yes here to add support for Xilinx IPI mailbox driver.
224 This mailbox driver is used to send notification or short message
225 between processors with Xilinx ZynqMP IPI. It will place the
226 message to the IPI buffer and will access the IPI control
227 registers to kick the other processor or enquire status.