drivers/iommu/mtk_iommu.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2015-2016 MediaTek Inc.
   4  * Author: Honghui Zhang <honghui.zhang@mediatek.com>
   5  */
   6
   7 #ifndef _MTK_IOMMU_H_
   8 #define _MTK_IOMMU_H_
   9
  10 #include <linux/clk.h>
  11 #include <linux/component.h>
  12 #include <linux/device.h>
  13 #include <linux/io.h>
  14 #include <linux/io-pgtable.h>
  15 #include <linux/iommu.h>
  16 #include <linux/list.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/dma-mapping.h>
  19 #include <soc/mediatek/smi.h>
  20 #include <dt-bindings/memory/mtk-memory-port.h>
  21
  22 #define MTK_LARB_COM_MAX        8
  23 #define MTK_LARB_SUBCOM_MAX     4
  24
  25 struct mtk_iommu_suspend_reg {
  26         union {
  27                 u32                     standard_axi_mode;/* v1 */
  28                 u32                     misc_ctrl;/* v2 */
  29         };
  30         u32                             dcm_dis;
  31         u32                             ctrl_reg;
  32         u32                             int_control0;
  33         u32                             int_main_control;
  34         u32                             ivrp_paddr;
  35         u32                             vld_pa_rng;
  36         u32                             wr_len_ctrl;
  37 };
  38
  39 enum mtk_iommu_plat {
  40         M4U_MT2701,
  41         M4U_MT2712,
  42         M4U_MT6779,
  43         M4U_MT8167,
  44         M4U_MT8173,
  45         M4U_MT8183,
  46 };
  47
  48 struct mtk_iommu_iova_region;
  49
  50 struct mtk_iommu_plat_data {
  51         enum mtk_iommu_plat m4u_plat;
  52         u32                 flags;
  53         u32                 inv_sel_reg;
  54
  55         unsigned int                            iova_region_nr;
  56         const struct mtk_iommu_iova_region      *iova_region;
  57         unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
  58 };
  59
  60 struct mtk_iommu_domain;
  61
  62 struct mtk_iommu_data {
  63         void __iomem                    *base;
  64         int                             irq;
  65         struct device                   *dev;
  66         struct clk                      *bclk;
  67         phys_addr_t                     protect_base; /* protect memory base */
  68         struct mtk_iommu_suspend_reg    reg;
  69         struct mtk_iommu_domain         *m4u_dom;
  70         struct iommu_group              *m4u_group;
  71         bool                            enable_4GB;
  72         spinlock_t                      tlb_lock; /* lock for tlb range flush */
  73
  74         struct iommu_device             iommu;
  75         const struct mtk_iommu_plat_data *plat_data;
  76         struct device                   *smicomm_dev;
  77
  78         struct dma_iommu_mapping        *mapping; /* For mtk_iommu_v1.c */
  79
  80         struct list_head                list;
  81         struct mtk_smi_larb_iommu       larb_imu[MTK_LARB_NR_MAX];
  82 };
  83
  84 static inline int compare_of(struct device *dev, void *data)
  85 {
  86         return dev->of_node == data;
  87 }
  88
  89 static inline void release_of(struct device *dev, void *data)
  90 {
  91         of_node_put(data);
  92 }
  93
  94 static inline int mtk_iommu_bind(struct device *dev)
  95 {
  96         struct mtk_iommu_data *data = dev_get_drvdata(dev);
  97
  98         return component_bind_all(dev, &data->larb_imu);
  99 }
 100
 101 static inline void mtk_iommu_unbind(struct device *dev)
 102 {
 103         struct mtk_iommu_data *data = dev_get_drvdata(dev);
 104
 105         component_unbind_all(dev, &data->larb_imu);
 106 }
 107
 108 #endif