2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/mlx5/cmd.h>
34 #include <rdma/ib_mad.h>
35 #include <rdma/ib_smi.h>
39 MLX5_IB_VENDOR_CLASS1 = 0x9,
40 MLX5_IB_VENDOR_CLASS2 = 0xa
43 int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
44 u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
45 const void *in_mad, void *response_mad)
49 /* Key check traps can't be generated unless we have in_wc to
50 * tell us where to send the trap.
52 if (ignore_mkey || !in_wc)
54 if (ignore_bkey || !in_wc)
57 return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
60 int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
61 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
62 const struct ib_mad_hdr *in, size_t in_mad_size,
63 struct ib_mad_hdr *out, size_t *out_mad_size,
64 u16 *out_mad_pkey_index)
68 const struct ib_mad *in_mad = (const struct ib_mad *)in;
69 struct ib_mad *out_mad = (struct ib_mad *)out;
71 BUG_ON(in_mad_size != sizeof(*in_mad) ||
72 *out_mad_size != sizeof(*out_mad));
74 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
76 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
77 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
79 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
80 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
81 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
82 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
83 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
84 return IB_MAD_RESULT_SUCCESS;
86 /* Don't process SMInfo queries -- the SMA can't handle them.
88 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
89 return IB_MAD_RESULT_SUCCESS;
90 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
91 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
92 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
93 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
94 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
95 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
96 return IB_MAD_RESULT_SUCCESS;
98 return IB_MAD_RESULT_SUCCESS;
101 err = mlx5_MAD_IFC(to_mdev(ibdev),
102 mad_flags & IB_MAD_IGNORE_MKEY,
103 mad_flags & IB_MAD_IGNORE_BKEY,
104 port_num, in_wc, in_grh, in_mad, out_mad);
106 return IB_MAD_RESULT_FAILURE;
108 /* set return bit in status of directed route responses */
109 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
110 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
112 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
113 /* no response for trap repress */
114 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
116 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
119 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
121 struct ib_smp *in_mad = NULL;
122 struct ib_smp *out_mad = NULL;
126 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
127 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
128 if (!in_mad || !out_mad)
131 init_query_mad(in_mad);
132 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
133 in_mad->attr_mod = cpu_to_be32(port);
135 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
137 packet_error = be16_to_cpu(out_mad->status);
139 dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
140 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
148 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
149 struct ib_smp *out_mad)
151 struct ib_smp *in_mad = NULL;
154 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
158 init_query_mad(in_mad);
159 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
161 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
168 int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
169 __be64 *sys_image_guid)
171 struct ib_smp *out_mad = NULL;
174 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
178 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
182 memcpy(sys_image_guid, out_mad->data + 4, 8);
190 int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
193 struct ib_smp *out_mad = NULL;
196 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
200 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
204 *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
212 int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
215 struct ib_smp *out_mad = NULL;
218 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
222 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
226 *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
234 int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
236 struct ib_smp *in_mad = NULL;
237 struct ib_smp *out_mad = NULL;
240 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
241 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
242 if (!in_mad || !out_mad)
245 init_query_mad(in_mad);
246 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
248 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
252 memcpy(node_desc, out_mad->data, 64);
259 int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
261 struct ib_smp *in_mad = NULL;
262 struct ib_smp *out_mad = NULL;
265 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
266 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
267 if (!in_mad || !out_mad)
270 init_query_mad(in_mad);
271 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
273 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
277 memcpy(node_guid, out_mad->data + 12, 8);
284 int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
287 struct ib_smp *in_mad = NULL;
288 struct ib_smp *out_mad = NULL;
291 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
292 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
293 if (!in_mad || !out_mad)
296 init_query_mad(in_mad);
297 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
298 in_mad->attr_mod = cpu_to_be32(index / 32);
300 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
305 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
313 int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
316 struct ib_smp *in_mad = NULL;
317 struct ib_smp *out_mad = NULL;
320 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
321 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
322 if (!in_mad || !out_mad)
325 init_query_mad(in_mad);
326 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
327 in_mad->attr_mod = cpu_to_be32(port);
329 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
334 memcpy(gid->raw, out_mad->data + 8, 8);
336 init_query_mad(in_mad);
337 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
338 in_mad->attr_mod = cpu_to_be32(index / 8);
340 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
345 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
353 int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
354 struct ib_port_attr *props)
356 struct mlx5_ib_dev *dev = to_mdev(ibdev);
357 struct mlx5_core_dev *mdev = dev->mdev;
358 struct ib_smp *in_mad = NULL;
359 struct ib_smp *out_mad = NULL;
360 int ext_active_speed;
363 if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) {
364 mlx5_ib_warn(dev, "invalid port number %d\n", port);
368 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
369 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
370 if (!in_mad || !out_mad)
373 memset(props, 0, sizeof(*props));
375 init_query_mad(in_mad);
376 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
377 in_mad->attr_mod = cpu_to_be32(port);
379 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
381 mlx5_ib_warn(dev, "err %d\n", err);
385 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
386 props->lmc = out_mad->data[34] & 0x7;
387 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
388 props->sm_sl = out_mad->data[36] & 0xf;
389 props->state = out_mad->data[32] & 0xf;
390 props->phys_state = out_mad->data[33] >> 4;
391 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
392 props->gid_tbl_len = out_mad->data[50];
393 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
394 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
395 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
396 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
397 props->active_width = out_mad->data[31] & 0xf;
398 props->active_speed = out_mad->data[35] >> 4;
399 props->max_mtu = out_mad->data[41] & 0xf;
400 props->active_mtu = out_mad->data[36] >> 4;
401 props->subnet_timeout = out_mad->data[51] & 0x1f;
402 props->max_vl_num = out_mad->data[37] >> 4;
403 props->init_type_reply = out_mad->data[41] >> 4;
405 /* Check if extended speeds (EDR/FDR/...) are supported */
406 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
407 ext_active_speed = out_mad->data[62] >> 4;
409 switch (ext_active_speed) {
411 props->active_speed = 16; /* FDR */
414 props->active_speed = 32; /* EDR */
419 /* If reported active speed is QDR, check if is FDR-10 */
420 if (props->active_speed == 4) {
421 if (mdev->port_caps[port - 1].ext_port_cap &
422 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
423 init_query_mad(in_mad);
424 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
425 in_mad->attr_mod = cpu_to_be32(port);
427 err = mlx5_MAD_IFC(dev, 1, 1, port,
428 NULL, NULL, in_mad, out_mad);
432 /* Checking LinkSpeedActive for FDR-10 */
433 if (out_mad->data[15] & 0x1)
434 props->active_speed = 8;