2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <linux/sched/mm.h>
43 #include <linux/sched/task.h>
46 #include <net/addrconf.h>
47 #include <net/devlink.h>
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
54 #include <net/bonding.h>
56 #include <linux/mlx4/driver.h>
57 #include <linux/mlx4/cmd.h>
58 #include <linux/mlx4/qp.h>
61 #include <rdma/mlx4-abi.h>
63 #define DRV_NAME MLX4_IB_DRV_NAME
64 #define DRV_VERSION "2.2-1"
65 #define DRV_RELDATE "Feb 2014"
67 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
68 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
69 #define MLX4_IB_CARD_REV_A0 0xA0
71 MODULE_AUTHOR("Roland Dreier");
72 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
73 MODULE_LICENSE("Dual BSD/GPL");
74 MODULE_VERSION(DRV_VERSION);
76 int mlx4_ib_sm_guid_assign = 0;
77 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
78 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
80 static const char mlx4_ib_version[] =
81 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
82 DRV_VERSION " (" DRV_RELDATE ")\n";
84 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
86 static struct workqueue_struct *wq;
88 static void init_query_mad(struct ib_smp *mad)
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
96 static int check_flow_steering_support(struct mlx4_dev *dev)
98 int eth_num_ports = 0;
101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
109 dmfs &= (!ib_num_ports ||
110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
113 if (ib_num_ports && mlx4_is_mfunc(dev)) {
114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
121 static int num_ib_ports(struct mlx4_dev *dev)
126 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
132 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
134 struct mlx4_ib_dev *ibdev = to_mdev(device);
135 struct net_device *dev;
138 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
141 if (mlx4_is_bonded(ibdev->dev)) {
142 struct net_device *upper = NULL;
144 upper = netdev_master_upper_dev_get_rcu(dev);
146 struct net_device *active;
148 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
161 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
162 struct mlx4_ib_dev *ibdev,
165 struct mlx4_cmd_mailbox *mailbox;
167 struct mlx4_dev *dev = ibdev->dev;
169 union ib_gid *gid_tbl;
171 mailbox = mlx4_alloc_cmd_mailbox(dev);
175 gid_tbl = mailbox->buf;
177 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
178 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
180 err = mlx4_cmd(dev, mailbox->dma,
181 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
182 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
184 if (mlx4_is_bonded(dev))
185 err += mlx4_cmd(dev, mailbox->dma,
186 MLX4_SET_PORT_GID_TABLE << 8 | 2,
187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
190 mlx4_free_cmd_mailbox(dev, mailbox);
194 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
195 struct mlx4_ib_dev *ibdev,
198 struct mlx4_cmd_mailbox *mailbox;
200 struct mlx4_dev *dev = ibdev->dev;
211 mailbox = mlx4_alloc_cmd_mailbox(dev);
215 gid_tbl = mailbox->buf;
216 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
217 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
218 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
219 gid_tbl[i].version = 2;
220 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
223 memset(&gid_tbl[i].gid, 0, 12);
227 err = mlx4_cmd(dev, mailbox->dma,
228 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
229 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
231 if (mlx4_is_bonded(dev))
232 err += mlx4_cmd(dev, mailbox->dma,
233 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
234 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
237 mlx4_free_cmd_mailbox(dev, mailbox);
241 static int mlx4_ib_update_gids(struct gid_entry *gids,
242 struct mlx4_ib_dev *ibdev,
245 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
246 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
248 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
251 static int mlx4_ib_add_gid(struct ib_device *device,
254 const union ib_gid *gid,
255 const struct ib_gid_attr *attr,
258 struct mlx4_ib_dev *ibdev = to_mdev(device);
259 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
260 struct mlx4_port_gid_table *port_gid_table;
261 int free = -1, found = -1;
265 struct gid_entry *gids = NULL;
267 if (!rdma_cap_roce_gid_table(device, port_num))
270 if (port_num > MLX4_MAX_PORTS)
276 port_gid_table = &iboe->gids[port_num - 1];
277 spin_lock_bh(&iboe->lock);
278 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
279 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
280 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
284 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
285 free = i; /* HW has space */
292 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
293 if (!port_gid_table->gids[free].ctx) {
296 *context = port_gid_table->gids[free].ctx;
297 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
298 port_gid_table->gids[free].gid_type = attr->gid_type;
299 port_gid_table->gids[free].ctx->real_index = free;
300 port_gid_table->gids[free].ctx->refcount = 1;
305 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
309 if (!ret && hw_update) {
310 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
314 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
315 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
316 gids[i].gid_type = port_gid_table->gids[i].gid_type;
320 spin_unlock_bh(&iboe->lock);
322 if (!ret && hw_update) {
323 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
330 static int mlx4_ib_del_gid(struct ib_device *device,
335 struct gid_cache_context *ctx = *context;
336 struct mlx4_ib_dev *ibdev = to_mdev(device);
337 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
338 struct mlx4_port_gid_table *port_gid_table;
341 struct gid_entry *gids = NULL;
343 if (!rdma_cap_roce_gid_table(device, port_num))
346 if (port_num > MLX4_MAX_PORTS)
349 port_gid_table = &iboe->gids[port_num - 1];
350 spin_lock_bh(&iboe->lock);
353 if (!ctx->refcount) {
354 unsigned int real_index = ctx->real_index;
356 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
357 kfree(port_gid_table->gids[real_index].ctx);
358 port_gid_table->gids[real_index].ctx = NULL;
362 if (!ret && hw_update) {
365 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
369 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++)
370 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
373 spin_unlock_bh(&iboe->lock);
375 if (!ret && hw_update) {
376 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
382 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
383 u8 port_num, int index)
385 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
386 struct gid_cache_context *ctx = NULL;
388 struct mlx4_port_gid_table *port_gid_table;
389 int real_index = -EINVAL;
393 struct ib_gid_attr attr;
395 if (port_num > MLX4_MAX_PORTS)
398 if (mlx4_is_bonded(ibdev->dev))
401 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
404 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
411 if (!memcmp(&gid, &zgid, sizeof(gid)))
414 spin_lock_irqsave(&iboe->lock, flags);
415 port_gid_table = &iboe->gids[port_num - 1];
417 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
418 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
419 attr.gid_type == port_gid_table->gids[i].gid_type) {
420 ctx = port_gid_table->gids[i].ctx;
424 real_index = ctx->real_index;
425 spin_unlock_irqrestore(&iboe->lock, flags);
429 static int mlx4_ib_query_device(struct ib_device *ibdev,
430 struct ib_device_attr *props,
431 struct ib_udata *uhw)
433 struct mlx4_ib_dev *dev = to_mdev(ibdev);
434 struct ib_smp *in_mad = NULL;
435 struct ib_smp *out_mad = NULL;
438 struct mlx4_uverbs_ex_query_device cmd;
439 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
440 struct mlx4_clock_params clock_params;
443 if (uhw->inlen < sizeof(cmd))
446 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
457 resp.response_length = offsetof(typeof(resp), response_length) +
458 sizeof(resp.response_length);
459 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
460 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
462 if (!in_mad || !out_mad)
465 init_query_mad(in_mad);
466 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
468 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
469 1, NULL, NULL, in_mad, out_mad);
473 memset(props, 0, sizeof *props);
475 have_ib_ports = num_ib_ports(dev->dev);
477 props->fw_ver = dev->dev->caps.fw_ver;
478 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
479 IB_DEVICE_PORT_ACTIVE_EVENT |
480 IB_DEVICE_SYS_IMAGE_GUID |
481 IB_DEVICE_RC_RNR_NAK_GEN |
482 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
483 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
484 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
485 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
486 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
487 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
488 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
489 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
490 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
492 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
493 if (dev->dev->caps.max_gso_sz &&
494 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
495 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
496 props->device_cap_flags |= IB_DEVICE_UD_TSO;
497 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
498 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
499 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
500 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
501 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
502 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
503 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
504 props->device_cap_flags |= IB_DEVICE_XRC;
505 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
506 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
507 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
508 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
509 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
511 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
513 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
514 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
516 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
518 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
520 props->vendor_part_id = dev->dev->persist->pdev->device;
521 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
522 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
524 props->max_mr_size = ~0ull;
525 props->page_size_cap = dev->dev->caps.page_size_cap;
526 props->max_qp = dev->dev->quotas.qp;
527 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
528 props->max_sge = min(dev->dev->caps.max_sq_sg,
529 dev->dev->caps.max_rq_sg);
530 props->max_sge_rd = MLX4_MAX_SGE_RD;
531 props->max_cq = dev->dev->quotas.cq;
532 props->max_cqe = dev->dev->caps.max_cqes;
533 props->max_mr = dev->dev->quotas.mpt;
534 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
535 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
536 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
537 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
538 props->max_srq = dev->dev->quotas.srq;
539 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
540 props->max_srq_sge = dev->dev->caps.max_srq_sge;
541 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
542 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
543 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
544 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
545 props->masked_atomic_cap = props->atomic_cap;
546 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
547 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
548 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
549 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
550 props->max_mcast_grp;
551 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
552 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
553 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
554 props->max_ah = INT_MAX;
556 if (!mlx4_is_slave(dev->dev))
557 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
559 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
560 resp.response_length += sizeof(resp.hca_core_clock_offset);
561 if (!err && !mlx4_is_slave(dev->dev)) {
562 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
563 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
568 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
579 static enum rdma_link_layer
580 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
582 struct mlx4_dev *dev = to_mdev(device)->dev;
584 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
585 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
588 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
589 struct ib_port_attr *props, int netw_view)
591 struct ib_smp *in_mad = NULL;
592 struct ib_smp *out_mad = NULL;
593 int ext_active_speed;
594 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
597 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
598 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
599 if (!in_mad || !out_mad)
602 init_query_mad(in_mad);
603 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
604 in_mad->attr_mod = cpu_to_be32(port);
606 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
607 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
609 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
615 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
616 props->lmc = out_mad->data[34] & 0x7;
617 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
618 props->sm_sl = out_mad->data[36] & 0xf;
619 props->state = out_mad->data[32] & 0xf;
620 props->phys_state = out_mad->data[33] >> 4;
621 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
623 props->gid_tbl_len = out_mad->data[50];
625 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
626 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
627 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
628 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
629 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
630 props->active_width = out_mad->data[31] & 0xf;
631 props->active_speed = out_mad->data[35] >> 4;
632 props->max_mtu = out_mad->data[41] & 0xf;
633 props->active_mtu = out_mad->data[36] >> 4;
634 props->subnet_timeout = out_mad->data[51] & 0x1f;
635 props->max_vl_num = out_mad->data[37] >> 4;
636 props->init_type_reply = out_mad->data[41] >> 4;
638 /* Check if extended speeds (EDR/FDR/...) are supported */
639 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
640 ext_active_speed = out_mad->data[62] >> 4;
642 switch (ext_active_speed) {
644 props->active_speed = IB_SPEED_FDR;
647 props->active_speed = IB_SPEED_EDR;
652 /* If reported active speed is QDR, check if is FDR-10 */
653 if (props->active_speed == IB_SPEED_QDR) {
654 init_query_mad(in_mad);
655 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
656 in_mad->attr_mod = cpu_to_be32(port);
658 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
659 NULL, NULL, in_mad, out_mad);
663 /* Checking LinkSpeedActive for FDR-10 */
664 if (out_mad->data[15] & 0x1)
665 props->active_speed = IB_SPEED_FDR10;
668 /* Avoid wrong speed value returned by FW if the IB link is down. */
669 if (props->state == IB_PORT_DOWN)
670 props->active_speed = IB_SPEED_SDR;
678 static u8 state_to_phys_state(enum ib_port_state state)
680 return state == IB_PORT_ACTIVE ? 5 : 3;
683 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
684 struct ib_port_attr *props)
687 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
688 struct mlx4_ib_iboe *iboe = &mdev->iboe;
689 struct net_device *ndev;
691 struct mlx4_cmd_mailbox *mailbox;
693 int is_bonded = mlx4_is_bonded(mdev->dev);
695 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
697 return PTR_ERR(mailbox);
699 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
700 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
705 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
706 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
707 IB_WIDTH_4X : IB_WIDTH_1X;
708 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
709 IB_SPEED_FDR : IB_SPEED_QDR;
710 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
711 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
712 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
713 props->pkey_tbl_len = 1;
714 props->max_mtu = IB_MTU_4096;
715 props->max_vl_num = 2;
716 props->state = IB_PORT_DOWN;
717 props->phys_state = state_to_phys_state(props->state);
718 props->active_mtu = IB_MTU_256;
719 spin_lock_bh(&iboe->lock);
720 ndev = iboe->netdevs[port - 1];
721 if (ndev && is_bonded) {
722 rcu_read_lock(); /* required to get upper dev */
723 ndev = netdev_master_upper_dev_get_rcu(ndev);
729 tmp = iboe_get_mtu(ndev->mtu);
730 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
732 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
733 IB_PORT_ACTIVE : IB_PORT_DOWN;
734 props->phys_state = state_to_phys_state(props->state);
736 spin_unlock_bh(&iboe->lock);
738 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
742 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
743 struct ib_port_attr *props, int netw_view)
747 /* props being zeroed by the caller, avoid zeroing it here */
749 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
750 ib_link_query_port(ibdev, port, props, netw_view) :
751 eth_link_query_port(ibdev, port, props);
756 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
757 struct ib_port_attr *props)
759 /* returns host view */
760 return __mlx4_ib_query_port(ibdev, port, props, 0);
763 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
764 union ib_gid *gid, int netw_view)
766 struct ib_smp *in_mad = NULL;
767 struct ib_smp *out_mad = NULL;
769 struct mlx4_ib_dev *dev = to_mdev(ibdev);
771 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
773 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
774 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
775 if (!in_mad || !out_mad)
778 init_query_mad(in_mad);
779 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
780 in_mad->attr_mod = cpu_to_be32(port);
782 if (mlx4_is_mfunc(dev->dev) && netw_view)
783 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
785 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
789 memcpy(gid->raw, out_mad->data + 8, 8);
791 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
793 /* For any index > 0, return the null guid */
800 init_query_mad(in_mad);
801 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
802 in_mad->attr_mod = cpu_to_be32(index / 8);
804 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
805 NULL, NULL, in_mad, out_mad);
809 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
813 memset(gid->raw + 8, 0, 8);
819 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
824 if (rdma_protocol_ib(ibdev, port))
825 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
827 if (!rdma_protocol_roce(ibdev, port))
830 if (!rdma_cap_roce_gid_table(ibdev, port))
833 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
834 if (ret == -EAGAIN) {
835 memcpy(gid, &zgid, sizeof(*gid));
842 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
844 union sl2vl_tbl_to_u64 sl2vl64;
845 struct ib_smp *in_mad = NULL;
846 struct ib_smp *out_mad = NULL;
847 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
851 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
856 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
857 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
858 if (!in_mad || !out_mad)
861 init_query_mad(in_mad);
862 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
863 in_mad->attr_mod = 0;
865 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
866 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
868 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
873 for (jj = 0; jj < 8; jj++)
874 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
875 *sl2vl_tbl = sl2vl64.sl64;
883 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
889 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
890 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
892 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
894 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
898 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
902 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
903 u16 *pkey, int netw_view)
905 struct ib_smp *in_mad = NULL;
906 struct ib_smp *out_mad = NULL;
907 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
910 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
911 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
912 if (!in_mad || !out_mad)
915 init_query_mad(in_mad);
916 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
917 in_mad->attr_mod = cpu_to_be32(index / 32);
919 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
920 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
922 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
927 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
935 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
937 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
940 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
941 struct ib_device_modify *props)
943 struct mlx4_cmd_mailbox *mailbox;
946 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
949 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
952 if (mlx4_is_slave(to_mdev(ibdev)->dev))
955 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
956 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
957 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
960 * If possible, pass node desc to FW, so it can generate
961 * a 144 trap. If cmd fails, just ignore.
963 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
967 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
968 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
969 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
971 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
976 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
979 struct mlx4_cmd_mailbox *mailbox;
982 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
984 return PTR_ERR(mailbox);
986 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
987 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
988 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
990 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
991 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
994 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
995 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
998 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1002 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1003 struct ib_port_modify *props)
1005 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1006 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1007 struct ib_port_attr attr;
1011 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1012 * of whether port link layer is ETH or IB. For ETH ports, qkey
1013 * violations and port capabilities are not meaningful.
1018 mutex_lock(&mdev->cap_mask_mutex);
1020 err = ib_query_port(ibdev, port, &attr);
1024 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1025 ~props->clr_port_cap_mask;
1027 err = mlx4_ib_SET_PORT(mdev, port,
1028 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1032 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1036 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1037 struct ib_udata *udata)
1039 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1040 struct mlx4_ib_ucontext *context;
1041 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1042 struct mlx4_ib_alloc_ucontext_resp resp;
1045 if (!dev->ib_active)
1046 return ERR_PTR(-EAGAIN);
1048 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1049 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1050 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1051 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1053 resp.dev_caps = dev->dev->caps.userspace_caps;
1054 resp.qp_tab_size = dev->dev->caps.num_qps;
1055 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1056 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1057 resp.cqe_size = dev->dev->caps.cqe_size;
1060 context = kzalloc(sizeof(*context), GFP_KERNEL);
1062 return ERR_PTR(-ENOMEM);
1064 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1067 return ERR_PTR(err);
1070 INIT_LIST_HEAD(&context->db_page_list);
1071 mutex_init(&context->db_page_mutex);
1073 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1074 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1076 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1079 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1081 return ERR_PTR(-EFAULT);
1084 return &context->ibucontext;
1087 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1089 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1091 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1097 static void mlx4_ib_vma_open(struct vm_area_struct *area)
1099 /* vma_open is called when a new VMA is created on top of our VMA.
1100 * This is done through either mremap flow or split_vma (usually due
1101 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1102 * vma, as this VMA is strongly hardware related. Therefore we set the
1103 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1104 * calling us again and trying to do incorrect actions. We assume that
1105 * the original vma size is exactly a single page that there will be no
1106 * "splitting" operations on.
1108 area->vm_ops = NULL;
1111 static void mlx4_ib_vma_close(struct vm_area_struct *area)
1113 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1115 /* It's guaranteed that all VMAs opened on a FD are closed before the
1116 * file itself is closed, therefore no sync is needed with the regular
1117 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1118 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1119 * The close operation is usually called under mm->mmap_sem except when
1120 * process is exiting. The exiting case is handled explicitly as part
1121 * of mlx4_ib_disassociate_ucontext.
1123 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1124 area->vm_private_data;
1126 /* set the vma context pointer to null in the mlx4_ib driver's private
1127 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1129 mlx4_ib_vma_priv_data->vma = NULL;
1132 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1133 .open = mlx4_ib_vma_open,
1134 .close = mlx4_ib_vma_close
1137 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1141 struct vm_area_struct *vma;
1142 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1143 struct task_struct *owning_process = NULL;
1144 struct mm_struct *owning_mm = NULL;
1146 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID);
1147 if (!owning_process)
1150 owning_mm = get_task_mm(owning_process);
1152 pr_info("no mm, disassociate ucontext is pending task termination\n");
1154 /* make sure that task is dead before returning, it may
1155 * prevent a rare case of module down in parallel to a
1156 * call to mlx4_ib_vma_close.
1158 put_task_struct(owning_process);
1160 owning_process = get_pid_task(ibcontext->tgid,
1162 if (!owning_process ||
1163 owning_process->state == TASK_DEAD) {
1164 pr_info("disassociate ucontext done, task was terminated\n");
1165 /* in case task was dead need to release the task struct */
1167 put_task_struct(owning_process);
1173 /* need to protect from a race on closing the vma as part of
1174 * mlx4_ib_vma_close().
1176 down_read(&owning_mm->mmap_sem);
1177 for (i = 0; i < HW_BAR_COUNT; i++) {
1178 vma = context->hw_bar_info[i].vma;
1182 ret = zap_vma_ptes(context->hw_bar_info[i].vma,
1183 context->hw_bar_info[i].vma->vm_start,
1186 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret);
1190 /* context going to be destroyed, should not access ops any more */
1191 context->hw_bar_info[i].vma->vm_ops = NULL;
1194 up_read(&owning_mm->mmap_sem);
1196 put_task_struct(owning_process);
1199 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1200 struct mlx4_ib_vma_private_data *vma_private_data)
1202 vma_private_data->vma = vma;
1203 vma->vm_private_data = vma_private_data;
1204 vma->vm_ops = &mlx4_ib_vm_ops;
1207 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1209 struct mlx4_ib_dev *dev = to_mdev(context->device);
1210 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1212 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1215 if (vma->vm_pgoff == 0) {
1216 /* We prevent double mmaping on same context */
1217 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1220 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1222 if (io_remap_pfn_range(vma, vma->vm_start,
1223 to_mucontext(context)->uar.pfn,
1224 PAGE_SIZE, vma->vm_page_prot))
1227 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1229 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1230 /* We prevent double mmaping on same context */
1231 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1234 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1236 if (io_remap_pfn_range(vma, vma->vm_start,
1237 to_mucontext(context)->uar.pfn +
1238 dev->dev->caps.num_uars,
1239 PAGE_SIZE, vma->vm_page_prot))
1242 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1244 } else if (vma->vm_pgoff == 3) {
1245 struct mlx4_clock_params params;
1248 /* We prevent double mmaping on same context */
1249 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1252 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1257 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1258 if (io_remap_pfn_range(vma, vma->vm_start,
1259 (pci_resource_start(dev->dev->persist->pdev,
1263 PAGE_SIZE, vma->vm_page_prot))
1266 mlx4_ib_set_vma_data(vma,
1267 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1275 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1276 struct ib_ucontext *context,
1277 struct ib_udata *udata)
1279 struct mlx4_ib_pd *pd;
1282 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1284 return ERR_PTR(-ENOMEM);
1286 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1289 return ERR_PTR(err);
1293 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1294 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1296 return ERR_PTR(-EFAULT);
1302 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1304 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1310 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1311 struct ib_ucontext *context,
1312 struct ib_udata *udata)
1314 struct mlx4_ib_xrcd *xrcd;
1315 struct ib_cq_init_attr cq_attr = {};
1318 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1319 return ERR_PTR(-ENOSYS);
1321 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1323 return ERR_PTR(-ENOMEM);
1325 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1329 xrcd->pd = ib_alloc_pd(ibdev, 0);
1330 if (IS_ERR(xrcd->pd)) {
1331 err = PTR_ERR(xrcd->pd);
1336 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1337 if (IS_ERR(xrcd->cq)) {
1338 err = PTR_ERR(xrcd->cq);
1342 return &xrcd->ibxrcd;
1345 ib_dealloc_pd(xrcd->pd);
1347 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1350 return ERR_PTR(err);
1353 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1355 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1356 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1357 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1363 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1365 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1366 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1367 struct mlx4_ib_gid_entry *ge;
1369 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1374 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1375 ge->port = mqp->port;
1379 mutex_lock(&mqp->mutex);
1380 list_add_tail(&ge->list, &mqp->gid_list);
1381 mutex_unlock(&mqp->mutex);
1386 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1387 struct mlx4_ib_counters *ctr_table)
1389 struct counter_index *counter, *tmp_count;
1391 mutex_lock(&ctr_table->mutex);
1392 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1394 if (counter->allocated)
1395 mlx4_counter_free(ibdev->dev, counter->index);
1396 list_del(&counter->list);
1399 mutex_unlock(&ctr_table->mutex);
1402 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1405 struct net_device *ndev;
1411 spin_lock_bh(&mdev->iboe.lock);
1412 ndev = mdev->iboe.netdevs[mqp->port - 1];
1415 spin_unlock_bh(&mdev->iboe.lock);
1425 struct mlx4_ib_steering {
1426 struct list_head list;
1427 struct mlx4_flow_reg_id reg_id;
1431 #define LAST_ETH_FIELD vlan_tag
1432 #define LAST_IB_FIELD sl
1433 #define LAST_IPV4_FIELD dst_ip
1434 #define LAST_TCP_UDP_FIELD src_port
1436 /* Field is the last supported field */
1437 #define FIELDS_NOT_SUPPORTED(filter, field)\
1438 memchr_inv((void *)&filter.field +\
1439 sizeof(filter.field), 0,\
1441 offsetof(typeof(filter), field) -\
1442 sizeof(filter.field))
1444 static int parse_flow_attr(struct mlx4_dev *dev,
1446 union ib_flow_spec *ib_spec,
1447 struct _rule_hw *mlx4_spec)
1449 enum mlx4_net_trans_rule_id type;
1451 switch (ib_spec->type) {
1452 case IB_FLOW_SPEC_ETH:
1453 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1456 type = MLX4_NET_TRANS_RULE_ID_ETH;
1457 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1459 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1461 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1462 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1464 case IB_FLOW_SPEC_IB:
1465 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1468 type = MLX4_NET_TRANS_RULE_ID_IB;
1469 mlx4_spec->ib.l3_qpn =
1470 cpu_to_be32(qp_num);
1471 mlx4_spec->ib.qpn_mask =
1472 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1476 case IB_FLOW_SPEC_IPV4:
1477 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1480 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1481 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1482 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1483 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1484 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1487 case IB_FLOW_SPEC_TCP:
1488 case IB_FLOW_SPEC_UDP:
1489 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1492 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1493 MLX4_NET_TRANS_RULE_ID_TCP :
1494 MLX4_NET_TRANS_RULE_ID_UDP;
1495 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1496 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1497 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1498 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1504 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1505 mlx4_hw_rule_sz(dev, type) < 0)
1507 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1508 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1509 return mlx4_hw_rule_sz(dev, type);
1512 struct default_rules {
1513 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1514 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1515 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1518 static const struct default_rules default_table[] = {
1520 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1521 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1522 .rules_create_list = {IB_FLOW_SPEC_IB},
1523 .link_layer = IB_LINK_LAYER_INFINIBAND
1527 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1528 struct ib_flow_attr *flow_attr)
1532 const struct default_rules *pdefault_rules = default_table;
1533 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1535 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1536 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1537 memset(&field_types, 0, sizeof(field_types));
1539 if (link_layer != pdefault_rules->link_layer)
1542 ib_flow = flow_attr + 1;
1543 /* we assume the specs are sorted */
1544 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1545 j < flow_attr->num_of_specs; k++) {
1546 union ib_flow_spec *current_flow =
1547 (union ib_flow_spec *)ib_flow;
1549 /* same layer but different type */
1550 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1551 (pdefault_rules->mandatory_fields[k] &
1552 IB_FLOW_SPEC_LAYER_MASK)) &&
1553 (current_flow->type !=
1554 pdefault_rules->mandatory_fields[k]))
1557 /* same layer, try match next one */
1558 if (current_flow->type ==
1559 pdefault_rules->mandatory_fields[k]) {
1562 ((union ib_flow_spec *)ib_flow)->size;
1566 ib_flow = flow_attr + 1;
1567 for (j = 0; j < flow_attr->num_of_specs;
1568 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1569 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1570 /* same layer and same type */
1571 if (((union ib_flow_spec *)ib_flow)->type ==
1572 pdefault_rules->mandatory_not_fields[k])
1581 static int __mlx4_ib_create_default_rules(
1582 struct mlx4_ib_dev *mdev,
1584 const struct default_rules *pdefault_rules,
1585 struct _rule_hw *mlx4_spec) {
1589 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1591 union ib_flow_spec ib_spec;
1592 switch (pdefault_rules->rules_create_list[i]) {
1596 case IB_FLOW_SPEC_IB:
1597 ib_spec.type = IB_FLOW_SPEC_IB;
1598 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1605 /* We must put empty rule, qpn is being ignored */
1606 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1609 pr_info("invalid parsing\n");
1613 mlx4_spec = (void *)mlx4_spec + ret;
1619 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1621 enum mlx4_net_trans_promisc_mode flow_type,
1627 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1628 struct mlx4_cmd_mailbox *mailbox;
1629 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1632 static const u16 __mlx4_domain[] = {
1633 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1634 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1635 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1636 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1639 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1640 pr_err("Invalid priority value %d\n", flow_attr->priority);
1644 if (domain >= IB_FLOW_DOMAIN_NUM) {
1645 pr_err("Invalid domain value %d\n", domain);
1649 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1652 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1653 if (IS_ERR(mailbox))
1654 return PTR_ERR(mailbox);
1655 ctrl = mailbox->buf;
1657 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1658 flow_attr->priority);
1659 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1660 ctrl->port = flow_attr->port;
1661 ctrl->qpn = cpu_to_be32(qp->qp_num);
1663 ib_flow = flow_attr + 1;
1664 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1665 /* Add default flows */
1666 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1667 if (default_flow >= 0) {
1668 ret = __mlx4_ib_create_default_rules(
1669 mdev, qp, default_table + default_flow,
1670 mailbox->buf + size);
1672 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1677 for (i = 0; i < flow_attr->num_of_specs; i++) {
1678 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1679 mailbox->buf + size);
1681 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1684 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1688 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1689 flow_attr->num_of_specs == 1) {
1690 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1691 enum ib_flow_spec_type header_spec =
1692 ((union ib_flow_spec *)(flow_attr + 1))->type;
1694 if (header_spec == IB_FLOW_SPEC_ETH)
1695 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1698 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1699 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1702 pr_err("mcg table is full. Fail to register network rule.\n");
1703 else if (ret == -ENXIO)
1704 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1706 pr_err("Invalid argument. Fail to register network rule.\n");
1708 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1712 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1715 err = mlx4_cmd(dev, reg_id, 0, 0,
1716 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1719 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1724 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1728 union ib_flow_spec *ib_spec;
1729 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1732 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1733 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1734 return 0; /* do nothing */
1736 ib_flow = flow_attr + 1;
1737 ib_spec = (union ib_flow_spec *)ib_flow;
1739 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1740 return 0; /* do nothing */
1742 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1743 flow_attr->port, qp->qp_num,
1744 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1749 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1750 struct ib_flow_attr *flow_attr,
1751 enum mlx4_net_trans_promisc_mode *type)
1755 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1756 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1757 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1761 if (flow_attr->num_of_specs == 0) {
1762 type[0] = MLX4_FS_MC_SNIFFER;
1763 type[1] = MLX4_FS_UC_SNIFFER;
1765 union ib_flow_spec *ib_spec;
1767 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1768 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1771 /* if all is zero than MC and UC */
1772 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1773 type[0] = MLX4_FS_MC_SNIFFER;
1774 type[1] = MLX4_FS_UC_SNIFFER;
1776 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1777 ib_spec->eth.mask.dst_mac[1],
1778 ib_spec->eth.mask.dst_mac[2],
1779 ib_spec->eth.mask.dst_mac[3],
1780 ib_spec->eth.mask.dst_mac[4],
1781 ib_spec->eth.mask.dst_mac[5]};
1783 /* Above xor was only on MC bit, non empty mask is valid
1784 * only if this bit is set and rest are zero.
1786 if (!is_zero_ether_addr(&mac[0]))
1789 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1790 type[0] = MLX4_FS_MC_SNIFFER;
1792 type[0] = MLX4_FS_UC_SNIFFER;
1799 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1800 struct ib_flow_attr *flow_attr,
1803 int err = 0, i = 0, j = 0;
1804 struct mlx4_ib_flow *mflow;
1805 enum mlx4_net_trans_promisc_mode type[2];
1806 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1807 int is_bonded = mlx4_is_bonded(dev);
1809 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1810 return ERR_PTR(-EINVAL);
1812 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1813 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1814 return ERR_PTR(-EOPNOTSUPP);
1816 memset(type, 0, sizeof(type));
1818 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1824 switch (flow_attr->type) {
1825 case IB_FLOW_ATTR_NORMAL:
1826 /* If dont trap flag (continue match) is set, under specific
1827 * condition traffic be replicated to given qp,
1828 * without stealing it
1830 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1831 err = mlx4_ib_add_dont_trap_rule(dev,
1837 type[0] = MLX4_FS_REGULAR;
1841 case IB_FLOW_ATTR_ALL_DEFAULT:
1842 type[0] = MLX4_FS_ALL_DEFAULT;
1845 case IB_FLOW_ATTR_MC_DEFAULT:
1846 type[0] = MLX4_FS_MC_DEFAULT;
1849 case IB_FLOW_ATTR_SNIFFER:
1850 type[0] = MLX4_FS_MIRROR_RX_PORT;
1851 type[1] = MLX4_FS_MIRROR_SX_PORT;
1859 while (i < ARRAY_SIZE(type) && type[i]) {
1860 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1861 &mflow->reg_id[i].id);
1863 goto err_create_flow;
1865 /* Application always sees one port so the mirror rule
1866 * must be on port #2
1868 flow_attr->port = 2;
1869 err = __mlx4_ib_create_flow(qp, flow_attr,
1871 &mflow->reg_id[j].mirror);
1872 flow_attr->port = 1;
1874 goto err_create_flow;
1881 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1882 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1883 &mflow->reg_id[i].id);
1885 goto err_create_flow;
1888 flow_attr->port = 2;
1889 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1890 &mflow->reg_id[j].mirror);
1891 flow_attr->port = 1;
1893 goto err_create_flow;
1896 /* function to create mirror rule */
1900 return &mflow->ibflow;
1904 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1905 mflow->reg_id[i].id);
1910 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1911 mflow->reg_id[j].mirror);
1916 return ERR_PTR(err);
1919 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1923 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1924 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1926 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1927 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1930 if (mflow->reg_id[i].mirror) {
1931 err = __mlx4_ib_destroy_flow(mdev->dev,
1932 mflow->reg_id[i].mirror);
1943 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1946 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1947 struct mlx4_dev *dev = mdev->dev;
1948 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1949 struct mlx4_ib_steering *ib_steering = NULL;
1950 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1951 struct mlx4_flow_reg_id reg_id;
1953 if (mdev->dev->caps.steering_mode ==
1954 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1955 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1960 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1962 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1965 pr_err("multicast attach op failed, err %d\n", err);
1970 if (mlx4_is_bonded(dev)) {
1971 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1972 (mqp->port == 1) ? 2 : 1,
1974 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1975 prot, ®_id.mirror);
1980 err = add_gid_entry(ibqp, gid);
1985 memcpy(ib_steering->gid.raw, gid->raw, 16);
1986 ib_steering->reg_id = reg_id;
1987 mutex_lock(&mqp->mutex);
1988 list_add(&ib_steering->list, &mqp->steering_rules);
1989 mutex_unlock(&mqp->mutex);
1994 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1997 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1998 prot, reg_id.mirror);
2005 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
2007 struct mlx4_ib_gid_entry *ge;
2008 struct mlx4_ib_gid_entry *tmp;
2009 struct mlx4_ib_gid_entry *ret = NULL;
2011 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
2012 if (!memcmp(raw, ge->gid.raw, 16)) {
2021 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
2024 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
2025 struct mlx4_dev *dev = mdev->dev;
2026 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
2027 struct net_device *ndev;
2028 struct mlx4_ib_gid_entry *ge;
2029 struct mlx4_flow_reg_id reg_id = {0, 0};
2030 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
2032 if (mdev->dev->caps.steering_mode ==
2033 MLX4_STEERING_MODE_DEVICE_MANAGED) {
2034 struct mlx4_ib_steering *ib_steering;
2036 mutex_lock(&mqp->mutex);
2037 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
2038 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
2039 list_del(&ib_steering->list);
2043 mutex_unlock(&mqp->mutex);
2044 if (&ib_steering->list == &mqp->steering_rules) {
2045 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
2048 reg_id = ib_steering->reg_id;
2052 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2057 if (mlx4_is_bonded(dev)) {
2058 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2059 prot, reg_id.mirror);
2064 mutex_lock(&mqp->mutex);
2065 ge = find_gid_entry(mqp, gid->raw);
2067 spin_lock_bh(&mdev->iboe.lock);
2068 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2071 spin_unlock_bh(&mdev->iboe.lock);
2074 list_del(&ge->list);
2077 pr_warn("could not find mgid entry\n");
2079 mutex_unlock(&mqp->mutex);
2084 static int init_node_data(struct mlx4_ib_dev *dev)
2086 struct ib_smp *in_mad = NULL;
2087 struct ib_smp *out_mad = NULL;
2088 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2091 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2092 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2093 if (!in_mad || !out_mad)
2096 init_query_mad(in_mad);
2097 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2098 if (mlx4_is_master(dev->dev))
2099 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2101 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2105 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2107 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2109 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2113 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2114 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2122 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2125 struct mlx4_ib_dev *dev =
2126 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2127 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2130 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2133 struct mlx4_ib_dev *dev =
2134 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2135 return sprintf(buf, "%x\n", dev->dev->rev_id);
2138 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2141 struct mlx4_ib_dev *dev =
2142 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2143 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2144 dev->dev->board_id);
2147 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
2148 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
2149 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
2151 static struct device_attribute *mlx4_class_attributes[] = {
2157 struct diag_counter {
2162 #define DIAG_COUNTER(_name, _offset) \
2163 { .name = #_name, .offset = _offset }
2165 static const struct diag_counter diag_basic[] = {
2166 DIAG_COUNTER(rq_num_lle, 0x00),
2167 DIAG_COUNTER(sq_num_lle, 0x04),
2168 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2169 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2170 DIAG_COUNTER(rq_num_lpe, 0x18),
2171 DIAG_COUNTER(sq_num_lpe, 0x1C),
2172 DIAG_COUNTER(rq_num_wrfe, 0x20),
2173 DIAG_COUNTER(sq_num_wrfe, 0x24),
2174 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2175 DIAG_COUNTER(sq_num_bre, 0x34),
2176 DIAG_COUNTER(sq_num_rire, 0x44),
2177 DIAG_COUNTER(rq_num_rire, 0x48),
2178 DIAG_COUNTER(sq_num_rae, 0x4C),
2179 DIAG_COUNTER(rq_num_rae, 0x50),
2180 DIAG_COUNTER(sq_num_roe, 0x54),
2181 DIAG_COUNTER(sq_num_tree, 0x5C),
2182 DIAG_COUNTER(sq_num_rree, 0x64),
2183 DIAG_COUNTER(rq_num_rnr, 0x68),
2184 DIAG_COUNTER(sq_num_rnr, 0x6C),
2185 DIAG_COUNTER(rq_num_oos, 0x100),
2186 DIAG_COUNTER(sq_num_oos, 0x104),
2189 static const struct diag_counter diag_ext[] = {
2190 DIAG_COUNTER(rq_num_dup, 0x130),
2191 DIAG_COUNTER(sq_num_to, 0x134),
2194 static const struct diag_counter diag_device_only[] = {
2195 DIAG_COUNTER(num_cqovf, 0x1A0),
2196 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2199 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2202 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2203 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2205 if (!diag[!!port_num].name)
2208 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2209 diag[!!port_num].num_counters,
2210 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2213 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2214 struct rdma_hw_stats *stats,
2217 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2218 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2219 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2220 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2224 ret = mlx4_query_diag_counters(dev->dev,
2225 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2226 diag[!!port].offset, hw_value,
2227 diag[!!port].num_counters, port);
2232 for (i = 0; i < diag[!!port].num_counters; i++)
2233 stats->value[i] = hw_value[i];
2235 return diag[!!port].num_counters;
2238 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2246 num_counters = ARRAY_SIZE(diag_basic);
2248 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2249 num_counters += ARRAY_SIZE(diag_ext);
2252 num_counters += ARRAY_SIZE(diag_device_only);
2254 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2258 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2262 *num = num_counters;
2271 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2279 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2280 name[i] = diag_basic[i].name;
2281 offset[i] = diag_basic[i].offset;
2284 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2285 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2286 name[j] = diag_ext[i].name;
2287 offset[j] = diag_ext[i].offset;
2292 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2293 name[j] = diag_device_only[i].name;
2294 offset[j] = diag_device_only[i].offset;
2299 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2301 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2304 bool per_port = !!(ibdev->dev->caps.flags2 &
2305 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2307 if (mlx4_is_slave(ibdev->dev))
2310 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2311 /* i == 1 means we are building port counters */
2315 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2317 &diag[i].num_counters, i);
2321 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2325 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2326 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2332 kfree(diag[i - 1].name);
2333 kfree(diag[i - 1].offset);
2339 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2343 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2344 kfree(ibdev->diag_counters[i].offset);
2345 kfree(ibdev->diag_counters[i].name);
2349 #define MLX4_IB_INVALID_MAC ((u64)-1)
2350 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2351 struct net_device *dev,
2355 u64 release_mac = MLX4_IB_INVALID_MAC;
2356 struct mlx4_ib_qp *qp;
2358 read_lock(&dev_base_lock);
2359 new_smac = mlx4_mac_to_u64(dev->dev_addr);
2360 read_unlock(&dev_base_lock);
2362 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2364 /* no need for update QP1 and mac registration in non-SRIOV */
2365 if (!mlx4_is_mfunc(ibdev->dev))
2368 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2369 qp = ibdev->qp1_proxy[port - 1];
2373 struct mlx4_update_qp_params update_params;
2375 mutex_lock(&qp->mutex);
2376 old_smac = qp->pri.smac;
2377 if (new_smac == old_smac)
2380 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2382 if (new_smac_index < 0)
2385 update_params.smac_index = new_smac_index;
2386 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2388 release_mac = new_smac;
2391 /* if old port was zero, no mac was yet registered for this QP */
2392 if (qp->pri.smac_port)
2393 release_mac = old_smac;
2394 qp->pri.smac = new_smac;
2395 qp->pri.smac_port = port;
2396 qp->pri.smac_index = new_smac_index;
2400 if (release_mac != MLX4_IB_INVALID_MAC)
2401 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2403 mutex_unlock(&qp->mutex);
2404 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2407 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2408 struct net_device *dev,
2409 unsigned long event)
2412 struct mlx4_ib_iboe *iboe;
2413 int update_qps_port = -1;
2418 iboe = &ibdev->iboe;
2420 spin_lock_bh(&iboe->lock);
2421 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2423 iboe->netdevs[port - 1] =
2424 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2426 if (dev == iboe->netdevs[port - 1] &&
2427 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2428 event == NETDEV_UP || event == NETDEV_CHANGE))
2429 update_qps_port = port;
2432 spin_unlock_bh(&iboe->lock);
2434 if (update_qps_port > 0)
2435 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2438 static int mlx4_ib_netdev_event(struct notifier_block *this,
2439 unsigned long event, void *ptr)
2441 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2442 struct mlx4_ib_dev *ibdev;
2444 if (!net_eq(dev_net(dev), &init_net))
2447 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2448 mlx4_ib_scan_netdevs(ibdev, dev, event);
2453 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2459 if (mlx4_is_master(ibdev->dev)) {
2460 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2462 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2464 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2466 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2467 /* master has the identity virt2phys pkey mapping */
2468 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2469 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2470 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2471 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2475 /* initialize pkey cache */
2476 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2478 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2480 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2486 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2488 int i, j, eq = 0, total_eqs = 0;
2490 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2491 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2492 if (!ibdev->eq_table)
2495 for (i = 1; i <= dev->caps.num_ports; i++) {
2496 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2498 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2500 ibdev->eq_table[eq] = total_eqs;
2501 if (!mlx4_assign_eq(dev, i,
2502 &ibdev->eq_table[eq]))
2505 ibdev->eq_table[eq] = -1;
2509 for (i = eq; i < dev->caps.num_comp_vectors;
2510 ibdev->eq_table[i++] = -1)
2513 /* Advertise the new number of EQs to clients */
2514 ibdev->ib_dev.num_comp_vectors = eq;
2517 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2520 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2522 /* no eqs were allocated */
2523 if (!ibdev->eq_table)
2526 /* Reset the advertised EQ number */
2527 ibdev->ib_dev.num_comp_vectors = 0;
2529 for (i = 0; i < total_eqs; i++)
2530 mlx4_release_eq(dev, ibdev->eq_table[i]);
2532 kfree(ibdev->eq_table);
2533 ibdev->eq_table = NULL;
2536 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2537 struct ib_port_immutable *immutable)
2539 struct ib_port_attr attr;
2540 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2543 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2544 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2545 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2547 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2548 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2549 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2550 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2551 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2552 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET;
2553 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE |
2554 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP))
2555 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2558 err = ib_query_port(ibdev, port_num, &attr);
2562 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2563 immutable->gid_tbl_len = attr.gid_tbl_len;
2568 static void get_fw_ver_str(struct ib_device *device, char *str,
2571 struct mlx4_ib_dev *dev =
2572 container_of(device, struct mlx4_ib_dev, ib_dev);
2573 snprintf(str, str_len, "%d.%d.%d",
2574 (int) (dev->dev->caps.fw_ver >> 32),
2575 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2576 (int) dev->dev->caps.fw_ver & 0xffff);
2579 static void *mlx4_ib_add(struct mlx4_dev *dev)
2581 struct mlx4_ib_dev *ibdev;
2585 struct mlx4_ib_iboe *iboe;
2586 int ib_num_ports = 0;
2587 int num_req_counters;
2590 struct counter_index *new_counter_index = NULL;
2592 pr_info_once("%s", mlx4_ib_version);
2595 mlx4_foreach_ib_transport_port(i, dev)
2598 /* No point in registering a device with no ports... */
2602 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2604 dev_err(&dev->persist->pdev->dev,
2605 "Device struct alloc failed\n");
2609 iboe = &ibdev->iboe;
2611 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2614 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2617 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2619 if (!ibdev->uar_map)
2621 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2624 ibdev->bond_next_port = 0;
2626 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2627 ibdev->ib_dev.owner = THIS_MODULE;
2628 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2629 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2630 ibdev->num_ports = num_ports;
2631 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2632 1 : ibdev->num_ports;
2633 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2634 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2635 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2636 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2637 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2639 if (dev->caps.userspace_caps)
2640 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2642 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2644 ibdev->ib_dev.uverbs_cmd_mask =
2645 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2646 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2647 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2648 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2649 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2650 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2651 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2652 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2653 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2654 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2655 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2656 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2657 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2658 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2659 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2660 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2661 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2662 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2663 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2664 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2665 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2666 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2667 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2668 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2670 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2671 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2672 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2673 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2674 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2675 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2676 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2677 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2678 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2679 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2680 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2681 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2682 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2683 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2684 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2685 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2686 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2687 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2688 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2689 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2690 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2691 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2692 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2693 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2694 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2695 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2696 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2697 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2698 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2699 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2700 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2701 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2702 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2703 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2704 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2705 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2706 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2707 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2708 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2709 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2710 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2711 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2712 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2713 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext;
2715 if (!mlx4_is_slave(ibdev->dev)) {
2716 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2717 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2718 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2719 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2722 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2723 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2724 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2725 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2727 ibdev->ib_dev.uverbs_cmd_mask |=
2728 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2729 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2732 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2733 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2734 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2735 ibdev->ib_dev.uverbs_cmd_mask |=
2736 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2737 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2740 if (check_flow_steering_support(dev)) {
2741 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2742 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2743 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2745 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2746 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2747 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2750 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2751 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2752 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2753 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2755 mlx4_ib_alloc_eqs(dev, ibdev);
2757 spin_lock_init(&iboe->lock);
2759 if (init_node_data(ibdev))
2761 mlx4_init_sl2vl_tbl(ibdev);
2763 for (i = 0; i < ibdev->num_ports; ++i) {
2764 mutex_init(&ibdev->counters_table[i].mutex);
2765 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2768 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2769 for (i = 0; i < num_req_counters; ++i) {
2770 mutex_init(&ibdev->qp1_proxy_lock[i]);
2772 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2773 IB_LINK_LAYER_ETHERNET) {
2774 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2775 /* if failed to allocate a new counter, use default */
2778 mlx4_get_default_counter_index(dev,
2782 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2783 counter_index = mlx4_get_default_counter_index(dev,
2786 new_counter_index = kmalloc(sizeof(*new_counter_index),
2788 if (!new_counter_index) {
2790 mlx4_counter_free(ibdev->dev, counter_index);
2793 new_counter_index->index = counter_index;
2794 new_counter_index->allocated = allocated;
2795 list_add_tail(&new_counter_index->list,
2796 &ibdev->counters_table[i].counters_list);
2797 ibdev->counters_table[i].default_counter = counter_index;
2798 pr_info("counter index %d for port %d allocated %d\n",
2799 counter_index, i + 1, allocated);
2801 if (mlx4_is_bonded(dev))
2802 for (i = 1; i < ibdev->num_ports ; ++i) {
2804 kmalloc(sizeof(struct counter_index),
2806 if (!new_counter_index)
2808 new_counter_index->index = counter_index;
2809 new_counter_index->allocated = 0;
2810 list_add_tail(&new_counter_index->list,
2811 &ibdev->counters_table[i].counters_list);
2812 ibdev->counters_table[i].default_counter =
2816 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2819 spin_lock_init(&ibdev->sm_lock);
2820 mutex_init(&ibdev->cap_mask_mutex);
2821 INIT_LIST_HEAD(&ibdev->qp_list);
2822 spin_lock_init(&ibdev->reset_flow_resource_lock);
2824 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2826 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2827 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2828 MLX4_IB_UC_STEER_QPN_ALIGN,
2829 &ibdev->steer_qpn_base, 0);
2833 ibdev->ib_uc_qpns_bitmap =
2834 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2837 if (!ibdev->ib_uc_qpns_bitmap)
2838 goto err_steer_qp_release;
2840 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2841 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2842 ibdev->steer_qpn_count);
2843 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2844 dev, ibdev->steer_qpn_base,
2845 ibdev->steer_qpn_base +
2846 ibdev->steer_qpn_count - 1);
2848 goto err_steer_free_bitmap;
2850 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2851 ibdev->steer_qpn_count);
2855 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2856 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2858 if (mlx4_ib_alloc_diag_counters(ibdev))
2859 goto err_steer_free_bitmap;
2861 if (ib_register_device(&ibdev->ib_dev, NULL))
2862 goto err_diag_counters;
2864 if (mlx4_ib_mad_init(ibdev))
2867 if (mlx4_ib_init_sriov(ibdev))
2870 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2871 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2872 if (!iboe->nb.notifier_call) {
2873 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2874 err = register_netdevice_notifier(&iboe->nb);
2876 iboe->nb.notifier_call = NULL;
2880 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2881 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2888 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2889 if (device_create_file(&ibdev->ib_dev.dev,
2890 mlx4_class_attributes[j]))
2894 ibdev->ib_active = true;
2895 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2896 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2899 if (mlx4_is_mfunc(ibdev->dev))
2902 /* create paravirt contexts for any VFs which are active */
2903 if (mlx4_is_master(ibdev->dev)) {
2904 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2905 if (j == mlx4_master_func_num(ibdev->dev))
2907 if (mlx4_is_slave_active(ibdev->dev, j))
2908 do_slave_init(ibdev, j, 1);
2914 if (ibdev->iboe.nb.notifier_call) {
2915 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2916 pr_warn("failure unregistering notifier\n");
2917 ibdev->iboe.nb.notifier_call = NULL;
2919 flush_workqueue(wq);
2921 mlx4_ib_close_sriov(ibdev);
2924 mlx4_ib_mad_cleanup(ibdev);
2927 ib_unregister_device(&ibdev->ib_dev);
2930 mlx4_ib_diag_cleanup(ibdev);
2932 err_steer_free_bitmap:
2933 kfree(ibdev->ib_uc_qpns_bitmap);
2935 err_steer_qp_release:
2936 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2937 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2938 ibdev->steer_qpn_count);
2940 for (i = 0; i < ibdev->num_ports; ++i)
2941 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2944 iounmap(ibdev->uar_map);
2947 mlx4_uar_free(dev, &ibdev->priv_uar);
2950 mlx4_pd_free(dev, ibdev->priv_pdn);
2953 ib_dealloc_device(&ibdev->ib_dev);
2958 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2962 WARN_ON(!dev->ib_uc_qpns_bitmap);
2964 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2965 dev->steer_qpn_count,
2966 get_count_order(count));
2970 *qpn = dev->steer_qpn_base + offset;
2974 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2977 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2980 BUG_ON(qpn < dev->steer_qpn_base);
2982 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2983 qpn - dev->steer_qpn_base,
2984 get_count_order(count));
2987 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2992 struct ib_flow_attr *flow = NULL;
2993 struct ib_flow_spec_ib *ib_spec;
2996 flow_size = sizeof(struct ib_flow_attr) +
2997 sizeof(struct ib_flow_spec_ib);
2998 flow = kzalloc(flow_size, GFP_KERNEL);
3001 flow->port = mqp->port;
3002 flow->num_of_specs = 1;
3003 flow->size = flow_size;
3004 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
3005 ib_spec->type = IB_FLOW_SPEC_IB;
3006 ib_spec->size = sizeof(struct ib_flow_spec_ib);
3007 /* Add an empty rule for IB L2 */
3008 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
3010 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
3015 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
3021 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
3023 struct mlx4_ib_dev *ibdev = ibdev_ptr;
3027 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
3028 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
3029 ibdev->ib_active = false;
3030 flush_workqueue(wq);
3032 mlx4_ib_close_sriov(ibdev);
3033 mlx4_ib_mad_cleanup(ibdev);
3034 ib_unregister_device(&ibdev->ib_dev);
3035 mlx4_ib_diag_cleanup(ibdev);
3036 if (ibdev->iboe.nb.notifier_call) {
3037 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
3038 pr_warn("failure unregistering notifier\n");
3039 ibdev->iboe.nb.notifier_call = NULL;
3042 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
3043 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
3044 ibdev->steer_qpn_count);
3045 kfree(ibdev->ib_uc_qpns_bitmap);
3048 iounmap(ibdev->uar_map);
3049 for (p = 0; p < ibdev->num_ports; ++p)
3050 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
3052 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3053 mlx4_CLOSE_PORT(dev, p);
3055 mlx4_ib_free_eqs(dev, ibdev);
3057 mlx4_uar_free(dev, &ibdev->priv_uar);
3058 mlx4_pd_free(dev, ibdev->priv_pdn);
3059 ib_dealloc_device(&ibdev->ib_dev);
3062 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3064 struct mlx4_ib_demux_work **dm = NULL;
3065 struct mlx4_dev *dev = ibdev->dev;
3067 unsigned long flags;
3068 struct mlx4_active_ports actv_ports;
3070 unsigned int first_port;
3072 if (!mlx4_is_master(dev))
3075 actv_ports = mlx4_get_active_ports(dev, slave);
3076 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3077 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3079 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3083 for (i = 0; i < ports; i++) {
3084 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3090 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3091 dm[i]->port = first_port + i + 1;
3092 dm[i]->slave = slave;
3093 dm[i]->do_init = do_init;
3096 /* initialize or tear down tunnel QPs for the slave */
3097 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3098 if (!ibdev->sriov.is_going_down) {
3099 for (i = 0; i < ports; i++)
3100 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3101 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3103 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3104 for (i = 0; i < ports; i++)
3112 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3114 struct mlx4_ib_qp *mqp;
3115 unsigned long flags_qp;
3116 unsigned long flags_cq;
3117 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3118 struct list_head cq_notify_list;
3119 struct mlx4_cq *mcq;
3120 unsigned long flags;
3122 pr_warn("mlx4_ib_handle_catas_error was started\n");
3123 INIT_LIST_HEAD(&cq_notify_list);
3125 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3126 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3128 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3129 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3130 if (mqp->sq.tail != mqp->sq.head) {
3131 send_mcq = to_mcq(mqp->ibqp.send_cq);
3132 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3133 if (send_mcq->mcq.comp &&
3134 mqp->ibqp.send_cq->comp_handler) {
3135 if (!send_mcq->mcq.reset_notify_added) {
3136 send_mcq->mcq.reset_notify_added = 1;
3137 list_add_tail(&send_mcq->mcq.reset_notify,
3141 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3143 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3144 /* Now, handle the QP's receive queue */
3145 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3146 /* no handling is needed for SRQ */
3147 if (!mqp->ibqp.srq) {
3148 if (mqp->rq.tail != mqp->rq.head) {
3149 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3150 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3151 if (recv_mcq->mcq.comp &&
3152 mqp->ibqp.recv_cq->comp_handler) {
3153 if (!recv_mcq->mcq.reset_notify_added) {
3154 recv_mcq->mcq.reset_notify_added = 1;
3155 list_add_tail(&recv_mcq->mcq.reset_notify,
3159 spin_unlock_irqrestore(&recv_mcq->lock,
3163 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3166 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3169 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3170 pr_warn("mlx4_ib_handle_catas_error ended\n");
3173 static void handle_bonded_port_state_event(struct work_struct *work)
3175 struct ib_event_work *ew =
3176 container_of(work, struct ib_event_work, work);
3177 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3178 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3180 struct ib_event ibev;
3183 spin_lock_bh(&ibdev->iboe.lock);
3184 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3185 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3186 enum ib_port_state curr_port_state;
3192 (netif_running(curr_netdev) &&
3193 netif_carrier_ok(curr_netdev)) ?
3194 IB_PORT_ACTIVE : IB_PORT_DOWN;
3196 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3197 curr_port_state : IB_PORT_ACTIVE;
3199 spin_unlock_bh(&ibdev->iboe.lock);
3201 ibev.device = &ibdev->ib_dev;
3202 ibev.element.port_num = 1;
3203 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3204 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3206 ib_dispatch_event(&ibev);
3209 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3214 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3216 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3220 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3223 static void ib_sl2vl_update_work(struct work_struct *work)
3225 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3226 struct mlx4_ib_dev *mdev = ew->ib_dev;
3227 int port = ew->port;
3229 mlx4_ib_sl2vl_update(mdev, port);
3234 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3237 struct ib_event_work *ew;
3239 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3241 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3244 queue_work(wq, &ew->work);
3248 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3249 enum mlx4_dev_event event, unsigned long param)
3251 struct ib_event ibev;
3252 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3253 struct mlx4_eqe *eqe = NULL;
3254 struct ib_event_work *ew;
3257 if (mlx4_is_bonded(dev) &&
3258 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3259 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3260 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3263 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3265 queue_work(wq, &ew->work);
3269 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3270 eqe = (struct mlx4_eqe *)param;
3275 case MLX4_DEV_EVENT_PORT_UP:
3276 if (p > ibdev->num_ports)
3278 if (!mlx4_is_slave(dev) &&
3279 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3280 IB_LINK_LAYER_INFINIBAND) {
3281 if (mlx4_is_master(dev))
3282 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3283 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3284 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3285 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3287 ibev.event = IB_EVENT_PORT_ACTIVE;
3290 case MLX4_DEV_EVENT_PORT_DOWN:
3291 if (p > ibdev->num_ports)
3293 ibev.event = IB_EVENT_PORT_ERR;
3296 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3297 ibdev->ib_active = false;
3298 ibev.event = IB_EVENT_DEVICE_FATAL;
3299 mlx4_ib_handle_catas_error(ibdev);
3302 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3303 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3307 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3308 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3310 /* need to queue only for port owner, which uses GEN_EQE */
3311 if (mlx4_is_master(dev))
3312 queue_work(wq, &ew->work);
3314 handle_port_mgmt_change_event(&ew->work);
3317 case MLX4_DEV_EVENT_SLAVE_INIT:
3318 /* here, p is the slave id */
3319 do_slave_init(ibdev, p, 1);
3320 if (mlx4_is_master(dev)) {
3323 for (i = 1; i <= ibdev->num_ports; i++) {
3324 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3325 == IB_LINK_LAYER_INFINIBAND)
3326 mlx4_ib_slave_alias_guid_event(ibdev,
3333 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3334 if (mlx4_is_master(dev)) {
3337 for (i = 1; i <= ibdev->num_ports; i++) {
3338 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3339 == IB_LINK_LAYER_INFINIBAND)
3340 mlx4_ib_slave_alias_guid_event(ibdev,
3345 /* here, p is the slave id */
3346 do_slave_init(ibdev, p, 0);
3353 ibev.device = ibdev_ptr;
3354 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3356 ib_dispatch_event(&ibev);
3359 static struct mlx4_interface mlx4_ib_interface = {
3361 .remove = mlx4_ib_remove,
3362 .event = mlx4_ib_event,
3363 .protocol = MLX4_PROT_IB_IPV6,
3364 .flags = MLX4_INTFF_BONDING
3367 static int __init mlx4_ib_init(void)
3371 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3375 err = mlx4_ib_mcg_init();
3379 err = mlx4_register_interface(&mlx4_ib_interface);
3386 mlx4_ib_mcg_destroy();
3389 destroy_workqueue(wq);
3393 static void __exit mlx4_ib_cleanup(void)
3395 mlx4_unregister_interface(&mlx4_ib_interface);
3396 mlx4_ib_mcg_destroy();
3397 destroy_workqueue(wq);
3400 module_init(mlx4_ib_init);
3401 module_exit(mlx4_ib_cleanup);