2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <linux/sched/mm.h>
43 #include <linux/sched/task.h>
46 #include <net/addrconf.h>
47 #include <net/devlink.h>
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
54 #include <net/bonding.h>
56 #include <linux/mlx4/driver.h>
57 #include <linux/mlx4/cmd.h>
58 #include <linux/mlx4/qp.h>
61 #include <rdma/mlx4-abi.h>
63 #define DRV_NAME MLX4_IB_DRV_NAME
64 #define DRV_VERSION "4.0-0"
66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
68 #define MLX4_IB_CARD_REV_A0 0xA0
70 MODULE_AUTHOR("Roland Dreier");
71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
72 MODULE_LICENSE("Dual BSD/GPL");
74 int mlx4_ib_sm_guid_assign = 0;
75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
78 static const char mlx4_ib_version[] =
79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device,
86 static struct workqueue_struct *wq;
88 static void init_query_mad(struct ib_smp *mad)
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
96 static int check_flow_steering_support(struct mlx4_dev *dev)
98 int eth_num_ports = 0;
101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
109 dmfs &= (!ib_num_ports ||
110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
113 if (ib_num_ports && mlx4_is_mfunc(dev)) {
114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
121 static int num_ib_ports(struct mlx4_dev *dev)
126 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
132 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
134 struct mlx4_ib_dev *ibdev = to_mdev(device);
135 struct net_device *dev;
138 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
141 if (mlx4_is_bonded(ibdev->dev)) {
142 struct net_device *upper = NULL;
144 upper = netdev_master_upper_dev_get_rcu(dev);
146 struct net_device *active;
148 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
161 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
162 struct mlx4_ib_dev *ibdev,
165 struct mlx4_cmd_mailbox *mailbox;
167 struct mlx4_dev *dev = ibdev->dev;
169 union ib_gid *gid_tbl;
171 mailbox = mlx4_alloc_cmd_mailbox(dev);
175 gid_tbl = mailbox->buf;
177 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
178 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
180 err = mlx4_cmd(dev, mailbox->dma,
181 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
182 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
184 if (mlx4_is_bonded(dev))
185 err += mlx4_cmd(dev, mailbox->dma,
186 MLX4_SET_PORT_GID_TABLE << 8 | 2,
187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
190 mlx4_free_cmd_mailbox(dev, mailbox);
194 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
195 struct mlx4_ib_dev *ibdev,
198 struct mlx4_cmd_mailbox *mailbox;
200 struct mlx4_dev *dev = ibdev->dev;
211 mailbox = mlx4_alloc_cmd_mailbox(dev);
215 gid_tbl = mailbox->buf;
216 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
217 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
218 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
219 gid_tbl[i].version = 2;
220 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
225 err = mlx4_cmd(dev, mailbox->dma,
226 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
227 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
229 if (mlx4_is_bonded(dev))
230 err += mlx4_cmd(dev, mailbox->dma,
231 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
232 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
235 mlx4_free_cmd_mailbox(dev, mailbox);
239 static int mlx4_ib_update_gids(struct gid_entry *gids,
240 struct mlx4_ib_dev *ibdev,
243 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
244 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
246 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
249 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context)
251 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
252 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
253 struct mlx4_port_gid_table *port_gid_table;
254 int free = -1, found = -1;
258 struct gid_entry *gids = NULL;
260 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
263 if (attr->port_num > MLX4_MAX_PORTS)
269 port_gid_table = &iboe->gids[attr->port_num - 1];
270 spin_lock_bh(&iboe->lock);
271 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
272 if (!memcmp(&port_gid_table->gids[i].gid,
273 &attr->gid, sizeof(attr->gid)) &&
274 port_gid_table->gids[i].gid_type == attr->gid_type) {
278 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid))
279 free = i; /* HW has space */
286 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
287 if (!port_gid_table->gids[free].ctx) {
290 *context = port_gid_table->gids[free].ctx;
291 memcpy(&port_gid_table->gids[free].gid,
292 &attr->gid, sizeof(attr->gid));
293 port_gid_table->gids[free].gid_type = attr->gid_type;
294 port_gid_table->gids[free].ctx->real_index = free;
295 port_gid_table->gids[free].ctx->refcount = 1;
300 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
304 if (!ret && hw_update) {
305 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
310 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
311 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
312 gids[i].gid_type = port_gid_table->gids[i].gid_type;
316 spin_unlock_bh(&iboe->lock);
318 if (!ret && hw_update) {
319 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
326 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context)
328 struct gid_cache_context *ctx = *context;
329 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
330 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
331 struct mlx4_port_gid_table *port_gid_table;
334 struct gid_entry *gids = NULL;
336 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
339 if (attr->port_num > MLX4_MAX_PORTS)
342 port_gid_table = &iboe->gids[attr->port_num - 1];
343 spin_lock_bh(&iboe->lock);
346 if (!ctx->refcount) {
347 unsigned int real_index = ctx->real_index;
349 memset(&port_gid_table->gids[real_index].gid, 0,
350 sizeof(port_gid_table->gids[real_index].gid));
351 kfree(port_gid_table->gids[real_index].ctx);
352 port_gid_table->gids[real_index].ctx = NULL;
356 if (!ret && hw_update) {
359 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
364 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
366 &port_gid_table->gids[i].gid,
367 sizeof(union ib_gid));
369 port_gid_table->gids[i].gid_type;
373 spin_unlock_bh(&iboe->lock);
375 if (!ret && hw_update) {
376 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
382 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
383 const struct ib_gid_attr *attr)
385 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
386 struct gid_cache_context *ctx = NULL;
387 struct mlx4_port_gid_table *port_gid_table;
388 int real_index = -EINVAL;
391 u8 port_num = attr->port_num;
393 if (port_num > MLX4_MAX_PORTS)
396 if (mlx4_is_bonded(ibdev->dev))
399 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
402 spin_lock_irqsave(&iboe->lock, flags);
403 port_gid_table = &iboe->gids[port_num - 1];
405 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
406 if (!memcmp(&port_gid_table->gids[i].gid,
407 &attr->gid, sizeof(attr->gid)) &&
408 attr->gid_type == port_gid_table->gids[i].gid_type) {
409 ctx = port_gid_table->gids[i].ctx;
413 real_index = ctx->real_index;
414 spin_unlock_irqrestore(&iboe->lock, flags);
418 #define field_avail(type, fld, sz) (offsetof(type, fld) + \
419 sizeof(((type *)0)->fld) <= (sz))
421 static int mlx4_ib_query_device(struct ib_device *ibdev,
422 struct ib_device_attr *props,
423 struct ib_udata *uhw)
425 struct mlx4_ib_dev *dev = to_mdev(ibdev);
426 struct ib_smp *in_mad = NULL;
427 struct ib_smp *out_mad = NULL;
430 struct mlx4_uverbs_ex_query_device cmd;
431 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
432 struct mlx4_clock_params clock_params;
435 if (uhw->inlen < sizeof(cmd))
438 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
449 resp.response_length = offsetof(typeof(resp), response_length) +
450 sizeof(resp.response_length);
451 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
452 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
454 if (!in_mad || !out_mad)
457 init_query_mad(in_mad);
458 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
460 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
461 1, NULL, NULL, in_mad, out_mad);
465 memset(props, 0, sizeof *props);
467 have_ib_ports = num_ib_ports(dev->dev);
469 props->fw_ver = dev->dev->caps.fw_ver;
470 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
471 IB_DEVICE_PORT_ACTIVE_EVENT |
472 IB_DEVICE_SYS_IMAGE_GUID |
473 IB_DEVICE_RC_RNR_NAK_GEN |
474 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
475 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
476 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
477 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
478 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
479 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
480 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
481 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
482 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
483 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
484 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
485 if (dev->dev->caps.max_gso_sz &&
486 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
487 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
488 props->device_cap_flags |= IB_DEVICE_UD_TSO;
489 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
490 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
491 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
492 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
493 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
494 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
495 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
496 props->device_cap_flags |= IB_DEVICE_XRC;
497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
498 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
499 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
500 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
501 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
503 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
505 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
506 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
508 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
510 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
512 props->vendor_part_id = dev->dev->persist->pdev->device;
513 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
514 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
516 props->max_mr_size = ~0ull;
517 props->page_size_cap = dev->dev->caps.page_size_cap;
518 props->max_qp = dev->dev->quotas.qp;
519 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
520 props->max_send_sge =
521 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
522 props->max_recv_sge =
523 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
524 props->max_sge_rd = MLX4_MAX_SGE_RD;
525 props->max_cq = dev->dev->quotas.cq;
526 props->max_cqe = dev->dev->caps.max_cqes;
527 props->max_mr = dev->dev->quotas.mpt;
528 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
529 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
530 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
531 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
532 props->max_srq = dev->dev->quotas.srq;
533 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
534 props->max_srq_sge = dev->dev->caps.max_srq_sge;
535 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
536 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
537 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
538 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
539 props->masked_atomic_cap = props->atomic_cap;
540 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
541 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
542 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
543 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
544 props->max_mcast_grp;
545 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
546 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
547 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
548 props->max_ah = INT_MAX;
550 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET ||
551 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) {
552 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) {
553 props->rss_caps.max_rwq_indirection_tables =
555 props->rss_caps.max_rwq_indirection_table_size =
556 dev->dev->caps.max_rss_tbl_sz;
557 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
558 props->max_wq_type_rq = props->max_qp;
561 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
562 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS;
565 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT;
566 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD;
568 if (!mlx4_is_slave(dev->dev))
569 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
571 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
572 resp.response_length += sizeof(resp.hca_core_clock_offset);
573 if (!err && !mlx4_is_slave(dev->dev)) {
574 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET;
575 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
579 if (uhw->outlen >= resp.response_length +
580 sizeof(resp.max_inl_recv_sz)) {
581 resp.response_length += sizeof(resp.max_inl_recv_sz);
582 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg *
583 sizeof(struct mlx4_wqe_data_seg);
586 if (field_avail(typeof(resp), rss_caps, uhw->outlen)) {
587 if (props->rss_caps.supported_qpts) {
588 resp.rss_caps.rx_hash_function =
589 MLX4_IB_RX_HASH_FUNC_TOEPLITZ;
591 resp.rss_caps.rx_hash_fields_mask =
592 MLX4_IB_RX_HASH_SRC_IPV4 |
593 MLX4_IB_RX_HASH_DST_IPV4 |
594 MLX4_IB_RX_HASH_SRC_IPV6 |
595 MLX4_IB_RX_HASH_DST_IPV6 |
596 MLX4_IB_RX_HASH_SRC_PORT_TCP |
597 MLX4_IB_RX_HASH_DST_PORT_TCP |
598 MLX4_IB_RX_HASH_SRC_PORT_UDP |
599 MLX4_IB_RX_HASH_DST_PORT_UDP;
601 if (dev->dev->caps.tunnel_offload_mode ==
602 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
603 resp.rss_caps.rx_hash_fields_mask |=
604 MLX4_IB_RX_HASH_INNER;
606 resp.response_length = offsetof(typeof(resp), rss_caps) +
607 sizeof(resp.rss_caps);
610 if (field_avail(typeof(resp), tso_caps, uhw->outlen)) {
611 if (dev->dev->caps.max_gso_sz &&
612 ((mlx4_ib_port_link_layer(ibdev, 1) ==
613 IB_LINK_LAYER_ETHERNET) ||
614 (mlx4_ib_port_link_layer(ibdev, 2) ==
615 IB_LINK_LAYER_ETHERNET))) {
616 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz;
617 resp.tso_caps.supported_qpts |=
618 1 << IB_QPT_RAW_PACKET;
620 resp.response_length = offsetof(typeof(resp), tso_caps) +
621 sizeof(resp.tso_caps);
625 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
636 static enum rdma_link_layer
637 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
639 struct mlx4_dev *dev = to_mdev(device)->dev;
641 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
642 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
645 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
646 struct ib_port_attr *props, int netw_view)
648 struct ib_smp *in_mad = NULL;
649 struct ib_smp *out_mad = NULL;
650 int ext_active_speed;
651 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
654 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
655 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
656 if (!in_mad || !out_mad)
659 init_query_mad(in_mad);
660 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
661 in_mad->attr_mod = cpu_to_be32(port);
663 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
664 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
666 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
672 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
673 props->lmc = out_mad->data[34] & 0x7;
674 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
675 props->sm_sl = out_mad->data[36] & 0xf;
676 props->state = out_mad->data[32] & 0xf;
677 props->phys_state = out_mad->data[33] >> 4;
678 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
680 props->gid_tbl_len = out_mad->data[50];
682 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
683 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
684 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
685 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
686 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
687 props->active_width = out_mad->data[31] & 0xf;
688 props->active_speed = out_mad->data[35] >> 4;
689 props->max_mtu = out_mad->data[41] & 0xf;
690 props->active_mtu = out_mad->data[36] >> 4;
691 props->subnet_timeout = out_mad->data[51] & 0x1f;
692 props->max_vl_num = out_mad->data[37] >> 4;
693 props->init_type_reply = out_mad->data[41] >> 4;
695 /* Check if extended speeds (EDR/FDR/...) are supported */
696 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
697 ext_active_speed = out_mad->data[62] >> 4;
699 switch (ext_active_speed) {
701 props->active_speed = IB_SPEED_FDR;
704 props->active_speed = IB_SPEED_EDR;
709 /* If reported active speed is QDR, check if is FDR-10 */
710 if (props->active_speed == IB_SPEED_QDR) {
711 init_query_mad(in_mad);
712 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
713 in_mad->attr_mod = cpu_to_be32(port);
715 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
716 NULL, NULL, in_mad, out_mad);
720 /* Checking LinkSpeedActive for FDR-10 */
721 if (out_mad->data[15] & 0x1)
722 props->active_speed = IB_SPEED_FDR10;
725 /* Avoid wrong speed value returned by FW if the IB link is down. */
726 if (props->state == IB_PORT_DOWN)
727 props->active_speed = IB_SPEED_SDR;
735 static u8 state_to_phys_state(enum ib_port_state state)
737 return state == IB_PORT_ACTIVE ? 5 : 3;
740 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
741 struct ib_port_attr *props)
744 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
745 struct mlx4_ib_iboe *iboe = &mdev->iboe;
746 struct net_device *ndev;
748 struct mlx4_cmd_mailbox *mailbox;
750 int is_bonded = mlx4_is_bonded(mdev->dev);
752 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
754 return PTR_ERR(mailbox);
756 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
757 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
762 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
763 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
764 IB_WIDTH_4X : IB_WIDTH_1X;
765 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
766 IB_SPEED_FDR : IB_SPEED_QDR;
767 props->port_cap_flags = IB_PORT_CM_SUP;
768 props->ip_gids = true;
769 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
770 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
771 props->pkey_tbl_len = 1;
772 props->max_mtu = IB_MTU_4096;
773 props->max_vl_num = 2;
774 props->state = IB_PORT_DOWN;
775 props->phys_state = state_to_phys_state(props->state);
776 props->active_mtu = IB_MTU_256;
777 spin_lock_bh(&iboe->lock);
778 ndev = iboe->netdevs[port - 1];
779 if (ndev && is_bonded) {
780 rcu_read_lock(); /* required to get upper dev */
781 ndev = netdev_master_upper_dev_get_rcu(ndev);
787 tmp = iboe_get_mtu(ndev->mtu);
788 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
790 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
791 IB_PORT_ACTIVE : IB_PORT_DOWN;
792 props->phys_state = state_to_phys_state(props->state);
794 spin_unlock_bh(&iboe->lock);
796 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
800 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
801 struct ib_port_attr *props, int netw_view)
805 /* props being zeroed by the caller, avoid zeroing it here */
807 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
808 ib_link_query_port(ibdev, port, props, netw_view) :
809 eth_link_query_port(ibdev, port, props);
814 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
815 struct ib_port_attr *props)
817 /* returns host view */
818 return __mlx4_ib_query_port(ibdev, port, props, 0);
821 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
822 union ib_gid *gid, int netw_view)
824 struct ib_smp *in_mad = NULL;
825 struct ib_smp *out_mad = NULL;
827 struct mlx4_ib_dev *dev = to_mdev(ibdev);
829 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
831 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
832 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
833 if (!in_mad || !out_mad)
836 init_query_mad(in_mad);
837 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
838 in_mad->attr_mod = cpu_to_be32(port);
840 if (mlx4_is_mfunc(dev->dev) && netw_view)
841 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
843 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
847 memcpy(gid->raw, out_mad->data + 8, 8);
849 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
851 /* For any index > 0, return the null guid */
858 init_query_mad(in_mad);
859 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
860 in_mad->attr_mod = cpu_to_be32(index / 8);
862 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
863 NULL, NULL, in_mad, out_mad);
867 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
871 memset(gid->raw + 8, 0, 8);
877 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
880 if (rdma_protocol_ib(ibdev, port))
881 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
885 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
887 union sl2vl_tbl_to_u64 sl2vl64;
888 struct ib_smp *in_mad = NULL;
889 struct ib_smp *out_mad = NULL;
890 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
894 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
899 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
900 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
901 if (!in_mad || !out_mad)
904 init_query_mad(in_mad);
905 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
906 in_mad->attr_mod = 0;
908 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
909 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
911 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
916 for (jj = 0; jj < 8; jj++)
917 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
918 *sl2vl_tbl = sl2vl64.sl64;
926 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
932 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
933 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
935 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
937 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
941 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
945 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
946 u16 *pkey, int netw_view)
948 struct ib_smp *in_mad = NULL;
949 struct ib_smp *out_mad = NULL;
950 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
953 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
954 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
955 if (!in_mad || !out_mad)
958 init_query_mad(in_mad);
959 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
960 in_mad->attr_mod = cpu_to_be32(index / 32);
962 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
963 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
965 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
970 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
978 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
980 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
983 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
984 struct ib_device_modify *props)
986 struct mlx4_cmd_mailbox *mailbox;
989 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
992 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
995 if (mlx4_is_slave(to_mdev(ibdev)->dev))
998 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
999 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1000 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
1003 * If possible, pass node desc to FW, so it can generate
1004 * a 144 trap. If cmd fails, just ignore.
1006 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
1007 if (IS_ERR(mailbox))
1010 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1011 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
1012 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1014 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
1019 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
1022 struct mlx4_cmd_mailbox *mailbox;
1025 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
1026 if (IS_ERR(mailbox))
1027 return PTR_ERR(mailbox);
1029 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
1030 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
1031 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
1033 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
1034 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1037 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1038 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1041 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1045 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1046 struct ib_port_modify *props)
1048 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1049 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1050 struct ib_port_attr attr;
1054 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1055 * of whether port link layer is ETH or IB. For ETH ports, qkey
1056 * violations and port capabilities are not meaningful.
1061 mutex_lock(&mdev->cap_mask_mutex);
1063 err = ib_query_port(ibdev, port, &attr);
1067 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1068 ~props->clr_port_cap_mask;
1070 err = mlx4_ib_SET_PORT(mdev, port,
1071 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1075 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1079 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1080 struct ib_udata *udata)
1082 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1083 struct mlx4_ib_ucontext *context;
1084 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1085 struct mlx4_ib_alloc_ucontext_resp resp;
1088 if (!dev->ib_active)
1089 return ERR_PTR(-EAGAIN);
1091 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1092 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1093 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1094 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1096 resp.dev_caps = dev->dev->caps.userspace_caps;
1097 resp.qp_tab_size = dev->dev->caps.num_qps;
1098 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1099 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1100 resp.cqe_size = dev->dev->caps.cqe_size;
1103 context = kzalloc(sizeof(*context), GFP_KERNEL);
1105 return ERR_PTR(-ENOMEM);
1107 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1110 return ERR_PTR(err);
1113 INIT_LIST_HEAD(&context->db_page_list);
1114 mutex_init(&context->db_page_mutex);
1116 INIT_LIST_HEAD(&context->wqn_ranges_list);
1117 mutex_init(&context->wqn_ranges_mutex);
1119 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1120 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1122 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1125 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1127 return ERR_PTR(-EFAULT);
1130 return &context->ibucontext;
1133 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1135 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1137 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1143 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1147 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1149 struct mlx4_ib_dev *dev = to_mdev(context->device);
1151 switch (vma->vm_pgoff) {
1153 return rdma_user_mmap_io(context, vma,
1154 to_mucontext(context)->uar.pfn,
1156 pgprot_noncached(vma->vm_page_prot));
1159 if (dev->dev->caps.bf_reg_size == 0)
1161 return rdma_user_mmap_io(
1163 to_mucontext(context)->uar.pfn +
1164 dev->dev->caps.num_uars,
1165 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot));
1168 struct mlx4_clock_params params;
1171 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1175 return rdma_user_mmap_io(
1177 (pci_resource_start(dev->dev->persist->pdev,
1181 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot));
1189 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1190 struct ib_ucontext *context,
1191 struct ib_udata *udata)
1193 struct mlx4_ib_pd *pd;
1196 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1198 return ERR_PTR(-ENOMEM);
1200 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1203 return ERR_PTR(err);
1207 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1208 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1210 return ERR_PTR(-EFAULT);
1215 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1217 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1223 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1224 struct ib_ucontext *context,
1225 struct ib_udata *udata)
1227 struct mlx4_ib_xrcd *xrcd;
1228 struct ib_cq_init_attr cq_attr = {};
1231 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1232 return ERR_PTR(-ENOSYS);
1234 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1236 return ERR_PTR(-ENOMEM);
1238 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1242 xrcd->pd = ib_alloc_pd(ibdev, 0);
1243 if (IS_ERR(xrcd->pd)) {
1244 err = PTR_ERR(xrcd->pd);
1249 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1250 if (IS_ERR(xrcd->cq)) {
1251 err = PTR_ERR(xrcd->cq);
1255 return &xrcd->ibxrcd;
1258 ib_dealloc_pd(xrcd->pd);
1260 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1263 return ERR_PTR(err);
1266 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1268 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1269 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1270 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1276 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1278 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1279 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1280 struct mlx4_ib_gid_entry *ge;
1282 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1287 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1288 ge->port = mqp->port;
1292 mutex_lock(&mqp->mutex);
1293 list_add_tail(&ge->list, &mqp->gid_list);
1294 mutex_unlock(&mqp->mutex);
1299 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1300 struct mlx4_ib_counters *ctr_table)
1302 struct counter_index *counter, *tmp_count;
1304 mutex_lock(&ctr_table->mutex);
1305 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1307 if (counter->allocated)
1308 mlx4_counter_free(ibdev->dev, counter->index);
1309 list_del(&counter->list);
1312 mutex_unlock(&ctr_table->mutex);
1315 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1318 struct net_device *ndev;
1324 spin_lock_bh(&mdev->iboe.lock);
1325 ndev = mdev->iboe.netdevs[mqp->port - 1];
1328 spin_unlock_bh(&mdev->iboe.lock);
1338 struct mlx4_ib_steering {
1339 struct list_head list;
1340 struct mlx4_flow_reg_id reg_id;
1344 #define LAST_ETH_FIELD vlan_tag
1345 #define LAST_IB_FIELD sl
1346 #define LAST_IPV4_FIELD dst_ip
1347 #define LAST_TCP_UDP_FIELD src_port
1349 /* Field is the last supported field */
1350 #define FIELDS_NOT_SUPPORTED(filter, field)\
1351 memchr_inv((void *)&filter.field +\
1352 sizeof(filter.field), 0,\
1354 offsetof(typeof(filter), field) -\
1355 sizeof(filter.field))
1357 static int parse_flow_attr(struct mlx4_dev *dev,
1359 union ib_flow_spec *ib_spec,
1360 struct _rule_hw *mlx4_spec)
1362 enum mlx4_net_trans_rule_id type;
1364 switch (ib_spec->type) {
1365 case IB_FLOW_SPEC_ETH:
1366 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1369 type = MLX4_NET_TRANS_RULE_ID_ETH;
1370 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1372 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1374 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1375 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1377 case IB_FLOW_SPEC_IB:
1378 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1381 type = MLX4_NET_TRANS_RULE_ID_IB;
1382 mlx4_spec->ib.l3_qpn =
1383 cpu_to_be32(qp_num);
1384 mlx4_spec->ib.qpn_mask =
1385 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1389 case IB_FLOW_SPEC_IPV4:
1390 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1393 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1394 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1395 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1396 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1397 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1400 case IB_FLOW_SPEC_TCP:
1401 case IB_FLOW_SPEC_UDP:
1402 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1405 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1406 MLX4_NET_TRANS_RULE_ID_TCP :
1407 MLX4_NET_TRANS_RULE_ID_UDP;
1408 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1409 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1410 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1411 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1417 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1418 mlx4_hw_rule_sz(dev, type) < 0)
1420 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1421 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1422 return mlx4_hw_rule_sz(dev, type);
1425 struct default_rules {
1426 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1427 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1428 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1431 static const struct default_rules default_table[] = {
1433 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1434 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1435 .rules_create_list = {IB_FLOW_SPEC_IB},
1436 .link_layer = IB_LINK_LAYER_INFINIBAND
1440 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1441 struct ib_flow_attr *flow_attr)
1445 const struct default_rules *pdefault_rules = default_table;
1446 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1448 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1449 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1450 memset(&field_types, 0, sizeof(field_types));
1452 if (link_layer != pdefault_rules->link_layer)
1455 ib_flow = flow_attr + 1;
1456 /* we assume the specs are sorted */
1457 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1458 j < flow_attr->num_of_specs; k++) {
1459 union ib_flow_spec *current_flow =
1460 (union ib_flow_spec *)ib_flow;
1462 /* same layer but different type */
1463 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1464 (pdefault_rules->mandatory_fields[k] &
1465 IB_FLOW_SPEC_LAYER_MASK)) &&
1466 (current_flow->type !=
1467 pdefault_rules->mandatory_fields[k]))
1470 /* same layer, try match next one */
1471 if (current_flow->type ==
1472 pdefault_rules->mandatory_fields[k]) {
1475 ((union ib_flow_spec *)ib_flow)->size;
1479 ib_flow = flow_attr + 1;
1480 for (j = 0; j < flow_attr->num_of_specs;
1481 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1482 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1483 /* same layer and same type */
1484 if (((union ib_flow_spec *)ib_flow)->type ==
1485 pdefault_rules->mandatory_not_fields[k])
1494 static int __mlx4_ib_create_default_rules(
1495 struct mlx4_ib_dev *mdev,
1497 const struct default_rules *pdefault_rules,
1498 struct _rule_hw *mlx4_spec) {
1502 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1504 union ib_flow_spec ib_spec;
1505 switch (pdefault_rules->rules_create_list[i]) {
1509 case IB_FLOW_SPEC_IB:
1510 ib_spec.type = IB_FLOW_SPEC_IB;
1511 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1518 /* We must put empty rule, qpn is being ignored */
1519 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1522 pr_info("invalid parsing\n");
1526 mlx4_spec = (void *)mlx4_spec + ret;
1532 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1534 enum mlx4_net_trans_promisc_mode flow_type,
1540 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1541 struct mlx4_cmd_mailbox *mailbox;
1542 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1545 static const u16 __mlx4_domain[] = {
1546 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1547 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1548 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1549 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1552 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1553 pr_err("Invalid priority value %d\n", flow_attr->priority);
1557 if (domain >= IB_FLOW_DOMAIN_NUM) {
1558 pr_err("Invalid domain value %d\n", domain);
1562 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1565 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1566 if (IS_ERR(mailbox))
1567 return PTR_ERR(mailbox);
1568 ctrl = mailbox->buf;
1570 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1571 flow_attr->priority);
1572 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1573 ctrl->port = flow_attr->port;
1574 ctrl->qpn = cpu_to_be32(qp->qp_num);
1576 ib_flow = flow_attr + 1;
1577 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1578 /* Add default flows */
1579 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1580 if (default_flow >= 0) {
1581 ret = __mlx4_ib_create_default_rules(
1582 mdev, qp, default_table + default_flow,
1583 mailbox->buf + size);
1585 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1590 for (i = 0; i < flow_attr->num_of_specs; i++) {
1591 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1592 mailbox->buf + size);
1594 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1597 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1601 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1602 flow_attr->num_of_specs == 1) {
1603 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1604 enum ib_flow_spec_type header_spec =
1605 ((union ib_flow_spec *)(flow_attr + 1))->type;
1607 if (header_spec == IB_FLOW_SPEC_ETH)
1608 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1611 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1612 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1615 pr_err("mcg table is full. Fail to register network rule.\n");
1616 else if (ret == -ENXIO)
1617 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1619 pr_err("Invalid argument. Fail to register network rule.\n");
1621 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1625 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1628 err = mlx4_cmd(dev, reg_id, 0, 0,
1629 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1632 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1637 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1641 union ib_flow_spec *ib_spec;
1642 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1645 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1646 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1647 return 0; /* do nothing */
1649 ib_flow = flow_attr + 1;
1650 ib_spec = (union ib_flow_spec *)ib_flow;
1652 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1653 return 0; /* do nothing */
1655 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1656 flow_attr->port, qp->qp_num,
1657 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1662 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1663 struct ib_flow_attr *flow_attr,
1664 enum mlx4_net_trans_promisc_mode *type)
1668 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1669 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1670 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1674 if (flow_attr->num_of_specs == 0) {
1675 type[0] = MLX4_FS_MC_SNIFFER;
1676 type[1] = MLX4_FS_UC_SNIFFER;
1678 union ib_flow_spec *ib_spec;
1680 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1681 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1684 /* if all is zero than MC and UC */
1685 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1686 type[0] = MLX4_FS_MC_SNIFFER;
1687 type[1] = MLX4_FS_UC_SNIFFER;
1689 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1690 ib_spec->eth.mask.dst_mac[1],
1691 ib_spec->eth.mask.dst_mac[2],
1692 ib_spec->eth.mask.dst_mac[3],
1693 ib_spec->eth.mask.dst_mac[4],
1694 ib_spec->eth.mask.dst_mac[5]};
1696 /* Above xor was only on MC bit, non empty mask is valid
1697 * only if this bit is set and rest are zero.
1699 if (!is_zero_ether_addr(&mac[0]))
1702 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1703 type[0] = MLX4_FS_MC_SNIFFER;
1705 type[0] = MLX4_FS_UC_SNIFFER;
1712 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1713 struct ib_flow_attr *flow_attr,
1714 int domain, struct ib_udata *udata)
1716 int err = 0, i = 0, j = 0;
1717 struct mlx4_ib_flow *mflow;
1718 enum mlx4_net_trans_promisc_mode type[2];
1719 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1720 int is_bonded = mlx4_is_bonded(dev);
1722 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1723 return ERR_PTR(-EINVAL);
1725 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)
1726 return ERR_PTR(-EOPNOTSUPP);
1728 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1729 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1730 return ERR_PTR(-EOPNOTSUPP);
1733 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen))
1734 return ERR_PTR(-EOPNOTSUPP);
1736 memset(type, 0, sizeof(type));
1738 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1744 switch (flow_attr->type) {
1745 case IB_FLOW_ATTR_NORMAL:
1746 /* If dont trap flag (continue match) is set, under specific
1747 * condition traffic be replicated to given qp,
1748 * without stealing it
1750 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1751 err = mlx4_ib_add_dont_trap_rule(dev,
1757 type[0] = MLX4_FS_REGULAR;
1761 case IB_FLOW_ATTR_ALL_DEFAULT:
1762 type[0] = MLX4_FS_ALL_DEFAULT;
1765 case IB_FLOW_ATTR_MC_DEFAULT:
1766 type[0] = MLX4_FS_MC_DEFAULT;
1769 case IB_FLOW_ATTR_SNIFFER:
1770 type[0] = MLX4_FS_MIRROR_RX_PORT;
1771 type[1] = MLX4_FS_MIRROR_SX_PORT;
1779 while (i < ARRAY_SIZE(type) && type[i]) {
1780 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1781 &mflow->reg_id[i].id);
1783 goto err_create_flow;
1785 /* Application always sees one port so the mirror rule
1786 * must be on port #2
1788 flow_attr->port = 2;
1789 err = __mlx4_ib_create_flow(qp, flow_attr,
1791 &mflow->reg_id[j].mirror);
1792 flow_attr->port = 1;
1794 goto err_create_flow;
1801 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1802 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1803 &mflow->reg_id[i].id);
1805 goto err_create_flow;
1808 flow_attr->port = 2;
1809 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1810 &mflow->reg_id[j].mirror);
1811 flow_attr->port = 1;
1813 goto err_create_flow;
1816 /* function to create mirror rule */
1820 return &mflow->ibflow;
1824 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1825 mflow->reg_id[i].id);
1830 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1831 mflow->reg_id[j].mirror);
1836 return ERR_PTR(err);
1839 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1843 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1844 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1846 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1847 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1850 if (mflow->reg_id[i].mirror) {
1851 err = __mlx4_ib_destroy_flow(mdev->dev,
1852 mflow->reg_id[i].mirror);
1863 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1866 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1867 struct mlx4_dev *dev = mdev->dev;
1868 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1869 struct mlx4_ib_steering *ib_steering = NULL;
1870 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1871 struct mlx4_flow_reg_id reg_id;
1873 if (mdev->dev->caps.steering_mode ==
1874 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1875 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1880 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1882 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1885 pr_err("multicast attach op failed, err %d\n", err);
1890 if (mlx4_is_bonded(dev)) {
1891 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1892 (mqp->port == 1) ? 2 : 1,
1894 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1895 prot, ®_id.mirror);
1900 err = add_gid_entry(ibqp, gid);
1905 memcpy(ib_steering->gid.raw, gid->raw, 16);
1906 ib_steering->reg_id = reg_id;
1907 mutex_lock(&mqp->mutex);
1908 list_add(&ib_steering->list, &mqp->steering_rules);
1909 mutex_unlock(&mqp->mutex);
1914 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1917 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1918 prot, reg_id.mirror);
1925 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1927 struct mlx4_ib_gid_entry *ge;
1928 struct mlx4_ib_gid_entry *tmp;
1929 struct mlx4_ib_gid_entry *ret = NULL;
1931 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1932 if (!memcmp(raw, ge->gid.raw, 16)) {
1941 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1944 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1945 struct mlx4_dev *dev = mdev->dev;
1946 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1947 struct net_device *ndev;
1948 struct mlx4_ib_gid_entry *ge;
1949 struct mlx4_flow_reg_id reg_id = {0, 0};
1950 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1952 if (mdev->dev->caps.steering_mode ==
1953 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1954 struct mlx4_ib_steering *ib_steering;
1956 mutex_lock(&mqp->mutex);
1957 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1958 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1959 list_del(&ib_steering->list);
1963 mutex_unlock(&mqp->mutex);
1964 if (&ib_steering->list == &mqp->steering_rules) {
1965 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1968 reg_id = ib_steering->reg_id;
1972 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1977 if (mlx4_is_bonded(dev)) {
1978 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1979 prot, reg_id.mirror);
1984 mutex_lock(&mqp->mutex);
1985 ge = find_gid_entry(mqp, gid->raw);
1987 spin_lock_bh(&mdev->iboe.lock);
1988 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1991 spin_unlock_bh(&mdev->iboe.lock);
1994 list_del(&ge->list);
1997 pr_warn("could not find mgid entry\n");
1999 mutex_unlock(&mqp->mutex);
2004 static int init_node_data(struct mlx4_ib_dev *dev)
2006 struct ib_smp *in_mad = NULL;
2007 struct ib_smp *out_mad = NULL;
2008 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2011 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2012 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2013 if (!in_mad || !out_mad)
2016 init_query_mad(in_mad);
2017 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2018 if (mlx4_is_master(dev->dev))
2019 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2021 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2025 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2027 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2029 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2033 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2034 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2042 static ssize_t hca_type_show(struct device *device,
2043 struct device_attribute *attr, char *buf)
2045 struct mlx4_ib_dev *dev =
2046 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2047 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2049 static DEVICE_ATTR_RO(hca_type);
2051 static ssize_t hw_rev_show(struct device *device,
2052 struct device_attribute *attr, char *buf)
2054 struct mlx4_ib_dev *dev =
2055 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2056 return sprintf(buf, "%x\n", dev->dev->rev_id);
2058 static DEVICE_ATTR_RO(hw_rev);
2060 static ssize_t board_id_show(struct device *device,
2061 struct device_attribute *attr, char *buf)
2063 struct mlx4_ib_dev *dev =
2064 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2065 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2066 dev->dev->board_id);
2068 static DEVICE_ATTR_RO(board_id);
2070 static struct attribute *mlx4_class_attributes[] = {
2071 &dev_attr_hw_rev.attr,
2072 &dev_attr_hca_type.attr,
2073 &dev_attr_board_id.attr,
2077 static const struct attribute_group mlx4_attr_group = {
2078 .attrs = mlx4_class_attributes,
2081 struct diag_counter {
2086 #define DIAG_COUNTER(_name, _offset) \
2087 { .name = #_name, .offset = _offset }
2089 static const struct diag_counter diag_basic[] = {
2090 DIAG_COUNTER(rq_num_lle, 0x00),
2091 DIAG_COUNTER(sq_num_lle, 0x04),
2092 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2093 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2094 DIAG_COUNTER(rq_num_lpe, 0x18),
2095 DIAG_COUNTER(sq_num_lpe, 0x1C),
2096 DIAG_COUNTER(rq_num_wrfe, 0x20),
2097 DIAG_COUNTER(sq_num_wrfe, 0x24),
2098 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2099 DIAG_COUNTER(sq_num_bre, 0x34),
2100 DIAG_COUNTER(sq_num_rire, 0x44),
2101 DIAG_COUNTER(rq_num_rire, 0x48),
2102 DIAG_COUNTER(sq_num_rae, 0x4C),
2103 DIAG_COUNTER(rq_num_rae, 0x50),
2104 DIAG_COUNTER(sq_num_roe, 0x54),
2105 DIAG_COUNTER(sq_num_tree, 0x5C),
2106 DIAG_COUNTER(sq_num_rree, 0x64),
2107 DIAG_COUNTER(rq_num_rnr, 0x68),
2108 DIAG_COUNTER(sq_num_rnr, 0x6C),
2109 DIAG_COUNTER(rq_num_oos, 0x100),
2110 DIAG_COUNTER(sq_num_oos, 0x104),
2113 static const struct diag_counter diag_ext[] = {
2114 DIAG_COUNTER(rq_num_dup, 0x130),
2115 DIAG_COUNTER(sq_num_to, 0x134),
2118 static const struct diag_counter diag_device_only[] = {
2119 DIAG_COUNTER(num_cqovf, 0x1A0),
2120 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2123 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2126 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2127 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2129 if (!diag[!!port_num].name)
2132 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2133 diag[!!port_num].num_counters,
2134 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2137 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2138 struct rdma_hw_stats *stats,
2141 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2142 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2143 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2144 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2148 ret = mlx4_query_diag_counters(dev->dev,
2149 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2150 diag[!!port].offset, hw_value,
2151 diag[!!port].num_counters, port);
2156 for (i = 0; i < diag[!!port].num_counters; i++)
2157 stats->value[i] = hw_value[i];
2159 return diag[!!port].num_counters;
2162 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2170 num_counters = ARRAY_SIZE(diag_basic);
2172 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2173 num_counters += ARRAY_SIZE(diag_ext);
2176 num_counters += ARRAY_SIZE(diag_device_only);
2178 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2182 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2186 *num = num_counters;
2195 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2203 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2204 name[i] = diag_basic[i].name;
2205 offset[i] = diag_basic[i].offset;
2208 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2209 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2210 name[j] = diag_ext[i].name;
2211 offset[j] = diag_ext[i].offset;
2216 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2217 name[j] = diag_device_only[i].name;
2218 offset[j] = diag_device_only[i].offset;
2223 static const struct ib_device_ops mlx4_ib_hw_stats_ops = {
2224 .alloc_hw_stats = mlx4_ib_alloc_hw_stats,
2225 .get_hw_stats = mlx4_ib_get_hw_stats,
2228 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2230 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2233 bool per_port = !!(ibdev->dev->caps.flags2 &
2234 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2236 if (mlx4_is_slave(ibdev->dev))
2239 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2240 /* i == 1 means we are building port counters */
2244 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2246 &diag[i].num_counters, i);
2250 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2254 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops);
2260 kfree(diag[i - 1].name);
2261 kfree(diag[i - 1].offset);
2267 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2271 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2272 kfree(ibdev->diag_counters[i].offset);
2273 kfree(ibdev->diag_counters[i].name);
2277 #define MLX4_IB_INVALID_MAC ((u64)-1)
2278 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2279 struct net_device *dev,
2283 u64 release_mac = MLX4_IB_INVALID_MAC;
2284 struct mlx4_ib_qp *qp;
2286 read_lock(&dev_base_lock);
2287 new_smac = mlx4_mac_to_u64(dev->dev_addr);
2288 read_unlock(&dev_base_lock);
2290 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2292 /* no need for update QP1 and mac registration in non-SRIOV */
2293 if (!mlx4_is_mfunc(ibdev->dev))
2296 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2297 qp = ibdev->qp1_proxy[port - 1];
2301 struct mlx4_update_qp_params update_params;
2303 mutex_lock(&qp->mutex);
2304 old_smac = qp->pri.smac;
2305 if (new_smac == old_smac)
2308 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2310 if (new_smac_index < 0)
2313 update_params.smac_index = new_smac_index;
2314 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2316 release_mac = new_smac;
2319 /* if old port was zero, no mac was yet registered for this QP */
2320 if (qp->pri.smac_port)
2321 release_mac = old_smac;
2322 qp->pri.smac = new_smac;
2323 qp->pri.smac_port = port;
2324 qp->pri.smac_index = new_smac_index;
2328 if (release_mac != MLX4_IB_INVALID_MAC)
2329 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2331 mutex_unlock(&qp->mutex);
2332 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2335 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2336 struct net_device *dev,
2337 unsigned long event)
2340 struct mlx4_ib_iboe *iboe;
2341 int update_qps_port = -1;
2346 iboe = &ibdev->iboe;
2348 spin_lock_bh(&iboe->lock);
2349 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2351 iboe->netdevs[port - 1] =
2352 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2354 if (dev == iboe->netdevs[port - 1] &&
2355 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2356 event == NETDEV_UP || event == NETDEV_CHANGE))
2357 update_qps_port = port;
2359 if (dev == iboe->netdevs[port - 1] &&
2360 (event == NETDEV_UP || event == NETDEV_DOWN)) {
2361 enum ib_port_state port_state;
2362 struct ib_event ibev = { };
2364 if (ib_get_cached_port_state(&ibdev->ib_dev, port,
2368 if (event == NETDEV_UP &&
2369 (port_state != IB_PORT_ACTIVE ||
2370 iboe->last_port_state[port - 1] != IB_PORT_DOWN))
2372 if (event == NETDEV_DOWN &&
2373 (port_state != IB_PORT_DOWN ||
2374 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE))
2376 iboe->last_port_state[port - 1] = port_state;
2378 ibev.device = &ibdev->ib_dev;
2379 ibev.element.port_num = port;
2380 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE :
2382 ib_dispatch_event(&ibev);
2386 spin_unlock_bh(&iboe->lock);
2388 if (update_qps_port > 0)
2389 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2392 static int mlx4_ib_netdev_event(struct notifier_block *this,
2393 unsigned long event, void *ptr)
2395 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2396 struct mlx4_ib_dev *ibdev;
2398 if (!net_eq(dev_net(dev), &init_net))
2401 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2402 mlx4_ib_scan_netdevs(ibdev, dev, event);
2407 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2413 if (mlx4_is_master(ibdev->dev)) {
2414 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2416 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2418 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2420 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2421 /* master has the identity virt2phys pkey mapping */
2422 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2423 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2424 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2425 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2429 /* initialize pkey cache */
2430 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2432 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2434 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2440 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2442 int i, j, eq = 0, total_eqs = 0;
2444 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2445 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2446 if (!ibdev->eq_table)
2449 for (i = 1; i <= dev->caps.num_ports; i++) {
2450 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2452 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2454 ibdev->eq_table[eq] = total_eqs;
2455 if (!mlx4_assign_eq(dev, i,
2456 &ibdev->eq_table[eq]))
2459 ibdev->eq_table[eq] = -1;
2463 for (i = eq; i < dev->caps.num_comp_vectors;
2464 ibdev->eq_table[i++] = -1)
2467 /* Advertise the new number of EQs to clients */
2468 ibdev->ib_dev.num_comp_vectors = eq;
2471 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2474 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2476 /* no eqs were allocated */
2477 if (!ibdev->eq_table)
2480 /* Reset the advertised EQ number */
2481 ibdev->ib_dev.num_comp_vectors = 0;
2483 for (i = 0; i < total_eqs; i++)
2484 mlx4_release_eq(dev, ibdev->eq_table[i]);
2486 kfree(ibdev->eq_table);
2487 ibdev->eq_table = NULL;
2490 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2491 struct ib_port_immutable *immutable)
2493 struct ib_port_attr attr;
2494 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2497 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2498 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2499 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2501 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2502 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2503 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2504 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2505 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2506 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET;
2507 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE |
2508 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP))
2509 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2512 err = ib_query_port(ibdev, port_num, &attr);
2516 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2517 immutable->gid_tbl_len = attr.gid_tbl_len;
2522 static void get_fw_ver_str(struct ib_device *device, char *str)
2524 struct mlx4_ib_dev *dev =
2525 container_of(device, struct mlx4_ib_dev, ib_dev);
2526 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d",
2527 (int) (dev->dev->caps.fw_ver >> 32),
2528 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2529 (int) dev->dev->caps.fw_ver & 0xffff);
2532 static const struct ib_device_ops mlx4_ib_dev_ops = {
2533 .add_gid = mlx4_ib_add_gid,
2534 .alloc_mr = mlx4_ib_alloc_mr,
2535 .alloc_pd = mlx4_ib_alloc_pd,
2536 .alloc_ucontext = mlx4_ib_alloc_ucontext,
2537 .attach_mcast = mlx4_ib_mcg_attach,
2538 .create_ah = mlx4_ib_create_ah,
2539 .create_cq = mlx4_ib_create_cq,
2540 .create_qp = mlx4_ib_create_qp,
2541 .create_srq = mlx4_ib_create_srq,
2542 .dealloc_pd = mlx4_ib_dealloc_pd,
2543 .dealloc_ucontext = mlx4_ib_dealloc_ucontext,
2544 .del_gid = mlx4_ib_del_gid,
2545 .dereg_mr = mlx4_ib_dereg_mr,
2546 .destroy_ah = mlx4_ib_destroy_ah,
2547 .destroy_cq = mlx4_ib_destroy_cq,
2548 .destroy_qp = mlx4_ib_destroy_qp,
2549 .destroy_srq = mlx4_ib_destroy_srq,
2550 .detach_mcast = mlx4_ib_mcg_detach,
2551 .disassociate_ucontext = mlx4_ib_disassociate_ucontext,
2552 .drain_rq = mlx4_ib_drain_rq,
2553 .drain_sq = mlx4_ib_drain_sq,
2554 .get_dev_fw_str = get_fw_ver_str,
2555 .get_dma_mr = mlx4_ib_get_dma_mr,
2556 .get_link_layer = mlx4_ib_port_link_layer,
2557 .get_netdev = mlx4_ib_get_netdev,
2558 .get_port_immutable = mlx4_port_immutable,
2559 .map_mr_sg = mlx4_ib_map_mr_sg,
2560 .mmap = mlx4_ib_mmap,
2561 .modify_cq = mlx4_ib_modify_cq,
2562 .modify_device = mlx4_ib_modify_device,
2563 .modify_port = mlx4_ib_modify_port,
2564 .modify_qp = mlx4_ib_modify_qp,
2565 .modify_srq = mlx4_ib_modify_srq,
2566 .poll_cq = mlx4_ib_poll_cq,
2567 .post_recv = mlx4_ib_post_recv,
2568 .post_send = mlx4_ib_post_send,
2569 .post_srq_recv = mlx4_ib_post_srq_recv,
2570 .process_mad = mlx4_ib_process_mad,
2571 .query_ah = mlx4_ib_query_ah,
2572 .query_device = mlx4_ib_query_device,
2573 .query_gid = mlx4_ib_query_gid,
2574 .query_pkey = mlx4_ib_query_pkey,
2575 .query_port = mlx4_ib_query_port,
2576 .query_qp = mlx4_ib_query_qp,
2577 .query_srq = mlx4_ib_query_srq,
2578 .reg_user_mr = mlx4_ib_reg_user_mr,
2579 .req_notify_cq = mlx4_ib_arm_cq,
2580 .rereg_user_mr = mlx4_ib_rereg_user_mr,
2581 .resize_cq = mlx4_ib_resize_cq,
2584 static const struct ib_device_ops mlx4_ib_dev_wq_ops = {
2585 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table,
2586 .create_wq = mlx4_ib_create_wq,
2587 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2588 .destroy_wq = mlx4_ib_destroy_wq,
2589 .modify_wq = mlx4_ib_modify_wq,
2592 static const struct ib_device_ops mlx4_ib_dev_fmr_ops = {
2593 .alloc_fmr = mlx4_ib_fmr_alloc,
2594 .dealloc_fmr = mlx4_ib_fmr_dealloc,
2595 .map_phys_fmr = mlx4_ib_map_phys_fmr,
2596 .unmap_fmr = mlx4_ib_unmap_fmr,
2599 static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2600 .alloc_mw = mlx4_ib_alloc_mw,
2601 .dealloc_mw = mlx4_ib_dealloc_mw,
2604 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2605 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2606 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2609 static const struct ib_device_ops mlx4_ib_dev_fs_ops = {
2610 .create_flow = mlx4_ib_create_flow,
2611 .destroy_flow = mlx4_ib_destroy_flow,
2614 static void *mlx4_ib_add(struct mlx4_dev *dev)
2616 struct mlx4_ib_dev *ibdev;
2620 struct mlx4_ib_iboe *iboe;
2621 int ib_num_ports = 0;
2622 int num_req_counters;
2625 struct counter_index *new_counter_index = NULL;
2627 pr_info_once("%s", mlx4_ib_version);
2630 mlx4_foreach_ib_transport_port(i, dev)
2633 /* No point in registering a device with no ports... */
2637 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2639 dev_err(&dev->persist->pdev->dev,
2640 "Device struct alloc failed\n");
2644 iboe = &ibdev->iboe;
2646 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2649 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2652 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2654 if (!ibdev->uar_map)
2656 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2659 ibdev->bond_next_port = 0;
2661 ibdev->ib_dev.owner = THIS_MODULE;
2662 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2663 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2664 ibdev->num_ports = num_ports;
2665 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2666 1 : ibdev->num_ports;
2667 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2668 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2670 if (dev->caps.userspace_caps)
2671 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2673 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2675 ibdev->ib_dev.uverbs_cmd_mask =
2676 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2677 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2678 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2679 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2680 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2681 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2682 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2683 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2684 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2685 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2686 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2687 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2688 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2689 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2690 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2691 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2692 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2693 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2694 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2695 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2696 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2697 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2698 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2699 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2701 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);
2702 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2703 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_CQ) |
2704 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2705 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2706 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2708 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&
2709 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==
2710 IB_LINK_LAYER_ETHERNET) ||
2711 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==
2712 IB_LINK_LAYER_ETHERNET))) {
2713 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2714 (1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) |
2715 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) |
2716 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) |
2717 (1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) |
2718 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL);
2719 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);
2722 if (!mlx4_is_slave(ibdev->dev))
2723 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fmr_ops);
2725 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2726 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2727 ibdev->ib_dev.uverbs_cmd_mask |=
2728 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2729 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2730 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);
2733 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2734 ibdev->ib_dev.uverbs_cmd_mask |=
2735 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2736 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2737 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);
2740 if (check_flow_steering_support(dev)) {
2741 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2742 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2743 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2744 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2745 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);
2748 mlx4_ib_alloc_eqs(dev, ibdev);
2750 spin_lock_init(&iboe->lock);
2752 if (init_node_data(ibdev))
2754 mlx4_init_sl2vl_tbl(ibdev);
2756 for (i = 0; i < ibdev->num_ports; ++i) {
2757 mutex_init(&ibdev->counters_table[i].mutex);
2758 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2759 iboe->last_port_state[i] = IB_PORT_DOWN;
2762 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2763 for (i = 0; i < num_req_counters; ++i) {
2764 mutex_init(&ibdev->qp1_proxy_lock[i]);
2766 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2767 IB_LINK_LAYER_ETHERNET) {
2768 err = mlx4_counter_alloc(ibdev->dev, &counter_index,
2769 MLX4_RES_USAGE_DRIVER);
2770 /* if failed to allocate a new counter, use default */
2773 mlx4_get_default_counter_index(dev,
2777 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2778 counter_index = mlx4_get_default_counter_index(dev,
2781 new_counter_index = kmalloc(sizeof(*new_counter_index),
2783 if (!new_counter_index) {
2785 mlx4_counter_free(ibdev->dev, counter_index);
2788 new_counter_index->index = counter_index;
2789 new_counter_index->allocated = allocated;
2790 list_add_tail(&new_counter_index->list,
2791 &ibdev->counters_table[i].counters_list);
2792 ibdev->counters_table[i].default_counter = counter_index;
2793 pr_info("counter index %d for port %d allocated %d\n",
2794 counter_index, i + 1, allocated);
2796 if (mlx4_is_bonded(dev))
2797 for (i = 1; i < ibdev->num_ports ; ++i) {
2799 kmalloc(sizeof(struct counter_index),
2801 if (!new_counter_index)
2803 new_counter_index->index = counter_index;
2804 new_counter_index->allocated = 0;
2805 list_add_tail(&new_counter_index->list,
2806 &ibdev->counters_table[i].counters_list);
2807 ibdev->counters_table[i].default_counter =
2811 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2814 spin_lock_init(&ibdev->sm_lock);
2815 mutex_init(&ibdev->cap_mask_mutex);
2816 INIT_LIST_HEAD(&ibdev->qp_list);
2817 spin_lock_init(&ibdev->reset_flow_resource_lock);
2819 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2821 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2822 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2823 MLX4_IB_UC_STEER_QPN_ALIGN,
2824 &ibdev->steer_qpn_base, 0,
2825 MLX4_RES_USAGE_DRIVER);
2829 ibdev->ib_uc_qpns_bitmap =
2830 kmalloc_array(BITS_TO_LONGS(ibdev->steer_qpn_count),
2833 if (!ibdev->ib_uc_qpns_bitmap)
2834 goto err_steer_qp_release;
2836 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2837 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2838 ibdev->steer_qpn_count);
2839 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2840 dev, ibdev->steer_qpn_base,
2841 ibdev->steer_qpn_base +
2842 ibdev->steer_qpn_count - 1);
2844 goto err_steer_free_bitmap;
2846 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2847 ibdev->steer_qpn_count);
2851 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2852 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2854 if (mlx4_ib_alloc_diag_counters(ibdev))
2855 goto err_steer_free_bitmap;
2857 rdma_set_device_sysfs_group(&ibdev->ib_dev, &mlx4_attr_group);
2858 ibdev->ib_dev.driver_id = RDMA_DRIVER_MLX4;
2859 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d"))
2860 goto err_diag_counters;
2862 if (mlx4_ib_mad_init(ibdev))
2865 if (mlx4_ib_init_sriov(ibdev))
2868 if (!iboe->nb.notifier_call) {
2869 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2870 err = register_netdevice_notifier(&iboe->nb);
2872 iboe->nb.notifier_call = NULL;
2876 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2877 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2882 ibdev->ib_active = true;
2883 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2884 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2887 if (mlx4_is_mfunc(ibdev->dev))
2890 /* create paravirt contexts for any VFs which are active */
2891 if (mlx4_is_master(ibdev->dev)) {
2892 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2893 if (j == mlx4_master_func_num(ibdev->dev))
2895 if (mlx4_is_slave_active(ibdev->dev, j))
2896 do_slave_init(ibdev, j, 1);
2902 if (ibdev->iboe.nb.notifier_call) {
2903 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2904 pr_warn("failure unregistering notifier\n");
2905 ibdev->iboe.nb.notifier_call = NULL;
2907 flush_workqueue(wq);
2909 mlx4_ib_close_sriov(ibdev);
2912 mlx4_ib_mad_cleanup(ibdev);
2915 ib_unregister_device(&ibdev->ib_dev);
2918 mlx4_ib_diag_cleanup(ibdev);
2920 err_steer_free_bitmap:
2921 kfree(ibdev->ib_uc_qpns_bitmap);
2923 err_steer_qp_release:
2924 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2925 ibdev->steer_qpn_count);
2927 for (i = 0; i < ibdev->num_ports; ++i)
2928 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2931 mlx4_ib_free_eqs(dev, ibdev);
2932 iounmap(ibdev->uar_map);
2935 mlx4_uar_free(dev, &ibdev->priv_uar);
2938 mlx4_pd_free(dev, ibdev->priv_pdn);
2941 ib_dealloc_device(&ibdev->ib_dev);
2946 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2950 WARN_ON(!dev->ib_uc_qpns_bitmap);
2952 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2953 dev->steer_qpn_count,
2954 get_count_order(count));
2958 *qpn = dev->steer_qpn_base + offset;
2962 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2965 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2968 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n",
2969 qpn, dev->steer_qpn_base))
2970 /* not supposed to be here */
2973 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2974 qpn - dev->steer_qpn_base,
2975 get_count_order(count));
2978 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2983 struct ib_flow_attr *flow = NULL;
2984 struct ib_flow_spec_ib *ib_spec;
2987 flow_size = sizeof(struct ib_flow_attr) +
2988 sizeof(struct ib_flow_spec_ib);
2989 flow = kzalloc(flow_size, GFP_KERNEL);
2992 flow->port = mqp->port;
2993 flow->num_of_specs = 1;
2994 flow->size = flow_size;
2995 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2996 ib_spec->type = IB_FLOW_SPEC_IB;
2997 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2998 /* Add an empty rule for IB L2 */
2999 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
3001 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
3006 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
3012 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
3014 struct mlx4_ib_dev *ibdev = ibdev_ptr;
3018 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
3019 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
3020 ibdev->ib_active = false;
3021 flush_workqueue(wq);
3023 mlx4_ib_close_sriov(ibdev);
3024 mlx4_ib_mad_cleanup(ibdev);
3025 ib_unregister_device(&ibdev->ib_dev);
3026 mlx4_ib_diag_cleanup(ibdev);
3027 if (ibdev->iboe.nb.notifier_call) {
3028 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
3029 pr_warn("failure unregistering notifier\n");
3030 ibdev->iboe.nb.notifier_call = NULL;
3033 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
3034 ibdev->steer_qpn_count);
3035 kfree(ibdev->ib_uc_qpns_bitmap);
3037 iounmap(ibdev->uar_map);
3038 for (p = 0; p < ibdev->num_ports; ++p)
3039 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
3041 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3042 mlx4_CLOSE_PORT(dev, p);
3044 mlx4_ib_free_eqs(dev, ibdev);
3046 mlx4_uar_free(dev, &ibdev->priv_uar);
3047 mlx4_pd_free(dev, ibdev->priv_pdn);
3048 ib_dealloc_device(&ibdev->ib_dev);
3051 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3053 struct mlx4_ib_demux_work **dm = NULL;
3054 struct mlx4_dev *dev = ibdev->dev;
3056 unsigned long flags;
3057 struct mlx4_active_ports actv_ports;
3059 unsigned int first_port;
3061 if (!mlx4_is_master(dev))
3064 actv_ports = mlx4_get_active_ports(dev, slave);
3065 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3066 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3068 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3072 for (i = 0; i < ports; i++) {
3073 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3079 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3080 dm[i]->port = first_port + i + 1;
3081 dm[i]->slave = slave;
3082 dm[i]->do_init = do_init;
3085 /* initialize or tear down tunnel QPs for the slave */
3086 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3087 if (!ibdev->sriov.is_going_down) {
3088 for (i = 0; i < ports; i++)
3089 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3090 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3092 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3093 for (i = 0; i < ports; i++)
3101 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3103 struct mlx4_ib_qp *mqp;
3104 unsigned long flags_qp;
3105 unsigned long flags_cq;
3106 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3107 struct list_head cq_notify_list;
3108 struct mlx4_cq *mcq;
3109 unsigned long flags;
3111 pr_warn("mlx4_ib_handle_catas_error was started\n");
3112 INIT_LIST_HEAD(&cq_notify_list);
3114 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3115 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3117 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3118 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3119 if (mqp->sq.tail != mqp->sq.head) {
3120 send_mcq = to_mcq(mqp->ibqp.send_cq);
3121 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3122 if (send_mcq->mcq.comp &&
3123 mqp->ibqp.send_cq->comp_handler) {
3124 if (!send_mcq->mcq.reset_notify_added) {
3125 send_mcq->mcq.reset_notify_added = 1;
3126 list_add_tail(&send_mcq->mcq.reset_notify,
3130 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3132 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3133 /* Now, handle the QP's receive queue */
3134 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3135 /* no handling is needed for SRQ */
3136 if (!mqp->ibqp.srq) {
3137 if (mqp->rq.tail != mqp->rq.head) {
3138 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3139 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3140 if (recv_mcq->mcq.comp &&
3141 mqp->ibqp.recv_cq->comp_handler) {
3142 if (!recv_mcq->mcq.reset_notify_added) {
3143 recv_mcq->mcq.reset_notify_added = 1;
3144 list_add_tail(&recv_mcq->mcq.reset_notify,
3148 spin_unlock_irqrestore(&recv_mcq->lock,
3152 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3155 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3158 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3159 pr_warn("mlx4_ib_handle_catas_error ended\n");
3162 static void handle_bonded_port_state_event(struct work_struct *work)
3164 struct ib_event_work *ew =
3165 container_of(work, struct ib_event_work, work);
3166 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3167 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3169 struct ib_event ibev;
3172 spin_lock_bh(&ibdev->iboe.lock);
3173 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3174 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3175 enum ib_port_state curr_port_state;
3181 (netif_running(curr_netdev) &&
3182 netif_carrier_ok(curr_netdev)) ?
3183 IB_PORT_ACTIVE : IB_PORT_DOWN;
3185 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3186 curr_port_state : IB_PORT_ACTIVE;
3188 spin_unlock_bh(&ibdev->iboe.lock);
3190 ibev.device = &ibdev->ib_dev;
3191 ibev.element.port_num = 1;
3192 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3193 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3195 ib_dispatch_event(&ibev);
3198 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3203 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3205 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3209 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3212 static void ib_sl2vl_update_work(struct work_struct *work)
3214 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3215 struct mlx4_ib_dev *mdev = ew->ib_dev;
3216 int port = ew->port;
3218 mlx4_ib_sl2vl_update(mdev, port);
3223 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3226 struct ib_event_work *ew;
3228 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3230 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3233 queue_work(wq, &ew->work);
3237 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3238 enum mlx4_dev_event event, unsigned long param)
3240 struct ib_event ibev;
3241 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3242 struct mlx4_eqe *eqe = NULL;
3243 struct ib_event_work *ew;
3246 if (mlx4_is_bonded(dev) &&
3247 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3248 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3249 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3252 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3254 queue_work(wq, &ew->work);
3258 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3259 eqe = (struct mlx4_eqe *)param;
3264 case MLX4_DEV_EVENT_PORT_UP:
3265 if (p > ibdev->num_ports)
3267 if (!mlx4_is_slave(dev) &&
3268 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3269 IB_LINK_LAYER_INFINIBAND) {
3270 if (mlx4_is_master(dev))
3271 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3272 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3273 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3274 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3276 ibev.event = IB_EVENT_PORT_ACTIVE;
3279 case MLX4_DEV_EVENT_PORT_DOWN:
3280 if (p > ibdev->num_ports)
3282 ibev.event = IB_EVENT_PORT_ERR;
3285 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3286 ibdev->ib_active = false;
3287 ibev.event = IB_EVENT_DEVICE_FATAL;
3288 mlx4_ib_handle_catas_error(ibdev);
3291 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3292 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3296 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3297 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3299 /* need to queue only for port owner, which uses GEN_EQE */
3300 if (mlx4_is_master(dev))
3301 queue_work(wq, &ew->work);
3303 handle_port_mgmt_change_event(&ew->work);
3306 case MLX4_DEV_EVENT_SLAVE_INIT:
3307 /* here, p is the slave id */
3308 do_slave_init(ibdev, p, 1);
3309 if (mlx4_is_master(dev)) {
3312 for (i = 1; i <= ibdev->num_ports; i++) {
3313 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3314 == IB_LINK_LAYER_INFINIBAND)
3315 mlx4_ib_slave_alias_guid_event(ibdev,
3322 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3323 if (mlx4_is_master(dev)) {
3326 for (i = 1; i <= ibdev->num_ports; i++) {
3327 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3328 == IB_LINK_LAYER_INFINIBAND)
3329 mlx4_ib_slave_alias_guid_event(ibdev,
3334 /* here, p is the slave id */
3335 do_slave_init(ibdev, p, 0);
3342 ibev.device = ibdev_ptr;
3343 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3345 ib_dispatch_event(&ibev);
3348 static struct mlx4_interface mlx4_ib_interface = {
3350 .remove = mlx4_ib_remove,
3351 .event = mlx4_ib_event,
3352 .protocol = MLX4_PROT_IB_IPV6,
3353 .flags = MLX4_INTFF_BONDING
3356 static int __init mlx4_ib_init(void)
3360 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3364 err = mlx4_ib_mcg_init();
3368 err = mlx4_register_interface(&mlx4_ib_interface);
3375 mlx4_ib_mcg_destroy();
3378 destroy_workqueue(wq);
3382 static void __exit mlx4_ib_cleanup(void)
3384 mlx4_unregister_interface(&mlx4_ib_interface);
3385 mlx4_ib_mcg_destroy();
3386 destroy_workqueue(wq);
3389 module_init(mlx4_ib_init);
3390 module_exit(mlx4_ib_cleanup);