drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42 #include <linux/ip.h>
  43 #include <net/ipv6.h>
  44
  45 #include <linux/mlx4/driver.h>
  46 #include "mlx4_ib.h"
  47
  48 enum {
  49         MLX4_IB_VENDOR_CLASS1 = 0x9,
  50         MLX4_IB_VENDOR_CLASS2 = 0xa
  51 };
  52
  53 #define MLX4_TUN_SEND_WRID_SHIFT 34
  54 #define MLX4_TUN_QPN_SHIFT 32
  55 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  56 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  57
  58 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  59 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  60
  61  /* Port mgmt change event handling */
  62
  63 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  64 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  65 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  66 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  67 #define GUID_TBL_BLK_NUM_ENTRIES 8
  68 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  69
  70 struct mlx4_mad_rcv_buf {
  71         struct ib_grh grh;
  72         u8 payload[256];
  73 } __packed;
  74
  75 struct mlx4_mad_snd_buf {
  76         u8 payload[256];
  77 } __packed;
  78
  79 struct mlx4_tunnel_mad {
  80         struct ib_grh grh;
  81         struct mlx4_ib_tunnel_header hdr;
  82         struct ib_mad mad;
  83 } __packed;
  84
  85 struct mlx4_rcv_tunnel_mad {
  86         struct mlx4_rcv_tunnel_hdr hdr;
  87         struct ib_grh grh;
  88         struct ib_mad mad;
  89 } __packed;
  90
  91 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  92 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  93 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  94                                 int block, u32 change_bitmap);
  95
  96 __be64 mlx4_ib_gen_node_guid(void)
  97 {
  98 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  99         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
 100 }
 101
 102 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 103 {
 104         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 105                 cpu_to_be64(0xff00000000000000LL);
 106 }
 107
 108 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 109                  int port, const struct ib_wc *in_wc,
 110                  const struct ib_grh *in_grh,
 111                  const void *in_mad, void *response_mad)
 112 {
 113         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 114         void *inbox;
 115         int err;
 116         u32 in_modifier = port;
 117         u8 op_modifier = 0;
 118
 119         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 120         if (IS_ERR(inmailbox))
 121                 return PTR_ERR(inmailbox);
 122         inbox = inmailbox->buf;
 123
 124         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 125         if (IS_ERR(outmailbox)) {
 126                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 127                 return PTR_ERR(outmailbox);
 128         }
 129
 130         memcpy(inbox, in_mad, 256);
 131
 132         /*
 133          * Key check traps can't be generated unless we have in_wc to
 134          * tell us where to send the trap.
 135          */
 136         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 137                 op_modifier |= 0x1;
 138         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 139                 op_modifier |= 0x2;
 140         if (mlx4_is_mfunc(dev->dev) &&
 141             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 142                 op_modifier |= 0x8;
 143
 144         if (in_wc) {
 145                 struct {
 146                         __be32          my_qpn;
 147                         u32             reserved1;
 148                         __be32          rqpn;
 149                         u8              sl;
 150                         u8              g_path;
 151                         u16             reserved2[2];
 152                         __be16          pkey;
 153                         u32             reserved3[11];
 154                         u8              grh[40];
 155                 } *ext_info;
 156
 157                 memset(inbox + 256, 0, 256);
 158                 ext_info = inbox + 256;
 159
 160                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 161                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 162                 ext_info->sl     = in_wc->sl << 4;
 163                 ext_info->g_path = in_wc->dlid_path_bits |
 164                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 165                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 166
 167                 if (in_grh)
 168                         memcpy(ext_info->grh, in_grh, 40);
 169
 170                 op_modifier |= 0x4;
 171
 172                 in_modifier |= in_wc->slid << 16;
 173         }
 174
 175         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 176                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 177                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 178                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 179
 180         if (!err)
 181                 memcpy(response_mad, outmailbox->buf, 256);
 182
 183         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 184         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 185
 186         return err;
 187 }
 188
 189 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 190 {
 191         struct ib_ah *new_ah;
 192         struct ib_ah_attr ah_attr;
 193         unsigned long flags;
 194
 195         if (!dev->send_agent[port_num - 1][0])
 196                 return;
 197
 198         memset(&ah_attr, 0, sizeof ah_attr);
 199         ah_attr.dlid     = lid;
 200         ah_attr.sl       = sl;
 201         ah_attr.port_num = port_num;
 202
 203         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 204                               &ah_attr);
 205         if (IS_ERR(new_ah))
 206                 return;
 207
 208         spin_lock_irqsave(&dev->sm_lock, flags);
 209         if (dev->sm_ah[port_num - 1])
 210                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 211         dev->sm_ah[port_num - 1] = new_ah;
 212         spin_unlock_irqrestore(&dev->sm_lock, flags);
 213 }
 214
 215 /*
 216  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 217  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 218  */
 219 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 220                       u16 prev_lid)
 221 {
 222         struct ib_port_info *pinfo;
 223         u16 lid;
 224         __be16 *base;
 225         u32 bn, pkey_change_bitmap;
 226         int i;
 227
 228
 229         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 230         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 231              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 232             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 233                 switch (mad->mad_hdr.attr_id) {
 234                 case IB_SMP_ATTR_PORT_INFO:
 235                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 236                                 return;
 237                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 238                         lid = be16_to_cpu(pinfo->lid);
 239
 240                         update_sm_ah(dev, port_num,
 241                                      be16_to_cpu(pinfo->sm_lid),
 242                                      pinfo->neighbormtu_mastersmsl & 0xf);
 243
 244                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 245                                 handle_client_rereg_event(dev, port_num);
 246
 247                         if (prev_lid != lid)
 248                                 handle_lid_change_event(dev, port_num);
 249                         break;
 250
 251                 case IB_SMP_ATTR_PKEY_TABLE:
 252                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 253                                 return;
 254                         if (!mlx4_is_mfunc(dev->dev)) {
 255                                 mlx4_ib_dispatch_event(dev, port_num,
 256                                                        IB_EVENT_PKEY_CHANGE);
 257                                 break;
 258                         }
 259
 260                         /* at this point, we are running in the master.
 261                          * Slaves do not receive SMPs.
 262                          */
 263                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 264                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 265                         pkey_change_bitmap = 0;
 266                         for (i = 0; i < 32; i++) {
 267                                 pr_debug("PKEY[%d] = x%x\n",
 268                                          i + bn*32, be16_to_cpu(base[i]));
 269                                 if (be16_to_cpu(base[i]) !=
 270                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 271                                         pkey_change_bitmap |= (1 << i);
 272                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 273                                                 be16_to_cpu(base[i]);
 274                                 }
 275                         }
 276                         pr_debug("PKEY Change event: port=%d, "
 277                                  "block=0x%x, change_bitmap=0x%x\n",
 278                                  port_num, bn, pkey_change_bitmap);
 279
 280                         if (pkey_change_bitmap) {
 281                                 mlx4_ib_dispatch_event(dev, port_num,
 282                                                        IB_EVENT_PKEY_CHANGE);
 283                                 if (!dev->sriov.is_going_down)
 284                                         __propagate_pkey_ev(dev, port_num, bn,
 285                                                             pkey_change_bitmap);
 286                         }
 287                         break;
 288
 289                 case IB_SMP_ATTR_GUID_INFO:
 290                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 291                                 return;
 292                         /* paravirtualized master's guid is guid 0 -- does not change */
 293                         if (!mlx4_is_master(dev->dev))
 294                                 mlx4_ib_dispatch_event(dev, port_num,
 295                                                        IB_EVENT_GID_CHANGE);
 296                         /*if master, notify relevant slaves*/
 297                         if (mlx4_is_master(dev->dev) &&
 298                             !dev->sriov.is_going_down) {
 299                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 300                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 301                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 302                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 303                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 304                         }
 305                         break;
 306
 307                 case IB_SMP_ATTR_SL_TO_VL_TABLE:
 308                         /* cache sl to vl mapping changes for use in
 309                          * filling QP1 LRH VL field when sending packets
 310                          */
 311                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV &&
 312                             dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)
 313                                 return;
 314                         if (!mlx4_is_slave(dev->dev)) {
 315                                 union sl2vl_tbl_to_u64 sl2vl64;
 316                                 int jj;
 317
 318                                 for (jj = 0; jj < 8; jj++) {
 319                                         sl2vl64.sl8[jj] = ((struct ib_smp *)mad)->data[jj];
 320                                         pr_debug("port %u, sl2vl[%d] = %02x\n",
 321                                                  port_num, jj, sl2vl64.sl8[jj]);
 322                                 }
 323                                 atomic64_set(&dev->sl2vl[port_num - 1], sl2vl64.sl64);
 324                         }
 325                         break;
 326
 327                 default:
 328                         break;
 329                 }
 330 }
 331
 332 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 333                                 int block, u32 change_bitmap)
 334 {
 335         int i, ix, slave, err;
 336         int have_event = 0;
 337
 338         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 339                 if (slave == mlx4_master_func_num(dev->dev))
 340                         continue;
 341                 if (!mlx4_is_slave_active(dev->dev, slave))
 342                         continue;
 343
 344                 have_event = 0;
 345                 for (i = 0; i < 32; i++) {
 346                         if (!(change_bitmap & (1 << i)))
 347                                 continue;
 348                         for (ix = 0;
 349                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 350                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 351                                     [ix] == i + 32 * block) {
 352                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 353                                         pr_debug("propagate_pkey_ev: slave %d,"
 354                                                  " port %d, ix %d (%d)\n",
 355                                                  slave, port_num, ix, err);
 356                                         have_event = 1;
 357                                         break;
 358                                 }
 359                         }
 360                         if (have_event)
 361                                 break;
 362                 }
 363         }
 364 }
 365
 366 static void node_desc_override(struct ib_device *dev,
 367                                struct ib_mad *mad)
 368 {
 369         unsigned long flags;
 370
 371         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 372              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 373             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 374             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 375                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 376                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc,
 377                        IB_DEVICE_NODE_DESC_MAX);
 378                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 379         }
 380 }
 381
 382 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 383 {
 384         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 385         struct ib_mad_send_buf *send_buf;
 386         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 387         int ret;
 388         unsigned long flags;
 389
 390         if (agent) {
 391                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 392                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
 393                                               IB_MGMT_BASE_VERSION);
 394                 if (IS_ERR(send_buf))
 395                         return;
 396                 /*
 397                  * We rely here on the fact that MLX QPs don't use the
 398                  * address handle after the send is posted (this is
 399                  * wrong following the IB spec strictly, but we know
 400                  * it's OK for our devices).
 401                  */
 402                 spin_lock_irqsave(&dev->sm_lock, flags);
 403                 memcpy(send_buf->mad, mad, sizeof *mad);
 404                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 405                         ret = ib_post_send_mad(send_buf, NULL);
 406                 else
 407                         ret = -EINVAL;
 408                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 409
 410                 if (ret)
 411                         ib_free_send_mad(send_buf);
 412         }
 413 }
 414
 415 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 416                                                              struct ib_sa_mad *sa_mad)
 417 {
 418         int ret = 0;
 419
 420         /* dispatch to different sa handlers */
 421         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 422         case IB_SA_ATTR_MC_MEMBER_REC:
 423                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 424                 break;
 425         default:
 426                 break;
 427         }
 428         return ret;
 429 }
 430
 431 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 432 {
 433         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 434         int i;
 435
 436         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 437                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 438                         return i;
 439         }
 440         return -1;
 441 }
 442
 443
 444 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 445                                    u8 port, u16 pkey, u16 *ix)
 446 {
 447         int i, ret;
 448         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 449         u16 slot_pkey;
 450
 451         if (slave == mlx4_master_func_num(dev->dev))
 452                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 453
 454         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 455
 456         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 457                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 458                         continue;
 459
 460                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 461
 462                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 463                 if (ret)
 464                         continue;
 465                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 466                         if (slot_pkey & 0x8000) {
 467                                 *ix = (u16) pkey_ix;
 468                                 return 0;
 469                         } else {
 470                                 /* take first partial pkey index found */
 471                                 if (partial_ix == 0xFF)
 472                                         partial_ix = pkey_ix;
 473                         }
 474                 }
 475         }
 476
 477         if (partial_ix < 0xFF) {
 478                 *ix = (u16) partial_ix;
 479                 return 0;
 480         }
 481
 482         return -EINVAL;
 483 }
 484
 485 static int get_gids_from_l3_hdr(struct ib_grh *grh, union ib_gid *sgid,
 486                                 union ib_gid *dgid)
 487 {
 488         int version = ib_get_rdma_header_version((const union rdma_network_hdr *)grh);
 489         enum rdma_network_type net_type;
 490
 491         if (version == 4)
 492                 net_type = RDMA_NETWORK_IPV4;
 493         else if (version == 6)
 494                 net_type = RDMA_NETWORK_IPV6;
 495         else
 496                 return -EINVAL;
 497
 498         return ib_get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
 499                                          sgid, dgid);
 500 }
 501
 502 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 503                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 504                           struct ib_grh *grh, struct ib_mad *mad)
 505 {
 506         struct ib_sge list;
 507         struct ib_ud_wr wr;
 508         struct ib_send_wr *bad_wr;
 509         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 510         struct mlx4_ib_demux_pv_qp *tun_qp;
 511         struct mlx4_rcv_tunnel_mad *tun_mad;
 512         struct ib_ah_attr attr;
 513         struct ib_ah *ah;
 514         struct ib_qp *src_qp = NULL;
 515         unsigned tun_tx_ix = 0;
 516         int dqpn;
 517         int ret = 0;
 518         u16 tun_pkey_ix;
 519         u16 cached_pkey;
 520         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 521
 522         if (dest_qpt > IB_QPT_GSI)
 523                 return -EINVAL;
 524
 525         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 526
 527         /* check if proxy qp created */
 528         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 529                 return -EAGAIN;
 530
 531         if (!dest_qpt)
 532                 tun_qp = &tun_ctx->qp[0];
 533         else
 534                 tun_qp = &tun_ctx->qp[1];
 535
 536         /* compute P_Key index to put in tunnel header for slave */
 537         if (dest_qpt) {
 538                 u16 pkey_ix;
 539                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 540                 if (ret)
 541                         return -EINVAL;
 542
 543                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 544                 if (ret)
 545                         return -EINVAL;
 546                 tun_pkey_ix = pkey_ix;
 547         } else
 548                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 549
 550         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 551
 552         /* get tunnel tx data buf for slave */
 553         src_qp = tun_qp->qp;
 554
 555         /* create ah. Just need an empty one with the port num for the post send.
 556          * The driver will set the force loopback bit in post_send */
 557         memset(&attr, 0, sizeof attr);
 558         attr.port_num = port;
 559         if (is_eth) {
 560                 union ib_gid sgid;
 561
 562                 if (get_gids_from_l3_hdr(grh, &sgid, &attr.grh.dgid))
 563                         return -EINVAL;
 564                 attr.ah_flags = IB_AH_GRH;
 565         }
 566         ah = ib_create_ah(tun_ctx->pd, &attr);
 567         if (IS_ERR(ah))
 568                 return -ENOMEM;
 569
 570         /* allocate tunnel tx buf after pass failure returns */
 571         spin_lock(&tun_qp->tx_lock);
 572         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 573             (MLX4_NUM_TUNNEL_BUFS - 1))
 574                 ret = -EAGAIN;
 575         else
 576                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 577         spin_unlock(&tun_qp->tx_lock);
 578         if (ret)
 579                 goto end;
 580
 581         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 582         if (tun_qp->tx_ring[tun_tx_ix].ah)
 583                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 584         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 585         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 586                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 587                                    sizeof (struct mlx4_rcv_tunnel_mad),
 588                                    DMA_TO_DEVICE);
 589
 590         /* copy over to tunnel buffer */
 591         if (grh)
 592                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 593         memcpy(&tun_mad->mad, mad, sizeof *mad);
 594
 595         /* adjust tunnel data */
 596         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 597         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 598         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 599
 600         if (is_eth) {
 601                 u16 vlan = 0;
 602                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 603                                                 NULL)) {
 604                         /* VST mode */
 605                         if (vlan != wc->vlan_id)
 606                                 /* Packet vlan is not the VST-assigned vlan.
 607                                  * Drop the packet.
 608                                  */
 609                                 goto out;
 610                          else
 611                                 /* Remove the vlan tag before forwarding
 612                                  * the packet to the VF.
 613                                  */
 614                                 vlan = 0xffff;
 615                 } else {
 616                         vlan = wc->vlan_id;
 617                 }
 618
 619                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 620                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 621                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 622         } else {
 623                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 624                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 625         }
 626
 627         ib_dma_sync_single_for_device(&dev->ib_dev,
 628                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 629                                       sizeof (struct mlx4_rcv_tunnel_mad),
 630                                       DMA_TO_DEVICE);
 631
 632         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 633         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 634         list.lkey = tun_ctx->pd->local_dma_lkey;
 635
 636         wr.ah = ah;
 637         wr.port_num = port;
 638         wr.remote_qkey = IB_QP_SET_QKEY;
 639         wr.remote_qpn = dqpn;
 640         wr.wr.next = NULL;
 641         wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 642         wr.wr.sg_list = &list;
 643         wr.wr.num_sge = 1;
 644         wr.wr.opcode = IB_WR_SEND;
 645         wr.wr.send_flags = IB_SEND_SIGNALED;
 646
 647         ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
 648         if (!ret)
 649                 return 0;
 650  out:
 651         spin_lock(&tun_qp->tx_lock);
 652         tun_qp->tx_ix_tail++;
 653         spin_unlock(&tun_qp->tx_lock);
 654         tun_qp->tx_ring[tun_tx_ix].ah = NULL;
 655 end:
 656         ib_destroy_ah(ah);
 657         return ret;
 658 }
 659
 660 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 661                         struct ib_wc *wc, struct ib_grh *grh,
 662                         struct ib_mad *mad)
 663 {
 664         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 665         int err, other_port;
 666         int slave = -1;
 667         u8 *slave_id;
 668         int is_eth = 0;
 669
 670         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 671                 is_eth = 0;
 672         else
 673                 is_eth = 1;
 674
 675         if (is_eth) {
 676                 union ib_gid dgid;
 677                 union ib_gid sgid;
 678
 679                 if (get_gids_from_l3_hdr(grh, &sgid, &dgid))
 680                         return -EINVAL;
 681                 if (!(wc->wc_flags & IB_WC_GRH)) {
 682                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 683                         return -EINVAL;
 684                 }
 685                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 686                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 687                         return -EINVAL;
 688                 }
 689                 err = mlx4_get_slave_from_roce_gid(dev->dev, port, dgid.raw, &slave);
 690                 if (err && mlx4_is_mf_bonded(dev->dev)) {
 691                         other_port = (port == 1) ? 2 : 1;
 692                         err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, dgid.raw, &slave);
 693                         if (!err) {
 694                                 port = other_port;
 695                                 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
 696                                          slave, grh->dgid.raw, port, other_port);
 697                         }
 698                 }
 699                 if (err) {
 700                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 701                         return -ENOENT;
 702                 }
 703                 if (slave >= dev->dev->caps.sqp_demux) {
 704                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 705                                      slave, dev->dev->caps.sqp_demux);
 706                         return -ENOENT;
 707                 }
 708
 709                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 710                         return 0;
 711
 712                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 713                 if (err)
 714                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 715                                  slave, err);
 716                 return 0;
 717         }
 718
 719         /* Initially assume that this mad is for us */
 720         slave = mlx4_master_func_num(dev->dev);
 721
 722         /* See if the slave id is encoded in a response mad */
 723         if (mad->mad_hdr.method & 0x80) {
 724                 slave_id = (u8 *) &mad->mad_hdr.tid;
 725                 slave = *slave_id;
 726                 if (slave != 255) /*255 indicates the dom0*/
 727                         *slave_id = 0; /* remap tid */
 728         }
 729
 730         /* If a grh is present, we demux according to it */
 731         if (wc->wc_flags & IB_WC_GRH) {
 732                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 733                 if (slave < 0) {
 734                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 735                         return -ENOENT;
 736                 }
 737         }
 738         /* Class-specific handling */
 739         switch (mad->mad_hdr.mgmt_class) {
 740         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 741         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 742                 /* 255 indicates the dom0 */
 743                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 744                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 745                                 return -EPERM;
 746                         /* for a VF. drop unsolicited MADs */
 747                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 748                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 749                                              slave, mad->mad_hdr.mgmt_class,
 750                                              mad->mad_hdr.method);
 751                                 return -EINVAL;
 752                         }
 753                 }
 754                 break;
 755         case IB_MGMT_CLASS_SUBN_ADM:
 756                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 757                                              (struct ib_sa_mad *) mad))
 758                         return 0;
 759                 break;
 760         case IB_MGMT_CLASS_CM:
 761                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 762                         return 0;
 763                 break;
 764         case IB_MGMT_CLASS_DEVICE_MGMT:
 765                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 766                         return 0;
 767                 break;
 768         default:
 769                 /* Drop unsupported classes for slaves in tunnel mode */
 770                 if (slave != mlx4_master_func_num(dev->dev)) {
 771                         pr_debug("dropping unsupported ingress mad from class:%d "
 772                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 773                         return 0;
 774                 }
 775         }
 776         /*make sure that no slave==255 was not handled yet.*/
 777         if (slave >= dev->dev->caps.sqp_demux) {
 778                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 779                              slave, dev->dev->caps.sqp_demux);
 780                 return -ENOENT;
 781         }
 782
 783         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 784         if (err)
 785                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 786                          slave, err);
 787         return 0;
 788 }
 789
 790 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 791                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 792                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 793 {
 794         u16 slid, prev_lid = 0;
 795         int err;
 796         struct ib_port_attr pattr;
 797
 798         if (in_wc && in_wc->qp->qp_num) {
 799                 pr_debug("received MAD: slid:%d sqpn:%d "
 800                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 801                         in_wc->slid, in_wc->src_qp,
 802                         in_wc->dlid_path_bits,
 803                         in_wc->qp->qp_num,
 804                         in_wc->wc_flags,
 805                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 806                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 807                 if (in_wc->wc_flags & IB_WC_GRH) {
 808                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 809                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 810                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 811                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 812                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 813                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 814                 }
 815         }
 816
 817         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 818
 819         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 820                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 821                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 822         }
 823
 824         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 825             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 826                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 827                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 828                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 829                         return IB_MAD_RESULT_SUCCESS;
 830
 831                 /*
 832                  * Don't process SMInfo queries -- the SMA can't handle them.
 833                  */
 834                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 835                         return IB_MAD_RESULT_SUCCESS;
 836         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 837                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 838                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 839                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 840                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 841                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 842                         return IB_MAD_RESULT_SUCCESS;
 843         } else
 844                 return IB_MAD_RESULT_SUCCESS;
 845
 846         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 847              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 848             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 849             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 850             !ib_query_port(ibdev, port_num, &pattr))
 851                 prev_lid = pattr.lid;
 852
 853         err = mlx4_MAD_IFC(to_mdev(ibdev),
 854                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 855                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 856                            MLX4_MAD_IFC_NET_VIEW,
 857                            port_num, in_wc, in_grh, in_mad, out_mad);
 858         if (err)
 859                 return IB_MAD_RESULT_FAILURE;
 860
 861         if (!out_mad->mad_hdr.status) {
 862                 smp_snoop(ibdev, port_num, in_mad, prev_lid);
 863                 /* slaves get node desc from FW */
 864                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 865                         node_desc_override(ibdev, out_mad);
 866         }
 867
 868         /* set return bit in status of directed route responses */
 869         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 870                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 871
 872         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 873                 /* no response for trap repress */
 874                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 875
 876         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 877 }
 878
 879 static void edit_counter(struct mlx4_counter *cnt, void *counters,
 880                          __be16 attr_id)
 881 {
 882         switch (attr_id) {
 883         case IB_PMA_PORT_COUNTERS:
 884         {
 885                 struct ib_pma_portcounters *pma_cnt =
 886                         (struct ib_pma_portcounters *)counters;
 887
 888                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 889                                      (be64_to_cpu(cnt->tx_bytes) >> 2));
 890                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 891                                      (be64_to_cpu(cnt->rx_bytes) >> 2));
 892                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 893                                      be64_to_cpu(cnt->tx_frames));
 894                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 895                                      be64_to_cpu(cnt->rx_frames));
 896                 break;
 897         }
 898         case IB_PMA_PORT_COUNTERS_EXT:
 899         {
 900                 struct ib_pma_portcounters_ext *pma_cnt_ext =
 901                         (struct ib_pma_portcounters_ext *)counters;
 902
 903                 pma_cnt_ext->port_xmit_data =
 904                         cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
 905                 pma_cnt_ext->port_rcv_data =
 906                         cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
 907                 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
 908                 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
 909                 break;
 910         }
 911         }
 912 }
 913
 914 static int iboe_process_mad_port_info(void *out_mad)
 915 {
 916         struct ib_class_port_info cpi = {};
 917
 918         cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
 919         memcpy(out_mad, &cpi, sizeof(cpi));
 920         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 921 }
 922
 923 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 924                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 925                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 926 {
 927         struct mlx4_counter counter_stats;
 928         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 929         struct counter_index *tmp_counter;
 930         int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
 931
 932         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 933                 return -EINVAL;
 934
 935         if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
 936                 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
 937
 938         memset(&counter_stats, 0, sizeof(counter_stats));
 939         mutex_lock(&dev->counters_table[port_num - 1].mutex);
 940         list_for_each_entry(tmp_counter,
 941                             &dev->counters_table[port_num - 1].counters_list,
 942                             list) {
 943                 err = mlx4_get_counter_stats(dev->dev,
 944                                              tmp_counter->index,
 945                                              &counter_stats, 0);
 946                 if (err) {
 947                         err = IB_MAD_RESULT_FAILURE;
 948                         stats_avail = 0;
 949                         break;
 950                 }
 951                 stats_avail = 1;
 952         }
 953         mutex_unlock(&dev->counters_table[port_num - 1].mutex);
 954         if (stats_avail) {
 955                 memset(out_mad->data, 0, sizeof out_mad->data);
 956                 switch (counter_stats.counter_mode & 0xf) {
 957                 case 0:
 958                         edit_counter(&counter_stats,
 959                                      (void *)(out_mad->data + 40),
 960                                      in_mad->mad_hdr.attr_id);
 961                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 962                         break;
 963                 default:
 964                         err = IB_MAD_RESULT_FAILURE;
 965                 }
 966         }
 967
 968         return err;
 969 }
 970
 971 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 972                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 973                         const struct ib_mad_hdr *in, size_t in_mad_size,
 974                         struct ib_mad_hdr *out, size_t *out_mad_size,
 975                         u16 *out_mad_pkey_index)
 976 {
 977         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 978         const struct ib_mad *in_mad = (const struct ib_mad *)in;
 979         struct ib_mad *out_mad = (struct ib_mad *)out;
 980         enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
 981
 982         if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
 983                          *out_mad_size != sizeof(*out_mad)))
 984                 return IB_MAD_RESULT_FAILURE;
 985
 986         /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
 987          * queries, should be called only by VFs and for that specific purpose
 988          */
 989         if (link == IB_LINK_LAYER_INFINIBAND) {
 990                 if (mlx4_is_slave(dev->dev) &&
 991                     (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
 992                      (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
 993                       in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
 994                       in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
 995                         return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 996                                                 in_grh, in_mad, out_mad);
 997
 998                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 999                                       in_grh, in_mad, out_mad);
1000         }
1001
1002         if (link == IB_LINK_LAYER_ETHERNET)
1003                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
1004                                         in_grh, in_mad, out_mad);
1005
1006         return -EINVAL;
1007 }
1008
1009 static void send_handler(struct ib_mad_agent *agent,
1010                          struct ib_mad_send_wc *mad_send_wc)
1011 {
1012         if (mad_send_wc->send_buf->context[0])
1013                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
1014         ib_free_send_mad(mad_send_wc->send_buf);
1015 }
1016
1017 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
1018 {
1019         struct ib_mad_agent *agent;
1020         int p, q;
1021         int ret;
1022         enum rdma_link_layer ll;
1023
1024         for (p = 0; p < dev->num_ports; ++p) {
1025                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
1026                 for (q = 0; q <= 1; ++q) {
1027                         if (ll == IB_LINK_LAYER_INFINIBAND) {
1028                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
1029                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
1030                                                               NULL, 0, send_handler,
1031                                                               NULL, NULL, 0);
1032                                 if (IS_ERR(agent)) {
1033                                         ret = PTR_ERR(agent);
1034                                         goto err;
1035                                 }
1036                                 dev->send_agent[p][q] = agent;
1037                         } else
1038                                 dev->send_agent[p][q] = NULL;
1039                 }
1040         }
1041
1042         return 0;
1043
1044 err:
1045         for (p = 0; p < dev->num_ports; ++p)
1046                 for (q = 0; q <= 1; ++q)
1047                         if (dev->send_agent[p][q])
1048                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
1049
1050         return ret;
1051 }
1052
1053 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1054 {
1055         struct ib_mad_agent *agent;
1056         int p, q;
1057
1058         for (p = 0; p < dev->num_ports; ++p) {
1059                 for (q = 0; q <= 1; ++q) {
1060                         agent = dev->send_agent[p][q];
1061                         if (agent) {
1062                                 dev->send_agent[p][q] = NULL;
1063                                 ib_unregister_mad_agent(agent);
1064                         }
1065                 }
1066
1067                 if (dev->sm_ah[p])
1068                         ib_destroy_ah(dev->sm_ah[p]);
1069         }
1070 }
1071
1072 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1073 {
1074         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1075
1076         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1077                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1078                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1079 }
1080
1081 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1082 {
1083         /* re-configure the alias-guid and mcg's */
1084         if (mlx4_is_master(dev->dev)) {
1085                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1086
1087                 if (!dev->sriov.is_going_down) {
1088                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1089                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1090                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1091                 }
1092         }
1093
1094         /* Update the sl to vl table from inside client rereg
1095          * only if in secure-host mode (snooping is not possible)
1096          * and the sl-to-vl change event is not generated by FW.
1097          */
1098         if (!mlx4_is_slave(dev->dev) &&
1099             dev->dev->flags & MLX4_FLAG_SECURE_HOST &&
1100             !(dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) {
1101                 if (mlx4_is_master(dev->dev))
1102                         /* already in work queue from mlx4_ib_event queueing
1103                          * mlx4_handle_port_mgmt_change_event, which calls
1104                          * this procedure. Therefore, call sl2vl_update directly.
1105                          */
1106                         mlx4_ib_sl2vl_update(dev, port_num);
1107                 else
1108                         mlx4_sched_ib_sl2vl_update_work(dev, port_num);
1109         }
1110         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1111 }
1112
1113 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1114                               struct mlx4_eqe *eqe)
1115 {
1116         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1117                             GET_MASK_FROM_EQE(eqe));
1118 }
1119
1120 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1121                                       u32 guid_tbl_blk_num, u32 change_bitmap)
1122 {
1123         struct ib_smp *in_mad  = NULL;
1124         struct ib_smp *out_mad  = NULL;
1125         u16 i;
1126
1127         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1128                 return;
1129
1130         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
1131         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1132         if (!in_mad || !out_mad) {
1133                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1134                 goto out;
1135         }
1136
1137         guid_tbl_blk_num  *= 4;
1138
1139         for (i = 0; i < 4; i++) {
1140                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1141                         continue;
1142                 memset(in_mad, 0, sizeof *in_mad);
1143                 memset(out_mad, 0, sizeof *out_mad);
1144
1145                 in_mad->base_version  = 1;
1146                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1147                 in_mad->class_version = 1;
1148                 in_mad->method        = IB_MGMT_METHOD_GET;
1149                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1150                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1151
1152                 if (mlx4_MAD_IFC(dev,
1153                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1154                                  port_num, NULL, NULL, in_mad, out_mad)) {
1155                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1156                         goto out;
1157                 }
1158
1159                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1160                                                     port_num,
1161                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1162                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1163                                                      port_num,
1164                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1165         }
1166
1167 out:
1168         kfree(in_mad);
1169         kfree(out_mad);
1170         return;
1171 }
1172
1173 void handle_port_mgmt_change_event(struct work_struct *work)
1174 {
1175         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1176         struct mlx4_ib_dev *dev = ew->ib_dev;
1177         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1178         u8 port = eqe->event.port_mgmt_change.port;
1179         u32 changed_attr;
1180         u32 tbl_block;
1181         u32 change_bitmap;
1182
1183         switch (eqe->subtype) {
1184         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1185                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1186
1187                 /* Update the SM ah - This should be done before handling
1188                    the other changed attributes so that MADs can be sent to the SM */
1189                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1190                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1191                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1192                         update_sm_ah(dev, port, lid, sl);
1193                 }
1194
1195                 /* Check if it is a lid change event */
1196                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1197                         handle_lid_change_event(dev, port);
1198
1199                 /* Generate GUID changed event */
1200                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1201                         if (mlx4_is_master(dev->dev)) {
1202                                 union ib_gid gid;
1203                                 int err = 0;
1204
1205                                 if (!eqe->event.port_mgmt_change.params.port_info.gid_prefix)
1206                                         err = __mlx4_ib_query_gid(&dev->ib_dev, port, 0, &gid, 1);
1207                                 else
1208                                         gid.global.subnet_prefix =
1209                                                 eqe->event.port_mgmt_change.params.port_info.gid_prefix;
1210                                 if (err) {
1211                                         pr_warn("Could not change QP1 subnet prefix for port %d: query_gid error (%d)\n",
1212                                                 port, err);
1213                                 } else {
1214                                         pr_debug("Changing QP1 subnet prefix for port %d. old=0x%llx. new=0x%llx\n",
1215                                                  port,
1216                                                  (u64)atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix),
1217                                                  be64_to_cpu(gid.global.subnet_prefix));
1218                                         atomic64_set(&dev->sriov.demux[port - 1].subnet_prefix,
1219                                                      be64_to_cpu(gid.global.subnet_prefix));
1220                                 }
1221                         }
1222                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1223                         /*if master, notify all slaves*/
1224                         if (mlx4_is_master(dev->dev))
1225                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1226                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1227                 }
1228
1229                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1230                         handle_client_rereg_event(dev, port);
1231                 break;
1232
1233         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1234                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1235                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1236                         propagate_pkey_ev(dev, port, eqe);
1237                 break;
1238         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1239                 /* paravirtualized master's guid is guid 0 -- does not change */
1240                 if (!mlx4_is_master(dev->dev))
1241                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1242                 /*if master, notify relevant slaves*/
1243                 else if (!dev->sriov.is_going_down) {
1244                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1245                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1246                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1247                 }
1248                 break;
1249
1250         case MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP:
1251                 /* cache sl to vl mapping changes for use in
1252                  * filling QP1 LRH VL field when sending packets
1253                  */
1254                 if (!mlx4_is_slave(dev->dev)) {
1255                         union sl2vl_tbl_to_u64 sl2vl64;
1256                         int jj;
1257
1258                         for (jj = 0; jj < 8; jj++) {
1259                                 sl2vl64.sl8[jj] =
1260                                         eqe->event.port_mgmt_change.params.sl2vl_tbl_change_info.sl2vl_table[jj];
1261                                 pr_debug("port %u, sl2vl[%d] = %02x\n",
1262                                          port, jj, sl2vl64.sl8[jj]);
1263                         }
1264                         atomic64_set(&dev->sl2vl[port - 1], sl2vl64.sl64);
1265                 }
1266                 break;
1267         default:
1268                 pr_warn("Unsupported subtype 0x%x for "
1269                         "Port Management Change event\n", eqe->subtype);
1270         }
1271
1272         kfree(ew);
1273 }
1274
1275 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1276                             enum ib_event_type type)
1277 {
1278         struct ib_event event;
1279
1280         event.device            = &dev->ib_dev;
1281         event.element.port_num  = port_num;
1282         event.event             = type;
1283
1284         ib_dispatch_event(&event);
1285 }
1286
1287 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1288 {
1289         unsigned long flags;
1290         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1291         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1292         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1293         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1294                 queue_work(ctx->wq, &ctx->work);
1295         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1296 }
1297
1298 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1299                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1300                                   int index)
1301 {
1302         struct ib_sge sg_list;
1303         struct ib_recv_wr recv_wr, *bad_recv_wr;
1304         int size;
1305
1306         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1307                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1308
1309         sg_list.addr = tun_qp->ring[index].map;
1310         sg_list.length = size;
1311         sg_list.lkey = ctx->pd->local_dma_lkey;
1312
1313         recv_wr.next = NULL;
1314         recv_wr.sg_list = &sg_list;
1315         recv_wr.num_sge = 1;
1316         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1317                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1318         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1319                                       size, DMA_FROM_DEVICE);
1320         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1321 }
1322
1323 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1324                 int slave, struct ib_sa_mad *sa_mad)
1325 {
1326         int ret = 0;
1327
1328         /* dispatch to different sa handlers */
1329         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1330         case IB_SA_ATTR_MC_MEMBER_REC:
1331                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1332                 break;
1333         default:
1334                 break;
1335         }
1336         return ret;
1337 }
1338
1339 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1340 {
1341         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1342
1343         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1344 }
1345
1346
1347 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1348                          enum ib_qp_type dest_qpt, u16 pkey_index,
1349                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1350                          u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1351 {
1352         struct ib_sge list;
1353         struct ib_ud_wr wr;
1354         struct ib_send_wr *bad_wr;
1355         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1356         struct mlx4_ib_demux_pv_qp *sqp;
1357         struct mlx4_mad_snd_buf *sqp_mad;
1358         struct ib_ah *ah;
1359         struct ib_qp *send_qp = NULL;
1360         unsigned wire_tx_ix = 0;
1361         int ret = 0;
1362         u16 wire_pkey_ix;
1363         int src_qpnum;
1364         u8 sgid_index;
1365
1366
1367         sqp_ctx = dev->sriov.sqps[port-1];
1368
1369         /* check if proxy qp created */
1370         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1371                 return -EAGAIN;
1372
1373         if (dest_qpt == IB_QPT_SMI) {
1374                 src_qpnum = 0;
1375                 sqp = &sqp_ctx->qp[0];
1376                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1377         } else {
1378                 src_qpnum = 1;
1379                 sqp = &sqp_ctx->qp[1];
1380                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1381         }
1382
1383         send_qp = sqp->qp;
1384
1385         /* create ah */
1386         sgid_index = attr->grh.sgid_index;
1387         attr->grh.sgid_index = 0;
1388         ah = ib_create_ah(sqp_ctx->pd, attr);
1389         if (IS_ERR(ah))
1390                 return -ENOMEM;
1391         attr->grh.sgid_index = sgid_index;
1392         to_mah(ah)->av.ib.gid_index = sgid_index;
1393         /* get rid of force-loopback bit */
1394         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1395         spin_lock(&sqp->tx_lock);
1396         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1397             (MLX4_NUM_TUNNEL_BUFS - 1))
1398                 ret = -EAGAIN;
1399         else
1400                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1401         spin_unlock(&sqp->tx_lock);
1402         if (ret)
1403                 goto out;
1404
1405         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1406         if (sqp->tx_ring[wire_tx_ix].ah)
1407                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1408         sqp->tx_ring[wire_tx_ix].ah = ah;
1409         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1410                                    sqp->tx_ring[wire_tx_ix].buf.map,
1411                                    sizeof (struct mlx4_mad_snd_buf),
1412                                    DMA_TO_DEVICE);
1413
1414         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1415
1416         ib_dma_sync_single_for_device(&dev->ib_dev,
1417                                       sqp->tx_ring[wire_tx_ix].buf.map,
1418                                       sizeof (struct mlx4_mad_snd_buf),
1419                                       DMA_TO_DEVICE);
1420
1421         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1422         list.length = sizeof (struct mlx4_mad_snd_buf);
1423         list.lkey = sqp_ctx->pd->local_dma_lkey;
1424
1425         wr.ah = ah;
1426         wr.port_num = port;
1427         wr.pkey_index = wire_pkey_ix;
1428         wr.remote_qkey = qkey;
1429         wr.remote_qpn = remote_qpn;
1430         wr.wr.next = NULL;
1431         wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1432         wr.wr.sg_list = &list;
1433         wr.wr.num_sge = 1;
1434         wr.wr.opcode = IB_WR_SEND;
1435         wr.wr.send_flags = IB_SEND_SIGNALED;
1436         if (s_mac)
1437                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1438         if (vlan_id < 0x1000)
1439                 vlan_id |= (attr->sl & 7) << 13;
1440         to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1441
1442
1443         ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1444         if (!ret)
1445                 return 0;
1446
1447         spin_lock(&sqp->tx_lock);
1448         sqp->tx_ix_tail++;
1449         spin_unlock(&sqp->tx_lock);
1450         sqp->tx_ring[wire_tx_ix].ah = NULL;
1451 out:
1452         ib_destroy_ah(ah);
1453         return ret;
1454 }
1455
1456 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1457 {
1458         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1459                 return slave;
1460         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1461 }
1462
1463 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1464                                     struct ib_ah_attr *ah_attr)
1465 {
1466         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1467                 ah_attr->grh.sgid_index = slave;
1468         else
1469                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1470 }
1471
1472 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1473 {
1474         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1475         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1476         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1477         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1478         struct mlx4_ib_ah ah;
1479         struct ib_ah_attr ah_attr;
1480         u8 *slave_id;
1481         int slave;
1482         int port;
1483         u16 vlan_id;
1484
1485         /* Get slave that sent this packet */
1486         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1487             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1488             (wc->src_qp & 0x1) != ctx->port - 1 ||
1489             wc->src_qp & 0x4) {
1490                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1491                 return;
1492         }
1493         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1494         if (slave != ctx->slave) {
1495                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1496                              "belongs to another slave\n", wc->src_qp);
1497                 return;
1498         }
1499
1500         /* Map transaction ID */
1501         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1502                                    sizeof (struct mlx4_tunnel_mad),
1503                                    DMA_FROM_DEVICE);
1504         switch (tunnel->mad.mad_hdr.method) {
1505         case IB_MGMT_METHOD_SET:
1506         case IB_MGMT_METHOD_GET:
1507         case IB_MGMT_METHOD_REPORT:
1508         case IB_SA_METHOD_GET_TABLE:
1509         case IB_SA_METHOD_DELETE:
1510         case IB_SA_METHOD_GET_MULTI:
1511         case IB_SA_METHOD_GET_TRACE_TBL:
1512                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1513                 if (*slave_id) {
1514                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1515                                      "class:%d slave:%d\n", *slave_id,
1516                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1517                         return;
1518                 } else
1519                         *slave_id = slave;
1520         default:
1521                 /* nothing */;
1522         }
1523
1524         /* Class-specific handling */
1525         switch (tunnel->mad.mad_hdr.mgmt_class) {
1526         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1527         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1528                 if (slave != mlx4_master_func_num(dev->dev) &&
1529                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1530                         return;
1531                 break;
1532         case IB_MGMT_CLASS_SUBN_ADM:
1533                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1534                               (struct ib_sa_mad *) &tunnel->mad))
1535                         return;
1536                 break;
1537         case IB_MGMT_CLASS_CM:
1538                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1539                               (struct ib_mad *) &tunnel->mad))
1540                         return;
1541                 break;
1542         case IB_MGMT_CLASS_DEVICE_MGMT:
1543                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1544                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1545                         return;
1546                 break;
1547         default:
1548                 /* Drop unsupported classes for slaves in tunnel mode */
1549                 if (slave != mlx4_master_func_num(dev->dev)) {
1550                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1551                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1552                         return;
1553                 }
1554         }
1555
1556         /* We are using standard ib_core services to send the mad, so generate a
1557          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1558         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1559         ah.ibah.device = ctx->ib_dev;
1560
1561         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1562         port = mlx4_slave_convert_port(dev->dev, slave, port);
1563         if (port < 0)
1564                 return;
1565         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1566
1567         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1568         if (ah_attr.ah_flags & IB_AH_GRH)
1569                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1570
1571         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1572         vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1573         /* if slave have default vlan use it */
1574         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1575                                     &vlan_id, &ah_attr.sl);
1576
1577         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1578                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1579                              IB_QPT_SMI : IB_QPT_GSI,
1580                              be16_to_cpu(tunnel->hdr.pkey_index),
1581                              be32_to_cpu(tunnel->hdr.remote_qpn),
1582                              be32_to_cpu(tunnel->hdr.qkey),
1583                              &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1584 }
1585
1586 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1587                                  enum ib_qp_type qp_type, int is_tun)
1588 {
1589         int i;
1590         struct mlx4_ib_demux_pv_qp *tun_qp;
1591         int rx_buf_size, tx_buf_size;
1592
1593         if (qp_type > IB_QPT_GSI)
1594                 return -EINVAL;
1595
1596         tun_qp = &ctx->qp[qp_type];
1597
1598         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1599                                GFP_KERNEL);
1600         if (!tun_qp->ring)
1601                 return -ENOMEM;
1602
1603         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1604                                   sizeof (struct mlx4_ib_tun_tx_buf),
1605                                   GFP_KERNEL);
1606         if (!tun_qp->tx_ring) {
1607                 kfree(tun_qp->ring);
1608                 tun_qp->ring = NULL;
1609                 return -ENOMEM;
1610         }
1611
1612         if (is_tun) {
1613                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1614                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1615         } else {
1616                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1617                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1618         }
1619
1620         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1621                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1622                 if (!tun_qp->ring[i].addr)
1623                         goto err;
1624                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1625                                                         tun_qp->ring[i].addr,
1626                                                         rx_buf_size,
1627                                                         DMA_FROM_DEVICE);
1628                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1629                         kfree(tun_qp->ring[i].addr);
1630                         goto err;
1631                 }
1632         }
1633
1634         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1635                 tun_qp->tx_ring[i].buf.addr =
1636                         kmalloc(tx_buf_size, GFP_KERNEL);
1637                 if (!tun_qp->tx_ring[i].buf.addr)
1638                         goto tx_err;
1639                 tun_qp->tx_ring[i].buf.map =
1640                         ib_dma_map_single(ctx->ib_dev,
1641                                           tun_qp->tx_ring[i].buf.addr,
1642                                           tx_buf_size,
1643                                           DMA_TO_DEVICE);
1644                 if (ib_dma_mapping_error(ctx->ib_dev,
1645                                          tun_qp->tx_ring[i].buf.map)) {
1646                         kfree(tun_qp->tx_ring[i].buf.addr);
1647                         goto tx_err;
1648                 }
1649                 tun_qp->tx_ring[i].ah = NULL;
1650         }
1651         spin_lock_init(&tun_qp->tx_lock);
1652         tun_qp->tx_ix_head = 0;
1653         tun_qp->tx_ix_tail = 0;
1654         tun_qp->proxy_qpt = qp_type;
1655
1656         return 0;
1657
1658 tx_err:
1659         while (i > 0) {
1660                 --i;
1661                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1662                                     tx_buf_size, DMA_TO_DEVICE);
1663                 kfree(tun_qp->tx_ring[i].buf.addr);
1664         }
1665         kfree(tun_qp->tx_ring);
1666         tun_qp->tx_ring = NULL;
1667         i = MLX4_NUM_TUNNEL_BUFS;
1668 err:
1669         while (i > 0) {
1670                 --i;
1671                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1672                                     rx_buf_size, DMA_FROM_DEVICE);
1673                 kfree(tun_qp->ring[i].addr);
1674         }
1675         kfree(tun_qp->ring);
1676         tun_qp->ring = NULL;
1677         return -ENOMEM;
1678 }
1679
1680 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1681                                      enum ib_qp_type qp_type, int is_tun)
1682 {
1683         int i;
1684         struct mlx4_ib_demux_pv_qp *tun_qp;
1685         int rx_buf_size, tx_buf_size;
1686
1687         if (qp_type > IB_QPT_GSI)
1688                 return;
1689
1690         tun_qp = &ctx->qp[qp_type];
1691         if (is_tun) {
1692                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1693                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1694         } else {
1695                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1696                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1697         }
1698
1699
1700         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1701                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1702                                     rx_buf_size, DMA_FROM_DEVICE);
1703                 kfree(tun_qp->ring[i].addr);
1704         }
1705
1706         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1707                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1708                                     tx_buf_size, DMA_TO_DEVICE);
1709                 kfree(tun_qp->tx_ring[i].buf.addr);
1710                 if (tun_qp->tx_ring[i].ah)
1711                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1712         }
1713         kfree(tun_qp->tx_ring);
1714         kfree(tun_qp->ring);
1715 }
1716
1717 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1718 {
1719         struct mlx4_ib_demux_pv_ctx *ctx;
1720         struct mlx4_ib_demux_pv_qp *tun_qp;
1721         struct ib_wc wc;
1722         int ret;
1723         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1724         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1725
1726         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1727                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1728                 if (wc.status == IB_WC_SUCCESS) {
1729                         switch (wc.opcode) {
1730                         case IB_WC_RECV:
1731                                 mlx4_ib_multiplex_mad(ctx, &wc);
1732                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1733                                                              wc.wr_id &
1734                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1735                                 if (ret)
1736                                         pr_err("Failed reposting tunnel "
1737                                                "buf:%lld\n", wc.wr_id);
1738                                 break;
1739                         case IB_WC_SEND:
1740                                 pr_debug("received tunnel send completion:"
1741                                          "wrid=0x%llx, status=0x%x\n",
1742                                          wc.wr_id, wc.status);
1743                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1744                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1745                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1746                                         = NULL;
1747                                 spin_lock(&tun_qp->tx_lock);
1748                                 tun_qp->tx_ix_tail++;
1749                                 spin_unlock(&tun_qp->tx_lock);
1750
1751                                 break;
1752                         default:
1753                                 break;
1754                         }
1755                 } else  {
1756                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1757                                  " status = %d, wrid = 0x%llx\n",
1758                                  ctx->slave, wc.status, wc.wr_id);
1759                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1760                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1761                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1762                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1763                                         = NULL;
1764                                 spin_lock(&tun_qp->tx_lock);
1765                                 tun_qp->tx_ix_tail++;
1766                                 spin_unlock(&tun_qp->tx_lock);
1767                         }
1768                 }
1769         }
1770 }
1771
1772 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1773 {
1774         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1775
1776         /* It's worse than that! He's dead, Jim! */
1777         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1778                event->event, sqp->port);
1779 }
1780
1781 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1782                             enum ib_qp_type qp_type, int create_tun)
1783 {
1784         int i, ret;
1785         struct mlx4_ib_demux_pv_qp *tun_qp;
1786         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1787         struct ib_qp_attr attr;
1788         int qp_attr_mask_INIT;
1789
1790         if (qp_type > IB_QPT_GSI)
1791                 return -EINVAL;
1792
1793         tun_qp = &ctx->qp[qp_type];
1794
1795         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1796         qp_init_attr.init_attr.send_cq = ctx->cq;
1797         qp_init_attr.init_attr.recv_cq = ctx->cq;
1798         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1799         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1800         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1801         qp_init_attr.init_attr.cap.max_send_sge = 1;
1802         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1803         if (create_tun) {
1804                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1805                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1806                 qp_init_attr.port = ctx->port;
1807                 qp_init_attr.slave = ctx->slave;
1808                 qp_init_attr.proxy_qp_type = qp_type;
1809                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1810                            IB_QP_QKEY | IB_QP_PORT;
1811         } else {
1812                 qp_init_attr.init_attr.qp_type = qp_type;
1813                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1814                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1815         }
1816         qp_init_attr.init_attr.port_num = ctx->port;
1817         qp_init_attr.init_attr.qp_context = ctx;
1818         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1819         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1820         if (IS_ERR(tun_qp->qp)) {
1821                 ret = PTR_ERR(tun_qp->qp);
1822                 tun_qp->qp = NULL;
1823                 pr_err("Couldn't create %s QP (%d)\n",
1824                        create_tun ? "tunnel" : "special", ret);
1825                 return ret;
1826         }
1827
1828         memset(&attr, 0, sizeof attr);
1829         attr.qp_state = IB_QPS_INIT;
1830         ret = 0;
1831         if (create_tun)
1832                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1833                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1834                                               &attr.pkey_index);
1835         if (ret || !create_tun)
1836                 attr.pkey_index =
1837                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1838         attr.qkey = IB_QP1_QKEY;
1839         attr.port_num = ctx->port;
1840         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1841         if (ret) {
1842                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1843                        create_tun ? "tunnel" : "special", ret);
1844                 goto err_qp;
1845         }
1846         attr.qp_state = IB_QPS_RTR;
1847         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1848         if (ret) {
1849                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1850                        create_tun ? "tunnel" : "special", ret);
1851                 goto err_qp;
1852         }
1853         attr.qp_state = IB_QPS_RTS;
1854         attr.sq_psn = 0;
1855         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1856         if (ret) {
1857                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1858                        create_tun ? "tunnel" : "special", ret);
1859                 goto err_qp;
1860         }
1861
1862         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1863                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1864                 if (ret) {
1865                         pr_err(" mlx4_ib_post_pv_buf error"
1866                                " (err = %d, i = %d)\n", ret, i);
1867                         goto err_qp;
1868                 }
1869         }
1870         return 0;
1871
1872 err_qp:
1873         ib_destroy_qp(tun_qp->qp);
1874         tun_qp->qp = NULL;
1875         return ret;
1876 }
1877
1878 /*
1879  * IB MAD completion callback for real SQPs
1880  */
1881 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1882 {
1883         struct mlx4_ib_demux_pv_ctx *ctx;
1884         struct mlx4_ib_demux_pv_qp *sqp;
1885         struct ib_wc wc;
1886         struct ib_grh *grh;
1887         struct ib_mad *mad;
1888
1889         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1890         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1891
1892         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1893                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1894                 if (wc.status == IB_WC_SUCCESS) {
1895                         switch (wc.opcode) {
1896                         case IB_WC_SEND:
1897                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1898                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1899                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1900                                         = NULL;
1901                                 spin_lock(&sqp->tx_lock);
1902                                 sqp->tx_ix_tail++;
1903                                 spin_unlock(&sqp->tx_lock);
1904                                 break;
1905                         case IB_WC_RECV:
1906                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1907                                                 (sqp->ring[wc.wr_id &
1908                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1909                                 grh = &(((struct mlx4_mad_rcv_buf *)
1910                                                 (sqp->ring[wc.wr_id &
1911                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1912                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1913                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1914                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1915                                         pr_err("Failed reposting SQP "
1916                                                "buf:%lld\n", wc.wr_id);
1917                                 break;
1918                         default:
1919                                 BUG_ON(1);
1920                                 break;
1921                         }
1922                 } else  {
1923                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1924                                  " status = %d, wrid = 0x%llx\n",
1925                                  ctx->slave, wc.status, wc.wr_id);
1926                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1927                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1928                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1929                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1930                                         = NULL;
1931                                 spin_lock(&sqp->tx_lock);
1932                                 sqp->tx_ix_tail++;
1933                                 spin_unlock(&sqp->tx_lock);
1934                         }
1935                 }
1936         }
1937 }
1938
1939 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1940                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1941 {
1942         struct mlx4_ib_demux_pv_ctx *ctx;
1943
1944         *ret_ctx = NULL;
1945         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1946         if (!ctx) {
1947                 pr_err("failed allocating pv resource context "
1948                        "for port %d, slave %d\n", port, slave);
1949                 return -ENOMEM;
1950         }
1951
1952         ctx->ib_dev = &dev->ib_dev;
1953         ctx->port = port;
1954         ctx->slave = slave;
1955         *ret_ctx = ctx;
1956         return 0;
1957 }
1958
1959 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1960 {
1961         if (dev->sriov.demux[port - 1].tun[slave]) {
1962                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1963                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1964         }
1965 }
1966
1967 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1968                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1969 {
1970         int ret, cq_size;
1971         struct ib_cq_init_attr cq_attr = {};
1972
1973         if (ctx->state != DEMUX_PV_STATE_DOWN)
1974                 return -EEXIST;
1975
1976         ctx->state = DEMUX_PV_STATE_STARTING;
1977         /* have QP0 only if link layer is IB */
1978         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1979             IB_LINK_LAYER_INFINIBAND)
1980                 ctx->has_smi = 1;
1981
1982         if (ctx->has_smi) {
1983                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1984                 if (ret) {
1985                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1986                         goto err_out;
1987                 }
1988         }
1989
1990         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1991         if (ret) {
1992                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1993                 goto err_out_qp0;
1994         }
1995
1996         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1997         if (ctx->has_smi)
1998                 cq_size *= 2;
1999
2000         cq_attr.cqe = cq_size;
2001         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
2002                                NULL, ctx, &cq_attr);
2003         if (IS_ERR(ctx->cq)) {
2004                 ret = PTR_ERR(ctx->cq);
2005                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
2006                 goto err_buf;
2007         }
2008
2009         ctx->pd = ib_alloc_pd(ctx->ib_dev, 0);
2010         if (IS_ERR(ctx->pd)) {
2011                 ret = PTR_ERR(ctx->pd);
2012                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
2013                 goto err_cq;
2014         }
2015
2016         if (ctx->has_smi) {
2017                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
2018                 if (ret) {
2019                         pr_err("Couldn't create %s QP0 (%d)\n",
2020                                create_tun ? "tunnel for" : "",  ret);
2021                         goto err_pd;
2022                 }
2023         }
2024
2025         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
2026         if (ret) {
2027                 pr_err("Couldn't create %s QP1 (%d)\n",
2028                        create_tun ? "tunnel for" : "",  ret);
2029                 goto err_qp0;
2030         }
2031
2032         if (create_tun)
2033                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
2034         else
2035                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
2036
2037         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
2038
2039         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
2040         if (ret) {
2041                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
2042                 goto err_wq;
2043         }
2044         ctx->state = DEMUX_PV_STATE_ACTIVE;
2045         return 0;
2046
2047 err_wq:
2048         ctx->wq = NULL;
2049         ib_destroy_qp(ctx->qp[1].qp);
2050         ctx->qp[1].qp = NULL;
2051
2052
2053 err_qp0:
2054         if (ctx->has_smi)
2055                 ib_destroy_qp(ctx->qp[0].qp);
2056         ctx->qp[0].qp = NULL;
2057
2058 err_pd:
2059         ib_dealloc_pd(ctx->pd);
2060         ctx->pd = NULL;
2061
2062 err_cq:
2063         ib_destroy_cq(ctx->cq);
2064         ctx->cq = NULL;
2065
2066 err_buf:
2067         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
2068
2069 err_out_qp0:
2070         if (ctx->has_smi)
2071                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
2072 err_out:
2073         ctx->state = DEMUX_PV_STATE_DOWN;
2074         return ret;
2075 }
2076
2077 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
2078                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
2079 {
2080         if (!ctx)
2081                 return;
2082         if (ctx->state > DEMUX_PV_STATE_DOWN) {
2083                 ctx->state = DEMUX_PV_STATE_DOWNING;
2084                 if (flush)
2085                         flush_workqueue(ctx->wq);
2086                 if (ctx->has_smi) {
2087                         ib_destroy_qp(ctx->qp[0].qp);
2088                         ctx->qp[0].qp = NULL;
2089                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
2090                 }
2091                 ib_destroy_qp(ctx->qp[1].qp);
2092                 ctx->qp[1].qp = NULL;
2093                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
2094                 ib_dealloc_pd(ctx->pd);
2095                 ctx->pd = NULL;
2096                 ib_destroy_cq(ctx->cq);
2097                 ctx->cq = NULL;
2098                 ctx->state = DEMUX_PV_STATE_DOWN;
2099         }
2100 }
2101
2102 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
2103                                   int port, int do_init)
2104 {
2105         int ret = 0;
2106
2107         if (!do_init) {
2108                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2109                 /* for master, destroy real sqp resources */
2110                 if (slave == mlx4_master_func_num(dev->dev))
2111                         destroy_pv_resources(dev, slave, port,
2112                                              dev->sriov.sqps[port - 1], 1);
2113                 /* destroy the tunnel qp resources */
2114                 destroy_pv_resources(dev, slave, port,
2115                                      dev->sriov.demux[port - 1].tun[slave], 1);
2116                 return 0;
2117         }
2118
2119         /* create the tunnel qp resources */
2120         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2121                                   dev->sriov.demux[port - 1].tun[slave]);
2122
2123         /* for master, create the real sqp resources */
2124         if (!ret && slave == mlx4_master_func_num(dev->dev))
2125                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2126                                           dev->sriov.sqps[port - 1]);
2127         return ret;
2128 }
2129
2130 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2131 {
2132         struct mlx4_ib_demux_work *dmxw;
2133
2134         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2135         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2136                                dmxw->do_init);
2137         kfree(dmxw);
2138         return;
2139 }
2140
2141 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2142                                        struct mlx4_ib_demux_ctx *ctx,
2143                                        int port)
2144 {
2145         char name[12];
2146         int ret = 0;
2147         int i;
2148
2149         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2150                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2151         if (!ctx->tun)
2152                 return -ENOMEM;
2153
2154         ctx->dev = dev;
2155         ctx->port = port;
2156         ctx->ib_dev = &dev->ib_dev;
2157
2158         for (i = 0;
2159              i < min(dev->dev->caps.sqp_demux,
2160              (u16)(dev->dev->persist->num_vfs + 1));
2161              i++) {
2162                 struct mlx4_active_ports actv_ports =
2163                         mlx4_get_active_ports(dev->dev, i);
2164
2165                 if (!test_bit(port - 1, actv_ports.ports))
2166                         continue;
2167
2168                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2169                 if (ret) {
2170                         ret = -ENOMEM;
2171                         goto err_mcg;
2172                 }
2173         }
2174
2175         ret = mlx4_ib_mcg_port_init(ctx);
2176         if (ret) {
2177                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2178                 goto err_mcg;
2179         }
2180
2181         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2182         ctx->wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2183         if (!ctx->wq) {
2184                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2185                 ret = -ENOMEM;
2186                 goto err_wq;
2187         }
2188
2189         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2190         ctx->ud_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2191         if (!ctx->ud_wq) {
2192                 pr_err("Failed to create up/down WQ for port %d\n", port);
2193                 ret = -ENOMEM;
2194                 goto err_udwq;
2195         }
2196
2197         return 0;
2198
2199 err_udwq:
2200         destroy_workqueue(ctx->wq);
2201         ctx->wq = NULL;
2202
2203 err_wq:
2204         mlx4_ib_mcg_port_cleanup(ctx, 1);
2205 err_mcg:
2206         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2207                 free_pv_object(dev, i, port);
2208         kfree(ctx->tun);
2209         ctx->tun = NULL;
2210         return ret;
2211 }
2212
2213 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2214 {
2215         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2216                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2217                 flush_workqueue(sqp_ctx->wq);
2218                 if (sqp_ctx->has_smi) {
2219                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2220                         sqp_ctx->qp[0].qp = NULL;
2221                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2222                 }
2223                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2224                 sqp_ctx->qp[1].qp = NULL;
2225                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2226                 ib_dealloc_pd(sqp_ctx->pd);
2227                 sqp_ctx->pd = NULL;
2228                 ib_destroy_cq(sqp_ctx->cq);
2229                 sqp_ctx->cq = NULL;
2230                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2231         }
2232 }
2233
2234 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2235 {
2236         int i;
2237         if (ctx) {
2238                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2239                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2240                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2241                         if (!ctx->tun[i])
2242                                 continue;
2243                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2244                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2245                 }
2246                 flush_workqueue(ctx->wq);
2247                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2248                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2249                         free_pv_object(dev, i, ctx->port);
2250                 }
2251                 kfree(ctx->tun);
2252                 destroy_workqueue(ctx->ud_wq);
2253                 destroy_workqueue(ctx->wq);
2254         }
2255 }
2256
2257 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2258 {
2259         int i;
2260
2261         if (!mlx4_is_master(dev->dev))
2262                 return;
2263         /* initialize or tear down tunnel QPs for the master */
2264         for (i = 0; i < dev->dev->caps.num_ports; i++)
2265                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2266         return;
2267 }
2268
2269 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2270 {
2271         int i = 0;
2272         int err;
2273
2274         if (!mlx4_is_mfunc(dev->dev))
2275                 return 0;
2276
2277         dev->sriov.is_going_down = 0;
2278         spin_lock_init(&dev->sriov.going_down_lock);
2279         mlx4_ib_cm_paravirt_init(dev);
2280
2281         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2282
2283         if (mlx4_is_slave(dev->dev)) {
2284                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2285                 return 0;
2286         }
2287
2288         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2289                 if (i == mlx4_master_func_num(dev->dev))
2290                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2291                 else
2292                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2293         }
2294
2295         err = mlx4_ib_init_alias_guid_service(dev);
2296         if (err) {
2297                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2298                 goto paravirt_err;
2299         }
2300         err = mlx4_ib_device_register_sysfs(dev);
2301         if (err) {
2302                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2303                 goto sysfs_err;
2304         }
2305
2306         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2307                      dev->dev->caps.sqp_demux);
2308         for (i = 0; i < dev->num_ports; i++) {
2309                 union ib_gid gid;
2310                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2311                 if (err)
2312                         goto demux_err;
2313                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2314                 atomic64_set(&dev->sriov.demux[i].subnet_prefix,
2315                              be64_to_cpu(gid.global.subnet_prefix));
2316                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2317                                       &dev->sriov.sqps[i]);
2318                 if (err)
2319                         goto demux_err;
2320                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2321                 if (err)
2322                         goto free_pv;
2323         }
2324         mlx4_ib_master_tunnels(dev, 1);
2325         return 0;
2326
2327 free_pv:
2328         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2329 demux_err:
2330         while (--i >= 0) {
2331                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2332                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2333         }
2334         mlx4_ib_device_unregister_sysfs(dev);
2335
2336 sysfs_err:
2337         mlx4_ib_destroy_alias_guid_service(dev);
2338
2339 paravirt_err:
2340         mlx4_ib_cm_paravirt_clean(dev, -1);
2341
2342         return err;
2343 }
2344
2345 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2346 {
2347         int i;
2348         unsigned long flags;
2349
2350         if (!mlx4_is_mfunc(dev->dev))
2351                 return;
2352
2353         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2354         dev->sriov.is_going_down = 1;
2355         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2356         if (mlx4_is_master(dev->dev)) {
2357                 for (i = 0; i < dev->num_ports; i++) {
2358                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2359                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2360                         kfree(dev->sriov.sqps[i]);
2361                         dev->sriov.sqps[i] = NULL;
2362                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2363                 }
2364
2365                 mlx4_ib_cm_paravirt_clean(dev, -1);
2366                 mlx4_ib_destroy_alias_guid_service(dev);
2367                 mlx4_ib_device_unregister_sysfs(dev);
2368         }
2369 }