1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
6 #define IRDMA_MAX_SAVED_PHY_PGADDR 4
7 #define IRDMA_FLUSH_DELAY_MS 20
9 #define IRDMA_PKEY_TBL_SZ 1
10 #define IRDMA_DEFAULT_PKEY 0xFFFF
12 struct irdma_ucontext {
13 struct ib_ucontext ibucontext;
14 struct irdma_device *iwdev;
15 struct rdma_user_mmap_entry *db_mmap_entry;
16 struct list_head cq_reg_mem_list;
17 spinlock_t cq_reg_mem_list_lock; /* protect CQ memory list */
18 struct list_head qp_reg_mem_list;
19 spinlock_t qp_reg_mem_list_lock; /* protect QP memory list */
27 struct irdma_sc_pd sc_pd;
30 union irdma_sockaddr {
31 struct sockaddr_in saddr_in;
32 struct sockaddr_in6 saddr_in6;
37 struct rdma_ah_attr attrs;
38 union irdma_sockaddr sgid_addr;
39 union irdma_sockaddr dgid_addr;
45 struct irdma_sc_ah sc_ah;
50 struct hlist_node list;
52 struct irdma_ah *parent_ah; /* AH from cached list */
55 struct irdma_hmc_pble {
63 struct irdma_hmc_pble cq_pbl;
69 struct irdma_hmc_pble sq_pbl;
70 struct irdma_hmc_pble rq_pbl;
76 struct irdma_dma_mem kmem_buf;
77 struct irdma_cq_uk cq_uk;
79 struct list_head list;
80 struct work_struct work;
84 struct list_head list;
86 struct irdma_qp_mr qp_mr;
87 struct irdma_cq_mr cq_mr;
93 struct irdma_pble_alloc pble_alloc;
94 struct irdma_mr *iwmr;
102 struct ib_umem *region;
111 u64 pgaddrmem[IRDMA_MAX_SAVED_PHY_PGADDR];
112 struct irdma_pbl iwpbl;
117 struct irdma_sc_cq sc_cq;
123 enum irdma_cmpl_notify last_notify;
126 struct irdma_dma_mem kmem;
127 struct irdma_dma_mem kmem_shadow;
128 struct completion free_cq;
130 spinlock_t lock; /* for poll cq */
131 struct irdma_pbl *iwpbl;
132 struct irdma_pbl *iwpbl_shadow;
133 struct list_head resize_list;
134 struct irdma_cq_poll_info cur_cqe;
135 struct list_head cmpl_generated;
138 struct irdma_cmpl_gen {
139 struct list_head list;
140 struct irdma_cq_poll_info cpi;
143 struct disconn_work {
144 struct work_struct work;
145 struct irdma_qp *iwqp;
150 struct irdma_qp_kmode {
151 struct irdma_dma_mem dma_mem;
152 struct irdma_sq_uk_wr_trk_info *sq_wrid_mem;
158 struct irdma_sc_qp sc_qp;
159 struct irdma_device *iwdev;
160 struct irdma_cq *iwscq;
161 struct irdma_cq *iwrcq;
162 struct irdma_pd *iwpd;
163 struct rdma_user_mmap_entry *push_wqe_mmap_entry;
164 struct rdma_user_mmap_entry *push_db_mmap_entry;
165 struct irdma_qp_host_ctx_info ctx_info;
167 struct irdma_iwarp_offload_info iwarp_info;
168 struct irdma_roce_offload_info roce_info;
172 struct irdma_tcp_offload_info tcp_info;
173 struct irdma_udp_offload_info udp_info;
176 struct irdma_ah roce_ah;
177 struct list_head teardown_entry;
179 struct iw_cm_id *cm_id;
180 struct irdma_cm_node *cm_node;
181 struct delayed_work dwork_flush;
182 struct ib_mr *lsmm_mr;
183 atomic_t hw_mod_qp_pend;
184 enum ib_qp_state ibqp_state;
189 atomic_t close_timer_started;
190 spinlock_t lock; /* serialize posting WRs to SQ/RQ */
191 struct irdma_qp_context *iwqp_context;
193 dma_addr_t pbl_pbase;
201 u8 suspend_pending : 1;
204 u16 term_sq_flush_code;
205 u16 term_rq_flush_code;
208 struct irdma_qp_kmode kqp;
209 struct irdma_dma_mem host_ctx;
210 struct timer_list terminate_timer;
211 struct irdma_pbl *iwpbl;
212 struct irdma_dma_mem q2_ctx_mem;
213 struct irdma_dma_mem ietf_mem;
214 struct completion free_qp;
215 wait_queue_head_t waitq;
216 wait_queue_head_t mod_qp_waitq;
220 enum irdma_mmap_flag {
225 struct irdma_user_mmap_entry {
226 struct rdma_user_mmap_entry rdma_entry;
231 static inline u16 irdma_fw_major_ver(struct irdma_sc_dev *dev)
233 return (u16)FIELD_GET(IRDMA_FW_VER_MAJOR, dev->feature_info[IRDMA_FEATURE_FW_INFO]);
236 static inline u16 irdma_fw_minor_ver(struct irdma_sc_dev *dev)
238 return (u16)FIELD_GET(IRDMA_FW_VER_MINOR, dev->feature_info[IRDMA_FEATURE_FW_INFO]);
241 static inline void set_ib_wc_op_sq(struct irdma_cq_poll_info *cq_poll_info,
244 switch (cq_poll_info->op_type) {
245 case IRDMA_OP_TYPE_RDMA_WRITE:
246 case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
247 entry->opcode = IB_WC_RDMA_WRITE;
249 case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
250 case IRDMA_OP_TYPE_RDMA_READ:
251 entry->opcode = IB_WC_RDMA_READ;
253 case IRDMA_OP_TYPE_SEND_SOL:
254 case IRDMA_OP_TYPE_SEND_SOL_INV:
255 case IRDMA_OP_TYPE_SEND_INV:
256 case IRDMA_OP_TYPE_SEND:
257 entry->opcode = IB_WC_SEND;
259 case IRDMA_OP_TYPE_FAST_REG_NSMR:
260 entry->opcode = IB_WC_REG_MR;
262 case IRDMA_OP_TYPE_INV_STAG:
263 entry->opcode = IB_WC_LOCAL_INV;
266 entry->status = IB_WC_GENERAL_ERR;
270 static inline void set_ib_wc_op_rq(struct irdma_cq_poll_info *cq_poll_info,
271 struct ib_wc *entry, bool send_imm_support)
274 * iWARP does not support sendImm, so the presence of Imm data
277 if (!send_imm_support) {
278 entry->opcode = cq_poll_info->imm_valid ?
279 IB_WC_RECV_RDMA_WITH_IMM :
284 switch (cq_poll_info->op_type) {
285 case IB_OPCODE_RDMA_WRITE_ONLY_WITH_IMMEDIATE:
286 case IB_OPCODE_RDMA_WRITE_LAST_WITH_IMMEDIATE:
287 entry->opcode = IB_WC_RECV_RDMA_WITH_IMM;
290 entry->opcode = IB_WC_RECV;
294 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4);
295 int irdma_ib_register_device(struct irdma_device *iwdev);
296 void irdma_ib_unregister_device(struct irdma_device *iwdev);
297 void irdma_ib_dealloc_device(struct ib_device *ibdev);
298 void irdma_ib_qp_event(struct irdma_qp *iwqp, enum irdma_qp_event_type event);
299 void irdma_generate_flush_completions(struct irdma_qp *iwqp);
300 void irdma_remove_cmpls_list(struct irdma_cq *iwcq);
301 int irdma_generated_cmpls(struct irdma_cq *iwcq, struct irdma_cq_poll_info *cq_poll_info);
302 #endif /* IRDMA_VERBS_H */