drivers/infiniband/hw/ipath/ipath_verbs.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <rdma/ib_mad.h>
  35 #include <rdma/ib_user_verbs.h>
  36 #include <linux/io.h>
  37 #include <linux/utsname.h>
  38
  39 #include "ipath_kernel.h"
  40 #include "ipath_verbs.h"
  41 #include "ipath_common.h"
  42
  43 static unsigned int ib_ipath_qp_table_size = 251;
  44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
  45 MODULE_PARM_DESC(qp_table_size, "QP table size");
  46
  47 unsigned int ib_ipath_lkey_table_size = 12;
  48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
  49                    S_IRUGO);
  50 MODULE_PARM_DESC(lkey_table_size,
  51                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  52
  53 static unsigned int ib_ipath_max_pds = 0xFFFF;
  54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
  55 MODULE_PARM_DESC(max_pds,
  56                  "Maximum number of protection domains to support");
  57
  58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
  59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
  60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  61
  62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
  63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
  64 MODULE_PARM_DESC(max_cqes,
  65                  "Maximum number of completion queue entries to support");
  66
  67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
  68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
  69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  70
  71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
  72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
  73                    S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  75
  76 unsigned int ib_ipath_max_qps = 16384;
  77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
  78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
  79
  80 unsigned int ib_ipath_max_sges = 0x60;
  81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
  82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
  83
  84 unsigned int ib_ipath_max_mcast_grps = 16384;
  85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
  86                    S_IWUSR | S_IRUGO);
  87 MODULE_PARM_DESC(max_mcast_grps,
  88                  "Maximum number of multicast groups to support");
  89
  90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
  91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
  92                    uint, S_IWUSR | S_IRUGO);
  93 MODULE_PARM_DESC(max_mcast_qp_attached,
  94                  "Maximum number of attached QPs to support");
  95
  96 unsigned int ib_ipath_max_srqs = 1024;
  97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
  98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
  99
 100 unsigned int ib_ipath_max_srq_sges = 128;
 101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
 102                    uint, S_IWUSR | S_IRUGO);
 103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 104
 105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
 106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
 107                    uint, S_IWUSR | S_IRUGO);
 108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 109
 110 static unsigned int ib_ipath_disable_sma;
 111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
 112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
 113
 114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
 115         [IB_QPS_RESET] = 0,
 116         [IB_QPS_INIT] = IPATH_POST_RECV_OK,
 117         [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 118         [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 119             IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
 120         [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 121             IPATH_POST_SEND_OK,
 122         [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 123         [IB_QPS_ERR] = 0,
 124 };
 125
 126 struct ipath_ucontext {
 127         struct ib_ucontext ibucontext;
 128 };
 129
 130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
 131                                                   *ibucontext)
 132 {
 133         return container_of(ibucontext, struct ipath_ucontext, ibucontext);
 134 }
 135
 136 /*
 137  * Translate ib_wr_opcode into ib_wc_opcode.
 138  */
 139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
 140         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 141         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 142         [IB_WR_SEND] = IB_WC_SEND,
 143         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 144         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 145         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 146         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
 147 };
 148
 149 /*
 150  * System image GUID.
 151  */
 152 static __be64 sys_image_guid;
 153
 154 /**
 155  * ipath_copy_sge - copy data to SGE memory
 156  * @ss: the SGE state
 157  * @data: the data to copy
 158  * @length: the length of the data
 159  */
 160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
 161 {
 162         struct ipath_sge *sge = &ss->sge;
 163
 164         while (length) {
 165                 u32 len = sge->length;
 166
 167                 BUG_ON(len == 0);
 168                 if (len > length)
 169                         len = length;
 170                 memcpy(sge->vaddr, data, len);
 171                 sge->vaddr += len;
 172                 sge->length -= len;
 173                 sge->sge_length -= len;
 174                 if (sge->sge_length == 0) {
 175                         if (--ss->num_sge)
 176                                 *sge = *ss->sg_list++;
 177                 } else if (sge->length == 0 && sge->mr != NULL) {
 178                         if (++sge->n >= IPATH_SEGSZ) {
 179                                 if (++sge->m >= sge->mr->mapsz)
 180                                         break;
 181                                 sge->n = 0;
 182                         }
 183                         sge->vaddr =
 184                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 185                         sge->length =
 186                                 sge->mr->map[sge->m]->segs[sge->n].length;
 187                 }
 188                 data += len;
 189                 length -= len;
 190         }
 191 }
 192
 193 /**
 194  * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
 195  * @ss: the SGE state
 196  * @length: the number of bytes to skip
 197  */
 198 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
 199 {
 200         struct ipath_sge *sge = &ss->sge;
 201
 202         while (length) {
 203                 u32 len = sge->length;
 204
 205                 BUG_ON(len == 0);
 206                 if (len > length)
 207                         len = length;
 208                 sge->vaddr += len;
 209                 sge->length -= len;
 210                 sge->sge_length -= len;
 211                 if (sge->sge_length == 0) {
 212                         if (--ss->num_sge)
 213                                 *sge = *ss->sg_list++;
 214                 } else if (sge->length == 0 && sge->mr != NULL) {
 215                         if (++sge->n >= IPATH_SEGSZ) {
 216                                 if (++sge->m >= sge->mr->mapsz)
 217                                         break;
 218                                 sge->n = 0;
 219                         }
 220                         sge->vaddr =
 221                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 222                         sge->length =
 223                                 sge->mr->map[sge->m]->segs[sge->n].length;
 224                 }
 225                 length -= len;
 226         }
 227 }
 228
 229 /**
 230  * ipath_post_send - post a send on a QP
 231  * @ibqp: the QP to post the send on
 232  * @wr: the list of work requests to post
 233  * @bad_wr: the first bad WR is put here
 234  *
 235  * This may be called from interrupt context.
 236  */
 237 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 238                            struct ib_send_wr **bad_wr)
 239 {
 240         struct ipath_qp *qp = to_iqp(ibqp);
 241         int err = 0;
 242
 243         /* Check that state is OK to post send. */
 244         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)) {
 245                 *bad_wr = wr;
 246                 err = -EINVAL;
 247                 goto bail;
 248         }
 249
 250         for (; wr; wr = wr->next) {
 251                 switch (qp->ibqp.qp_type) {
 252                 case IB_QPT_UC:
 253                 case IB_QPT_RC:
 254                         err = ipath_post_ruc_send(qp, wr);
 255                         break;
 256
 257                 case IB_QPT_SMI:
 258                 case IB_QPT_GSI:
 259                 case IB_QPT_UD:
 260                         err = ipath_post_ud_send(qp, wr);
 261                         break;
 262
 263                 default:
 264                         err = -EINVAL;
 265                 }
 266                 if (err) {
 267                         *bad_wr = wr;
 268                         break;
 269                 }
 270         }
 271
 272 bail:
 273         return err;
 274 }
 275
 276 /**
 277  * ipath_post_receive - post a receive on a QP
 278  * @ibqp: the QP to post the receive on
 279  * @wr: the WR to post
 280  * @bad_wr: the first bad WR is put here
 281  *
 282  * This may be called from interrupt context.
 283  */
 284 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 285                               struct ib_recv_wr **bad_wr)
 286 {
 287         struct ipath_qp *qp = to_iqp(ibqp);
 288         struct ipath_rwq *wq = qp->r_rq.wq;
 289         unsigned long flags;
 290         int ret;
 291
 292         /* Check that state is OK to post receive. */
 293         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
 294                 *bad_wr = wr;
 295                 ret = -EINVAL;
 296                 goto bail;
 297         }
 298
 299         for (; wr; wr = wr->next) {
 300                 struct ipath_rwqe *wqe;
 301                 u32 next;
 302                 int i;
 303
 304                 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
 305                         *bad_wr = wr;
 306                         ret = -ENOMEM;
 307                         goto bail;
 308                 }
 309
 310                 spin_lock_irqsave(&qp->r_rq.lock, flags);
 311                 next = wq->head + 1;
 312                 if (next >= qp->r_rq.size)
 313                         next = 0;
 314                 if (next == wq->tail) {
 315                         spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 316                         *bad_wr = wr;
 317                         ret = -ENOMEM;
 318                         goto bail;
 319                 }
 320
 321                 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
 322                 wqe->wr_id = wr->wr_id;
 323                 wqe->num_sge = wr->num_sge;
 324                 for (i = 0; i < wr->num_sge; i++)
 325                         wqe->sg_list[i] = wr->sg_list[i];
 326                 wq->head = next;
 327                 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 328         }
 329         ret = 0;
 330
 331 bail:
 332         return ret;
 333 }
 334
 335 /**
 336  * ipath_qp_rcv - processing an incoming packet on a QP
 337  * @dev: the device the packet came on
 338  * @hdr: the packet header
 339  * @has_grh: true if the packet has a GRH
 340  * @data: the packet data
 341  * @tlen: the packet length
 342  * @qp: the QP the packet came on
 343  *
 344  * This is called from ipath_ib_rcv() to process an incoming packet
 345  * for the given QP.
 346  * Called at interrupt level.
 347  */
 348 static void ipath_qp_rcv(struct ipath_ibdev *dev,
 349                          struct ipath_ib_header *hdr, int has_grh,
 350                          void *data, u32 tlen, struct ipath_qp *qp)
 351 {
 352         /* Check for valid receive state. */
 353         if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
 354                 dev->n_pkt_drops++;
 355                 return;
 356         }
 357
 358         switch (qp->ibqp.qp_type) {
 359         case IB_QPT_SMI:
 360         case IB_QPT_GSI:
 361                 if (ib_ipath_disable_sma)
 362                         break;
 363                 /* FALLTHROUGH */
 364         case IB_QPT_UD:
 365                 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
 366                 break;
 367
 368         case IB_QPT_RC:
 369                 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
 370                 break;
 371
 372         case IB_QPT_UC:
 373                 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
 374                 break;
 375
 376         default:
 377                 break;
 378         }
 379 }
 380
 381 /**
 382  * ipath_ib_rcv - process an incoming packet
 383  * @arg: the device pointer
 384  * @rhdr: the header of the packet
 385  * @data: the packet data
 386  * @tlen: the packet length
 387  *
 388  * This is called from ipath_kreceive() to process an incoming packet at
 389  * interrupt level. Tlen is the length of the header + data + CRC in bytes.
 390  */
 391 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
 392                   u32 tlen)
 393 {
 394         struct ipath_ib_header *hdr = rhdr;
 395         struct ipath_other_headers *ohdr;
 396         struct ipath_qp *qp;
 397         u32 qp_num;
 398         int lnh;
 399         u8 opcode;
 400         u16 lid;
 401
 402         if (unlikely(dev == NULL))
 403                 goto bail;
 404
 405         if (unlikely(tlen < 24)) {      /* LRH+BTH+CRC */
 406                 dev->rcv_errors++;
 407                 goto bail;
 408         }
 409
 410         /* Check for a valid destination LID (see ch. 7.11.1). */
 411         lid = be16_to_cpu(hdr->lrh[1]);
 412         if (lid < IPATH_MULTICAST_LID_BASE) {
 413                 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
 414                 if (unlikely(lid != dev->dd->ipath_lid)) {
 415                         dev->rcv_errors++;
 416                         goto bail;
 417                 }
 418         }
 419
 420         /* Check for GRH */
 421         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 422         if (lnh == IPATH_LRH_BTH)
 423                 ohdr = &hdr->u.oth;
 424         else if (lnh == IPATH_LRH_GRH)
 425                 ohdr = &hdr->u.l.oth;
 426         else {
 427                 dev->rcv_errors++;
 428                 goto bail;
 429         }
 430
 431         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
 432         dev->opstats[opcode].n_bytes += tlen;
 433         dev->opstats[opcode].n_packets++;
 434
 435         /* Get the destination QP number. */
 436         qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
 437         if (qp_num == IPATH_MULTICAST_QPN) {
 438                 struct ipath_mcast *mcast;
 439                 struct ipath_mcast_qp *p;
 440
 441                 if (lnh != IPATH_LRH_GRH) {
 442                         dev->n_pkt_drops++;
 443                         goto bail;
 444                 }
 445                 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
 446                 if (mcast == NULL) {
 447                         dev->n_pkt_drops++;
 448                         goto bail;
 449                 }
 450                 dev->n_multicast_rcv++;
 451                 list_for_each_entry_rcu(p, &mcast->qp_list, list)
 452                         ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
 453                 /*
 454                  * Notify ipath_multicast_detach() if it is waiting for us
 455                  * to finish.
 456                  */
 457                 if (atomic_dec_return(&mcast->refcount) <= 1)
 458                         wake_up(&mcast->wait);
 459         } else {
 460                 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
 461                 if (qp) {
 462                         dev->n_unicast_rcv++;
 463                         ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
 464                                      tlen, qp);
 465                         /*
 466                          * Notify ipath_destroy_qp() if it is waiting
 467                          * for us to finish.
 468                          */
 469                         if (atomic_dec_and_test(&qp->refcount))
 470                                 wake_up(&qp->wait);
 471                 } else
 472                         dev->n_pkt_drops++;
 473         }
 474
 475 bail:;
 476 }
 477
 478 /**
 479  * ipath_ib_timer - verbs timer
 480  * @arg: the device pointer
 481  *
 482  * This is called from ipath_do_rcv_timer() at interrupt level to check for
 483  * QPs which need retransmits and to collect performance numbers.
 484  */
 485 void ipath_ib_timer(struct ipath_ibdev *dev)
 486 {
 487         struct ipath_qp *resend = NULL;
 488         struct list_head *last;
 489         struct ipath_qp *qp;
 490         unsigned long flags;
 491
 492         if (dev == NULL)
 493                 return;
 494
 495         spin_lock_irqsave(&dev->pending_lock, flags);
 496         /* Start filling the next pending queue. */
 497         if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
 498                 dev->pending_index = 0;
 499         /* Save any requests still in the new queue, they have timed out. */
 500         last = &dev->pending[dev->pending_index];
 501         while (!list_empty(last)) {
 502                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 503                 list_del_init(&qp->timerwait);
 504                 qp->timer_next = resend;
 505                 resend = qp;
 506                 atomic_inc(&qp->refcount);
 507         }
 508         last = &dev->rnrwait;
 509         if (!list_empty(last)) {
 510                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 511                 if (--qp->s_rnr_timeout == 0) {
 512                         do {
 513                                 list_del_init(&qp->timerwait);
 514                                 tasklet_hi_schedule(&qp->s_task);
 515                                 if (list_empty(last))
 516                                         break;
 517                                 qp = list_entry(last->next, struct ipath_qp,
 518                                                 timerwait);
 519                         } while (qp->s_rnr_timeout == 0);
 520                 }
 521         }
 522         /*
 523          * We should only be in the started state if pma_sample_start != 0
 524          */
 525         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
 526             --dev->pma_sample_start == 0) {
 527                 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
 528                 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
 529                                         &dev->ipath_rword,
 530                                         &dev->ipath_spkts,
 531                                         &dev->ipath_rpkts,
 532                                         &dev->ipath_xmit_wait);
 533         }
 534         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
 535                 if (dev->pma_sample_interval == 0) {
 536                         u64 ta, tb, tc, td, te;
 537
 538                         dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
 539                         ipath_snapshot_counters(dev->dd, &ta, &tb,
 540                                                 &tc, &td, &te);
 541
 542                         dev->ipath_sword = ta - dev->ipath_sword;
 543                         dev->ipath_rword = tb - dev->ipath_rword;
 544                         dev->ipath_spkts = tc - dev->ipath_spkts;
 545                         dev->ipath_rpkts = td - dev->ipath_rpkts;
 546                         dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
 547                 }
 548                 else
 549                         dev->pma_sample_interval--;
 550         }
 551         spin_unlock_irqrestore(&dev->pending_lock, flags);
 552
 553         /* XXX What if timer fires again while this is running? */
 554         for (qp = resend; qp != NULL; qp = qp->timer_next) {
 555                 struct ib_wc wc;
 556
 557                 spin_lock_irqsave(&qp->s_lock, flags);
 558                 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
 559                         dev->n_timeouts++;
 560                         ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
 561                 }
 562                 spin_unlock_irqrestore(&qp->s_lock, flags);
 563
 564                 /* Notify ipath_destroy_qp() if it is waiting. */
 565                 if (atomic_dec_and_test(&qp->refcount))
 566                         wake_up(&qp->wait);
 567         }
 568 }
 569
 570 static void update_sge(struct ipath_sge_state *ss, u32 length)
 571 {
 572         struct ipath_sge *sge = &ss->sge;
 573
 574         sge->vaddr += length;
 575         sge->length -= length;
 576         sge->sge_length -= length;
 577         if (sge->sge_length == 0) {
 578                 if (--ss->num_sge)
 579                         *sge = *ss->sg_list++;
 580         } else if (sge->length == 0 && sge->mr != NULL) {
 581                 if (++sge->n >= IPATH_SEGSZ) {
 582                         if (++sge->m >= sge->mr->mapsz)
 583                                 return;
 584                         sge->n = 0;
 585                 }
 586                 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
 587                 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
 588         }
 589 }
 590
 591 #ifdef __LITTLE_ENDIAN
 592 static inline u32 get_upper_bits(u32 data, u32 shift)
 593 {
 594         return data >> shift;
 595 }
 596
 597 static inline u32 set_upper_bits(u32 data, u32 shift)
 598 {
 599         return data << shift;
 600 }
 601
 602 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 603 {
 604         data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
 605         data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 606         return data;
 607 }
 608 #else
 609 static inline u32 get_upper_bits(u32 data, u32 shift)
 610 {
 611         return data << shift;
 612 }
 613
 614 static inline u32 set_upper_bits(u32 data, u32 shift)
 615 {
 616         return data >> shift;
 617 }
 618
 619 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 620 {
 621         data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
 622         data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 623         return data;
 624 }
 625 #endif
 626
 627 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
 628                     u32 length)
 629 {
 630         u32 extra = 0;
 631         u32 data = 0;
 632         u32 last;
 633
 634         while (1) {
 635                 u32 len = ss->sge.length;
 636                 u32 off;
 637
 638                 BUG_ON(len == 0);
 639                 if (len > length)
 640                         len = length;
 641                 if (len > ss->sge.sge_length)
 642                         len = ss->sge.sge_length;
 643                 /* If the source address is not aligned, try to align it. */
 644                 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
 645                 if (off) {
 646                         u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
 647                                             ~(sizeof(u32) - 1));
 648                         u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
 649                         u32 y;
 650
 651                         y = sizeof(u32) - off;
 652                         if (len > y)
 653                                 len = y;
 654                         if (len + extra >= sizeof(u32)) {
 655                                 data |= set_upper_bits(v, extra *
 656                                                        BITS_PER_BYTE);
 657                                 len = sizeof(u32) - extra;
 658                                 if (len == length) {
 659                                         last = data;
 660                                         break;
 661                                 }
 662                                 __raw_writel(data, piobuf);
 663                                 piobuf++;
 664                                 extra = 0;
 665                                 data = 0;
 666                         } else {
 667                                 /* Clear unused upper bytes */
 668                                 data |= clear_upper_bytes(v, len, extra);
 669                                 if (len == length) {
 670                                         last = data;
 671                                         break;
 672                                 }
 673                                 extra += len;
 674                         }
 675                 } else if (extra) {
 676                         /* Source address is aligned. */
 677                         u32 *addr = (u32 *) ss->sge.vaddr;
 678                         int shift = extra * BITS_PER_BYTE;
 679                         int ushift = 32 - shift;
 680                         u32 l = len;
 681
 682                         while (l >= sizeof(u32)) {
 683                                 u32 v = *addr;
 684
 685                                 data |= set_upper_bits(v, shift);
 686                                 __raw_writel(data, piobuf);
 687                                 data = get_upper_bits(v, ushift);
 688                                 piobuf++;
 689                                 addr++;
 690                                 l -= sizeof(u32);
 691                         }
 692                         /*
 693                          * We still have 'extra' number of bytes leftover.
 694                          */
 695                         if (l) {
 696                                 u32 v = *addr;
 697
 698                                 if (l + extra >= sizeof(u32)) {
 699                                         data |= set_upper_bits(v, shift);
 700                                         len -= l + extra - sizeof(u32);
 701                                         if (len == length) {
 702                                                 last = data;
 703                                                 break;
 704                                         }
 705                                         __raw_writel(data, piobuf);
 706                                         piobuf++;
 707                                         extra = 0;
 708                                         data = 0;
 709                                 } else {
 710                                         /* Clear unused upper bytes */
 711                                         data |= clear_upper_bytes(v, l,
 712                                                                   extra);
 713                                         if (len == length) {
 714                                                 last = data;
 715                                                 break;
 716                                         }
 717                                         extra += l;
 718                                 }
 719                         } else if (len == length) {
 720                                 last = data;
 721                                 break;
 722                         }
 723                 } else if (len == length) {
 724                         u32 w;
 725
 726                         /*
 727                          * Need to round up for the last dword in the
 728                          * packet.
 729                          */
 730                         w = (len + 3) >> 2;
 731                         __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
 732                         piobuf += w - 1;
 733                         last = ((u32 *) ss->sge.vaddr)[w - 1];
 734                         break;
 735                 } else {
 736                         u32 w = len >> 2;
 737
 738                         __iowrite32_copy(piobuf, ss->sge.vaddr, w);
 739                         piobuf += w;
 740
 741                         extra = len & (sizeof(u32) - 1);
 742                         if (extra) {
 743                                 u32 v = ((u32 *) ss->sge.vaddr)[w];
 744
 745                                 /* Clear unused upper bytes */
 746                                 data = clear_upper_bytes(v, extra, 0);
 747                         }
 748                 }
 749                 update_sge(ss, len);
 750                 length -= len;
 751         }
 752         /* Update address before sending packet. */
 753         update_sge(ss, length);
 754         /* must flush early everything before trigger word */
 755         ipath_flush_wc();
 756         __raw_writel(last, piobuf);
 757         /* be sure trigger word is written */
 758         ipath_flush_wc();
 759 }
 760
 761 /**
 762  * ipath_verbs_send - send a packet
 763  * @dd: the infinipath device
 764  * @hdrwords: the number of words in the header
 765  * @hdr: the packet header
 766  * @len: the length of the packet in bytes
 767  * @ss: the SGE to send
 768  */
 769 int ipath_verbs_send(struct ipath_devdata *dd, u32 hdrwords,
 770                      u32 *hdr, u32 len, struct ipath_sge_state *ss)
 771 {
 772         u32 __iomem *piobuf;
 773         u32 plen;
 774         int ret;
 775
 776         /* +1 is for the qword padding of pbc */
 777         plen = hdrwords + ((len + 3) >> 2) + 1;
 778         if (unlikely((plen << 2) > dd->ipath_ibmaxlen)) {
 779                 ret = -EINVAL;
 780                 goto bail;
 781         }
 782
 783         /* Get a PIO buffer to use. */
 784         piobuf = ipath_getpiobuf(dd, NULL);
 785         if (unlikely(piobuf == NULL)) {
 786                 ret = -EBUSY;
 787                 goto bail;
 788         }
 789
 790         /*
 791          * Write len to control qword, no flags.
 792          * We have to flush after the PBC for correctness on some cpus
 793          * or WC buffer can be written out of order.
 794          */
 795         writeq(plen, piobuf);
 796         ipath_flush_wc();
 797         piobuf += 2;
 798         if (len == 0) {
 799                 /*
 800                  * If there is just the header portion, must flush before
 801                  * writing last word of header for correctness, and after
 802                  * the last header word (trigger word).
 803                  */
 804                 __iowrite32_copy(piobuf, hdr, hdrwords - 1);
 805                 ipath_flush_wc();
 806                 __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
 807                 ipath_flush_wc();
 808                 ret = 0;
 809                 goto bail;
 810         }
 811
 812         __iowrite32_copy(piobuf, hdr, hdrwords);
 813         piobuf += hdrwords;
 814
 815         /* The common case is aligned and contained in one segment. */
 816         if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
 817                    !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
 818                 u32 w;
 819                 u32 *addr = (u32 *) ss->sge.vaddr;
 820
 821                 /* Update address before sending packet. */
 822                 update_sge(ss, len);
 823                 /* Need to round up for the last dword in the packet. */
 824                 w = (len + 3) >> 2;
 825                 __iowrite32_copy(piobuf, addr, w - 1);
 826                 /* must flush early everything before trigger word */
 827                 ipath_flush_wc();
 828                 __raw_writel(addr[w - 1], piobuf + w - 1);
 829                 /* be sure trigger word is written */
 830                 ipath_flush_wc();
 831                 ret = 0;
 832                 goto bail;
 833         }
 834         copy_io(piobuf, ss, len);
 835         ret = 0;
 836
 837 bail:
 838         return ret;
 839 }
 840
 841 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
 842                             u64 *rwords, u64 *spkts, u64 *rpkts,
 843                             u64 *xmit_wait)
 844 {
 845         int ret;
 846
 847         if (!(dd->ipath_flags & IPATH_INITTED)) {
 848                 /* no hardware, freeze, etc. */
 849                 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
 850                 ret = -EINVAL;
 851                 goto bail;
 852         }
 853         *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
 854         *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
 855         *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
 856         *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
 857         *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
 858
 859         ret = 0;
 860
 861 bail:
 862         return ret;
 863 }
 864
 865 /**
 866  * ipath_get_counters - get various chip counters
 867  * @dd: the infinipath device
 868  * @cntrs: counters are placed here
 869  *
 870  * Return the counters needed by recv_pma_get_portcounters().
 871  */
 872 int ipath_get_counters(struct ipath_devdata *dd,
 873                        struct ipath_verbs_counters *cntrs)
 874 {
 875         int ret;
 876
 877         if (!(dd->ipath_flags & IPATH_INITTED)) {
 878                 /* no hardware, freeze, etc. */
 879                 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
 880                 ret = -EINVAL;
 881                 goto bail;
 882         }
 883         cntrs->symbol_error_counter =
 884                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_ibsymbolerrcnt);
 885         cntrs->link_error_recovery_counter =
 886                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkerrrecovcnt);
 887         /*
 888          * The link downed counter counts when the other side downs the
 889          * connection.  We add in the number of times we downed the link
 890          * due to local link integrity errors to compensate.
 891          */
 892         cntrs->link_downed_counter =
 893                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkdowncnt);
 894         cntrs->port_rcv_errors =
 895                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rxdroppktcnt) +
 896                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvovflcnt) +
 897                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_portovflcnt) +
 898                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_err_rlencnt) +
 899                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_invalidrlencnt) +
 900                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_erricrccnt) +
 901                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errvcrccnt) +
 902                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errlpcrccnt) +
 903                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_badformatcnt) +
 904                 dd->ipath_rxfc_unsupvl_errs;
 905         cntrs->port_rcv_remphys_errors =
 906                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvebpcnt);
 907         cntrs->port_xmit_discards =
 908                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_unsupvlcnt);
 909         cntrs->port_xmit_data =
 910                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
 911         cntrs->port_rcv_data =
 912                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
 913         cntrs->port_xmit_packets =
 914                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
 915         cntrs->port_rcv_packets =
 916                 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
 917         cntrs->local_link_integrity_errors =
 918                 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
 919                 dd->ipath_lli_errs : dd->ipath_lli_errors;
 920         cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
 921
 922         ret = 0;
 923
 924 bail:
 925         return ret;
 926 }
 927
 928 /**
 929  * ipath_ib_piobufavail - callback when a PIO buffer is available
 930  * @arg: the device pointer
 931  *
 932  * This is called from ipath_intr() at interrupt level when a PIO buffer is
 933  * available after ipath_verbs_send() returned an error that no buffers were
 934  * available.  Return 1 if we consumed all the PIO buffers and we still have
 935  * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
 936  * return zero).
 937  */
 938 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
 939 {
 940         struct ipath_qp *qp;
 941         unsigned long flags;
 942
 943         if (dev == NULL)
 944                 goto bail;
 945
 946         spin_lock_irqsave(&dev->pending_lock, flags);
 947         while (!list_empty(&dev->piowait)) {
 948                 qp = list_entry(dev->piowait.next, struct ipath_qp,
 949                                 piowait);
 950                 list_del_init(&qp->piowait);
 951                 clear_bit(IPATH_S_BUSY, &qp->s_busy);
 952                 tasklet_hi_schedule(&qp->s_task);
 953         }
 954         spin_unlock_irqrestore(&dev->pending_lock, flags);
 955
 956 bail:
 957         return 0;
 958 }
 959
 960 static int ipath_query_device(struct ib_device *ibdev,
 961                               struct ib_device_attr *props)
 962 {
 963         struct ipath_ibdev *dev = to_idev(ibdev);
 964
 965         memset(props, 0, sizeof(*props));
 966
 967         props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
 968                 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
 969                 IB_DEVICE_SYS_IMAGE_GUID;
 970         props->page_size_cap = PAGE_SIZE;
 971         props->vendor_id = dev->dd->ipath_vendorid;
 972         props->vendor_part_id = dev->dd->ipath_deviceid;
 973         props->hw_ver = dev->dd->ipath_pcirev;
 974
 975         props->sys_image_guid = dev->sys_image_guid;
 976
 977         props->max_mr_size = ~0ull;
 978         props->max_qp = ib_ipath_max_qps;
 979         props->max_qp_wr = ib_ipath_max_qp_wrs;
 980         props->max_sge = ib_ipath_max_sges;
 981         props->max_cq = ib_ipath_max_cqs;
 982         props->max_ah = ib_ipath_max_ahs;
 983         props->max_cqe = ib_ipath_max_cqes;
 984         props->max_mr = dev->lk_table.max;
 985         props->max_fmr = dev->lk_table.max;
 986         props->max_map_per_fmr = 32767;
 987         props->max_pd = ib_ipath_max_pds;
 988         props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
 989         props->max_qp_init_rd_atom = 255;
 990         /* props->max_res_rd_atom */
 991         props->max_srq = ib_ipath_max_srqs;
 992         props->max_srq_wr = ib_ipath_max_srq_wrs;
 993         props->max_srq_sge = ib_ipath_max_srq_sges;
 994         /* props->local_ca_ack_delay */
 995         props->atomic_cap = IB_ATOMIC_GLOB;
 996         props->max_pkeys = ipath_get_npkeys(dev->dd);
 997         props->max_mcast_grp = ib_ipath_max_mcast_grps;
 998         props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
 999         props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1000                 props->max_mcast_grp;
1001
1002         return 0;
1003 }
1004
1005 const u8 ipath_cvt_physportstate[16] = {
1006         [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1007         [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1008         [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1009         [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1010         [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1011         [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1012         [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1013         [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1014         [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1015         [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1016         [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1017         [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1018         [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1019 };
1020
1021 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1022 {
1023         return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1024 }
1025
1026 static int ipath_query_port(struct ib_device *ibdev,
1027                             u8 port, struct ib_port_attr *props)
1028 {
1029         struct ipath_ibdev *dev = to_idev(ibdev);
1030         enum ib_mtu mtu;
1031         u16 lid = dev->dd->ipath_lid;
1032         u64 ibcstat;
1033
1034         memset(props, 0, sizeof(*props));
1035         props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1036         props->lmc = dev->mkeyprot_resv_lmc & 7;
1037         props->sm_lid = dev->sm_lid;
1038         props->sm_sl = dev->sm_sl;
1039         ibcstat = dev->dd->ipath_lastibcstat;
1040         props->state = ((ibcstat >> 4) & 0x3) + 1;
1041         /* See phys_state_show() */
1042         props->phys_state = ipath_cvt_physportstate[
1043                 dev->dd->ipath_lastibcstat & 0xf];
1044         props->port_cap_flags = dev->port_cap_flags;
1045         props->gid_tbl_len = 1;
1046         props->max_msg_sz = 0x80000000;
1047         props->pkey_tbl_len = ipath_get_npkeys(dev->dd);
1048         props->bad_pkey_cntr = ipath_get_cr_errpkey(dev->dd) -
1049                 dev->z_pkey_violations;
1050         props->qkey_viol_cntr = dev->qkey_violations;
1051         props->active_width = IB_WIDTH_4X;
1052         /* See rate_show() */
1053         props->active_speed = 1;        /* Regular 10Mbs speed. */
1054         props->max_vl_num = 1;          /* VLCap = VL0 */
1055         props->init_type_reply = 0;
1056
1057         /*
1058          * Note: the chips support a maximum MTU of 4096, but the driver
1059          * hasn't implemented this feature yet, so set the maximum value
1060          * to 2048.
1061          */
1062         props->max_mtu = IB_MTU_2048;
1063         switch (dev->dd->ipath_ibmtu) {
1064         case 4096:
1065                 mtu = IB_MTU_4096;
1066                 break;
1067         case 2048:
1068                 mtu = IB_MTU_2048;
1069                 break;
1070         case 1024:
1071                 mtu = IB_MTU_1024;
1072                 break;
1073         case 512:
1074                 mtu = IB_MTU_512;
1075                 break;
1076         case 256:
1077                 mtu = IB_MTU_256;
1078                 break;
1079         default:
1080                 mtu = IB_MTU_2048;
1081         }
1082         props->active_mtu = mtu;
1083         props->subnet_timeout = dev->subnet_timeout;
1084
1085         return 0;
1086 }
1087
1088 static int ipath_modify_device(struct ib_device *device,
1089                                int device_modify_mask,
1090                                struct ib_device_modify *device_modify)
1091 {
1092         int ret;
1093
1094         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1095                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1096                 ret = -EOPNOTSUPP;
1097                 goto bail;
1098         }
1099
1100         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1101                 memcpy(device->node_desc, device_modify->node_desc, 64);
1102
1103         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1104                 to_idev(device)->sys_image_guid =
1105                         cpu_to_be64(device_modify->sys_image_guid);
1106
1107         ret = 0;
1108
1109 bail:
1110         return ret;
1111 }
1112
1113 static int ipath_modify_port(struct ib_device *ibdev,
1114                              u8 port, int port_modify_mask,
1115                              struct ib_port_modify *props)
1116 {
1117         struct ipath_ibdev *dev = to_idev(ibdev);
1118
1119         dev->port_cap_flags |= props->set_port_cap_mask;
1120         dev->port_cap_flags &= ~props->clr_port_cap_mask;
1121         if (port_modify_mask & IB_PORT_SHUTDOWN)
1122                 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1123         if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1124                 dev->qkey_violations = 0;
1125         return 0;
1126 }
1127
1128 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1129                            int index, union ib_gid *gid)
1130 {
1131         struct ipath_ibdev *dev = to_idev(ibdev);
1132         int ret;
1133
1134         if (index >= 1) {
1135                 ret = -EINVAL;
1136                 goto bail;
1137         }
1138         gid->global.subnet_prefix = dev->gid_prefix;
1139         gid->global.interface_id = dev->dd->ipath_guid;
1140
1141         ret = 0;
1142
1143 bail:
1144         return ret;
1145 }
1146
1147 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1148                                     struct ib_ucontext *context,
1149                                     struct ib_udata *udata)
1150 {
1151         struct ipath_ibdev *dev = to_idev(ibdev);
1152         struct ipath_pd *pd;
1153         struct ib_pd *ret;
1154
1155         /*
1156          * This is actually totally arbitrary.  Some correctness tests
1157          * assume there's a maximum number of PDs that can be allocated.
1158          * We don't actually have this limit, but we fail the test if
1159          * we allow allocations of more than we report for this value.
1160          */
1161
1162         pd = kmalloc(sizeof *pd, GFP_KERNEL);
1163         if (!pd) {
1164                 ret = ERR_PTR(-ENOMEM);
1165                 goto bail;
1166         }
1167
1168         spin_lock(&dev->n_pds_lock);
1169         if (dev->n_pds_allocated == ib_ipath_max_pds) {
1170                 spin_unlock(&dev->n_pds_lock);
1171                 kfree(pd);
1172                 ret = ERR_PTR(-ENOMEM);
1173                 goto bail;
1174         }
1175
1176         dev->n_pds_allocated++;
1177         spin_unlock(&dev->n_pds_lock);
1178
1179         /* ib_alloc_pd() will initialize pd->ibpd. */
1180         pd->user = udata != NULL;
1181
1182         ret = &pd->ibpd;
1183
1184 bail:
1185         return ret;
1186 }
1187
1188 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1189 {
1190         struct ipath_pd *pd = to_ipd(ibpd);
1191         struct ipath_ibdev *dev = to_idev(ibpd->device);
1192
1193         spin_lock(&dev->n_pds_lock);
1194         dev->n_pds_allocated--;
1195         spin_unlock(&dev->n_pds_lock);
1196
1197         kfree(pd);
1198
1199         return 0;
1200 }
1201
1202 /**
1203  * ipath_create_ah - create an address handle
1204  * @pd: the protection domain
1205  * @ah_attr: the attributes of the AH
1206  *
1207  * This may be called from interrupt context.
1208  */
1209 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1210                                      struct ib_ah_attr *ah_attr)
1211 {
1212         struct ipath_ah *ah;
1213         struct ib_ah *ret;
1214         struct ipath_ibdev *dev = to_idev(pd->device);
1215         unsigned long flags;
1216
1217         /* A multicast address requires a GRH (see ch. 8.4.1). */
1218         if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1219             ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1220             !(ah_attr->ah_flags & IB_AH_GRH)) {
1221                 ret = ERR_PTR(-EINVAL);
1222                 goto bail;
1223         }
1224
1225         if (ah_attr->dlid == 0) {
1226                 ret = ERR_PTR(-EINVAL);
1227                 goto bail;
1228         }
1229
1230         if (ah_attr->port_num < 1 ||
1231             ah_attr->port_num > pd->device->phys_port_cnt) {
1232                 ret = ERR_PTR(-EINVAL);
1233                 goto bail;
1234         }
1235
1236         ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1237         if (!ah) {
1238                 ret = ERR_PTR(-ENOMEM);
1239                 goto bail;
1240         }
1241
1242         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1243         if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1244                 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1245                 kfree(ah);
1246                 ret = ERR_PTR(-ENOMEM);
1247                 goto bail;
1248         }
1249
1250         dev->n_ahs_allocated++;
1251         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1252
1253         /* ib_create_ah() will initialize ah->ibah. */
1254         ah->attr = *ah_attr;
1255
1256         ret = &ah->ibah;
1257
1258 bail:
1259         return ret;
1260 }
1261
1262 /**
1263  * ipath_destroy_ah - destroy an address handle
1264  * @ibah: the AH to destroy
1265  *
1266  * This may be called from interrupt context.
1267  */
1268 static int ipath_destroy_ah(struct ib_ah *ibah)
1269 {
1270         struct ipath_ibdev *dev = to_idev(ibah->device);
1271         struct ipath_ah *ah = to_iah(ibah);
1272         unsigned long flags;
1273
1274         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1275         dev->n_ahs_allocated--;
1276         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1277
1278         kfree(ah);
1279
1280         return 0;
1281 }
1282
1283 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1284 {
1285         struct ipath_ah *ah = to_iah(ibah);
1286
1287         *ah_attr = ah->attr;
1288
1289         return 0;
1290 }
1291
1292 /**
1293  * ipath_get_npkeys - return the size of the PKEY table for port 0
1294  * @dd: the infinipath device
1295  */
1296 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1297 {
1298         return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1299 }
1300
1301 /**
1302  * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1303  * @dd: the infinipath device
1304  * @index: the PKEY index
1305  */
1306 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1307 {
1308         unsigned ret;
1309
1310         if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1311                 ret = 0;
1312         else
1313                 ret = dd->ipath_pd[0]->port_pkeys[index];
1314
1315         return ret;
1316 }
1317
1318 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1319                             u16 *pkey)
1320 {
1321         struct ipath_ibdev *dev = to_idev(ibdev);
1322         int ret;
1323
1324         if (index >= ipath_get_npkeys(dev->dd)) {
1325                 ret = -EINVAL;
1326                 goto bail;
1327         }
1328
1329         *pkey = ipath_get_pkey(dev->dd, index);
1330         ret = 0;
1331
1332 bail:
1333         return ret;
1334 }
1335
1336 /**
1337  * ipath_alloc_ucontext - allocate a ucontest
1338  * @ibdev: the infiniband device
1339  * @udata: not used by the InfiniPath driver
1340  */
1341
1342 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1343                                                 struct ib_udata *udata)
1344 {
1345         struct ipath_ucontext *context;
1346         struct ib_ucontext *ret;
1347
1348         context = kmalloc(sizeof *context, GFP_KERNEL);
1349         if (!context) {
1350                 ret = ERR_PTR(-ENOMEM);
1351                 goto bail;
1352         }
1353
1354         ret = &context->ibucontext;
1355
1356 bail:
1357         return ret;
1358 }
1359
1360 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1361 {
1362         kfree(to_iucontext(context));
1363         return 0;
1364 }
1365
1366 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1367
1368 static void __verbs_timer(unsigned long arg)
1369 {
1370         struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1371
1372         /*
1373          * If port 0 receive packet interrupts are not available, or
1374          * can be missed, poll the receive queue
1375          */
1376         if (dd->ipath_flags & IPATH_POLL_RX_INTR)
1377                 ipath_kreceive(dd);
1378
1379         /* Handle verbs layer timeouts. */
1380         ipath_ib_timer(dd->verbs_dev);
1381
1382         mod_timer(&dd->verbs_timer, jiffies + 1);
1383 }
1384
1385 static int enable_timer(struct ipath_devdata *dd)
1386 {
1387         /*
1388          * Early chips had a design flaw where the chip and kernel idea
1389          * of the tail register don't always agree, and therefore we won't
1390          * get an interrupt on the next packet received.
1391          * If the board supports per packet receive interrupts, use it.
1392          * Otherwise, the timer function periodically checks for packets
1393          * to cover this case.
1394          * Either way, the timer is needed for verbs layer related
1395          * processing.
1396          */
1397         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1398                 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1399                                  0x2074076542310ULL);
1400                 /* Enable GPIO bit 2 interrupt */
1401                 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1402                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1403                                  dd->ipath_gpio_mask);
1404         }
1405
1406         init_timer(&dd->verbs_timer);
1407         dd->verbs_timer.function = __verbs_timer;
1408         dd->verbs_timer.data = (unsigned long)dd;
1409         dd->verbs_timer.expires = jiffies + 1;
1410         add_timer(&dd->verbs_timer);
1411
1412         return 0;
1413 }
1414
1415 static int disable_timer(struct ipath_devdata *dd)
1416 {
1417         /* Disable GPIO bit 2 interrupt */
1418         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1419                 u64 val;
1420                 /* Disable GPIO bit 2 interrupt */
1421                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
1422                 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1423                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1424                                  dd->ipath_gpio_mask);
1425                 /*
1426                  * We might want to undo changes to debugportselect,
1427                  * but how?
1428                  */
1429         }
1430
1431         del_timer_sync(&dd->verbs_timer);
1432
1433         return 0;
1434 }
1435
1436 /**
1437  * ipath_register_ib_device - register our device with the infiniband core
1438  * @dd: the device data structure
1439  * Return the allocated ipath_ibdev pointer or NULL on error.
1440  */
1441 int ipath_register_ib_device(struct ipath_devdata *dd)
1442 {
1443         struct ipath_verbs_counters cntrs;
1444         struct ipath_ibdev *idev;
1445         struct ib_device *dev;
1446         int ret;
1447
1448         idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1449         if (idev == NULL) {
1450                 ret = -ENOMEM;
1451                 goto bail;
1452         }
1453
1454         dev = &idev->ibdev;
1455
1456         /* Only need to initialize non-zero fields. */
1457         spin_lock_init(&idev->n_pds_lock);
1458         spin_lock_init(&idev->n_ahs_lock);
1459         spin_lock_init(&idev->n_cqs_lock);
1460         spin_lock_init(&idev->n_qps_lock);
1461         spin_lock_init(&idev->n_srqs_lock);
1462         spin_lock_init(&idev->n_mcast_grps_lock);
1463
1464         spin_lock_init(&idev->qp_table.lock);
1465         spin_lock_init(&idev->lk_table.lock);
1466         idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1467         /* Set the prefix to the default value (see ch. 4.1.1) */
1468         idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1469
1470         ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1471         if (ret)
1472                 goto err_qp;
1473
1474         /*
1475          * The top ib_ipath_lkey_table_size bits are used to index the
1476          * table.  The lower 8 bits can be owned by the user (copied from
1477          * the LKEY).  The remaining bits act as a generation number or tag.
1478          */
1479         idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1480         idev->lk_table.table = kzalloc(idev->lk_table.max *
1481                                        sizeof(*idev->lk_table.table),
1482                                        GFP_KERNEL);
1483         if (idev->lk_table.table == NULL) {
1484                 ret = -ENOMEM;
1485                 goto err_lk;
1486         }
1487         INIT_LIST_HEAD(&idev->pending_mmaps);
1488         spin_lock_init(&idev->pending_lock);
1489         idev->mmap_offset = PAGE_SIZE;
1490         spin_lock_init(&idev->mmap_offset_lock);
1491         INIT_LIST_HEAD(&idev->pending[0]);
1492         INIT_LIST_HEAD(&idev->pending[1]);
1493         INIT_LIST_HEAD(&idev->pending[2]);
1494         INIT_LIST_HEAD(&idev->piowait);
1495         INIT_LIST_HEAD(&idev->rnrwait);
1496         idev->pending_index = 0;
1497         idev->port_cap_flags =
1498                 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1499         idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1500         idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1501         idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1502         idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1503         idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1504         idev->link_width_enabled = 3;   /* 1x or 4x */
1505
1506         /* Snapshot current HW counters to "clear" them. */
1507         ipath_get_counters(dd, &cntrs);
1508         idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1509         idev->z_link_error_recovery_counter =
1510                 cntrs.link_error_recovery_counter;
1511         idev->z_link_downed_counter = cntrs.link_downed_counter;
1512         idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1513         idev->z_port_rcv_remphys_errors =
1514                 cntrs.port_rcv_remphys_errors;
1515         idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1516         idev->z_port_xmit_data = cntrs.port_xmit_data;
1517         idev->z_port_rcv_data = cntrs.port_rcv_data;
1518         idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1519         idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1520         idev->z_local_link_integrity_errors =
1521                 cntrs.local_link_integrity_errors;
1522         idev->z_excessive_buffer_overrun_errors =
1523                 cntrs.excessive_buffer_overrun_errors;
1524
1525         /*
1526          * The system image GUID is supposed to be the same for all
1527          * IB HCAs in a single system but since there can be other
1528          * device types in the system, we can't be sure this is unique.
1529          */
1530         if (!sys_image_guid)
1531                 sys_image_guid = dd->ipath_guid;
1532         idev->sys_image_guid = sys_image_guid;
1533         idev->ib_unit = dd->ipath_unit;
1534         idev->dd = dd;
1535
1536         strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1537         dev->owner = THIS_MODULE;
1538         dev->node_guid = dd->ipath_guid;
1539         dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1540         dev->uverbs_cmd_mask =
1541                 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT)         |
1542                 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)        |
1543                 (1ull << IB_USER_VERBS_CMD_QUERY_PORT)          |
1544                 (1ull << IB_USER_VERBS_CMD_ALLOC_PD)            |
1545                 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD)          |
1546                 (1ull << IB_USER_VERBS_CMD_CREATE_AH)           |
1547                 (1ull << IB_USER_VERBS_CMD_DESTROY_AH)          |
1548                 (1ull << IB_USER_VERBS_CMD_QUERY_AH)            |
1549                 (1ull << IB_USER_VERBS_CMD_REG_MR)              |
1550                 (1ull << IB_USER_VERBS_CMD_DEREG_MR)            |
1551                 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1552                 (1ull << IB_USER_VERBS_CMD_CREATE_CQ)           |
1553                 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ)           |
1554                 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ)          |
1555                 (1ull << IB_USER_VERBS_CMD_POLL_CQ)             |
1556                 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)       |
1557                 (1ull << IB_USER_VERBS_CMD_CREATE_QP)           |
1558                 (1ull << IB_USER_VERBS_CMD_QUERY_QP)            |
1559                 (1ull << IB_USER_VERBS_CMD_MODIFY_QP)           |
1560                 (1ull << IB_USER_VERBS_CMD_DESTROY_QP)          |
1561                 (1ull << IB_USER_VERBS_CMD_POST_SEND)           |
1562                 (1ull << IB_USER_VERBS_CMD_POST_RECV)           |
1563                 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)        |
1564                 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST)        |
1565                 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ)          |
1566                 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)          |
1567                 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ)           |
1568                 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)         |
1569                 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1570         dev->node_type = RDMA_NODE_IB_CA;
1571         dev->phys_port_cnt = 1;
1572         dev->num_comp_vectors = 1;
1573         dev->dma_device = &dd->pcidev->dev;
1574         dev->query_device = ipath_query_device;
1575         dev->modify_device = ipath_modify_device;
1576         dev->query_port = ipath_query_port;
1577         dev->modify_port = ipath_modify_port;
1578         dev->query_pkey = ipath_query_pkey;
1579         dev->query_gid = ipath_query_gid;
1580         dev->alloc_ucontext = ipath_alloc_ucontext;
1581         dev->dealloc_ucontext = ipath_dealloc_ucontext;
1582         dev->alloc_pd = ipath_alloc_pd;
1583         dev->dealloc_pd = ipath_dealloc_pd;
1584         dev->create_ah = ipath_create_ah;
1585         dev->destroy_ah = ipath_destroy_ah;
1586         dev->query_ah = ipath_query_ah;
1587         dev->create_srq = ipath_create_srq;
1588         dev->modify_srq = ipath_modify_srq;
1589         dev->query_srq = ipath_query_srq;
1590         dev->destroy_srq = ipath_destroy_srq;
1591         dev->create_qp = ipath_create_qp;
1592         dev->modify_qp = ipath_modify_qp;
1593         dev->query_qp = ipath_query_qp;
1594         dev->destroy_qp = ipath_destroy_qp;
1595         dev->post_send = ipath_post_send;
1596         dev->post_recv = ipath_post_receive;
1597         dev->post_srq_recv = ipath_post_srq_receive;
1598         dev->create_cq = ipath_create_cq;
1599         dev->destroy_cq = ipath_destroy_cq;
1600         dev->resize_cq = ipath_resize_cq;
1601         dev->poll_cq = ipath_poll_cq;
1602         dev->req_notify_cq = ipath_req_notify_cq;
1603         dev->get_dma_mr = ipath_get_dma_mr;
1604         dev->reg_phys_mr = ipath_reg_phys_mr;
1605         dev->reg_user_mr = ipath_reg_user_mr;
1606         dev->dereg_mr = ipath_dereg_mr;
1607         dev->alloc_fmr = ipath_alloc_fmr;
1608         dev->map_phys_fmr = ipath_map_phys_fmr;
1609         dev->unmap_fmr = ipath_unmap_fmr;
1610         dev->dealloc_fmr = ipath_dealloc_fmr;
1611         dev->attach_mcast = ipath_multicast_attach;
1612         dev->detach_mcast = ipath_multicast_detach;
1613         dev->process_mad = ipath_process_mad;
1614         dev->mmap = ipath_mmap;
1615         dev->dma_ops = &ipath_dma_mapping_ops;
1616
1617         snprintf(dev->node_desc, sizeof(dev->node_desc),
1618                  IPATH_IDSTR " %s", init_utsname()->nodename);
1619
1620         ret = ib_register_device(dev);
1621         if (ret)
1622                 goto err_reg;
1623
1624         if (ipath_verbs_register_sysfs(dev))
1625                 goto err_class;
1626
1627         enable_timer(dd);
1628
1629         goto bail;
1630
1631 err_class:
1632         ib_unregister_device(dev);
1633 err_reg:
1634         kfree(idev->lk_table.table);
1635 err_lk:
1636         kfree(idev->qp_table.table);
1637 err_qp:
1638         ib_dealloc_device(dev);
1639         ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1640         idev = NULL;
1641
1642 bail:
1643         dd->verbs_dev = idev;
1644         return ret;
1645 }
1646
1647 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1648 {
1649         struct ib_device *ibdev = &dev->ibdev;
1650
1651         disable_timer(dev->dd);
1652
1653         ib_unregister_device(ibdev);
1654
1655         if (!list_empty(&dev->pending[0]) ||
1656             !list_empty(&dev->pending[1]) ||
1657             !list_empty(&dev->pending[2]))
1658                 ipath_dev_err(dev->dd, "pending list not empty!\n");
1659         if (!list_empty(&dev->piowait))
1660                 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1661         if (!list_empty(&dev->rnrwait))
1662                 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1663         if (!ipath_mcast_tree_empty())
1664                 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1665         /*
1666          * Note that ipath_unregister_ib_device() can be called before all
1667          * the QPs are destroyed!
1668          */
1669         ipath_free_all_qps(&dev->qp_table);
1670         kfree(dev->qp_table.table);
1671         kfree(dev->lk_table.table);
1672         ib_dealloc_device(ibdev);
1673 }
1674
1675 static ssize_t show_rev(struct class_device *cdev, char *buf)
1676 {
1677         struct ipath_ibdev *dev =
1678                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1679
1680         return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1681 }
1682
1683 static ssize_t show_hca(struct class_device *cdev, char *buf)
1684 {
1685         struct ipath_ibdev *dev =
1686                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1687         int ret;
1688
1689         ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1690         if (ret < 0)
1691                 goto bail;
1692         strcat(buf, "\n");
1693         ret = strlen(buf);
1694
1695 bail:
1696         return ret;
1697 }
1698
1699 static ssize_t show_stats(struct class_device *cdev, char *buf)
1700 {
1701         struct ipath_ibdev *dev =
1702                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1703         int i;
1704         int len;
1705
1706         len = sprintf(buf,
1707                       "RC resends  %d\n"
1708                       "RC no QACK  %d\n"
1709                       "RC ACKs     %d\n"
1710                       "RC SEQ NAKs %d\n"
1711                       "RC RDMA seq %d\n"
1712                       "RC RNR NAKs %d\n"
1713                       "RC OTH NAKs %d\n"
1714                       "RC timeouts %d\n"
1715                       "RC RDMA dup %d\n"
1716                       "RC stalls   %d\n"
1717                       "piobuf wait %d\n"
1718                       "no piobuf   %d\n"
1719                       "PKT drops   %d\n"
1720                       "WQE errs    %d\n",
1721                       dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1722                       dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1723                       dev->n_other_naks, dev->n_timeouts,
1724                       dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1725                       dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1726         for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1727                 const struct ipath_opcode_stats *si = &dev->opstats[i];
1728
1729                 if (!si->n_packets && !si->n_bytes)
1730                         continue;
1731                 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1732                                (unsigned long long) si->n_packets,
1733                                (unsigned long long) si->n_bytes);
1734         }
1735         return len;
1736 }
1737
1738 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1739 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1740 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1741 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1742
1743 static struct class_device_attribute *ipath_class_attributes[] = {
1744         &class_device_attr_hw_rev,
1745         &class_device_attr_hca_type,
1746         &class_device_attr_board_id,
1747         &class_device_attr_stats
1748 };
1749
1750 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1751 {
1752         int i;
1753         int ret;
1754
1755         for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1756                 if (class_device_create_file(&dev->class_dev,
1757                                              ipath_class_attributes[i])) {
1758                         ret = 1;
1759                         goto bail;
1760                 }
1761
1762         ret = 0;
1763
1764 bail:
1765         return ret;
1766 }