drivers/infiniband/hw/hns/hns_roce_main.c

   1 /*
   2  * Copyright (c) 2016 Hisilicon Limited.
   3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33 #include <linux/acpi.h>
  34 #include <linux/of_platform.h>
  35 #include <linux/module.h>
  36 #include <rdma/ib_addr.h>
  37 #include <rdma/ib_smi.h>
  38 #include <rdma/ib_user_verbs.h>
  39 #include <rdma/ib_cache.h>
  40 #include "hns_roce_common.h"
  41 #include "hns_roce_device.h"
  42 #include <rdma/hns-abi.h>
  43 #include "hns_roce_hem.h"
  44
  45 /**
  46  * hns_get_gid_index - Get gid index.
  47  * @hr_dev: pointer to structure hns_roce_dev.
  48  * @port:  port, value range: 0 ~ MAX
  49  * @gid_index:  gid_index, value range: 0 ~ MAX
  50  * Description:
  51  *    N ports shared gids, allocation method as follow:
  52  *              GID[0][0], GID[1][0],.....GID[N - 1][0],
  53  *              GID[0][0], GID[1][0],.....GID[N - 1][0],
  54  *              And so on
  55  */
  56 int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
  57 {
  58         return gid_index * hr_dev->caps.num_ports + port;
  59 }
  60 EXPORT_SYMBOL_GPL(hns_get_gid_index);
  61
  62 static int hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
  63 {
  64         u8 phy_port;
  65         u32 i = 0;
  66
  67         if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
  68                 return 0;
  69
  70         for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
  71                 hr_dev->dev_addr[port][i] = addr[i];
  72
  73         phy_port = hr_dev->iboe.phy_port[port];
  74         return hr_dev->hw->set_mac(hr_dev, phy_port, addr);
  75 }
  76
  77 static int hns_roce_add_gid(const struct ib_gid_attr *attr, void **context)
  78 {
  79         struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);
  80         u8 port = attr->port_num - 1;
  81         unsigned long flags;
  82         int ret;
  83
  84         if (port >= hr_dev->caps.num_ports)
  85                 return -EINVAL;
  86
  87         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
  88
  89         ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, &attr->gid, attr);
  90
  91         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
  92
  93         return ret;
  94 }
  95
  96 static int hns_roce_del_gid(const struct ib_gid_attr *attr, void **context)
  97 {
  98         struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);
  99         struct ib_gid_attr zattr = { };
 100         u8 port = attr->port_num - 1;
 101         unsigned long flags;
 102         int ret;
 103
 104         if (port >= hr_dev->caps.num_ports)
 105                 return -EINVAL;
 106
 107         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
 108
 109         ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, &zgid, &zattr);
 110
 111         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 112
 113         return ret;
 114 }
 115
 116 static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
 117                            unsigned long event)
 118 {
 119         struct device *dev = hr_dev->dev;
 120         struct net_device *netdev;
 121         int ret = 0;
 122
 123         netdev = hr_dev->iboe.netdevs[port];
 124         if (!netdev) {
 125                 dev_err(dev, "port(%d) can't find netdev\n", port);
 126                 return -ENODEV;
 127         }
 128
 129         switch (event) {
 130         case NETDEV_UP:
 131         case NETDEV_CHANGE:
 132         case NETDEV_REGISTER:
 133         case NETDEV_CHANGEADDR:
 134                 ret = hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
 135                 break;
 136         case NETDEV_DOWN:
 137                 /*
 138                  * In v1 engine, only support all ports closed together.
 139                  */
 140                 break;
 141         default:
 142                 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
 143                 break;
 144         }
 145
 146         return ret;
 147 }
 148
 149 static int hns_roce_netdev_event(struct notifier_block *self,
 150                                  unsigned long event, void *ptr)
 151 {
 152         struct net_device *dev = netdev_notifier_info_to_dev(ptr);
 153         struct hns_roce_ib_iboe *iboe = NULL;
 154         struct hns_roce_dev *hr_dev = NULL;
 155         u8 port = 0;
 156         int ret = 0;
 157
 158         hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
 159         iboe = &hr_dev->iboe;
 160
 161         for (port = 0; port < hr_dev->caps.num_ports; port++) {
 162                 if (dev == iboe->netdevs[port]) {
 163                         ret = handle_en_event(hr_dev, port, event);
 164                         if (ret)
 165                                 return NOTIFY_DONE;
 166                         break;
 167                 }
 168         }
 169
 170         return NOTIFY_DONE;
 171 }
 172
 173 static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
 174 {
 175         int ret;
 176         u8 i;
 177
 178         for (i = 0; i < hr_dev->caps.num_ports; i++) {
 179                 if (hr_dev->hw->set_mtu)
 180                         hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
 181                                             hr_dev->caps.max_mtu);
 182                 ret = hns_roce_set_mac(hr_dev, i,
 183                                        hr_dev->iboe.netdevs[i]->dev_addr);
 184                 if (ret)
 185                         return ret;
 186         }
 187
 188         return 0;
 189 }
 190
 191 static int hns_roce_query_device(struct ib_device *ib_dev,
 192                                  struct ib_device_attr *props,
 193                                  struct ib_udata *uhw)
 194 {
 195         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 196
 197         memset(props, 0, sizeof(*props));
 198
 199         props->sys_image_guid = cpu_to_be64(hr_dev->sys_image_guid);
 200         props->max_mr_size = (u64)(~(0ULL));
 201         props->page_size_cap = hr_dev->caps.page_size_cap;
 202         props->vendor_id = hr_dev->vendor_id;
 203         props->vendor_part_id = hr_dev->vendor_part_id;
 204         props->hw_ver = hr_dev->hw_rev;
 205         props->max_qp = hr_dev->caps.num_qps;
 206         props->max_qp_wr = hr_dev->caps.max_wqes;
 207         props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
 208                                   IB_DEVICE_RC_RNR_NAK_GEN;
 209         props->max_send_sge = hr_dev->caps.max_sq_sg;
 210         props->max_recv_sge = hr_dev->caps.max_rq_sg;
 211         props->max_sge_rd = 1;
 212         props->max_cq = hr_dev->caps.num_cqs;
 213         props->max_cqe = hr_dev->caps.max_cqes;
 214         props->max_mr = hr_dev->caps.num_mtpts;
 215         props->max_pd = hr_dev->caps.num_pds;
 216         props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
 217         props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
 218         props->atomic_cap = IB_ATOMIC_NONE;
 219         props->max_pkeys = 1;
 220         props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
 221
 222         return 0;
 223 }
 224
 225 static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
 226                                               u8 port_num)
 227 {
 228         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 229         struct net_device *ndev;
 230
 231         if (port_num < 1 || port_num > hr_dev->caps.num_ports)
 232                 return NULL;
 233
 234         rcu_read_lock();
 235
 236         ndev = hr_dev->iboe.netdevs[port_num - 1];
 237         if (ndev)
 238                 dev_hold(ndev);
 239
 240         rcu_read_unlock();
 241         return ndev;
 242 }
 243
 244 static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
 245                                struct ib_port_attr *props)
 246 {
 247         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 248         struct device *dev = hr_dev->dev;
 249         struct net_device *net_dev;
 250         unsigned long flags;
 251         enum ib_mtu mtu;
 252         u8 port;
 253
 254         assert(port_num > 0);
 255         port = port_num - 1;
 256
 257         /* props being zeroed by the caller, avoid zeroing it here */
 258
 259         props->max_mtu = hr_dev->caps.max_mtu;
 260         props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
 261         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 262                                 IB_PORT_VENDOR_CLASS_SUP |
 263                                 IB_PORT_BOOT_MGMT_SUP;
 264         props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
 265         props->pkey_tbl_len = 1;
 266         props->active_width = IB_WIDTH_4X;
 267         props->active_speed = 1;
 268
 269         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
 270
 271         net_dev = hr_dev->iboe.netdevs[port];
 272         if (!net_dev) {
 273                 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 274                 dev_err(dev, "find netdev %d failed!\r\n", port);
 275                 return -EINVAL;
 276         }
 277
 278         mtu = iboe_get_mtu(net_dev->mtu);
 279         props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
 280         props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
 281                         IB_PORT_ACTIVE : IB_PORT_DOWN;
 282         props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
 283
 284         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 285
 286         return 0;
 287 }
 288
 289 static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
 290                                                     u8 port_num)
 291 {
 292         return IB_LINK_LAYER_ETHERNET;
 293 }
 294
 295 static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
 296                                u16 *pkey)
 297 {
 298         *pkey = PKEY_ID;
 299
 300         return 0;
 301 }
 302
 303 static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
 304                                   struct ib_device_modify *props)
 305 {
 306         unsigned long flags;
 307
 308         if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
 309                 return -EOPNOTSUPP;
 310
 311         if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
 312                 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
 313                 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
 314                 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
 315         }
 316
 317         return 0;
 318 }
 319
 320 static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
 321                                 struct ib_port_modify *props)
 322 {
 323         return 0;
 324 }
 325
 326 static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
 327                                                    struct ib_udata *udata)
 328 {
 329         int ret = 0;
 330         struct hns_roce_ucontext *context;
 331         struct hns_roce_ib_alloc_ucontext_resp resp = {};
 332         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 333
 334         if (!hr_dev->active)
 335                 return ERR_PTR(-EAGAIN);
 336
 337         resp.qp_tab_size = hr_dev->caps.num_qps;
 338
 339         context = kmalloc(sizeof(*context), GFP_KERNEL);
 340         if (!context)
 341                 return ERR_PTR(-ENOMEM);
 342
 343         ret = hns_roce_uar_alloc(hr_dev, &context->uar);
 344         if (ret)
 345                 goto error_fail_uar_alloc;
 346
 347         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) {
 348                 INIT_LIST_HEAD(&context->page_list);
 349                 mutex_init(&context->page_mutex);
 350         }
 351
 352         ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
 353         if (ret)
 354                 goto error_fail_copy_to_udata;
 355
 356         return &context->ibucontext;
 357
 358 error_fail_copy_to_udata:
 359         hns_roce_uar_free(hr_dev, &context->uar);
 360
 361 error_fail_uar_alloc:
 362         kfree(context);
 363
 364         return ERR_PTR(ret);
 365 }
 366
 367 static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
 368 {
 369         struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
 370
 371         hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
 372         kfree(context);
 373
 374         return 0;
 375 }
 376
 377 static int hns_roce_mmap(struct ib_ucontext *context,
 378                          struct vm_area_struct *vma)
 379 {
 380         struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
 381
 382         switch (vma->vm_pgoff) {
 383         case 0:
 384                 return rdma_user_mmap_io(context, vma,
 385                                          to_hr_ucontext(context)->uar.pfn,
 386                                          PAGE_SIZE,
 387                                          pgprot_noncached(vma->vm_page_prot));
 388
 389         /* vm_pgoff: 1 -- TPTR */
 390         case 1:
 391                 if (!hr_dev->tptr_dma_addr || !hr_dev->tptr_size)
 392                         return -EINVAL;
 393                 /*
 394                  * FIXME: using io_remap_pfn_range on the dma address returned
 395                  * by dma_alloc_coherent is totally wrong.
 396                  */
 397                 return rdma_user_mmap_io(context, vma,
 398                                          hr_dev->tptr_dma_addr >> PAGE_SHIFT,
 399                                          hr_dev->tptr_size,
 400                                          vma->vm_page_prot);
 401
 402         default:
 403                 return -EINVAL;
 404         }
 405 }
 406
 407 static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
 408                                    struct ib_port_immutable *immutable)
 409 {
 410         struct ib_port_attr attr;
 411         int ret;
 412
 413         ret = ib_query_port(ib_dev, port_num, &attr);
 414         if (ret)
 415                 return ret;
 416
 417         immutable->pkey_tbl_len = attr.pkey_tbl_len;
 418         immutable->gid_tbl_len = attr.gid_tbl_len;
 419
 420         immutable->max_mad_size = IB_MGMT_MAD_SIZE;
 421         immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
 422         if (to_hr_dev(ib_dev)->caps.flags & HNS_ROCE_CAP_FLAG_ROCE_V1_V2)
 423                 immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
 424
 425         return 0;
 426 }
 427
 428 static void hns_roce_disassociate_ucontext(struct ib_ucontext *ibcontext)
 429 {
 430 }
 431
 432 static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
 433 {
 434         struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
 435
 436         hr_dev->active = false;
 437         unregister_netdevice_notifier(&iboe->nb);
 438         ib_unregister_device(&hr_dev->ib_dev);
 439 }
 440
 441 static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
 442 {
 443         int ret;
 444         struct hns_roce_ib_iboe *iboe = NULL;
 445         struct ib_device *ib_dev = NULL;
 446         struct device *dev = hr_dev->dev;
 447
 448         iboe = &hr_dev->iboe;
 449         spin_lock_init(&iboe->lock);
 450
 451         ib_dev = &hr_dev->ib_dev;
 452         strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
 453
 454         ib_dev->owner                   = THIS_MODULE;
 455         ib_dev->node_type               = RDMA_NODE_IB_CA;
 456         ib_dev->dev.parent              = dev;
 457
 458         ib_dev->phys_port_cnt           = hr_dev->caps.num_ports;
 459         ib_dev->local_dma_lkey          = hr_dev->caps.reserved_lkey;
 460         ib_dev->num_comp_vectors        = hr_dev->caps.num_comp_vectors;
 461         ib_dev->uverbs_abi_ver          = 1;
 462         ib_dev->uverbs_cmd_mask         =
 463                 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
 464                 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
 465                 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
 466                 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
 467                 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
 468                 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
 469                 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
 470                 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
 471                 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
 472                 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
 473                 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
 474                 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
 475                 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
 476                 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
 477
 478         ib_dev->uverbs_ex_cmd_mask |=
 479                 (1ULL << IB_USER_VERBS_EX_CMD_MODIFY_CQ);
 480
 481         /* HCA||device||port */
 482         ib_dev->modify_device           = hns_roce_modify_device;
 483         ib_dev->query_device            = hns_roce_query_device;
 484         ib_dev->query_port              = hns_roce_query_port;
 485         ib_dev->modify_port             = hns_roce_modify_port;
 486         ib_dev->get_link_layer          = hns_roce_get_link_layer;
 487         ib_dev->get_netdev              = hns_roce_get_netdev;
 488         ib_dev->add_gid                 = hns_roce_add_gid;
 489         ib_dev->del_gid                 = hns_roce_del_gid;
 490         ib_dev->query_pkey              = hns_roce_query_pkey;
 491         ib_dev->alloc_ucontext          = hns_roce_alloc_ucontext;
 492         ib_dev->dealloc_ucontext        = hns_roce_dealloc_ucontext;
 493         ib_dev->mmap                    = hns_roce_mmap;
 494
 495         /* PD */
 496         ib_dev->alloc_pd                = hns_roce_alloc_pd;
 497         ib_dev->dealloc_pd              = hns_roce_dealloc_pd;
 498
 499         /* AH */
 500         ib_dev->create_ah               = hns_roce_create_ah;
 501         ib_dev->query_ah                = hns_roce_query_ah;
 502         ib_dev->destroy_ah              = hns_roce_destroy_ah;
 503
 504         /* QP */
 505         ib_dev->create_qp               = hns_roce_create_qp;
 506         ib_dev->modify_qp               = hns_roce_modify_qp;
 507         ib_dev->query_qp                = hr_dev->hw->query_qp;
 508         ib_dev->destroy_qp              = hr_dev->hw->destroy_qp;
 509         ib_dev->post_send               = hr_dev->hw->post_send;
 510         ib_dev->post_recv               = hr_dev->hw->post_recv;
 511
 512         /* CQ */
 513         ib_dev->create_cq               = hns_roce_ib_create_cq;
 514         ib_dev->modify_cq               = hr_dev->hw->modify_cq;
 515         ib_dev->destroy_cq              = hns_roce_ib_destroy_cq;
 516         ib_dev->req_notify_cq           = hr_dev->hw->req_notify_cq;
 517         ib_dev->poll_cq                 = hr_dev->hw->poll_cq;
 518
 519         /* MR */
 520         ib_dev->get_dma_mr              = hns_roce_get_dma_mr;
 521         ib_dev->reg_user_mr             = hns_roce_reg_user_mr;
 522         ib_dev->dereg_mr                = hns_roce_dereg_mr;
 523         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR) {
 524                 ib_dev->rereg_user_mr   = hns_roce_rereg_user_mr;
 525                 ib_dev->uverbs_cmd_mask |= (1ULL << IB_USER_VERBS_CMD_REREG_MR);
 526         }
 527
 528         /* OTHERS */
 529         ib_dev->get_port_immutable      = hns_roce_port_immutable;
 530         ib_dev->disassociate_ucontext   = hns_roce_disassociate_ucontext;
 531
 532         ib_dev->driver_id = RDMA_DRIVER_HNS;
 533         ret = ib_register_device(ib_dev, NULL);
 534         if (ret) {
 535                 dev_err(dev, "ib_register_device failed!\n");
 536                 return ret;
 537         }
 538
 539         ret = hns_roce_setup_mtu_mac(hr_dev);
 540         if (ret) {
 541                 dev_err(dev, "setup_mtu_mac failed!\n");
 542                 goto error_failed_setup_mtu_mac;
 543         }
 544
 545         iboe->nb.notifier_call = hns_roce_netdev_event;
 546         ret = register_netdevice_notifier(&iboe->nb);
 547         if (ret) {
 548                 dev_err(dev, "register_netdevice_notifier failed!\n");
 549                 goto error_failed_setup_mtu_mac;
 550         }
 551
 552         hr_dev->active = true;
 553         return 0;
 554
 555 error_failed_setup_mtu_mac:
 556         ib_unregister_device(ib_dev);
 557
 558         return ret;
 559 }
 560
 561 static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
 562 {
 563         int ret;
 564         struct device *dev = hr_dev->dev;
 565
 566         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
 567                                       HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
 568                                       hr_dev->caps.num_mtt_segs, 1);
 569         if (ret) {
 570                 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
 571                 return ret;
 572         }
 573
 574         if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) {
 575                 ret = hns_roce_init_hem_table(hr_dev,
 576                                       &hr_dev->mr_table.mtt_cqe_table,
 577                                       HEM_TYPE_CQE, hr_dev->caps.mtt_entry_sz,
 578                                       hr_dev->caps.num_cqe_segs, 1);
 579                 if (ret) {
 580                         dev_err(dev, "Failed to init MTT CQE context memory, aborting.\n");
 581                         goto err_unmap_cqe;
 582                 }
 583         }
 584
 585         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
 586                                       HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
 587                                       hr_dev->caps.num_mtpts, 1);
 588         if (ret) {
 589                 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
 590                 goto err_unmap_mtt;
 591         }
 592
 593         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
 594                                       HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
 595                                       hr_dev->caps.num_qps, 1);
 596         if (ret) {
 597                 dev_err(dev, "Failed to init QP context memory, aborting.\n");
 598                 goto err_unmap_dmpt;
 599         }
 600
 601         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
 602                                       HEM_TYPE_IRRL,
 603                                       hr_dev->caps.irrl_entry_sz *
 604                                       hr_dev->caps.max_qp_init_rdma,
 605                                       hr_dev->caps.num_qps, 1);
 606         if (ret) {
 607                 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
 608                 goto err_unmap_qp;
 609         }
 610
 611         if (hr_dev->caps.trrl_entry_sz) {
 612                 ret = hns_roce_init_hem_table(hr_dev,
 613                                               &hr_dev->qp_table.trrl_table,
 614                                               HEM_TYPE_TRRL,
 615                                               hr_dev->caps.trrl_entry_sz *
 616                                               hr_dev->caps.max_qp_dest_rdma,
 617                                               hr_dev->caps.num_qps, 1);
 618                 if (ret) {
 619                         dev_err(dev,
 620                                "Failed to init trrl_table memory, aborting.\n");
 621                         goto err_unmap_irrl;
 622                 }
 623         }
 624
 625         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
 626                                       HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
 627                                       hr_dev->caps.num_cqs, 1);
 628         if (ret) {
 629                 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
 630                 goto err_unmap_trrl;
 631         }
 632
 633         return 0;
 634
 635 err_unmap_trrl:
 636         if (hr_dev->caps.trrl_entry_sz)
 637                 hns_roce_cleanup_hem_table(hr_dev,
 638                                            &hr_dev->qp_table.trrl_table);
 639
 640 err_unmap_irrl:
 641         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
 642
 643 err_unmap_qp:
 644         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
 645
 646 err_unmap_dmpt:
 647         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
 648
 649 err_unmap_mtt:
 650         if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE))
 651                 hns_roce_cleanup_hem_table(hr_dev,
 652                                            &hr_dev->mr_table.mtt_cqe_table);
 653
 654 err_unmap_cqe:
 655         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
 656
 657         return ret;
 658 }
 659
 660 /**
 661  * hns_roce_setup_hca - setup host channel adapter
 662  * @hr_dev: pointer to hns roce device
 663  * Return : int
 664  */
 665 static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
 666 {
 667         int ret;
 668         struct device *dev = hr_dev->dev;
 669
 670         spin_lock_init(&hr_dev->sm_lock);
 671         spin_lock_init(&hr_dev->bt_cmd_lock);
 672
 673         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) {
 674                 INIT_LIST_HEAD(&hr_dev->pgdir_list);
 675                 mutex_init(&hr_dev->pgdir_mutex);
 676         }
 677
 678         ret = hns_roce_init_uar_table(hr_dev);
 679         if (ret) {
 680                 dev_err(dev, "Failed to initialize uar table. aborting\n");
 681                 return ret;
 682         }
 683
 684         ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
 685         if (ret) {
 686                 dev_err(dev, "Failed to allocate priv_uar.\n");
 687                 goto err_uar_table_free;
 688         }
 689
 690         ret = hns_roce_init_pd_table(hr_dev);
 691         if (ret) {
 692                 dev_err(dev, "Failed to init protected domain table.\n");
 693                 goto err_uar_alloc_free;
 694         }
 695
 696         ret = hns_roce_init_mr_table(hr_dev);
 697         if (ret) {
 698                 dev_err(dev, "Failed to init memory region table.\n");
 699                 goto err_pd_table_free;
 700         }
 701
 702         ret = hns_roce_init_cq_table(hr_dev);
 703         if (ret) {
 704                 dev_err(dev, "Failed to init completion queue table.\n");
 705                 goto err_mr_table_free;
 706         }
 707
 708         ret = hns_roce_init_qp_table(hr_dev);
 709         if (ret) {
 710                 dev_err(dev, "Failed to init queue pair table.\n");
 711                 goto err_cq_table_free;
 712         }
 713
 714         return 0;
 715
 716 err_cq_table_free:
 717         hns_roce_cleanup_cq_table(hr_dev);
 718
 719 err_mr_table_free:
 720         hns_roce_cleanup_mr_table(hr_dev);
 721
 722 err_pd_table_free:
 723         hns_roce_cleanup_pd_table(hr_dev);
 724
 725 err_uar_alloc_free:
 726         hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
 727
 728 err_uar_table_free:
 729         hns_roce_cleanup_uar_table(hr_dev);
 730         return ret;
 731 }
 732
 733 int hns_roce_init(struct hns_roce_dev *hr_dev)
 734 {
 735         int ret;
 736         struct device *dev = hr_dev->dev;
 737
 738         if (hr_dev->hw->reset) {
 739                 ret = hr_dev->hw->reset(hr_dev, true);
 740                 if (ret) {
 741                         dev_err(dev, "Reset RoCE engine failed!\n");
 742                         return ret;
 743                 }
 744         }
 745         hr_dev->is_reset = false;
 746
 747         if (hr_dev->hw->cmq_init) {
 748                 ret = hr_dev->hw->cmq_init(hr_dev);
 749                 if (ret) {
 750                         dev_err(dev, "Init RoCE Command Queue failed!\n");
 751                         goto error_failed_cmq_init;
 752                 }
 753         }
 754
 755         ret = hr_dev->hw->hw_profile(hr_dev);
 756         if (ret) {
 757                 dev_err(dev, "Get RoCE engine profile failed!\n");
 758                 goto error_failed_cmd_init;
 759         }
 760
 761         ret = hns_roce_cmd_init(hr_dev);
 762         if (ret) {
 763                 dev_err(dev, "cmd init failed!\n");
 764                 goto error_failed_cmd_init;
 765         }
 766
 767         ret = hr_dev->hw->init_eq(hr_dev);
 768         if (ret) {
 769                 dev_err(dev, "eq init failed!\n");
 770                 goto error_failed_eq_table;
 771         }
 772
 773         if (hr_dev->cmd_mod) {
 774                 ret = hns_roce_cmd_use_events(hr_dev);
 775                 if (ret) {
 776                         dev_err(dev, "Switch to event-driven cmd failed!\n");
 777                         goto error_failed_use_event;
 778                 }
 779         }
 780
 781         ret = hns_roce_init_hem(hr_dev);
 782         if (ret) {
 783                 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
 784                 goto error_failed_init_hem;
 785         }
 786
 787         ret = hns_roce_setup_hca(hr_dev);
 788         if (ret) {
 789                 dev_err(dev, "setup hca failed!\n");
 790                 goto error_failed_setup_hca;
 791         }
 792
 793         if (hr_dev->hw->hw_init) {
 794                 ret = hr_dev->hw->hw_init(hr_dev);
 795                 if (ret) {
 796                         dev_err(dev, "hw_init failed!\n");
 797                         goto error_failed_engine_init;
 798                 }
 799         }
 800
 801         ret = hns_roce_register_device(hr_dev);
 802         if (ret)
 803                 goto error_failed_register_device;
 804
 805         return 0;
 806
 807 error_failed_register_device:
 808         if (hr_dev->hw->hw_exit)
 809                 hr_dev->hw->hw_exit(hr_dev);
 810
 811 error_failed_engine_init:
 812         hns_roce_cleanup_bitmap(hr_dev);
 813
 814 error_failed_setup_hca:
 815         hns_roce_cleanup_hem(hr_dev);
 816
 817 error_failed_init_hem:
 818         if (hr_dev->cmd_mod)
 819                 hns_roce_cmd_use_polling(hr_dev);
 820
 821 error_failed_use_event:
 822         hr_dev->hw->cleanup_eq(hr_dev);
 823
 824 error_failed_eq_table:
 825         hns_roce_cmd_cleanup(hr_dev);
 826
 827 error_failed_cmd_init:
 828         if (hr_dev->hw->cmq_exit)
 829                 hr_dev->hw->cmq_exit(hr_dev);
 830
 831 error_failed_cmq_init:
 832         if (hr_dev->hw->reset) {
 833                 if (hr_dev->hw->reset(hr_dev, false))
 834                         dev_err(dev, "Dereset RoCE engine failed!\n");
 835         }
 836
 837         return ret;
 838 }
 839 EXPORT_SYMBOL_GPL(hns_roce_init);
 840
 841 void hns_roce_exit(struct hns_roce_dev *hr_dev)
 842 {
 843         hns_roce_unregister_device(hr_dev);
 844
 845         if (hr_dev->hw->hw_exit)
 846                 hr_dev->hw->hw_exit(hr_dev);
 847         hns_roce_cleanup_bitmap(hr_dev);
 848         hns_roce_cleanup_hem(hr_dev);
 849
 850         if (hr_dev->cmd_mod)
 851                 hns_roce_cmd_use_polling(hr_dev);
 852
 853         hr_dev->hw->cleanup_eq(hr_dev);
 854         hns_roce_cmd_cleanup(hr_dev);
 855         if (hr_dev->hw->cmq_exit)
 856                 hr_dev->hw->cmq_exit(hr_dev);
 857         if (hr_dev->hw->reset)
 858                 hr_dev->hw->reset(hr_dev, false);
 859 }
 860 EXPORT_SYMBOL_GPL(hns_roce_exit);
 861
 862 MODULE_LICENSE("Dual BSD/GPL");
 863 MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
 864 MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
 865 MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
 866 MODULE_DESCRIPTION("HNS RoCE Driver");