2 * Copyright (c) 2016 Hisilicon Limited.
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6 * General Public License (GPL) Version 2, available from the file
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11 * without modification, are permitted provided that the following
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15 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_umem.h>
34 #include <rdma/uverbs_ioctl.h>
35 #include "hns_roce_device.h"
36 #include "hns_roce_cmd.h"
37 #include "hns_roce_hem.h"
38 #include "hns_roce_common.h"
40 static u8 get_least_load_bankid_for_cq(struct hns_roce_bank *bank)
42 u32 least_load = bank[0].inuse;
47 for (i = 1; i < HNS_ROCE_CQ_BANK_NUM; i++) {
48 bankcnt = bank[i].inuse;
49 if (bankcnt < least_load) {
58 static int alloc_cqn(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
60 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
61 struct hns_roce_bank *bank;
65 mutex_lock(&cq_table->bank_mutex);
66 bankid = get_least_load_bankid_for_cq(cq_table->bank);
67 bank = &cq_table->bank[bankid];
69 id = ida_alloc_range(&bank->ida, bank->min, bank->max, GFP_KERNEL);
71 mutex_unlock(&cq_table->bank_mutex);
75 /* the lower 2 bits is bankid */
76 hr_cq->cqn = (id << CQ_BANKID_SHIFT) | bankid;
78 mutex_unlock(&cq_table->bank_mutex);
83 static inline u8 get_cq_bankid(unsigned long cqn)
85 /* The lower 2 bits of CQN are used to hash to different banks */
86 return (u8)(cqn & GENMASK(1, 0));
89 static void free_cqn(struct hns_roce_dev *hr_dev, unsigned long cqn)
91 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
92 struct hns_roce_bank *bank;
94 bank = &cq_table->bank[get_cq_bankid(cqn)];
96 ida_free(&bank->ida, cqn >> CQ_BANKID_SHIFT);
98 mutex_lock(&cq_table->bank_mutex);
100 mutex_unlock(&cq_table->bank_mutex);
103 static int hns_roce_create_cqc(struct hns_roce_dev *hr_dev,
104 struct hns_roce_cq *hr_cq,
105 u64 *mtts, dma_addr_t dma_handle)
107 struct ib_device *ibdev = &hr_dev->ib_dev;
108 struct hns_roce_cmd_mailbox *mailbox;
111 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
112 if (IS_ERR(mailbox)) {
113 ibdev_err(ibdev, "failed to alloc mailbox for CQC.\n");
114 return PTR_ERR(mailbox);
117 hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle);
119 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_CQC,
123 "failed to send create cmd for CQ(0x%lx), ret = %d.\n",
126 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
131 static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
133 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
134 struct ib_device *ibdev = &hr_dev->ib_dev;
135 u64 mtts[MTT_MIN_COUNT] = {};
136 dma_addr_t dma_handle;
139 ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts),
142 ibdev_err(ibdev, "failed to find CQ mtr, ret = %d.\n", ret);
146 /* Get CQC memory HEM(Hardware Entry Memory) table */
147 ret = hns_roce_table_get(hr_dev, &cq_table->table, hr_cq->cqn);
149 ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n",
154 ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL));
156 ibdev_err(ibdev, "failed to xa_store CQ, ret = %d.\n", ret);
160 ret = hns_roce_create_cqc(hr_dev, hr_cq, mtts, dma_handle);
167 xa_erase(&cq_table->array, hr_cq->cqn);
169 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
174 static void free_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
176 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
177 struct device *dev = hr_dev->dev;
180 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_CQC,
183 dev_err(dev, "DESTROY_CQ failed (%d) for CQN %06lx\n", ret,
186 xa_erase(&cq_table->array, hr_cq->cqn);
188 /* Waiting interrupt process procedure carried out */
189 synchronize_irq(hr_dev->eq_table.eq[hr_cq->vector].irq);
191 /* wait for all interrupt processed */
192 if (refcount_dec_and_test(&hr_cq->refcount))
193 complete(&hr_cq->free);
194 wait_for_completion(&hr_cq->free);
196 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
199 static int alloc_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
200 struct ib_udata *udata, unsigned long addr)
202 struct ib_device *ibdev = &hr_dev->ib_dev;
203 struct hns_roce_buf_attr buf_attr = {};
206 buf_attr.page_shift = hr_dev->caps.cqe_buf_pg_sz + PAGE_SHIFT;
207 buf_attr.region[0].size = hr_cq->cq_depth * hr_cq->cqe_size;
208 buf_attr.region[0].hopnum = hr_dev->caps.cqe_hop_num;
209 buf_attr.region_count = 1;
211 ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr,
212 hr_dev->caps.cqe_ba_pg_sz + PAGE_SHIFT,
215 ibdev_err(ibdev, "failed to alloc CQ mtr, ret = %d.\n", ret);
220 static void free_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
222 hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr);
225 static int alloc_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
226 struct ib_udata *udata, unsigned long addr,
227 struct hns_roce_ib_create_cq_resp *resp)
229 bool has_db = hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB;
230 struct hns_roce_ucontext *uctx;
235 udata->outlen >= offsetofend(typeof(*resp), cap_flags)) {
236 uctx = rdma_udata_to_drv_context(udata,
237 struct hns_roce_ucontext, ibucontext);
238 err = hns_roce_db_map_user(uctx, addr, &hr_cq->db);
241 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
242 resp->cap_flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
246 err = hns_roce_alloc_db(hr_dev, &hr_cq->db, 1);
249 hr_cq->set_ci_db = hr_cq->db.db_record;
250 *hr_cq->set_ci_db = 0;
251 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
253 hr_cq->db_reg = hr_dev->reg_base + hr_dev->odb_offset +
254 DB_REG_OFFSET * hr_dev->priv_uar.index;
260 static void free_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
261 struct ib_udata *udata)
263 struct hns_roce_ucontext *uctx;
265 if (!(hr_cq->flags & HNS_ROCE_CQ_FLAG_RECORD_DB))
268 hr_cq->flags &= ~HNS_ROCE_CQ_FLAG_RECORD_DB;
270 uctx = rdma_udata_to_drv_context(udata,
271 struct hns_roce_ucontext,
273 hns_roce_db_unmap_user(uctx, &hr_cq->db);
275 hns_roce_free_db(hr_dev, &hr_cq->db);
279 static int verify_cq_create_attr(struct hns_roce_dev *hr_dev,
280 const struct ib_cq_init_attr *attr)
282 struct ib_device *ibdev = &hr_dev->ib_dev;
284 if (!attr->cqe || attr->cqe > hr_dev->caps.max_cqes) {
285 ibdev_err(ibdev, "failed to check CQ count %u, max = %u.\n",
286 attr->cqe, hr_dev->caps.max_cqes);
290 if (attr->comp_vector >= hr_dev->caps.num_comp_vectors) {
291 ibdev_err(ibdev, "failed to check CQ vector = %u, max = %d.\n",
292 attr->comp_vector, hr_dev->caps.num_comp_vectors);
299 static int get_cq_ucmd(struct hns_roce_cq *hr_cq, struct ib_udata *udata,
300 struct hns_roce_ib_create_cq *ucmd)
302 struct ib_device *ibdev = hr_cq->ib_cq.device;
305 ret = ib_copy_from_udata(ucmd, udata, min(udata->inlen, sizeof(*ucmd)));
307 ibdev_err(ibdev, "failed to copy CQ udata, ret = %d.\n", ret);
314 static void set_cq_param(struct hns_roce_cq *hr_cq, u32 cq_entries, int vector,
315 struct hns_roce_ib_create_cq *ucmd)
317 struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device);
319 cq_entries = max(cq_entries, hr_dev->caps.min_cqes);
320 cq_entries = roundup_pow_of_two(cq_entries);
321 hr_cq->ib_cq.cqe = cq_entries - 1; /* used as cqe index */
322 hr_cq->cq_depth = cq_entries;
323 hr_cq->vector = vector;
325 spin_lock_init(&hr_cq->lock);
326 INIT_LIST_HEAD(&hr_cq->sq_list);
327 INIT_LIST_HEAD(&hr_cq->rq_list);
330 static int set_cqe_size(struct hns_roce_cq *hr_cq, struct ib_udata *udata,
331 struct hns_roce_ib_create_cq *ucmd)
333 struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device);
336 hr_cq->cqe_size = hr_dev->caps.cqe_sz;
340 if (udata->inlen >= offsetofend(typeof(*ucmd), cqe_size)) {
341 if (ucmd->cqe_size != HNS_ROCE_V2_CQE_SIZE &&
342 ucmd->cqe_size != HNS_ROCE_V3_CQE_SIZE) {
343 ibdev_err(&hr_dev->ib_dev,
344 "invalid cqe size %u.\n", ucmd->cqe_size);
348 hr_cq->cqe_size = ucmd->cqe_size;
350 hr_cq->cqe_size = HNS_ROCE_V2_CQE_SIZE;
356 int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr,
357 struct ib_udata *udata)
359 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device);
360 struct hns_roce_ib_create_cq_resp resp = {};
361 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq);
362 struct ib_device *ibdev = &hr_dev->ib_dev;
363 struct hns_roce_ib_create_cq ucmd = {};
369 ret = verify_cq_create_attr(hr_dev, attr);
374 ret = get_cq_ucmd(hr_cq, udata, &ucmd);
379 set_cq_param(hr_cq, attr->cqe, attr->comp_vector, &ucmd);
381 ret = set_cqe_size(hr_cq, udata, &ucmd);
385 ret = alloc_cq_buf(hr_dev, hr_cq, udata, ucmd.buf_addr);
387 ibdev_err(ibdev, "failed to alloc CQ buf, ret = %d.\n", ret);
391 ret = alloc_cq_db(hr_dev, hr_cq, udata, ucmd.db_addr, &resp);
393 ibdev_err(ibdev, "failed to alloc CQ db, ret = %d.\n", ret);
397 ret = alloc_cqn(hr_dev, hr_cq);
399 ibdev_err(ibdev, "failed to alloc CQN, ret = %d.\n", ret);
403 ret = alloc_cqc(hr_dev, hr_cq);
406 "failed to alloc CQ context, ret = %d.\n", ret);
411 resp.cqn = hr_cq->cqn;
412 ret = ib_copy_to_udata(udata, &resp,
413 min(udata->outlen, sizeof(resp)));
418 hr_cq->cons_index = 0;
420 refcount_set(&hr_cq->refcount, 1);
421 init_completion(&hr_cq->free);
426 free_cqc(hr_dev, hr_cq);
428 free_cqn(hr_dev, hr_cq->cqn);
430 free_cq_db(hr_dev, hr_cq, udata);
432 free_cq_buf(hr_dev, hr_cq);
436 int hns_roce_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
438 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device);
439 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq);
441 free_cqc(hr_dev, hr_cq);
442 free_cqn(hr_dev, hr_cq->cqn);
443 free_cq_db(hr_dev, hr_cq, udata);
444 free_cq_buf(hr_dev, hr_cq);
449 void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn)
451 struct hns_roce_cq *hr_cq;
454 hr_cq = xa_load(&hr_dev->cq_table.array,
455 cqn & (hr_dev->caps.num_cqs - 1));
457 dev_warn(hr_dev->dev, "completion event for bogus CQ 0x%06x\n",
463 ibcq = &hr_cq->ib_cq;
464 if (ibcq->comp_handler)
465 ibcq->comp_handler(ibcq, ibcq->cq_context);
468 void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type)
470 struct device *dev = hr_dev->dev;
471 struct hns_roce_cq *hr_cq;
472 struct ib_event event;
475 hr_cq = xa_load(&hr_dev->cq_table.array,
476 cqn & (hr_dev->caps.num_cqs - 1));
478 dev_warn(dev, "async event for bogus CQ 0x%06x\n", cqn);
482 if (event_type != HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID &&
483 event_type != HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR &&
484 event_type != HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW) {
485 dev_err(dev, "unexpected event type 0x%x on CQ 0x%06x\n",
490 refcount_inc(&hr_cq->refcount);
492 ibcq = &hr_cq->ib_cq;
493 if (ibcq->event_handler) {
494 event.device = ibcq->device;
495 event.element.cq = ibcq;
496 event.event = IB_EVENT_CQ_ERR;
497 ibcq->event_handler(&event, ibcq->cq_context);
500 if (refcount_dec_and_test(&hr_cq->refcount))
501 complete(&hr_cq->free);
504 void hns_roce_init_cq_table(struct hns_roce_dev *hr_dev)
506 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
507 unsigned int reserved_from_bot;
510 mutex_init(&cq_table->bank_mutex);
511 xa_init(&cq_table->array);
513 reserved_from_bot = hr_dev->caps.reserved_cqs;
515 for (i = 0; i < reserved_from_bot; i++) {
516 cq_table->bank[get_cq_bankid(i)].inuse++;
517 cq_table->bank[get_cq_bankid(i)].min++;
520 for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++) {
521 ida_init(&cq_table->bank[i].ida);
522 cq_table->bank[i].max = hr_dev->caps.num_cqs /
523 HNS_ROCE_CQ_BANK_NUM - 1;
527 void hns_roce_cleanup_cq_table(struct hns_roce_dev *hr_dev)
531 for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++)
532 ida_destroy(&hr_dev->cq_table.bank[i].ida);