drivers/iio/dac/ad5064.c

   1 /*
   2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648,
   3  * AD5666, AD5668 Digital to analog converters driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  *
   7  * Licensed under the GPL-2.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21
  22 #define AD5064_MAX_DAC_CHANNELS                 8
  23 #define AD5064_MAX_VREFS                        4
  24
  25 #define AD5064_ADDR(x)                          ((x) << 20)
  26 #define AD5064_CMD(x)                           ((x) << 24)
  27
  28 #define AD5064_ADDR_DAC(chan)                   (chan)
  29 #define AD5064_ADDR_ALL_DAC                     0xF
  30
  31 #define AD5064_CMD_WRITE_INPUT_N                0x0
  32 #define AD5064_CMD_UPDATE_DAC_N                 0x1
  33 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL     0x2
  34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  35 #define AD5064_CMD_POWERDOWN_DAC                0x4
  36 #define AD5064_CMD_CLEAR                        0x5
  37 #define AD5064_CMD_LDAC_MASK                    0x6
  38 #define AD5064_CMD_RESET                        0x7
  39 #define AD5064_CMD_CONFIG                       0x8
  40
  41 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE        BIT(1)
  42 #define AD5064_CONFIG_INT_VREF_ENABLE           BIT(0)
  43
  44 #define AD5064_LDAC_PWRDN_NONE                  0x0
  45 #define AD5064_LDAC_PWRDN_1K                    0x1
  46 #define AD5064_LDAC_PWRDN_100K                  0x2
  47 #define AD5064_LDAC_PWRDN_3STATE                0x3
  48
  49 /**
  50  * struct ad5064_chip_info - chip specific information
  51  * @shared_vref:        whether the vref supply is shared between channels
  52  * @internal_vref:      internal reference voltage. 0 if the chip has no internal
  53  *                      vref.
  54  * @channel:            channel specification
  55  * @num_channels:       number of channels
  56  */
  57
  58 struct ad5064_chip_info {
  59         bool shared_vref;
  60         unsigned long internal_vref;
  61         const struct iio_chan_spec *channels;
  62         unsigned int num_channels;
  63 };
  64
  65 /**
  66  * struct ad5064_state - driver instance specific data
  67  * @spi:                spi_device
  68  * @chip_info:          chip model specific constants, available modes etc
  69  * @vref_reg:           vref supply regulators
  70  * @pwr_down:           whether channel is powered down
  71  * @pwr_down_mode:      channel's current power down mode
  72  * @dac_cache:          current DAC raw value (chip does not support readback)
  73  * @use_internal_vref:  set to true if the internal reference voltage should be
  74  *                      used.
  75  * @data:               spi transfer buffers
  76  */
  77
  78 struct ad5064_state {
  79         struct spi_device               *spi;
  80         const struct ad5064_chip_info   *chip_info;
  81         struct regulator_bulk_data      vref_reg[AD5064_MAX_VREFS];
  82         bool                            pwr_down[AD5064_MAX_DAC_CHANNELS];
  83         u8                              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
  84         unsigned int                    dac_cache[AD5064_MAX_DAC_CHANNELS];
  85         bool                            use_internal_vref;
  86
  87         /*
  88          * DMA (thus cache coherency maintenance) requires the
  89          * transfer buffers to live in their own cache lines.
  90          */
  91         __be32 data ____cacheline_aligned;
  92 };
  93
  94 enum ad5064_type {
  95         ID_AD5024,
  96         ID_AD5025,
  97         ID_AD5044,
  98         ID_AD5045,
  99         ID_AD5064,
 100         ID_AD5064_1,
 101         ID_AD5065,
 102         ID_AD5628_1,
 103         ID_AD5628_2,
 104         ID_AD5648_1,
 105         ID_AD5648_2,
 106         ID_AD5666_1,
 107         ID_AD5666_2,
 108         ID_AD5668_1,
 109         ID_AD5668_2,
 110 };
 111
 112 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
 113         unsigned int addr, unsigned int val, unsigned int shift)
 114 {
 115         val <<= shift;
 116
 117         st->data = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
 118
 119         return spi_write(st->spi, &st->data, sizeof(st->data));
 120 }
 121
 122 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
 123         unsigned int channel)
 124 {
 125         unsigned int val;
 126         int ret;
 127
 128         val = (0x1 << channel);
 129
 130         if (st->pwr_down[channel])
 131                 val |= st->pwr_down_mode[channel] << 8;
 132
 133         ret = ad5064_spi_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
 134
 135         return ret;
 136 }
 137
 138 static const char * const ad5064_powerdown_modes[] = {
 139         "1kohm_to_gnd",
 140         "100kohm_to_gnd",
 141         "three_state",
 142 };
 143
 144 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
 145         const struct iio_chan_spec *chan)
 146 {
 147         struct ad5064_state *st = iio_priv(indio_dev);
 148
 149         return st->pwr_down_mode[chan->channel] - 1;
 150 }
 151
 152 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
 153         const struct iio_chan_spec *chan, unsigned int mode)
 154 {
 155         struct ad5064_state *st = iio_priv(indio_dev);
 156         int ret;
 157
 158         mutex_lock(&indio_dev->mlock);
 159         st->pwr_down_mode[chan->channel] = mode + 1;
 160
 161         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 162         mutex_unlock(&indio_dev->mlock);
 163
 164         return ret;
 165 }
 166
 167 static const struct iio_enum ad5064_powerdown_mode_enum = {
 168         .items = ad5064_powerdown_modes,
 169         .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
 170         .get = ad5064_get_powerdown_mode,
 171         .set = ad5064_set_powerdown_mode,
 172 };
 173
 174 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
 175         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
 176 {
 177         struct ad5064_state *st = iio_priv(indio_dev);
 178
 179         return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
 180 }
 181
 182 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
 183          uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
 184          size_t len)
 185 {
 186         struct ad5064_state *st = iio_priv(indio_dev);
 187         bool pwr_down;
 188         int ret;
 189
 190         ret = strtobool(buf, &pwr_down);
 191         if (ret)
 192                 return ret;
 193
 194         mutex_lock(&indio_dev->mlock);
 195         st->pwr_down[chan->channel] = pwr_down;
 196
 197         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 198         mutex_unlock(&indio_dev->mlock);
 199         return ret ? ret : len;
 200 }
 201
 202 static int ad5064_get_vref(struct ad5064_state *st,
 203         struct iio_chan_spec const *chan)
 204 {
 205         unsigned int i;
 206
 207         if (st->use_internal_vref)
 208                 return st->chip_info->internal_vref;
 209
 210         i = st->chip_info->shared_vref ? 0 : chan->channel;
 211         return regulator_get_voltage(st->vref_reg[i].consumer);
 212 }
 213
 214 static int ad5064_read_raw(struct iio_dev *indio_dev,
 215                            struct iio_chan_spec const *chan,
 216                            int *val,
 217                            int *val2,
 218                            long m)
 219 {
 220         struct ad5064_state *st = iio_priv(indio_dev);
 221         int scale_uv;
 222
 223         switch (m) {
 224         case IIO_CHAN_INFO_RAW:
 225                 *val = st->dac_cache[chan->channel];
 226                 return IIO_VAL_INT;
 227         case IIO_CHAN_INFO_SCALE:
 228                 scale_uv = ad5064_get_vref(st, chan);
 229                 if (scale_uv < 0)
 230                         return scale_uv;
 231
 232                 scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
 233                 *val =  scale_uv / 100000;
 234                 *val2 = (scale_uv % 100000) * 10;
 235                 return IIO_VAL_INT_PLUS_MICRO;
 236         default:
 237                 break;
 238         }
 239         return -EINVAL;
 240 }
 241
 242 static int ad5064_write_raw(struct iio_dev *indio_dev,
 243         struct iio_chan_spec const *chan, int val, int val2, long mask)
 244 {
 245         struct ad5064_state *st = iio_priv(indio_dev);
 246         int ret;
 247
 248         switch (mask) {
 249         case IIO_CHAN_INFO_RAW:
 250                 if (val > (1 << chan->scan_type.realbits) || val < 0)
 251                         return -EINVAL;
 252
 253                 mutex_lock(&indio_dev->mlock);
 254                 ret = ad5064_spi_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
 255                                 chan->address, val, chan->scan_type.shift);
 256                 if (ret == 0)
 257                         st->dac_cache[chan->channel] = val;
 258                 mutex_unlock(&indio_dev->mlock);
 259                 break;
 260         default:
 261                 ret = -EINVAL;
 262         }
 263
 264         return ret;
 265 }
 266
 267 static const struct iio_info ad5064_info = {
 268         .read_raw = ad5064_read_raw,
 269         .write_raw = ad5064_write_raw,
 270         .driver_module = THIS_MODULE,
 271 };
 272
 273 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
 274         {
 275                 .name = "powerdown",
 276                 .read = ad5064_read_dac_powerdown,
 277                 .write = ad5064_write_dac_powerdown,
 278         },
 279         IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
 280         IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
 281         { },
 282 };
 283
 284 #define AD5064_CHANNEL(chan, bits) {                            \
 285         .type = IIO_VOLTAGE,                                    \
 286         .indexed = 1,                                           \
 287         .output = 1,                                            \
 288         .channel = (chan),                                      \
 289         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |           \
 290         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,                       \
 291         .address = AD5064_ADDR_DAC(chan),                       \
 292         .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)),      \
 293         .ext_info = ad5064_ext_info,                            \
 294 }
 295
 296 #define DECLARE_AD5064_CHANNELS(name, bits) \
 297 const struct iio_chan_spec name[] = { \
 298         AD5064_CHANNEL(0, bits), \
 299         AD5064_CHANNEL(1, bits), \
 300         AD5064_CHANNEL(2, bits), \
 301         AD5064_CHANNEL(3, bits), \
 302         AD5064_CHANNEL(4, bits), \
 303         AD5064_CHANNEL(5, bits), \
 304         AD5064_CHANNEL(6, bits), \
 305         AD5064_CHANNEL(7, bits), \
 306 }
 307
 308 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
 309 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
 310 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
 311
 312 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
 313         [ID_AD5024] = {
 314                 .shared_vref = false,
 315                 .channels = ad5024_channels,
 316                 .num_channels = 4,
 317         },
 318         [ID_AD5025] = {
 319                 .shared_vref = false,
 320                 .channels = ad5024_channels,
 321                 .num_channels = 2,
 322         },
 323         [ID_AD5044] = {
 324                 .shared_vref = false,
 325                 .channels = ad5044_channels,
 326                 .num_channels = 4,
 327         },
 328         [ID_AD5045] = {
 329                 .shared_vref = false,
 330                 .channels = ad5044_channels,
 331                 .num_channels = 2,
 332         },
 333         [ID_AD5064] = {
 334                 .shared_vref = false,
 335                 .channels = ad5064_channels,
 336                 .num_channels = 4,
 337         },
 338         [ID_AD5064_1] = {
 339                 .shared_vref = true,
 340                 .channels = ad5064_channels,
 341                 .num_channels = 4,
 342         },
 343         [ID_AD5065] = {
 344                 .shared_vref = false,
 345                 .channels = ad5064_channels,
 346                 .num_channels = 2,
 347         },
 348         [ID_AD5628_1] = {
 349                 .shared_vref = true,
 350                 .internal_vref = 2500000,
 351                 .channels = ad5024_channels,
 352                 .num_channels = 8,
 353         },
 354         [ID_AD5628_2] = {
 355                 .shared_vref = true,
 356                 .internal_vref = 5000000,
 357                 .channels = ad5024_channels,
 358                 .num_channels = 8,
 359         },
 360         [ID_AD5648_1] = {
 361                 .shared_vref = true,
 362                 .internal_vref = 2500000,
 363                 .channels = ad5044_channels,
 364                 .num_channels = 8,
 365         },
 366         [ID_AD5648_2] = {
 367                 .shared_vref = true,
 368                 .internal_vref = 5000000,
 369                 .channels = ad5044_channels,
 370                 .num_channels = 8,
 371         },
 372         [ID_AD5666_1] = {
 373                 .shared_vref = true,
 374                 .internal_vref = 2500000,
 375                 .channels = ad5064_channels,
 376                 .num_channels = 4,
 377         },
 378         [ID_AD5666_2] = {
 379                 .shared_vref = true,
 380                 .internal_vref = 5000000,
 381                 .channels = ad5064_channels,
 382                 .num_channels = 4,
 383         },
 384         [ID_AD5668_1] = {
 385                 .shared_vref = true,
 386                 .internal_vref = 2500000,
 387                 .channels = ad5064_channels,
 388                 .num_channels = 8,
 389         },
 390         [ID_AD5668_2] = {
 391                 .shared_vref = true,
 392                 .internal_vref = 5000000,
 393                 .channels = ad5064_channels,
 394                 .num_channels = 8,
 395         },
 396 };
 397
 398 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
 399 {
 400         return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
 401 }
 402
 403 static const char * const ad5064_vref_names[] = {
 404         "vrefA",
 405         "vrefB",
 406         "vrefC",
 407         "vrefD",
 408 };
 409
 410 static const char * const ad5064_vref_name(struct ad5064_state *st,
 411         unsigned int vref)
 412 {
 413         return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
 414 }
 415
 416 static int __devinit ad5064_probe(struct spi_device *spi)
 417 {
 418         enum ad5064_type type = spi_get_device_id(spi)->driver_data;
 419         struct iio_dev *indio_dev;
 420         struct ad5064_state *st;
 421         unsigned int i;
 422         int ret;
 423
 424         indio_dev = iio_device_alloc(sizeof(*st));
 425         if (indio_dev == NULL)
 426                 return  -ENOMEM;
 427
 428         st = iio_priv(indio_dev);
 429         spi_set_drvdata(spi, indio_dev);
 430
 431         st->chip_info = &ad5064_chip_info_tbl[type];
 432         st->spi = spi;
 433
 434         for (i = 0; i < ad5064_num_vref(st); ++i)
 435                 st->vref_reg[i].supply = ad5064_vref_name(st, i);
 436
 437         ret = regulator_bulk_get(&st->spi->dev, ad5064_num_vref(st),
 438                 st->vref_reg);
 439         if (ret) {
 440                 if (!st->chip_info->internal_vref)
 441                         goto error_free;
 442                 st->use_internal_vref = true;
 443                 ret = ad5064_spi_write(st, AD5064_CMD_CONFIG, 0,
 444                         AD5064_CONFIG_INT_VREF_ENABLE, 0);
 445                 if (ret) {
 446                         dev_err(&spi->dev, "Failed to enable internal vref: %d\n",
 447                                 ret);
 448                         goto error_free;
 449                 }
 450         } else {
 451                 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
 452                 if (ret)
 453                         goto error_free_reg;
 454         }
 455
 456         for (i = 0; i < st->chip_info->num_channels; ++i) {
 457                 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
 458                 st->dac_cache[i] = 0x8000;
 459         }
 460
 461         indio_dev->dev.parent = &spi->dev;
 462         indio_dev->name = spi_get_device_id(spi)->name;
 463         indio_dev->info = &ad5064_info;
 464         indio_dev->modes = INDIO_DIRECT_MODE;
 465         indio_dev->channels = st->chip_info->channels;
 466         indio_dev->num_channels = st->chip_info->num_channels;
 467
 468         ret = iio_device_register(indio_dev);
 469         if (ret)
 470                 goto error_disable_reg;
 471
 472         return 0;
 473
 474 error_disable_reg:
 475         if (!st->use_internal_vref)
 476                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 477 error_free_reg:
 478         if (!st->use_internal_vref)
 479                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 480 error_free:
 481         iio_device_free(indio_dev);
 482
 483         return ret;
 484 }
 485
 486
 487 static int __devexit ad5064_remove(struct spi_device *spi)
 488 {
 489         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 490         struct ad5064_state *st = iio_priv(indio_dev);
 491
 492         iio_device_unregister(indio_dev);
 493
 494         if (!st->use_internal_vref) {
 495                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 496                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 497         }
 498
 499         iio_device_free(indio_dev);
 500
 501         return 0;
 502 }
 503
 504 static const struct spi_device_id ad5064_id[] = {
 505         {"ad5024", ID_AD5024},
 506         {"ad5025", ID_AD5025},
 507         {"ad5044", ID_AD5044},
 508         {"ad5045", ID_AD5045},
 509         {"ad5064", ID_AD5064},
 510         {"ad5064-1", ID_AD5064_1},
 511         {"ad5065", ID_AD5065},
 512         {"ad5628-1", ID_AD5628_1},
 513         {"ad5628-2", ID_AD5628_2},
 514         {"ad5648-1", ID_AD5648_1},
 515         {"ad5648-2", ID_AD5648_2},
 516         {"ad5666-1", ID_AD5666_1},
 517         {"ad5666-2", ID_AD5666_2},
 518         {"ad5668-1", ID_AD5668_1},
 519         {"ad5668-2", ID_AD5668_2},
 520         {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
 521         {}
 522 };
 523 MODULE_DEVICE_TABLE(spi, ad5064_id);
 524
 525 static struct spi_driver ad5064_driver = {
 526         .driver = {
 527                    .name = "ad5064",
 528                    .owner = THIS_MODULE,
 529         },
 530         .probe = ad5064_probe,
 531         .remove = __devexit_p(ad5064_remove),
 532         .id_table = ad5064_id,
 533 };
 534 module_spi_driver(ad5064_driver);
 535
 536 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 537 MODULE_DESCRIPTION("Analog Devices AD5024/25/44/45/64/64-1/65, AD5628/48/66/68 DAC");
 538 MODULE_LICENSE("GPL v2");