1 // SPDX-License-Identifier: GPL-2.0-only
2 /* ADC driver for AXP20X and AXP22X PMICs
4 * Copyright (c) 2016 Free Electrons NextThing Co.
5 * Quentin Schulz <quentin.schulz@free-electrons.com>
8 #include <linux/completion.h>
9 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/property.h>
16 #include <linux/regmap.h>
17 #include <linux/thermal.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/driver.h>
21 #include <linux/iio/machine.h>
22 #include <linux/mfd/axp20x.h>
24 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
26 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
27 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
29 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
30 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
31 #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0))
32 #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1)
34 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6)
35 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4)
36 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
37 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
38 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
39 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
40 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
41 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
43 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
47 .channel = _channel, \
49 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
50 BIT(IIO_CHAN_INFO_SCALE), \
51 .datasheet_name = _name, \
54 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
58 .channel = _channel, \
60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
61 BIT(IIO_CHAN_INFO_SCALE) |\
62 BIT(IIO_CHAN_INFO_OFFSET),\
63 .datasheet_name = _name, \
68 struct axp20x_adc_iio {
69 struct regmap *regmap;
70 const struct axp_data *data;
73 enum axp20x_adc_channel_v {
83 enum axp20x_adc_channel_i {
87 AXP20X_BATT_DISCHRG_I,
90 enum axp22x_adc_channel_v {
95 enum axp22x_adc_channel_i {
96 AXP22X_BATT_CHRG_I = 1,
97 AXP22X_BATT_DISCHRG_I,
100 enum axp813_adc_channel_v {
106 static struct iio_map axp20x_maps[] = {
108 .consumer_dev_name = "axp20x-usb-power-supply",
109 .consumer_channel = "vbus_v",
110 .adc_channel_label = "vbus_v",
112 .consumer_dev_name = "axp20x-usb-power-supply",
113 .consumer_channel = "vbus_i",
114 .adc_channel_label = "vbus_i",
116 .consumer_dev_name = "axp20x-ac-power-supply",
117 .consumer_channel = "acin_v",
118 .adc_channel_label = "acin_v",
120 .consumer_dev_name = "axp20x-ac-power-supply",
121 .consumer_channel = "acin_i",
122 .adc_channel_label = "acin_i",
124 .consumer_dev_name = "axp20x-battery-power-supply",
125 .consumer_channel = "batt_v",
126 .adc_channel_label = "batt_v",
128 .consumer_dev_name = "axp20x-battery-power-supply",
129 .consumer_channel = "batt_chrg_i",
130 .adc_channel_label = "batt_chrg_i",
132 .consumer_dev_name = "axp20x-battery-power-supply",
133 .consumer_channel = "batt_dischrg_i",
134 .adc_channel_label = "batt_dischrg_i",
135 }, { /* sentinel */ }
138 static struct iio_map axp22x_maps[] = {
140 .consumer_dev_name = "axp20x-battery-power-supply",
141 .consumer_channel = "batt_v",
142 .adc_channel_label = "batt_v",
144 .consumer_dev_name = "axp20x-battery-power-supply",
145 .consumer_channel = "batt_chrg_i",
146 .adc_channel_label = "batt_chrg_i",
148 .consumer_dev_name = "axp20x-battery-power-supply",
149 .consumer_channel = "batt_dischrg_i",
150 .adc_channel_label = "batt_dischrg_i",
151 }, { /* sentinel */ }
155 * Channels are mapped by physical system. Their channels share the same index.
156 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
157 * The only exception is for the battery. batt_v will be in_voltage6_raw and
158 * charge current in_current6_raw and discharge current will be in_current7_raw.
160 static const struct iio_chan_spec axp20x_adc_channels[] = {
161 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
162 AXP20X_ACIN_V_ADC_H),
163 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
164 AXP20X_ACIN_I_ADC_H),
165 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
166 AXP20X_VBUS_V_ADC_H),
167 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
168 AXP20X_VBUS_I_ADC_H),
171 .address = AXP20X_TEMP_ADC_H,
172 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
173 BIT(IIO_CHAN_INFO_SCALE) |
174 BIT(IIO_CHAN_INFO_OFFSET),
175 .datasheet_name = "pmic_temp",
177 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
178 AXP20X_GPIO0_V_ADC_H),
179 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
180 AXP20X_GPIO1_V_ADC_H),
181 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
182 AXP20X_IPSOUT_V_HIGH_H),
183 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
185 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
186 AXP20X_BATT_CHRG_I_H),
187 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
188 AXP20X_BATT_DISCHRG_I_H),
189 AXP20X_ADC_CHANNEL(AXP20X_TS_IN, "ts_v", IIO_VOLTAGE,
193 static const struct iio_chan_spec axp22x_adc_channels[] = {
196 .address = AXP22X_PMIC_TEMP_H,
197 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
198 BIT(IIO_CHAN_INFO_SCALE) |
199 BIT(IIO_CHAN_INFO_OFFSET),
200 .datasheet_name = "pmic_temp",
202 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
204 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
205 AXP20X_BATT_CHRG_I_H),
206 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
207 AXP20X_BATT_DISCHRG_I_H),
208 AXP20X_ADC_CHANNEL(AXP22X_TS_IN, "ts_v", IIO_VOLTAGE,
212 static const struct iio_chan_spec axp813_adc_channels[] = {
215 .address = AXP22X_PMIC_TEMP_H,
216 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
217 BIT(IIO_CHAN_INFO_SCALE) |
218 BIT(IIO_CHAN_INFO_OFFSET),
219 .datasheet_name = "pmic_temp",
221 AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
223 AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
225 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
226 AXP20X_BATT_CHRG_I_H),
227 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
228 AXP20X_BATT_DISCHRG_I_H),
229 AXP20X_ADC_CHANNEL(AXP813_TS_IN, "ts_v", IIO_VOLTAGE,
233 static int axp20x_adc_raw(struct iio_dev *indio_dev,
234 struct iio_chan_spec const *chan, int *val)
236 struct axp20x_adc_iio *info = iio_priv(indio_dev);
240 * N.B.: Unlike the Chinese datasheets tell, the charging current is
241 * stored on 12 bits, not 13 bits. Only discharging current is on 13
244 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
249 *val = axp20x_read_variable_width(info->regmap, chan->address, size);
256 static int axp22x_adc_raw(struct iio_dev *indio_dev,
257 struct iio_chan_spec const *chan, int *val)
259 struct axp20x_adc_iio *info = iio_priv(indio_dev);
261 *val = axp20x_read_variable_width(info->regmap, chan->address, 12);
268 static int axp813_adc_raw(struct iio_dev *indio_dev,
269 struct iio_chan_spec const *chan, int *val)
271 struct axp20x_adc_iio *info = iio_priv(indio_dev);
273 *val = axp20x_read_variable_width(info->regmap, chan->address, 12);
280 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
287 return IIO_VAL_INT_PLUS_MICRO;
293 return IIO_VAL_INT_PLUS_MICRO;
298 return IIO_VAL_INT_PLUS_MICRO;
300 case AXP20X_IPSOUT_V:
303 return IIO_VAL_INT_PLUS_MICRO;
309 return IIO_VAL_INT_PLUS_MICRO;
316 static int axp22x_adc_scale_voltage(int channel, int *val, int *val2)
323 return IIO_VAL_INT_PLUS_MICRO;
329 return IIO_VAL_INT_PLUS_MICRO;
335 static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
341 return IIO_VAL_INT_PLUS_MICRO;
346 return IIO_VAL_INT_PLUS_MICRO;
352 return IIO_VAL_INT_PLUS_MICRO;
359 static int axp20x_adc_scale_current(int channel, int *val, int *val2)
365 return IIO_VAL_INT_PLUS_MICRO;
370 return IIO_VAL_INT_PLUS_MICRO;
372 case AXP20X_BATT_DISCHRG_I:
373 case AXP20X_BATT_CHRG_I:
376 return IIO_VAL_INT_PLUS_MICRO;
383 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
386 switch (chan->type) {
388 return axp20x_adc_scale_voltage(chan->channel, val, val2);
391 return axp20x_adc_scale_current(chan->channel, val, val2);
402 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
405 switch (chan->type) {
407 return axp22x_adc_scale_voltage(chan->channel, val, val2);
422 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
425 switch (chan->type) {
427 return axp813_adc_scale_voltage(chan->channel, val, val2);
442 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
445 struct axp20x_adc_iio *info = iio_priv(indio_dev);
448 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val);
454 *val &= AXP20X_GPIO10_IN_RANGE_GPIO0;
458 *val &= AXP20X_GPIO10_IN_RANGE_GPIO1;
465 *val = *val ? 700000 : 0;
470 static int axp20x_adc_offset(struct iio_dev *indio_dev,
471 struct iio_chan_spec const *chan, int *val)
473 switch (chan->type) {
475 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
486 static int axp20x_read_raw(struct iio_dev *indio_dev,
487 struct iio_chan_spec const *chan, int *val,
488 int *val2, long mask)
491 case IIO_CHAN_INFO_OFFSET:
492 return axp20x_adc_offset(indio_dev, chan, val);
494 case IIO_CHAN_INFO_SCALE:
495 return axp20x_adc_scale(chan, val, val2);
497 case IIO_CHAN_INFO_RAW:
498 return axp20x_adc_raw(indio_dev, chan, val);
505 static int axp22x_read_raw(struct iio_dev *indio_dev,
506 struct iio_chan_spec const *chan, int *val,
507 int *val2, long mask)
510 case IIO_CHAN_INFO_OFFSET:
511 /* For PMIC temp only */
515 case IIO_CHAN_INFO_SCALE:
516 return axp22x_adc_scale(chan, val, val2);
518 case IIO_CHAN_INFO_RAW:
519 return axp22x_adc_raw(indio_dev, chan, val);
526 static int axp813_read_raw(struct iio_dev *indio_dev,
527 struct iio_chan_spec const *chan, int *val,
528 int *val2, long mask)
531 case IIO_CHAN_INFO_OFFSET:
535 case IIO_CHAN_INFO_SCALE:
536 return axp813_adc_scale(chan, val, val2);
538 case IIO_CHAN_INFO_RAW:
539 return axp813_adc_raw(indio_dev, chan, val);
546 static int axp20x_write_raw(struct iio_dev *indio_dev,
547 struct iio_chan_spec const *chan, int val, int val2,
550 struct axp20x_adc_iio *info = iio_priv(indio_dev);
551 unsigned int reg, regval;
554 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
555 * for (independently) GPIO0 and GPIO1 when in ADC mode.
557 if (mask != IIO_CHAN_INFO_OFFSET)
560 if (val != 0 && val != 700000)
565 switch (chan->channel) {
567 reg = AXP20X_GPIO10_IN_RANGE_GPIO0;
568 regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val);
572 reg = AXP20X_GPIO10_IN_RANGE_GPIO1;
573 regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val);
580 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg,
584 static const struct iio_info axp20x_adc_iio_info = {
585 .read_raw = axp20x_read_raw,
586 .write_raw = axp20x_write_raw,
589 static const struct iio_info axp22x_adc_iio_info = {
590 .read_raw = axp22x_read_raw,
593 static const struct iio_info axp813_adc_iio_info = {
594 .read_raw = axp813_read_raw,
597 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
599 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
600 AXP20X_ADC_RATE_MASK,
601 AXP20X_ADC_RATE_HZ(rate));
604 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
606 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
607 AXP20X_ADC_RATE_MASK,
608 AXP22X_ADC_RATE_HZ(rate));
611 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
613 return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
614 AXP813_ADC_RATE_MASK,
615 AXP813_ADC_RATE_HZ(rate));
619 const struct iio_info *iio_info;
621 struct iio_chan_spec const *channels;
622 unsigned long adc_en1_mask;
623 int (*adc_rate)(struct axp20x_adc_iio *info,
626 struct iio_map *maps;
629 static const struct axp_data axp20x_data = {
630 .iio_info = &axp20x_adc_iio_info,
631 .num_channels = ARRAY_SIZE(axp20x_adc_channels),
632 .channels = axp20x_adc_channels,
633 .adc_en1_mask = AXP20X_ADC_EN1_MASK,
634 .adc_rate = axp20x_adc_rate,
639 static const struct axp_data axp22x_data = {
640 .iio_info = &axp22x_adc_iio_info,
641 .num_channels = ARRAY_SIZE(axp22x_adc_channels),
642 .channels = axp22x_adc_channels,
643 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
644 .adc_rate = axp22x_adc_rate,
649 static const struct axp_data axp813_data = {
650 .iio_info = &axp813_adc_iio_info,
651 .num_channels = ARRAY_SIZE(axp813_adc_channels),
652 .channels = axp813_adc_channels,
653 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
654 .adc_rate = axp813_adc_rate,
659 static const struct of_device_id axp20x_adc_of_match[] = {
660 { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
661 { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
662 { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
665 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
667 static const struct platform_device_id axp20x_adc_id_match[] = {
668 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
669 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
670 { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
673 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
675 static int axp20x_probe(struct platform_device *pdev)
677 struct axp20x_adc_iio *info;
678 struct iio_dev *indio_dev;
679 struct axp20x_dev *axp20x_dev;
682 axp20x_dev = dev_get_drvdata(pdev->dev.parent);
684 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
688 info = iio_priv(indio_dev);
689 platform_set_drvdata(pdev, indio_dev);
691 info->regmap = axp20x_dev->regmap;
692 indio_dev->modes = INDIO_DIRECT_MODE;
694 if (!dev_fwnode(&pdev->dev)) {
695 const struct platform_device_id *id;
697 id = platform_get_device_id(pdev);
698 info->data = (const struct axp_data *)id->driver_data;
700 struct device *dev = &pdev->dev;
702 info->data = device_get_match_data(dev);
705 indio_dev->name = platform_get_device_id(pdev)->name;
706 indio_dev->info = info->data->iio_info;
707 indio_dev->num_channels = info->data->num_channels;
708 indio_dev->channels = info->data->channels;
710 /* Enable the ADCs on IP */
711 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask);
713 if (info->data->adc_en2)
714 /* Enable GPIO0/1 and internal temperature ADCs */
715 regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
716 AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK);
718 /* Configure ADCs rate */
719 info->data->adc_rate(info, 100);
721 ret = iio_map_array_register(indio_dev, info->data->maps);
723 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
727 ret = iio_device_register(indio_dev);
729 dev_err(&pdev->dev, "could not register the device\n");
736 iio_map_array_unregister(indio_dev);
739 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
741 if (info->data->adc_en2)
742 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
747 static int axp20x_remove(struct platform_device *pdev)
749 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
750 struct axp20x_adc_iio *info = iio_priv(indio_dev);
752 iio_device_unregister(indio_dev);
753 iio_map_array_unregister(indio_dev);
755 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
757 if (info->data->adc_en2)
758 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
763 static struct platform_driver axp20x_adc_driver = {
765 .name = "axp20x-adc",
766 .of_match_table = axp20x_adc_of_match,
768 .id_table = axp20x_adc_id_match,
769 .probe = axp20x_probe,
770 .remove = axp20x_remove,
773 module_platform_driver(axp20x_adc_driver);
775 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
776 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
777 MODULE_LICENSE("GPL");