drivers/i2c/busses/i2c-imx.c

   1 /*
   2  *      Copyright (C) 2002 Motorola GSG-China
   3  *
   4  *      This program is free software; you can redistribute it and/or
   5  *      modify it under the terms of the GNU General Public License
   6  *      as published by the Free Software Foundation; either version 2
   7  *      of the License, or (at your option) any later version.
   8  *
   9  *      This program is distributed in the hope that it will be useful,
  10  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  *      GNU General Public License for more details.
  13  *
  14  *      You should have received a copy of the GNU General Public License
  15  *      along with this program; if not, write to the Free Software
  16  *      Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307,
  17  *      USA.
  18  *
  19  * Author:
  20  *      Darius Augulis, Teltonika Inc.
  21  *
  22  * Desc.:
  23  *      Implementation of I2C Adapter/Algorithm Driver
  24  *      for I2C Bus integrated in Freescale i.MX/MXC processors
  25  *
  26  *      Derived from Motorola GSG China I2C example driver
  27  *
  28  *      Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
  29  *      Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
  30  *      Copyright (C) 2007 RightHand Technologies, Inc.
  31  *      Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
  32  *
  33  */
  34
  35 /** Includes *******************************************************************
  36 *******************************************************************************/
  37
  38 #include <linux/init.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/errno.h>
  42 #include <linux/err.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/delay.h>
  45 #include <linux/i2c.h>
  46 #include <linux/io.h>
  47 #include <linux/sched.h>
  48 #include <linux/platform_device.h>
  49 #include <linux/clk.h>
  50 #include <linux/slab.h>
  51 #include <linux/of.h>
  52 #include <linux/of_device.h>
  53 #include <linux/of_i2c.h>
  54 #include <linux/pinctrl/consumer.h>
  55 #include <linux/platform_data/i2c-imx.h>
  56
  57 /** Defines ********************************************************************
  58 *******************************************************************************/
  59
  60 /* This will be the driver name the kernel reports */
  61 #define DRIVER_NAME "imx-i2c"
  62
  63 /* Default value */
  64 #define IMX_I2C_BIT_RATE        100000  /* 100kHz */
  65
  66 /* IMX I2C registers */
  67 #define IMX_I2C_IADR    0x00    /* i2c slave address */
  68 #define IMX_I2C_IFDR    0x04    /* i2c frequency divider */
  69 #define IMX_I2C_I2CR    0x08    /* i2c control */
  70 #define IMX_I2C_I2SR    0x0C    /* i2c status */
  71 #define IMX_I2C_I2DR    0x10    /* i2c transfer data */
  72
  73 /* Bits of IMX I2C registers */
  74 #define I2SR_RXAK       0x01
  75 #define I2SR_IIF        0x02
  76 #define I2SR_SRW        0x04
  77 #define I2SR_IAL        0x10
  78 #define I2SR_IBB        0x20
  79 #define I2SR_IAAS       0x40
  80 #define I2SR_ICF        0x80
  81 #define I2CR_RSTA       0x04
  82 #define I2CR_TXAK       0x08
  83 #define I2CR_MTX        0x10
  84 #define I2CR_MSTA       0x20
  85 #define I2CR_IIEN       0x40
  86 #define I2CR_IEN        0x80
  87
  88 /** Variables ******************************************************************
  89 *******************************************************************************/
  90
  91 /*
  92  * sorted list of clock divider, register value pairs
  93  * taken from table 26-5, p.26-9, Freescale i.MX
  94  * Integrated Portable System Processor Reference Manual
  95  * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
  96  *
  97  * Duplicated divider values removed from list
  98  */
  99
 100 static u16 __initdata i2c_clk_div[50][2] = {
 101         { 22,   0x20 }, { 24,   0x21 }, { 26,   0x22 }, { 28,   0x23 },
 102         { 30,   0x00 }, { 32,   0x24 }, { 36,   0x25 }, { 40,   0x26 },
 103         { 42,   0x03 }, { 44,   0x27 }, { 48,   0x28 }, { 52,   0x05 },
 104         { 56,   0x29 }, { 60,   0x06 }, { 64,   0x2A }, { 72,   0x2B },
 105         { 80,   0x2C }, { 88,   0x09 }, { 96,   0x2D }, { 104,  0x0A },
 106         { 112,  0x2E }, { 128,  0x2F }, { 144,  0x0C }, { 160,  0x30 },
 107         { 192,  0x31 }, { 224,  0x32 }, { 240,  0x0F }, { 256,  0x33 },
 108         { 288,  0x10 }, { 320,  0x34 }, { 384,  0x35 }, { 448,  0x36 },
 109         { 480,  0x13 }, { 512,  0x37 }, { 576,  0x14 }, { 640,  0x38 },
 110         { 768,  0x39 }, { 896,  0x3A }, { 960,  0x17 }, { 1024, 0x3B },
 111         { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E },
 112         { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
 113         { 3072, 0x1E }, { 3840, 0x1F }
 114 };
 115
 116 enum imx_i2c_type {
 117         IMX1_I2C,
 118         IMX21_I2C,
 119 };
 120
 121 struct imx_i2c_struct {
 122         struct i2c_adapter      adapter;
 123         struct clk              *clk;
 124         void __iomem            *base;
 125         wait_queue_head_t       queue;
 126         unsigned long           i2csr;
 127         unsigned int            disable_delay;
 128         int                     stopped;
 129         unsigned int            ifdr; /* IMX_I2C_IFDR */
 130         enum imx_i2c_type       devtype;
 131 };
 132
 133 static struct platform_device_id imx_i2c_devtype[] = {
 134         {
 135                 .name = "imx1-i2c",
 136                 .driver_data = IMX1_I2C,
 137         }, {
 138                 .name = "imx21-i2c",
 139                 .driver_data = IMX21_I2C,
 140         }, {
 141                 /* sentinel */
 142         }
 143 };
 144 MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
 145
 146 static const struct of_device_id i2c_imx_dt_ids[] = {
 147         { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], },
 148         { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], },
 149         { /* sentinel */ }
 150 };
 151
 152 static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
 153 {
 154         return i2c_imx->devtype == IMX1_I2C;
 155 }
 156
 157 /** Functions for IMX I2C adapter driver ***************************************
 158 *******************************************************************************/
 159
 160 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
 161 {
 162         unsigned long orig_jiffies = jiffies;
 163         unsigned int temp;
 164
 165         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 166
 167         while (1) {
 168                 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
 169                 if (for_busy && (temp & I2SR_IBB))
 170                         break;
 171                 if (!for_busy && !(temp & I2SR_IBB))
 172                         break;
 173                 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
 174                         dev_dbg(&i2c_imx->adapter.dev,
 175                                 "<%s> I2C bus is busy\n", __func__);
 176                         return -ETIMEDOUT;
 177                 }
 178                 schedule();
 179         }
 180
 181         return 0;
 182 }
 183
 184 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
 185 {
 186         wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
 187
 188         if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
 189                 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
 190                 return -ETIMEDOUT;
 191         }
 192         dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
 193         i2c_imx->i2csr = 0;
 194         return 0;
 195 }
 196
 197 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
 198 {
 199         if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
 200                 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
 201                 return -EIO;  /* No ACK */
 202         }
 203
 204         dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
 205         return 0;
 206 }
 207
 208 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
 209 {
 210         unsigned int temp = 0;
 211         int result;
 212
 213         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 214
 215         clk_prepare_enable(i2c_imx->clk);
 216         writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
 217         /* Enable I2C controller */
 218         writeb(0, i2c_imx->base + IMX_I2C_I2SR);
 219         writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
 220
 221         /* Wait controller to be stable */
 222         udelay(50);
 223
 224         /* Start I2C transaction */
 225         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 226         temp |= I2CR_MSTA;
 227         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 228         result = i2c_imx_bus_busy(i2c_imx, 1);
 229         if (result)
 230                 return result;
 231         i2c_imx->stopped = 0;
 232
 233         temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
 234         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 235         return result;
 236 }
 237
 238 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
 239 {
 240         unsigned int temp = 0;
 241
 242         if (!i2c_imx->stopped) {
 243                 /* Stop I2C transaction */
 244                 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 245                 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 246                 temp &= ~(I2CR_MSTA | I2CR_MTX);
 247                 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 248         }
 249         if (is_imx1_i2c(i2c_imx)) {
 250                 /*
 251                  * This delay caused by an i.MXL hardware bug.
 252                  * If no (or too short) delay, no "STOP" bit will be generated.
 253                  */
 254                 udelay(i2c_imx->disable_delay);
 255         }
 256
 257         if (!i2c_imx->stopped) {
 258                 i2c_imx_bus_busy(i2c_imx, 0);
 259                 i2c_imx->stopped = 1;
 260         }
 261
 262         /* Disable I2C controller */
 263         writeb(0, i2c_imx->base + IMX_I2C_I2CR);
 264         clk_disable_unprepare(i2c_imx->clk);
 265 }
 266
 267 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
 268                                                         unsigned int rate)
 269 {
 270         unsigned int i2c_clk_rate;
 271         unsigned int div;
 272         int i;
 273
 274         /* Divider value calculation */
 275         i2c_clk_rate = clk_get_rate(i2c_imx->clk);
 276         div = (i2c_clk_rate + rate - 1) / rate;
 277         if (div < i2c_clk_div[0][0])
 278                 i = 0;
 279         else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
 280                 i = ARRAY_SIZE(i2c_clk_div) - 1;
 281         else
 282                 for (i = 0; i2c_clk_div[i][0] < div; i++);
 283
 284         /* Store divider value */
 285         i2c_imx->ifdr = i2c_clk_div[i][1];
 286
 287         /*
 288          * There dummy delay is calculated.
 289          * It should be about one I2C clock period long.
 290          * This delay is used in I2C bus disable function
 291          * to fix chip hardware bug.
 292          */
 293         i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0]
 294                 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
 295
 296         /* dev_dbg() can't be used, because adapter is not yet registered */
 297 #ifdef CONFIG_I2C_DEBUG_BUS
 298         dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
 299                 __func__, i2c_clk_rate, div);
 300         dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
 301                 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
 302 #endif
 303 }
 304
 305 static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
 306 {
 307         struct imx_i2c_struct *i2c_imx = dev_id;
 308         unsigned int temp;
 309
 310         temp = readb(i2c_imx->base + IMX_I2C_I2SR);
 311         if (temp & I2SR_IIF) {
 312                 /* save status register */
 313                 i2c_imx->i2csr = temp;
 314                 temp &= ~I2SR_IIF;
 315                 writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
 316                 wake_up(&i2c_imx->queue);
 317                 return IRQ_HANDLED;
 318         }
 319
 320         return IRQ_NONE;
 321 }
 322
 323 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
 324 {
 325         int i, result;
 326
 327         dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
 328                 __func__, msgs->addr << 1);
 329
 330         /* write slave address */
 331         writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
 332         result = i2c_imx_trx_complete(i2c_imx);
 333         if (result)
 334                 return result;
 335         result = i2c_imx_acked(i2c_imx);
 336         if (result)
 337                 return result;
 338         dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);
 339
 340         /* write data */
 341         for (i = 0; i < msgs->len; i++) {
 342                 dev_dbg(&i2c_imx->adapter.dev,
 343                         "<%s> write byte: B%d=0x%X\n",
 344                         __func__, i, msgs->buf[i]);
 345                 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
 346                 result = i2c_imx_trx_complete(i2c_imx);
 347                 if (result)
 348                         return result;
 349                 result = i2c_imx_acked(i2c_imx);
 350                 if (result)
 351                         return result;
 352         }
 353         return 0;
 354 }
 355
 356 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
 357 {
 358         int i, result;
 359         unsigned int temp;
 360
 361         dev_dbg(&i2c_imx->adapter.dev,
 362                 "<%s> write slave address: addr=0x%x\n",
 363                 __func__, (msgs->addr << 1) | 0x01);
 364
 365         /* write slave address */
 366         writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR);
 367         result = i2c_imx_trx_complete(i2c_imx);
 368         if (result)
 369                 return result;
 370         result = i2c_imx_acked(i2c_imx);
 371         if (result)
 372                 return result;
 373
 374         dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
 375
 376         /* setup bus to read data */
 377         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 378         temp &= ~I2CR_MTX;
 379         if (msgs->len - 1)
 380                 temp &= ~I2CR_TXAK;
 381         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 382         readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */
 383
 384         dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
 385
 386         /* read data */
 387         for (i = 0; i < msgs->len; i++) {
 388                 result = i2c_imx_trx_complete(i2c_imx);
 389                 if (result)
 390                         return result;
 391                 if (i == (msgs->len - 1)) {
 392                         /* It must generate STOP before read I2DR to prevent
 393                            controller from generating another clock cycle */
 394                         dev_dbg(&i2c_imx->adapter.dev,
 395                                 "<%s> clear MSTA\n", __func__);
 396                         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 397                         temp &= ~(I2CR_MSTA | I2CR_MTX);
 398                         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 399                         i2c_imx_bus_busy(i2c_imx, 0);
 400                         i2c_imx->stopped = 1;
 401                 } else if (i == (msgs->len - 2)) {
 402                         dev_dbg(&i2c_imx->adapter.dev,
 403                                 "<%s> set TXAK\n", __func__);
 404                         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 405                         temp |= I2CR_TXAK;
 406                         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 407                 }
 408                 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
 409                 dev_dbg(&i2c_imx->adapter.dev,
 410                         "<%s> read byte: B%d=0x%X\n",
 411                         __func__, i, msgs->buf[i]);
 412         }
 413         return 0;
 414 }
 415
 416 static int i2c_imx_xfer(struct i2c_adapter *adapter,
 417                                                 struct i2c_msg *msgs, int num)
 418 {
 419         unsigned int i, temp;
 420         int result;
 421         struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
 422
 423         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 424
 425         /* Start I2C transfer */
 426         result = i2c_imx_start(i2c_imx);
 427         if (result)
 428                 goto fail0;
 429
 430         /* read/write data */
 431         for (i = 0; i < num; i++) {
 432                 if (i) {
 433                         dev_dbg(&i2c_imx->adapter.dev,
 434                                 "<%s> repeated start\n", __func__);
 435                         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 436                         temp |= I2CR_RSTA;
 437                         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
 438                         result =  i2c_imx_bus_busy(i2c_imx, 1);
 439                         if (result)
 440                                 goto fail0;
 441                 }
 442                 dev_dbg(&i2c_imx->adapter.dev,
 443                         "<%s> transfer message: %d\n", __func__, i);
 444                 /* write/read data */
 445 #ifdef CONFIG_I2C_DEBUG_BUS
 446                 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
 447                 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
 448                         "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
 449                         (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
 450                         (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
 451                         (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
 452                 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
 453                 dev_dbg(&i2c_imx->adapter.dev,
 454                         "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
 455                         "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
 456                         (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
 457                         (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
 458                         (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
 459                         (temp & I2SR_RXAK ? 1 : 0));
 460 #endif
 461                 if (msgs[i].flags & I2C_M_RD)
 462                         result = i2c_imx_read(i2c_imx, &msgs[i]);
 463                 else
 464                         result = i2c_imx_write(i2c_imx, &msgs[i]);
 465                 if (result)
 466                         goto fail0;
 467         }
 468
 469 fail0:
 470         /* Stop I2C transfer */
 471         i2c_imx_stop(i2c_imx);
 472
 473         dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
 474                 (result < 0) ? "error" : "success msg",
 475                         (result < 0) ? result : num);
 476         return (result < 0) ? result : num;
 477 }
 478
 479 static u32 i2c_imx_func(struct i2c_adapter *adapter)
 480 {
 481         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 482 }
 483
 484 static struct i2c_algorithm i2c_imx_algo = {
 485         .master_xfer    = i2c_imx_xfer,
 486         .functionality  = i2c_imx_func,
 487 };
 488
 489 static int __init i2c_imx_probe(struct platform_device *pdev)
 490 {
 491         const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
 492                                                            &pdev->dev);
 493         struct imx_i2c_struct *i2c_imx;
 494         struct resource *res;
 495         struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
 496         struct pinctrl *pinctrl;
 497         void __iomem *base;
 498         int irq, ret;
 499         u32 bitrate;
 500
 501         dev_dbg(&pdev->dev, "<%s>\n", __func__);
 502
 503         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 504         if (!res) {
 505                 dev_err(&pdev->dev, "can't get device resources\n");
 506                 return -ENOENT;
 507         }
 508         irq = platform_get_irq(pdev, 0);
 509         if (irq < 0) {
 510                 dev_err(&pdev->dev, "can't get irq number\n");
 511                 return -ENOENT;
 512         }
 513
 514         base = devm_request_and_ioremap(&pdev->dev, res);
 515         if (!base)
 516                 return -EBUSY;
 517
 518         i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct),
 519                                 GFP_KERNEL);
 520         if (!i2c_imx) {
 521                 dev_err(&pdev->dev, "can't allocate interface\n");
 522                 return -ENOMEM;
 523         }
 524
 525         if (of_id)
 526                 pdev->id_entry = of_id->data;
 527         i2c_imx->devtype = pdev->id_entry->driver_data;
 528
 529         /* Setup i2c_imx driver structure */
 530         strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
 531         i2c_imx->adapter.owner          = THIS_MODULE;
 532         i2c_imx->adapter.algo           = &i2c_imx_algo;
 533         i2c_imx->adapter.dev.parent     = &pdev->dev;
 534         i2c_imx->adapter.nr             = pdev->id;
 535         i2c_imx->adapter.dev.of_node    = pdev->dev.of_node;
 536         i2c_imx->base                   = base;
 537
 538         pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
 539         if (IS_ERR(pinctrl)) {
 540                 dev_err(&pdev->dev, "can't get/select pinctrl\n");
 541                 return PTR_ERR(pinctrl);
 542         }
 543
 544         /* Get I2C clock */
 545         i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
 546         if (IS_ERR(i2c_imx->clk)) {
 547                 dev_err(&pdev->dev, "can't get I2C clock\n");
 548                 return PTR_ERR(i2c_imx->clk);
 549         }
 550
 551         /* Request IRQ */
 552         ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0,
 553                                 pdev->name, i2c_imx);
 554         if (ret) {
 555                 dev_err(&pdev->dev, "can't claim irq %d\n", irq);
 556                 return ret;
 557         }
 558
 559         /* Init queue */
 560         init_waitqueue_head(&i2c_imx->queue);
 561
 562         /* Set up adapter data */
 563         i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
 564
 565         /* Set up clock divider */
 566         bitrate = IMX_I2C_BIT_RATE;
 567         ret = of_property_read_u32(pdev->dev.of_node,
 568                                    "clock-frequency", &bitrate);
 569         if (ret < 0 && pdata && pdata->bitrate)
 570                 bitrate = pdata->bitrate;
 571         i2c_imx_set_clk(i2c_imx, bitrate);
 572
 573         /* Set up chip registers to defaults */
 574         writeb(0, i2c_imx->base + IMX_I2C_I2CR);
 575         writeb(0, i2c_imx->base + IMX_I2C_I2SR);
 576
 577         /* Add I2C adapter */
 578         ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
 579         if (ret < 0) {
 580                 dev_err(&pdev->dev, "registration failed\n");
 581                 return ret;
 582         }
 583
 584         of_i2c_register_devices(&i2c_imx->adapter);
 585
 586         /* Set up platform driver data */
 587         platform_set_drvdata(pdev, i2c_imx);
 588
 589         dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq);
 590         dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
 591                 res->start, res->end);
 592         dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x\n",
 593                 resource_size(res), res->start);
 594         dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
 595                 i2c_imx->adapter.name);
 596         dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
 597
 598         return 0;   /* Return OK */
 599 }
 600
 601 static int __exit i2c_imx_remove(struct platform_device *pdev)
 602 {
 603         struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
 604
 605         /* remove adapter */
 606         dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
 607         i2c_del_adapter(&i2c_imx->adapter);
 608         platform_set_drvdata(pdev, NULL);
 609
 610         /* setup chip registers to defaults */
 611         writeb(0, i2c_imx->base + IMX_I2C_IADR);
 612         writeb(0, i2c_imx->base + IMX_I2C_IFDR);
 613         writeb(0, i2c_imx->base + IMX_I2C_I2CR);
 614         writeb(0, i2c_imx->base + IMX_I2C_I2SR);
 615
 616         return 0;
 617 }
 618
 619 static struct platform_driver i2c_imx_driver = {
 620         .remove         = __exit_p(i2c_imx_remove),
 621         .driver = {
 622                 .name   = DRIVER_NAME,
 623                 .owner  = THIS_MODULE,
 624                 .of_match_table = i2c_imx_dt_ids,
 625         },
 626         .id_table       = imx_i2c_devtype,
 627 };
 628
 629 static int __init i2c_adap_imx_init(void)
 630 {
 631         return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
 632 }
 633 subsys_initcall(i2c_adap_imx_init);
 634
 635 static void __exit i2c_adap_imx_exit(void)
 636 {
 637         platform_driver_unregister(&i2c_imx_driver);
 638 }
 639 module_exit(i2c_adap_imx_exit);
 640
 641 MODULE_LICENSE("GPL");
 642 MODULE_AUTHOR("Darius Augulis");
 643 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
 644 MODULE_ALIAS("platform:" DRIVER_NAME);