1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2015, Sony Mobile Communications AB
7 #include <linux/hwspinlock.h>
9 #include <linux/kernel.h>
10 #include <linux/mfd/syscon.h>
11 #include <linux/module.h>
13 #include <linux/of_device.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
17 #include "hwspinlock_internal.h"
19 #define QCOM_MUTEX_APPS_PROC_ID 1
20 #define QCOM_MUTEX_NUM_LOCKS 32
22 struct qcom_hwspinlock_of_data {
25 const struct regmap_config *regmap_config;
28 static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
30 struct regmap_field *field = lock->priv;
34 ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
38 ret = regmap_field_read(field, &lock_owner);
42 return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
45 static void qcom_hwspinlock_unlock(struct hwspinlock *lock)
47 struct regmap_field *field = lock->priv;
51 ret = regmap_field_read(field, &lock_owner);
53 pr_err("%s: unable to query spinlock owner\n", __func__);
57 if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
58 pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
59 __func__, lock_owner);
62 ret = regmap_field_write(field, 0);
64 pr_err("%s: failed to unlock spinlock\n", __func__);
67 static const struct hwspinlock_ops qcom_hwspinlock_ops = {
68 .trylock = qcom_hwspinlock_trylock,
69 .unlock = qcom_hwspinlock_unlock,
72 static const struct regmap_config sfpb_mutex_config = {
76 .max_register = 0x100,
80 static const struct qcom_hwspinlock_of_data of_sfpb_mutex = {
83 .regmap_config = &sfpb_mutex_config,
86 static const struct regmap_config tcsr_msm8226_mutex_config = {
90 .max_register = 0x1000,
94 static const struct qcom_hwspinlock_of_data of_msm8226_tcsr_mutex = {
97 .regmap_config = &tcsr_msm8226_mutex_config,
100 static const struct regmap_config tcsr_mutex_config = {
104 .max_register = 0x20000,
108 static const struct qcom_hwspinlock_of_data of_tcsr_mutex = {
111 .regmap_config = &tcsr_mutex_config,
114 static const struct of_device_id qcom_hwspinlock_of_match[] = {
115 { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex },
116 { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex },
117 { .compatible = "qcom,apq8084-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
118 { .compatible = "qcom,msm8226-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
119 { .compatible = "qcom,msm8974-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
120 { .compatible = "qcom,msm8994-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
123 MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
125 static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev,
126 u32 *base, u32 *stride)
128 struct device_node *syscon;
129 struct regmap *regmap;
132 syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
134 return ERR_PTR(-ENODEV);
136 regmap = syscon_node_to_regmap(syscon);
141 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base);
143 dev_err(&pdev->dev, "no offset in syscon\n");
144 return ERR_PTR(-EINVAL);
147 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride);
149 dev_err(&pdev->dev, "no stride syscon\n");
150 return ERR_PTR(-EINVAL);
156 static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
157 u32 *offset, u32 *stride)
159 const struct qcom_hwspinlock_of_data *data;
160 struct device *dev = &pdev->dev;
163 data = of_device_get_match_data(dev);
164 if (!data->regmap_config)
165 return ERR_PTR(-EINVAL);
167 *offset = data->offset;
168 *stride = data->stride;
170 base = devm_platform_ioremap_resource(pdev, 0);
172 return ERR_CAST(base);
174 return devm_regmap_init_mmio(dev, base, data->regmap_config);
177 static int qcom_hwspinlock_probe(struct platform_device *pdev)
179 struct hwspinlock_device *bank;
180 struct reg_field field;
181 struct regmap *regmap;
187 regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride);
188 if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV)
189 regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride);
192 return PTR_ERR(regmap);
194 array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
195 bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
199 platform_set_drvdata(pdev, bank);
201 for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
202 field.reg = base + i * stride;
206 bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
208 if (IS_ERR(bank->lock[i].priv))
209 return PTR_ERR(bank->lock[i].priv);
212 return devm_hwspin_lock_register(&pdev->dev, bank, &qcom_hwspinlock_ops,
213 0, QCOM_MUTEX_NUM_LOCKS);
216 static struct platform_driver qcom_hwspinlock_driver = {
217 .probe = qcom_hwspinlock_probe,
219 .name = "qcom_hwspinlock",
220 .of_match_table = qcom_hwspinlock_of_match,
224 static int __init qcom_hwspinlock_init(void)
226 return platform_driver_register(&qcom_hwspinlock_driver);
228 /* board init code might need to reserve hwspinlocks for predefined purposes */
229 postcore_initcall(qcom_hwspinlock_init);
231 static void __exit qcom_hwspinlock_exit(void)
233 platform_driver_unregister(&qcom_hwspinlock_driver);
235 module_exit(qcom_hwspinlock_exit);
237 MODULE_LICENSE("GPL v2");
238 MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");