1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * w83627ehf - Driver for the hardware monitoring functionality of
4 * the Winbond W83627EHF Super-I/O chip
5 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
6 * Copyright (C) 2006 Yuan Mu (Winbond),
7 * Rudolf Marek <r.marek@assembler.cz>
8 * David Hubbard <david.c.hubbard@gmail.com>
9 * Daniel J Blueman <daniel.blueman@gmail.com>
10 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
12 * Shamelessly ripped from the w83627hf driver
13 * Copyright (C) 2003 Mark Studebaker
15 * Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
16 * in testing and debugging this driver.
18 * This driver also supports the W83627EHG, which is the lead-free
19 * version of the W83627EHF.
21 * Supports the following chips:
23 * Chip #vin #fan #pwm #temp chip IDs man ID
24 * w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
26 * w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
27 * w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
28 * w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3
29 * w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
30 * w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
31 * nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
32 * nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3
35 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/slab.h>
40 #include <linux/jiffies.h>
41 #include <linux/platform_device.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-sysfs.h>
44 #include <linux/hwmon-vid.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47 #include <linux/acpi.h>
52 w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
53 w83667hg, w83667hg_b, nct6775, nct6776,
56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 static const char * const w83627ehf_device_names[] = {
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
72 static unsigned short fan_debounce;
73 module_param(fan_debounce, ushort, 0);
74 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
76 #define DRVNAME "w83627ehf"
79 * Super-I/O constants and functions
82 #define W83627EHF_LD_HWM 0x0b
83 #define W83667HG_LD_VID 0x0d
85 #define SIO_REG_LDSEL 0x07 /* Logical device select */
86 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
87 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
88 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
89 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
90 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
91 #define SIO_REG_VID_DATA 0xF1 /* VID data */
93 #define SIO_W83627EHF_ID 0x8850
94 #define SIO_W83627EHG_ID 0x8860
95 #define SIO_W83627DHG_ID 0xa020
96 #define SIO_W83627DHG_P_ID 0xb070
97 #define SIO_W83627UHG_ID 0xa230
98 #define SIO_W83667HG_ID 0xa510
99 #define SIO_W83667HG_B_ID 0xb350
100 #define SIO_NCT6775_ID 0xb470
101 #define SIO_NCT6776_ID 0xc330
102 #define SIO_ID_MASK 0xFFF0
105 superio_outb(int ioreg, int reg, int val)
108 outb(val, ioreg + 1);
112 superio_inb(int ioreg, int reg)
115 return inb(ioreg + 1);
119 superio_select(int ioreg, int ld)
121 outb(SIO_REG_LDSEL, ioreg);
126 superio_enter(int ioreg)
128 if (!request_muxed_region(ioreg, 2, DRVNAME))
138 superio_exit(int ioreg)
142 outb(0x02, ioreg + 1);
143 release_region(ioreg, 2);
150 #define IOREGION_ALIGNMENT (~7)
151 #define IOREGION_OFFSET 5
152 #define IOREGION_LENGTH 2
153 #define ADDR_REG_OFFSET 0
154 #define DATA_REG_OFFSET 1
156 #define W83627EHF_REG_BANK 0x4E
157 #define W83627EHF_REG_CONFIG 0x40
160 * Not currently used:
161 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
162 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
163 * REG_MAN_ID is at port 0x4f
164 * REG_CHIP_ID is at port 0x58
167 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
168 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
170 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
171 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
172 (0x554 + (((nr) - 7) * 2)))
173 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
174 (0x555 + (((nr) - 7) * 2)))
175 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
178 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
179 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
180 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
181 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
183 /* Fan clock dividers are spread over the following five registers */
184 #define W83627EHF_REG_FANDIV1 0x47
185 #define W83627EHF_REG_FANDIV2 0x4B
186 #define W83627EHF_REG_VBAT 0x5D
187 #define W83627EHF_REG_DIODE 0x59
188 #define W83627EHF_REG_SMI_OVT 0x4C
190 /* NCT6775F has its own fan divider registers */
191 #define NCT6775_REG_FANDIV1 0x506
192 #define NCT6775_REG_FANDIV2 0x507
193 #define NCT6775_REG_FAN_DEBOUNCE 0xf0
195 #define W83627EHF_REG_ALARM1 0x459
196 #define W83627EHF_REG_ALARM2 0x45A
197 #define W83627EHF_REG_ALARM3 0x45B
199 #define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */
200 #define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */
202 /* SmartFan registers */
203 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
204 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
206 /* DC or PWM output fan configuration */
207 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
208 0x04, /* SYS FAN0 output mode and PWM mode */
209 0x04, /* CPU FAN0 output mode and PWM mode */
210 0x12, /* AUX FAN mode */
211 0x62, /* CPU FAN1 mode */
214 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
215 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
217 /* FAN Duty Cycle, be used to control */
218 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
219 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
220 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
222 /* Advanced Fan control, some values are common for all fans */
223 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
224 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
225 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
227 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
228 = { 0xff, 0x67, 0xff, 0x69 };
229 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
230 = { 0xff, 0x68, 0xff, 0x6a };
232 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
233 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
234 = { 0x68, 0x6a, 0x6c };
236 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
238 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
239 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
240 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
241 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
242 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
243 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
244 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
245 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
246 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
247 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
249 static const u16 NCT6775_REG_TEMP[]
250 = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
251 static const u16 NCT6775_REG_TEMP_CONFIG[]
252 = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
253 static const u16 NCT6775_REG_TEMP_HYST[]
254 = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
255 static const u16 NCT6775_REG_TEMP_OVER[]
256 = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
257 static const u16 NCT6775_REG_TEMP_SOURCE[]
258 = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
260 static const char *const w83667hg_b_temp_label[] = {
271 static const char *const nct6775_temp_label[] = {
285 "PCH_CHIP_CPU_MAX_TEMP",
295 static const char *const nct6776_temp_label[] = {
310 "PCH_CHIP_CPU_MAX_TEMP",
321 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
323 static int is_word_sized(u16 reg)
325 return ((((reg & 0xff00) == 0x100
326 || (reg & 0xff00) == 0x200)
327 && ((reg & 0x00ff) == 0x50
328 || (reg & 0x00ff) == 0x53
329 || (reg & 0x00ff) == 0x55))
330 || (reg & 0xfff0) == 0x630
331 || reg == 0x640 || reg == 0x642
332 || ((reg & 0xfff0) == 0x650
333 && (reg & 0x000f) >= 0x06)
334 || reg == 0x73 || reg == 0x75 || reg == 0x77
342 /* 1 is PWM mode, output in ms */
343 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
345 return mode ? 100 * reg : 400 * reg;
348 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
350 return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),
354 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
356 if (reg == 0 || reg == 255)
358 return 1350000U / (reg << divreg);
361 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
363 if ((reg & 0xff1f) == 0xff1f)
366 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
371 return 1350000U / reg;
374 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
376 if (reg == 0 || reg == 0xffff)
380 * Even though the registers are 16 bit wide, the fan divisor
383 return 1350000U / (reg << divreg);
386 static inline unsigned int
393 * Some of the voltage inputs have internal scaling, the tables below
394 * contain 8 (the ADC LSB in mV) * scaling factor * 100
396 static const u16 scale_in_common[10] = {
397 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
399 static const u16 scale_in_w83627uhg[9] = {
400 800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
403 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
405 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
408 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
410 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
414 * Data structures and manipulation thereof
417 struct w83627ehf_data {
418 int addr; /* IO base of hw monitor block */
421 struct device *hwmon_dev;
424 u16 reg_temp[NUM_REG_TEMP];
425 u16 reg_temp_over[NUM_REG_TEMP];
426 u16 reg_temp_hyst[NUM_REG_TEMP];
427 u16 reg_temp_config[NUM_REG_TEMP];
428 u8 temp_src[NUM_REG_TEMP];
429 const char * const *temp_label;
432 const u16 *REG_TARGET;
434 const u16 *REG_FAN_MIN;
435 const u16 *REG_FAN_START_OUTPUT;
436 const u16 *REG_FAN_STOP_OUTPUT;
437 const u16 *REG_FAN_STOP_TIME;
438 const u16 *REG_FAN_MAX_OUTPUT;
439 const u16 *REG_FAN_STEP_OUTPUT;
442 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
443 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
445 struct mutex update_lock;
446 char valid; /* !=0 if following fields are valid */
447 unsigned long last_updated; /* In jiffies */
449 /* Register values */
450 u8 bank; /* current register bank */
451 u8 in_num; /* number of in inputs we have */
452 u8 in[10]; /* Register value */
453 u8 in_max[10]; /* Register value */
454 u8 in_min[10]; /* Register value */
458 u8 has_fan; /* some fan inputs can be disabled */
459 u8 has_fan_min; /* some fans don't have min register */
465 s16 temp_max_hyst[9];
469 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
470 u8 pwm_enable[4]; /* 1->manual
471 * 2->thermal cruise mode (also called SmartFan I)
472 * 3->fan speed cruise mode
473 * 4->variable thermal cruise (also called
475 * 5->enhanced variable thermal cruise (also called
478 u8 pwm_enable_orig[4]; /* original value of pwm_enable */
479 u8 pwm_num; /* number of pwm */
484 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
485 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
486 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
487 u8 fan_max_output[4]; /* maximum fan speed */
488 u8 fan_step_output[4]; /* rate of change output value */
494 u16 have_temp_offset;
499 /* Remember extra register values over suspend/resume */
506 struct w83627ehf_sio_data {
512 * On older chips, only registers 0x50-0x5f are banked.
513 * On more recent chips, all registers are banked.
514 * Assume that is the case and set the bank number for each access.
515 * Cache the bank number so it only needs to be set if it changes.
517 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
520 if (data->bank != bank) {
521 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
522 outb_p(bank, data->addr + DATA_REG_OFFSET);
527 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
529 int res, word_sized = is_word_sized(reg);
531 mutex_lock(&data->lock);
533 w83627ehf_set_bank(data, reg);
534 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
535 res = inb_p(data->addr + DATA_REG_OFFSET);
537 outb_p((reg & 0xff) + 1,
538 data->addr + ADDR_REG_OFFSET);
539 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
542 mutex_unlock(&data->lock);
546 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
549 int word_sized = is_word_sized(reg);
551 mutex_lock(&data->lock);
553 w83627ehf_set_bank(data, reg);
554 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
556 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
557 outb_p((reg & 0xff) + 1,
558 data->addr + ADDR_REG_OFFSET);
560 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
562 mutex_unlock(&data->lock);
566 /* We left-align 8-bit temperature values to make the code simpler */
567 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
571 res = w83627ehf_read_value(data, reg);
572 if (!is_word_sized(reg))
578 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
581 if (!is_word_sized(reg))
583 return w83627ehf_write_value(data, reg, value);
586 /* This function assumes that the caller holds data->update_lock */
587 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
593 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
594 | (data->fan_div[0] & 0x7);
595 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
598 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
599 | ((data->fan_div[1] << 4) & 0x70);
600 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
603 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
604 | (data->fan_div[2] & 0x7);
605 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
608 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
609 | ((data->fan_div[3] << 4) & 0x70);
610 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
615 /* This function assumes that the caller holds data->update_lock */
616 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
622 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
623 | ((data->fan_div[0] & 0x03) << 4);
624 /* fan5 input control bit is write only, compute the value */
625 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
626 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
627 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
628 | ((data->fan_div[0] & 0x04) << 3);
629 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
632 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
633 | ((data->fan_div[1] & 0x03) << 6);
634 /* fan5 input control bit is write only, compute the value */
635 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
636 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
637 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
638 | ((data->fan_div[1] & 0x04) << 4);
639 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
642 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
643 | ((data->fan_div[2] & 0x03) << 6);
644 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
645 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
646 | ((data->fan_div[2] & 0x04) << 5);
647 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
650 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
651 | (data->fan_div[3] & 0x03);
652 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
653 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
654 | ((data->fan_div[3] & 0x04) << 5);
655 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
658 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
659 | ((data->fan_div[4] & 0x03) << 2)
660 | ((data->fan_div[4] & 0x04) << 5);
661 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
666 static void w83627ehf_write_fan_div_common(struct device *dev,
667 struct w83627ehf_data *data, int nr)
669 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
671 if (sio_data->kind == nct6776)
672 ; /* no dividers, do nothing */
673 else if (sio_data->kind == nct6775)
674 nct6775_write_fan_div(data, nr);
676 w83627ehf_write_fan_div(data, nr);
679 static void nct6775_update_fan_div(struct w83627ehf_data *data)
683 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
684 data->fan_div[0] = i & 0x7;
685 data->fan_div[1] = (i & 0x70) >> 4;
686 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
687 data->fan_div[2] = i & 0x7;
688 if (data->has_fan & (1<<3))
689 data->fan_div[3] = (i & 0x70) >> 4;
692 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
696 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
697 data->fan_div[0] = (i >> 4) & 0x03;
698 data->fan_div[1] = (i >> 6) & 0x03;
699 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
700 data->fan_div[2] = (i >> 6) & 0x03;
701 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
702 data->fan_div[0] |= (i >> 3) & 0x04;
703 data->fan_div[1] |= (i >> 4) & 0x04;
704 data->fan_div[2] |= (i >> 5) & 0x04;
705 if (data->has_fan & ((1 << 3) | (1 << 4))) {
706 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
707 data->fan_div[3] = i & 0x03;
708 data->fan_div[4] = ((i >> 2) & 0x03)
711 if (data->has_fan & (1 << 3)) {
712 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
713 data->fan_div[3] |= (i >> 5) & 0x04;
717 static void w83627ehf_update_fan_div_common(struct device *dev,
718 struct w83627ehf_data *data)
720 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
722 if (sio_data->kind == nct6776)
723 ; /* no dividers, do nothing */
724 else if (sio_data->kind == nct6775)
725 nct6775_update_fan_div(data);
727 w83627ehf_update_fan_div(data);
730 static void nct6775_update_pwm(struct w83627ehf_data *data)
733 int pwmcfg, fanmodecfg;
735 for (i = 0; i < data->pwm_num; i++) {
736 pwmcfg = w83627ehf_read_value(data,
737 W83627EHF_REG_PWM_ENABLE[i]);
738 fanmodecfg = w83627ehf_read_value(data,
739 NCT6775_REG_FAN_MODE[i]);
741 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
742 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
743 data->tolerance[i] = fanmodecfg & 0x0f;
744 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
748 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
751 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
753 for (i = 0; i < data->pwm_num; i++) {
754 if (!(data->has_fan & (1 << i)))
757 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
759 pwmcfg = w83627ehf_read_value(data,
760 W83627EHF_REG_PWM_ENABLE[i]);
761 tolerance = w83627ehf_read_value(data,
762 W83627EHF_REG_TOLERANCE[i]);
765 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
766 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
768 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
770 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
774 static void w83627ehf_update_pwm_common(struct device *dev,
775 struct w83627ehf_data *data)
777 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
779 if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
780 nct6775_update_pwm(data);
782 w83627ehf_update_pwm(data);
785 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
787 struct w83627ehf_data *data = dev_get_drvdata(dev);
788 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
792 mutex_lock(&data->update_lock);
794 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
796 /* Fan clock dividers */
797 w83627ehf_update_fan_div_common(dev, data);
799 /* Measured voltages and limits */
800 for (i = 0; i < data->in_num; i++) {
801 if ((i == 6) && data->in6_skip)
804 data->in[i] = w83627ehf_read_value(data,
805 W83627EHF_REG_IN(i));
806 data->in_min[i] = w83627ehf_read_value(data,
807 W83627EHF_REG_IN_MIN(i));
808 data->in_max[i] = w83627ehf_read_value(data,
809 W83627EHF_REG_IN_MAX(i));
812 /* Measured fan speeds and limits */
813 for (i = 0; i < 5; i++) {
816 if (!(data->has_fan & (1 << i)))
819 reg = w83627ehf_read_value(data, data->REG_FAN[i]);
820 data->rpm[i] = data->fan_from_reg(reg,
823 if (data->has_fan_min & (1 << i))
824 data->fan_min[i] = w83627ehf_read_value(data,
825 data->REG_FAN_MIN[i]);
828 * If we failed to measure the fan speed and clock
829 * divider can be increased, let's try that for next
832 if (data->has_fan_div
833 && (reg >= 0xff || (sio_data->kind == nct6775
835 && data->fan_div[i] < 0x07) {
837 "Increasing fan%d clock divider from %u to %u\n",
838 i + 1, div_from_reg(data->fan_div[i]),
839 div_from_reg(data->fan_div[i] + 1));
841 w83627ehf_write_fan_div_common(dev, data, i);
842 /* Preserve min limit if possible */
843 if ((data->has_fan_min & (1 << i))
844 && data->fan_min[i] >= 2
845 && data->fan_min[i] != 255)
846 w83627ehf_write_value(data,
847 data->REG_FAN_MIN[i],
848 (data->fan_min[i] /= 2));
852 w83627ehf_update_pwm_common(dev, data);
854 for (i = 0; i < data->pwm_num; i++) {
855 if (!(data->has_fan & (1 << i)))
858 data->fan_start_output[i] =
859 w83627ehf_read_value(data,
860 data->REG_FAN_START_OUTPUT[i]);
861 data->fan_stop_output[i] =
862 w83627ehf_read_value(data,
863 data->REG_FAN_STOP_OUTPUT[i]);
864 data->fan_stop_time[i] =
865 w83627ehf_read_value(data,
866 data->REG_FAN_STOP_TIME[i]);
868 if (data->REG_FAN_MAX_OUTPUT &&
869 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
870 data->fan_max_output[i] =
871 w83627ehf_read_value(data,
872 data->REG_FAN_MAX_OUTPUT[i]);
874 if (data->REG_FAN_STEP_OUTPUT &&
875 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
876 data->fan_step_output[i] =
877 w83627ehf_read_value(data,
878 data->REG_FAN_STEP_OUTPUT[i]);
880 data->target_temp[i] =
881 w83627ehf_read_value(data,
882 data->REG_TARGET[i]) &
883 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
886 /* Measured temperatures and limits */
887 for (i = 0; i < NUM_REG_TEMP; i++) {
888 if (!(data->have_temp & (1 << i)))
890 data->temp[i] = w83627ehf_read_temp(data,
892 if (data->reg_temp_over[i])
894 = w83627ehf_read_temp(data,
895 data->reg_temp_over[i]);
896 if (data->reg_temp_hyst[i])
897 data->temp_max_hyst[i]
898 = w83627ehf_read_temp(data,
899 data->reg_temp_hyst[i]);
902 if (data->have_temp_offset & (1 << i))
904 = w83627ehf_read_value(data,
905 W83627EHF_REG_TEMP_OFFSET[i]);
908 data->alarms = w83627ehf_read_value(data,
909 W83627EHF_REG_ALARM1) |
910 (w83627ehf_read_value(data,
911 W83627EHF_REG_ALARM2) << 8) |
912 (w83627ehf_read_value(data,
913 W83627EHF_REG_ALARM3) << 16);
915 data->caseopen = w83627ehf_read_value(data,
916 W83627EHF_REG_CASEOPEN_DET);
918 data->last_updated = jiffies;
922 mutex_unlock(&data->update_lock);
927 * Sysfs callback functions
929 #define show_in_reg(reg) \
931 show_##reg(struct device *dev, struct device_attribute *attr, \
934 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
935 struct sensor_device_attribute *sensor_attr = \
936 to_sensor_dev_attr(attr); \
937 int nr = sensor_attr->index; \
938 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
945 #define store_in_reg(REG, reg) \
947 store_in_##reg(struct device *dev, struct device_attribute *attr, \
948 const char *buf, size_t count) \
950 struct w83627ehf_data *data = dev_get_drvdata(dev); \
951 struct sensor_device_attribute *sensor_attr = \
952 to_sensor_dev_attr(attr); \
953 int nr = sensor_attr->index; \
956 err = kstrtoul(buf, 10, &val); \
959 mutex_lock(&data->update_lock); \
960 data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
961 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
962 data->in_##reg[nr]); \
963 mutex_unlock(&data->update_lock); \
967 store_in_reg(MIN, min)
968 store_in_reg(MAX, max)
970 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
973 struct w83627ehf_data *data = w83627ehf_update_device(dev);
974 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
975 int nr = sensor_attr->index;
976 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
979 static struct sensor_device_attribute sda_in_input[] = {
980 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
981 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
982 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
983 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
984 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
985 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
986 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
987 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
988 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
989 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
992 static struct sensor_device_attribute sda_in_alarm[] = {
993 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
994 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
995 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
996 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
997 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
998 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
999 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
1000 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
1001 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
1002 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
1005 static struct sensor_device_attribute sda_in_min[] = {
1006 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
1007 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
1008 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
1009 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
1010 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
1011 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
1012 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
1013 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
1014 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
1015 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
1018 static struct sensor_device_attribute sda_in_max[] = {
1019 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
1020 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
1021 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
1022 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
1023 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
1024 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
1025 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
1026 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
1027 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
1028 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1032 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1034 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1035 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1036 int nr = sensor_attr->index;
1037 return sprintf(buf, "%d\n", data->rpm[nr]);
1041 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1043 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1044 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1045 int nr = sensor_attr->index;
1046 return sprintf(buf, "%d\n",
1047 data->fan_from_reg_min(data->fan_min[nr],
1048 data->fan_div[nr]));
1052 show_fan_div(struct device *dev, struct device_attribute *attr,
1055 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1056 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1057 int nr = sensor_attr->index;
1058 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1062 store_fan_min(struct device *dev, struct device_attribute *attr,
1063 const char *buf, size_t count)
1065 struct w83627ehf_data *data = dev_get_drvdata(dev);
1066 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1067 int nr = sensor_attr->index;
1073 err = kstrtoul(buf, 10, &val);
1077 mutex_lock(&data->update_lock);
1078 if (!data->has_fan_div) {
1080 * Only NCT6776F for now, so we know that this is a 13 bit
1088 val = 1350000U / val;
1089 val = (val & 0x1f) | ((val << 3) & 0xff00);
1091 data->fan_min[nr] = val;
1092 goto done; /* Leave fan divider alone */
1095 /* No min limit, alarm disabled */
1096 data->fan_min[nr] = 255;
1097 new_div = data->fan_div[nr]; /* No change */
1098 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1099 } else if ((reg = 1350000U / val) >= 128 * 255) {
1101 * Speed below this value cannot possibly be represented,
1102 * even with the highest divider (128)
1104 data->fan_min[nr] = 254;
1105 new_div = 7; /* 128 == (1 << 7) */
1107 "fan%u low limit %lu below minimum %u, set to minimum\n",
1108 nr + 1, val, data->fan_from_reg_min(254, 7));
1111 * Speed above this value cannot possibly be represented,
1112 * even with the lowest divider (1)
1114 data->fan_min[nr] = 1;
1115 new_div = 0; /* 1 == (1 << 0) */
1117 "fan%u low limit %lu above maximum %u, set to maximum\n",
1118 nr + 1, val, data->fan_from_reg_min(1, 0));
1121 * Automatically pick the best divider, i.e. the one such
1122 * that the min limit will correspond to a register value
1123 * in the 96..192 range
1126 while (reg > 192 && new_div < 7) {
1130 data->fan_min[nr] = reg;
1134 * Write both the fan clock divider (if it changed) and the new
1135 * fan min (unconditionally)
1137 if (new_div != data->fan_div[nr]) {
1138 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1139 nr + 1, div_from_reg(data->fan_div[nr]),
1140 div_from_reg(new_div));
1141 data->fan_div[nr] = new_div;
1142 w83627ehf_write_fan_div_common(dev, data, nr);
1143 /* Give the chip time to sample a new speed value */
1144 data->last_updated = jiffies;
1147 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1149 mutex_unlock(&data->update_lock);
1154 static struct sensor_device_attribute sda_fan_input[] = {
1155 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1156 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1157 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1158 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1159 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1162 static struct sensor_device_attribute sda_fan_alarm[] = {
1163 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1164 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1165 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1166 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1167 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1170 static struct sensor_device_attribute sda_fan_min[] = {
1171 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1173 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1175 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1177 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1179 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1183 static struct sensor_device_attribute sda_fan_div[] = {
1184 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1185 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1186 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1187 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1188 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1192 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1194 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1195 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1196 int nr = sensor_attr->index;
1197 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1200 #define show_temp_reg(addr, reg) \
1202 show_##reg(struct device *dev, struct device_attribute *attr, \
1205 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1206 struct sensor_device_attribute *sensor_attr = \
1207 to_sensor_dev_attr(attr); \
1208 int nr = sensor_attr->index; \
1209 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1211 show_temp_reg(reg_temp, temp);
1212 show_temp_reg(reg_temp_over, temp_max);
1213 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1215 #define store_temp_reg(addr, reg) \
1217 store_##reg(struct device *dev, struct device_attribute *attr, \
1218 const char *buf, size_t count) \
1220 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1221 struct sensor_device_attribute *sensor_attr = \
1222 to_sensor_dev_attr(attr); \
1223 int nr = sensor_attr->index; \
1226 err = kstrtol(buf, 10, &val); \
1229 mutex_lock(&data->update_lock); \
1230 data->reg[nr] = LM75_TEMP_TO_REG(val); \
1231 w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1232 mutex_unlock(&data->update_lock); \
1235 store_temp_reg(reg_temp_over, temp_max);
1236 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1239 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1241 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1242 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1244 return sprintf(buf, "%d\n",
1245 data->temp_offset[sensor_attr->index] * 1000);
1249 store_temp_offset(struct device *dev, struct device_attribute *attr,
1250 const char *buf, size_t count)
1252 struct w83627ehf_data *data = dev_get_drvdata(dev);
1253 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1254 int nr = sensor_attr->index;
1258 err = kstrtol(buf, 10, &val);
1262 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1264 mutex_lock(&data->update_lock);
1265 data->temp_offset[nr] = val;
1266 w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);
1267 mutex_unlock(&data->update_lock);
1272 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1274 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1275 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1276 int nr = sensor_attr->index;
1277 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1280 static struct sensor_device_attribute sda_temp_input[] = {
1281 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1282 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1283 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1284 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1285 SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1286 SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1287 SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1288 SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1289 SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1292 static struct sensor_device_attribute sda_temp_label[] = {
1293 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1294 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1295 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1296 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1297 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1298 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1299 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1300 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1301 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1304 static struct sensor_device_attribute sda_temp_max[] = {
1305 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1307 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1309 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1311 SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1313 SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1315 SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1317 SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1319 SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1321 SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1325 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1326 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1327 store_temp_max_hyst, 0),
1328 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1329 store_temp_max_hyst, 1),
1330 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1331 store_temp_max_hyst, 2),
1332 SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1333 store_temp_max_hyst, 3),
1334 SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1335 store_temp_max_hyst, 4),
1336 SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1337 store_temp_max_hyst, 5),
1338 SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1339 store_temp_max_hyst, 6),
1340 SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1341 store_temp_max_hyst, 7),
1342 SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1343 store_temp_max_hyst, 8),
1346 static struct sensor_device_attribute sda_temp_alarm[] = {
1347 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1348 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1349 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1352 static struct sensor_device_attribute sda_temp_type[] = {
1353 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1354 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1355 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1358 static struct sensor_device_attribute sda_temp_offset[] = {
1359 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1360 store_temp_offset, 0),
1361 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1362 store_temp_offset, 1),
1363 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1364 store_temp_offset, 2),
1367 #define show_pwm_reg(reg) \
1368 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1371 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1372 struct sensor_device_attribute *sensor_attr = \
1373 to_sensor_dev_attr(attr); \
1374 int nr = sensor_attr->index; \
1375 return sprintf(buf, "%d\n", data->reg[nr]); \
1378 show_pwm_reg(pwm_mode)
1379 show_pwm_reg(pwm_enable)
1383 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1384 const char *buf, size_t count)
1386 struct w83627ehf_data *data = dev_get_drvdata(dev);
1387 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1388 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1389 int nr = sensor_attr->index;
1394 err = kstrtoul(buf, 10, &val);
1401 /* On NCT67766F, DC mode is only supported for pwm1 */
1402 if (sio_data->kind == nct6776 && nr && val != 1)
1405 mutex_lock(&data->update_lock);
1406 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1407 data->pwm_mode[nr] = val;
1408 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1410 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1411 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1412 mutex_unlock(&data->update_lock);
1417 store_pwm(struct device *dev, struct device_attribute *attr,
1418 const char *buf, size_t count)
1420 struct w83627ehf_data *data = dev_get_drvdata(dev);
1421 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1422 int nr = sensor_attr->index;
1426 err = kstrtoul(buf, 10, &val);
1430 val = clamp_val(val, 0, 255);
1432 mutex_lock(&data->update_lock);
1433 data->pwm[nr] = val;
1434 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1435 mutex_unlock(&data->update_lock);
1440 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1441 const char *buf, size_t count)
1443 struct w83627ehf_data *data = dev_get_drvdata(dev);
1444 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1445 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1446 int nr = sensor_attr->index;
1451 err = kstrtoul(buf, 10, &val);
1455 if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1457 /* SmartFan III mode is not supported on NCT6776F */
1458 if (sio_data->kind == nct6776 && val == 4)
1461 mutex_lock(&data->update_lock);
1462 data->pwm_enable[nr] = val;
1463 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1464 reg = w83627ehf_read_value(data,
1465 NCT6775_REG_FAN_MODE[nr]);
1467 reg |= (val - 1) << 4;
1468 w83627ehf_write_value(data,
1469 NCT6775_REG_FAN_MODE[nr], reg);
1471 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1472 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1473 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1474 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1476 mutex_unlock(&data->update_lock);
1481 #define show_tol_temp(reg) \
1482 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1485 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1486 struct sensor_device_attribute *sensor_attr = \
1487 to_sensor_dev_attr(attr); \
1488 int nr = sensor_attr->index; \
1489 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1492 show_tol_temp(tolerance)
1493 show_tol_temp(target_temp)
1496 store_target_temp(struct device *dev, struct device_attribute *attr,
1497 const char *buf, size_t count)
1499 struct w83627ehf_data *data = dev_get_drvdata(dev);
1500 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1501 int nr = sensor_attr->index;
1505 err = kstrtol(buf, 10, &val);
1509 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1511 mutex_lock(&data->update_lock);
1512 data->target_temp[nr] = val;
1513 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1514 mutex_unlock(&data->update_lock);
1519 store_tolerance(struct device *dev, struct device_attribute *attr,
1520 const char *buf, size_t count)
1522 struct w83627ehf_data *data = dev_get_drvdata(dev);
1523 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1524 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1525 int nr = sensor_attr->index;
1530 err = kstrtol(buf, 10, &val);
1534 /* Limit the temp to 0C - 15C */
1535 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1537 mutex_lock(&data->update_lock);
1538 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1539 /* Limit tolerance further for NCT6776F */
1540 if (sio_data->kind == nct6776 && val > 7)
1542 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1543 reg = (reg & 0xf0) | val;
1544 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1546 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1548 reg = (reg & 0x0f) | (val << 4);
1550 reg = (reg & 0xf0) | val;
1551 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1553 data->tolerance[nr] = val;
1554 mutex_unlock(&data->update_lock);
1558 static struct sensor_device_attribute sda_pwm[] = {
1559 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1560 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1561 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1562 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1565 static struct sensor_device_attribute sda_pwm_mode[] = {
1566 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1568 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1570 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1572 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1576 static struct sensor_device_attribute sda_pwm_enable[] = {
1577 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1578 store_pwm_enable, 0),
1579 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1580 store_pwm_enable, 1),
1581 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1582 store_pwm_enable, 2),
1583 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1584 store_pwm_enable, 3),
1587 static struct sensor_device_attribute sda_target_temp[] = {
1588 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1589 store_target_temp, 0),
1590 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1591 store_target_temp, 1),
1592 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1593 store_target_temp, 2),
1594 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1595 store_target_temp, 3),
1598 static struct sensor_device_attribute sda_tolerance[] = {
1599 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1600 store_tolerance, 0),
1601 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1602 store_tolerance, 1),
1603 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1604 store_tolerance, 2),
1605 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1606 store_tolerance, 3),
1609 /* Smart Fan registers */
1611 #define fan_functions(reg, REG) \
1612 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1615 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1616 struct sensor_device_attribute *sensor_attr = \
1617 to_sensor_dev_attr(attr); \
1618 int nr = sensor_attr->index; \
1619 return sprintf(buf, "%d\n", data->reg[nr]); \
1622 store_##reg(struct device *dev, struct device_attribute *attr, \
1623 const char *buf, size_t count) \
1625 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1626 struct sensor_device_attribute *sensor_attr = \
1627 to_sensor_dev_attr(attr); \
1628 int nr = sensor_attr->index; \
1629 unsigned long val; \
1631 err = kstrtoul(buf, 10, &val); \
1634 val = clamp_val(val, 1, 255); \
1635 mutex_lock(&data->update_lock); \
1636 data->reg[nr] = val; \
1637 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1638 mutex_unlock(&data->update_lock); \
1642 fan_functions(fan_start_output, FAN_START_OUTPUT)
1643 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1644 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1645 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1647 #define fan_time_functions(reg, REG) \
1648 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1651 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1652 struct sensor_device_attribute *sensor_attr = \
1653 to_sensor_dev_attr(attr); \
1654 int nr = sensor_attr->index; \
1655 return sprintf(buf, "%d\n", \
1656 step_time_from_reg(data->reg[nr], \
1657 data->pwm_mode[nr])); \
1661 store_##reg(struct device *dev, struct device_attribute *attr, \
1662 const char *buf, size_t count) \
1664 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1665 struct sensor_device_attribute *sensor_attr = \
1666 to_sensor_dev_attr(attr); \
1667 int nr = sensor_attr->index; \
1668 unsigned long val; \
1670 err = kstrtoul(buf, 10, &val); \
1673 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1674 mutex_lock(&data->update_lock); \
1675 data->reg[nr] = val; \
1676 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1677 mutex_unlock(&data->update_lock); \
1681 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1683 static ssize_t name_show(struct device *dev, struct device_attribute *attr,
1686 struct w83627ehf_data *data = dev_get_drvdata(dev);
1688 return sprintf(buf, "%s\n", data->name);
1690 static DEVICE_ATTR_RO(name);
1692 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1693 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1694 store_fan_stop_time, 3),
1695 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1696 store_fan_start_output, 3),
1697 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1698 store_fan_stop_output, 3),
1699 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1700 store_fan_max_output, 3),
1701 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1702 store_fan_step_output, 3),
1705 static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
1706 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1707 store_fan_stop_time, 2),
1708 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1709 store_fan_start_output, 2),
1710 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1711 store_fan_stop_output, 2),
1714 static struct sensor_device_attribute sda_sf3_arrays[] = {
1715 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1716 store_fan_stop_time, 0),
1717 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1718 store_fan_stop_time, 1),
1719 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1720 store_fan_start_output, 0),
1721 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1722 store_fan_start_output, 1),
1723 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1724 store_fan_stop_output, 0),
1725 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1726 store_fan_stop_output, 1),
1731 * pwm1 and pwm3 don't support max and step settings on all chips.
1732 * Need to check support while generating/removing attribute files.
1734 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1735 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1736 store_fan_max_output, 0),
1737 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1738 store_fan_step_output, 0),
1739 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1740 store_fan_max_output, 1),
1741 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1742 store_fan_step_output, 1),
1743 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1744 store_fan_max_output, 2),
1745 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1746 store_fan_step_output, 2),
1750 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
1752 struct w83627ehf_data *data = dev_get_drvdata(dev);
1753 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1755 static DEVICE_ATTR_RO(cpu0_vid);
1758 /* Case open detection */
1761 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1763 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1765 return sprintf(buf, "%d\n",
1766 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1770 clear_caseopen(struct device *dev, struct device_attribute *attr,
1771 const char *buf, size_t count)
1773 struct w83627ehf_data *data = dev_get_drvdata(dev);
1777 if (kstrtoul(buf, 10, &val) || val != 0)
1780 mask = to_sensor_dev_attr_2(attr)->nr;
1782 mutex_lock(&data->update_lock);
1783 reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1784 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1785 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1786 data->valid = 0; /* Force cache refresh */
1787 mutex_unlock(&data->update_lock);
1792 static struct sensor_device_attribute_2 sda_caseopen[] = {
1793 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1794 clear_caseopen, 0x80, 0x10),
1795 SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1796 clear_caseopen, 0x40, 0x40),
1800 * Driver and device management
1803 static void w83627ehf_device_remove_files(struct device *dev)
1806 * some entries in the following arrays may not have been used in
1807 * device_create_file(), but device_remove_file() will ignore them
1810 struct w83627ehf_data *data = dev_get_drvdata(dev);
1812 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1813 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1814 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1815 struct sensor_device_attribute *attr =
1816 &sda_sf3_max_step_arrays[i];
1817 if (data->REG_FAN_STEP_OUTPUT &&
1818 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1819 device_remove_file(dev, &attr->dev_attr);
1821 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
1822 device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
1823 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1824 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1825 for (i = 0; i < data->in_num; i++) {
1826 if ((i == 6) && data->in6_skip)
1828 device_remove_file(dev, &sda_in_input[i].dev_attr);
1829 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1830 device_remove_file(dev, &sda_in_min[i].dev_attr);
1831 device_remove_file(dev, &sda_in_max[i].dev_attr);
1833 for (i = 0; i < 5; i++) {
1834 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1835 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1836 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1837 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1839 for (i = 0; i < data->pwm_num; i++) {
1840 device_remove_file(dev, &sda_pwm[i].dev_attr);
1841 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1842 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1843 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1844 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1846 for (i = 0; i < NUM_REG_TEMP; i++) {
1847 if (!(data->have_temp & (1 << i)))
1849 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1850 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1851 if (i == 2 && data->temp3_val_only)
1853 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1854 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1857 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1858 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1859 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1862 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1863 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1865 device_remove_file(dev, &dev_attr_name);
1866 device_remove_file(dev, &dev_attr_cpu0_vid);
1869 /* Get the monitoring functions started */
1870 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1876 /* Start monitoring is needed */
1877 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1879 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1882 /* Enable temperature sensors if needed */
1883 for (i = 0; i < NUM_REG_TEMP; i++) {
1884 if (!(data->have_temp & (1 << i)))
1886 if (!data->reg_temp_config[i])
1888 tmp = w83627ehf_read_value(data,
1889 data->reg_temp_config[i]);
1891 w83627ehf_write_value(data,
1892 data->reg_temp_config[i],
1896 /* Enable VBAT monitoring if needed */
1897 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1899 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1901 /* Get thermal sensor types */
1904 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1912 for (i = 0; i < 3; i++) {
1913 const char *label = NULL;
1915 if (data->temp_label)
1916 label = data->temp_label[data->temp_src[i]];
1918 /* Digital source overrides analog type */
1919 if (label && strncmp(label, "PECI", 4) == 0)
1920 data->temp_type[i] = 6;
1921 else if (label && strncmp(label, "AMD", 3) == 0)
1922 data->temp_type[i] = 5;
1923 else if ((tmp & (0x02 << i)))
1924 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1926 data->temp_type[i] = 4; /* thermistor */
1930 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1933 swap(data->temp_src[r1], data->temp_src[r2]);
1934 swap(data->reg_temp[r1], data->reg_temp[r2]);
1935 swap(data->reg_temp_over[r1], data->reg_temp_over[r2]);
1936 swap(data->reg_temp_hyst[r1], data->reg_temp_hyst[r2]);
1937 swap(data->reg_temp_config[r1], data->reg_temp_config[r2]);
1941 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1945 for (i = 0; i < n_temp; i++) {
1946 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1947 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1948 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1949 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1954 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1955 struct w83627ehf_data *data)
1957 int fan3pin, fan4pin, fan4min, fan5pin, regval;
1959 /* The W83627UHG is simple, only two fan inputs, no config */
1960 if (sio_data->kind == w83627uhg) {
1961 data->has_fan = 0x03; /* fan1 and fan2 */
1962 data->has_fan_min = 0x03;
1966 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1967 if (sio_data->kind == nct6775) {
1968 /* On NCT6775, fan4 shares pins with the fdc interface */
1970 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1973 } else if (sio_data->kind == nct6776) {
1974 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1976 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1977 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1982 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1987 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
1992 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
1995 } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1997 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1998 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2002 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2003 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2007 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2008 data->has_fan |= (fan3pin << 2);
2009 data->has_fan_min |= (fan3pin << 2);
2011 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2013 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
2016 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2017 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2020 * It looks like fan4 and fan5 pins can be alternatively used
2021 * as fan on/off switches, but fan5 control is write only :/
2022 * We assume that if the serial interface is disabled, designers
2023 * connected fan5 as input unless they are emitting log 1, which
2024 * is not the default.
2026 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2027 if ((regval & (1 << 2)) && fan4pin) {
2028 data->has_fan |= (1 << 3);
2029 data->has_fan_min |= (1 << 3);
2031 if (!(regval & (1 << 1)) && fan5pin) {
2032 data->has_fan |= (1 << 4);
2033 data->has_fan_min |= (1 << 4);
2038 static int w83627ehf_probe(struct platform_device *pdev)
2040 struct device *dev = &pdev->dev;
2041 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2042 struct w83627ehf_data *data;
2043 struct resource *res;
2047 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2048 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
2050 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2051 (unsigned long)res->start,
2052 (unsigned long)res->start + IOREGION_LENGTH - 1);
2056 data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
2063 data->addr = res->start;
2064 mutex_init(&data->lock);
2065 mutex_init(&data->update_lock);
2066 data->name = w83627ehf_device_names[sio_data->kind];
2067 data->bank = 0xff; /* Force initial bank selection */
2068 platform_set_drvdata(pdev, data);
2070 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
2071 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
2072 /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
2073 switch (sio_data->kind) {
2088 /* Default to 3 temperature inputs, code below will adjust as needed */
2089 data->have_temp = 0x07;
2091 /* Deal with temperature register setup first. */
2092 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2096 * Display temperature sensor output only if it monitors
2097 * a source other than one already reported. Always display
2098 * first three temperature registers, though.
2100 for (i = 0; i < NUM_REG_TEMP; i++) {
2103 data->reg_temp[i] = NCT6775_REG_TEMP[i];
2104 data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
2105 data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
2106 data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
2108 src = w83627ehf_read_value(data,
2109 NCT6775_REG_TEMP_SOURCE[i]);
2111 if (src && !(mask & (1 << src))) {
2112 data->have_temp |= 1 << i;
2116 data->temp_src[i] = src;
2119 * Now do some register swapping if index 0..2 don't
2120 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2121 * Idea is to have the first three attributes
2122 * report SYSTIN, CPUIN, and AUXIN if possible
2123 * without overriding the basic system configuration.
2125 if (i > 0 && data->temp_src[0] != 1
2126 && data->temp_src[i] == 1)
2127 w82627ehf_swap_tempreg(data, 0, i);
2128 if (i > 1 && data->temp_src[1] != 2
2129 && data->temp_src[i] == 2)
2130 w82627ehf_swap_tempreg(data, 1, i);
2131 if (i > 2 && data->temp_src[2] != 3
2132 && data->temp_src[i] == 3)
2133 w82627ehf_swap_tempreg(data, 2, i);
2135 if (sio_data->kind == nct6776) {
2137 * On NCT6776, AUXTIN and VIN3 pins are shared.
2138 * Only way to detect it is to check if AUXTIN is used
2139 * as a temperature source, and if that source is
2142 * If that is the case, disable in6, which reports VIN3.
2143 * Otherwise disable temp3.
2145 if (data->temp_src[2] == 3) {
2148 if (data->reg_temp_config[2])
2149 reg = w83627ehf_read_value(data,
2150 data->reg_temp_config[2]);
2152 reg = 0; /* Assume AUXTIN is used */
2155 data->have_temp &= ~(1 << 2);
2159 data->temp_label = nct6776_temp_label;
2161 data->temp_label = nct6775_temp_label;
2163 data->have_temp_offset = data->have_temp & 0x07;
2164 for (i = 0; i < 3; i++) {
2165 if (data->temp_src[i] > 3)
2166 data->have_temp_offset &= ~(1 << i);
2168 } else if (sio_data->kind == w83667hg_b) {
2171 w83627ehf_set_temp_reg_ehf(data, 4);
2174 * Temperature sources are selected with bank 0, registers 0x49
2177 reg = w83627ehf_read_value(data, 0x4a);
2178 data->temp_src[0] = reg >> 5;
2179 reg = w83627ehf_read_value(data, 0x49);
2180 data->temp_src[1] = reg & 0x07;
2181 data->temp_src[2] = (reg >> 4) & 0x07;
2184 * W83667HG-B has another temperature register at 0x7e.
2185 * The temperature source is selected with register 0x7d.
2186 * Support it if the source differs from already reported
2189 reg = w83627ehf_read_value(data, 0x7d);
2191 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2192 && reg != data->temp_src[2]) {
2193 data->temp_src[3] = reg;
2194 data->have_temp |= 1 << 3;
2198 * Chip supports either AUXTIN or VIN3. Try to find out which
2201 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2202 if (data->temp_src[2] == 2 && (reg & 0x01))
2203 data->have_temp &= ~(1 << 2);
2205 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2206 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2209 data->temp_label = w83667hg_b_temp_label;
2210 data->have_temp_offset = data->have_temp & 0x07;
2211 for (i = 0; i < 3; i++) {
2212 if (data->temp_src[i] > 2)
2213 data->have_temp_offset &= ~(1 << i);
2215 } else if (sio_data->kind == w83627uhg) {
2218 w83627ehf_set_temp_reg_ehf(data, 3);
2221 * Temperature sources for temp2 and temp3 are selected with
2222 * bank 0, registers 0x49 and 0x4a.
2224 data->temp_src[0] = 0; /* SYSTIN */
2225 reg = w83627ehf_read_value(data, 0x49) & 0x07;
2226 /* Adjust to have the same mapping as other source registers */
2228 data->temp_src[1] = 1;
2229 else if (reg >= 2 && reg <= 5)
2230 data->temp_src[1] = reg + 2;
2231 else /* should never happen */
2232 data->have_temp &= ~(1 << 1);
2233 reg = w83627ehf_read_value(data, 0x4a);
2234 data->temp_src[2] = reg >> 5;
2237 * Skip temp3 if source is invalid or the same as temp1
2240 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
2241 data->temp_src[2] == data->temp_src[0] ||
2242 ((data->have_temp & (1 << 1)) &&
2243 data->temp_src[2] == data->temp_src[1]))
2244 data->have_temp &= ~(1 << 2);
2246 data->temp3_val_only = 1; /* No limit regs */
2248 data->in6_skip = 1; /* No VIN3 */
2250 data->temp_label = w83667hg_b_temp_label;
2251 data->have_temp_offset = data->have_temp & 0x03;
2252 for (i = 0; i < 3; i++) {
2253 if (data->temp_src[i] > 1)
2254 data->have_temp_offset &= ~(1 << i);
2257 w83627ehf_set_temp_reg_ehf(data, 3);
2259 /* Temperature sources are fixed */
2261 if (sio_data->kind == w83667hg) {
2265 * Chip supports either AUXTIN or VIN3. Try to find
2268 reg = w83627ehf_read_value(data,
2269 W83627EHF_REG_TEMP_CONFIG[2]);
2271 data->have_temp &= ~(1 << 2);
2275 data->have_temp_offset = data->have_temp & 0x07;
2278 if (sio_data->kind == nct6775) {
2279 data->has_fan_div = true;
2280 data->fan_from_reg = fan_from_reg16;
2281 data->fan_from_reg_min = fan_from_reg8;
2282 data->REG_PWM = NCT6775_REG_PWM;
2283 data->REG_TARGET = NCT6775_REG_TARGET;
2284 data->REG_FAN = NCT6775_REG_FAN;
2285 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2286 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2287 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2288 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2289 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2290 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2291 } else if (sio_data->kind == nct6776) {
2292 data->has_fan_div = false;
2293 data->fan_from_reg = fan_from_reg13;
2294 data->fan_from_reg_min = fan_from_reg13;
2295 data->REG_PWM = NCT6775_REG_PWM;
2296 data->REG_TARGET = NCT6775_REG_TARGET;
2297 data->REG_FAN = NCT6775_REG_FAN;
2298 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2299 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2300 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2301 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2302 } else if (sio_data->kind == w83667hg_b) {
2303 data->has_fan_div = true;
2304 data->fan_from_reg = fan_from_reg8;
2305 data->fan_from_reg_min = fan_from_reg8;
2306 data->REG_PWM = W83627EHF_REG_PWM;
2307 data->REG_TARGET = W83627EHF_REG_TARGET;
2308 data->REG_FAN = W83627EHF_REG_FAN;
2309 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2310 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2311 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2312 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2313 data->REG_FAN_MAX_OUTPUT =
2314 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2315 data->REG_FAN_STEP_OUTPUT =
2316 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2318 data->has_fan_div = true;
2319 data->fan_from_reg = fan_from_reg8;
2320 data->fan_from_reg_min = fan_from_reg8;
2321 data->REG_PWM = W83627EHF_REG_PWM;
2322 data->REG_TARGET = W83627EHF_REG_TARGET;
2323 data->REG_FAN = W83627EHF_REG_FAN;
2324 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2325 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2326 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2327 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2328 data->REG_FAN_MAX_OUTPUT =
2329 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2330 data->REG_FAN_STEP_OUTPUT =
2331 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2334 /* Setup input voltage scaling factors */
2335 if (sio_data->kind == w83627uhg)
2336 data->scale_in = scale_in_w83627uhg;
2338 data->scale_in = scale_in_common;
2340 /* Initialize the chip */
2341 w83627ehf_init_device(data, sio_data->kind);
2343 data->vrm = vid_which_vrm();
2345 err = superio_enter(sio_data->sioreg);
2349 /* Read VID value */
2350 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2351 sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2353 * W83667HG has different pins for VID input and output, so
2354 * we can get the VID input values directly at logical device D
2357 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2358 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2359 err = device_create_file(dev, &dev_attr_cpu0_vid);
2361 superio_exit(sio_data->sioreg);
2364 } else if (sio_data->kind != w83627uhg) {
2365 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2366 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2368 * Set VID input sensibility if needed. In theory the
2369 * BIOS should have set it, but in practice it's not
2370 * always the case. We only do it for the W83627EHF/EHG
2371 * because the W83627DHG is more complex in this
2374 if (sio_data->kind == w83627ehf) {
2375 en_vrm10 = superio_inb(sio_data->sioreg,
2377 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2379 "Setting VID input voltage to TTL\n");
2380 superio_outb(sio_data->sioreg,
2383 } else if (!(en_vrm10 & 0x08)
2384 && data->vrm == 100) {
2386 "Setting VID input voltage to VRM10\n");
2387 superio_outb(sio_data->sioreg,
2393 data->vid = superio_inb(sio_data->sioreg,
2395 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2398 err = device_create_file(dev, &dev_attr_cpu0_vid);
2400 superio_exit(sio_data->sioreg);
2405 "VID pins in output mode, CPU VID not available\n");
2410 (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2413 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2414 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2415 if (sio_data->kind == nct6776)
2416 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2419 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2421 pr_info("Enabled fan debounce for chip %s\n", data->name);
2424 w83627ehf_check_fan_inputs(sio_data, data);
2426 superio_exit(sio_data->sioreg);
2428 /* Read fan clock dividers immediately */
2429 w83627ehf_update_fan_div_common(dev, data);
2431 /* Read pwm data to save original values */
2432 w83627ehf_update_pwm_common(dev, data);
2433 for (i = 0; i < data->pwm_num; i++)
2434 data->pwm_enable_orig[i] = data->pwm_enable[i];
2436 /* Register sysfs hooks */
2437 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2438 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2443 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2444 struct sensor_device_attribute *attr =
2445 &sda_sf3_max_step_arrays[i];
2446 if (data->REG_FAN_STEP_OUTPUT &&
2447 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2448 err = device_create_file(dev, &attr->dev_attr);
2453 /* if fan3 and fan4 are enabled create the sf3 files for them */
2454 if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
2455 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
2456 err = device_create_file(dev,
2457 &sda_sf3_arrays_fan3[i].dev_attr);
2461 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2462 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2463 err = device_create_file(dev,
2464 &sda_sf3_arrays_fan4[i].dev_attr);
2469 for (i = 0; i < data->in_num; i++) {
2470 if ((i == 6) && data->in6_skip)
2472 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2473 || (err = device_create_file(dev,
2474 &sda_in_alarm[i].dev_attr))
2475 || (err = device_create_file(dev,
2476 &sda_in_min[i].dev_attr))
2477 || (err = device_create_file(dev,
2478 &sda_in_max[i].dev_attr)))
2482 for (i = 0; i < 5; i++) {
2483 if (data->has_fan & (1 << i)) {
2484 if ((err = device_create_file(dev,
2485 &sda_fan_input[i].dev_attr))
2486 || (err = device_create_file(dev,
2487 &sda_fan_alarm[i].dev_attr)))
2489 if (sio_data->kind != nct6776) {
2490 err = device_create_file(dev,
2491 &sda_fan_div[i].dev_attr);
2495 if (data->has_fan_min & (1 << i)) {
2496 err = device_create_file(dev,
2497 &sda_fan_min[i].dev_attr);
2501 if (i < data->pwm_num &&
2502 ((err = device_create_file(dev,
2503 &sda_pwm[i].dev_attr))
2504 || (err = device_create_file(dev,
2505 &sda_pwm_mode[i].dev_attr))
2506 || (err = device_create_file(dev,
2507 &sda_pwm_enable[i].dev_attr))
2508 || (err = device_create_file(dev,
2509 &sda_target_temp[i].dev_attr))
2510 || (err = device_create_file(dev,
2511 &sda_tolerance[i].dev_attr))))
2516 for (i = 0; i < NUM_REG_TEMP; i++) {
2517 if (!(data->have_temp & (1 << i)))
2519 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2522 if (data->temp_label) {
2523 err = device_create_file(dev,
2524 &sda_temp_label[i].dev_attr);
2528 if (i == 2 && data->temp3_val_only)
2530 if (data->reg_temp_over[i]) {
2531 err = device_create_file(dev,
2532 &sda_temp_max[i].dev_attr);
2536 if (data->reg_temp_hyst[i]) {
2537 err = device_create_file(dev,
2538 &sda_temp_max_hyst[i].dev_attr);
2544 if ((err = device_create_file(dev,
2545 &sda_temp_alarm[i].dev_attr))
2546 || (err = device_create_file(dev,
2547 &sda_temp_type[i].dev_attr)))
2549 if (data->have_temp_offset & (1 << i)) {
2550 err = device_create_file(dev,
2551 &sda_temp_offset[i].dev_attr);
2557 err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2561 if (sio_data->kind == nct6776) {
2562 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2567 err = device_create_file(dev, &dev_attr_name);
2571 data->hwmon_dev = hwmon_device_register(dev);
2572 if (IS_ERR(data->hwmon_dev)) {
2573 err = PTR_ERR(data->hwmon_dev);
2580 w83627ehf_device_remove_files(dev);
2582 release_region(res->start, IOREGION_LENGTH);
2587 static int w83627ehf_remove(struct platform_device *pdev)
2589 struct w83627ehf_data *data = platform_get_drvdata(pdev);
2591 hwmon_device_unregister(data->hwmon_dev);
2592 w83627ehf_device_remove_files(&pdev->dev);
2593 release_region(data->addr, IOREGION_LENGTH);
2599 static int w83627ehf_suspend(struct device *dev)
2601 struct w83627ehf_data *data = w83627ehf_update_device(dev);
2602 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2604 mutex_lock(&data->update_lock);
2605 data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
2606 if (sio_data->kind == nct6775) {
2607 data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
2608 data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
2610 mutex_unlock(&data->update_lock);
2615 static int w83627ehf_resume(struct device *dev)
2617 struct w83627ehf_data *data = dev_get_drvdata(dev);
2618 struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
2621 mutex_lock(&data->update_lock);
2622 data->bank = 0xff; /* Force initial bank selection */
2624 /* Restore limits */
2625 for (i = 0; i < data->in_num; i++) {
2626 if ((i == 6) && data->in6_skip)
2629 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
2631 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
2635 for (i = 0; i < 5; i++) {
2636 if (!(data->has_fan_min & (1 << i)))
2639 w83627ehf_write_value(data, data->REG_FAN_MIN[i],
2643 for (i = 0; i < NUM_REG_TEMP; i++) {
2644 if (!(data->have_temp & (1 << i)))
2647 if (data->reg_temp_over[i])
2648 w83627ehf_write_temp(data, data->reg_temp_over[i],
2650 if (data->reg_temp_hyst[i])
2651 w83627ehf_write_temp(data, data->reg_temp_hyst[i],
2652 data->temp_max_hyst[i]);
2655 if (data->have_temp_offset & (1 << i))
2656 w83627ehf_write_value(data,
2657 W83627EHF_REG_TEMP_OFFSET[i],
2658 data->temp_offset[i]);
2661 /* Restore other settings */
2662 w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2663 if (sio_data->kind == nct6775) {
2664 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
2665 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
2668 /* Force re-reading all values */
2670 mutex_unlock(&data->update_lock);
2675 static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
2676 .suspend = w83627ehf_suspend,
2677 .resume = w83627ehf_resume,
2678 .freeze = w83627ehf_suspend,
2679 .restore = w83627ehf_resume,
2682 #define W83627EHF_DEV_PM_OPS (&w83627ehf_dev_pm_ops)
2684 #define W83627EHF_DEV_PM_OPS NULL
2685 #endif /* CONFIG_PM */
2687 static struct platform_driver w83627ehf_driver = {
2690 .pm = W83627EHF_DEV_PM_OPS,
2692 .probe = w83627ehf_probe,
2693 .remove = w83627ehf_remove,
2696 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2697 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2698 struct w83627ehf_sio_data *sio_data)
2700 static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
2701 static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
2702 static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
2703 static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
2704 static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
2705 static const char sio_name_W83667HG[] __initconst = "W83667HG";
2706 static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
2707 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2708 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2711 const char *sio_name;
2714 err = superio_enter(sioaddr);
2721 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2722 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2723 switch (val & SIO_ID_MASK) {
2724 case SIO_W83627EHF_ID:
2725 sio_data->kind = w83627ehf;
2726 sio_name = sio_name_W83627EHF;
2728 case SIO_W83627EHG_ID:
2729 sio_data->kind = w83627ehf;
2730 sio_name = sio_name_W83627EHG;
2732 case SIO_W83627DHG_ID:
2733 sio_data->kind = w83627dhg;
2734 sio_name = sio_name_W83627DHG;
2736 case SIO_W83627DHG_P_ID:
2737 sio_data->kind = w83627dhg_p;
2738 sio_name = sio_name_W83627DHG_P;
2740 case SIO_W83627UHG_ID:
2741 sio_data->kind = w83627uhg;
2742 sio_name = sio_name_W83627UHG;
2744 case SIO_W83667HG_ID:
2745 sio_data->kind = w83667hg;
2746 sio_name = sio_name_W83667HG;
2748 case SIO_W83667HG_B_ID:
2749 sio_data->kind = w83667hg_b;
2750 sio_name = sio_name_W83667HG_B;
2752 case SIO_NCT6775_ID:
2753 sio_data->kind = nct6775;
2754 sio_name = sio_name_NCT6775;
2756 case SIO_NCT6776_ID:
2757 sio_data->kind = nct6776;
2758 sio_name = sio_name_NCT6776;
2762 pr_debug("unsupported chip ID: 0x%04x\n", val);
2763 superio_exit(sioaddr);
2767 /* We have a known chip, find the HWM I/O address */
2768 superio_select(sioaddr, W83627EHF_LD_HWM);
2769 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2770 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2771 *addr = val & IOREGION_ALIGNMENT;
2773 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2774 superio_exit(sioaddr);
2778 /* Activate logical device if needed */
2779 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2780 if (!(val & 0x01)) {
2781 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2782 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2785 superio_exit(sioaddr);
2786 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2787 sio_data->sioreg = sioaddr;
2793 * when Super-I/O functions move to a separate file, the Super-I/O
2794 * bus will manage the lifetime of the device and this module will only keep
2795 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2796 * must keep track of the device
2798 static struct platform_device *pdev;
2800 static int __init sensors_w83627ehf_init(void)
2803 unsigned short address;
2804 struct resource res;
2805 struct w83627ehf_sio_data sio_data;
2808 * initialize sio_data->kind and sio_data->sioreg.
2810 * when Super-I/O functions move to a separate file, the Super-I/O
2811 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2812 * w83627ehf hardware monitor, and call probe()
2814 if (w83627ehf_find(0x2e, &address, &sio_data) &&
2815 w83627ehf_find(0x4e, &address, &sio_data))
2818 err = platform_driver_register(&w83627ehf_driver);
2822 pdev = platform_device_alloc(DRVNAME, address);
2825 pr_err("Device allocation failed\n");
2826 goto exit_unregister;
2829 err = platform_device_add_data(pdev, &sio_data,
2830 sizeof(struct w83627ehf_sio_data));
2832 pr_err("Platform data allocation failed\n");
2833 goto exit_device_put;
2836 memset(&res, 0, sizeof(res));
2838 res.start = address + IOREGION_OFFSET;
2839 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2840 res.flags = IORESOURCE_IO;
2842 err = acpi_check_resource_conflict(&res);
2844 goto exit_device_put;
2846 err = platform_device_add_resources(pdev, &res, 1);
2848 pr_err("Device resource addition failed (%d)\n", err);
2849 goto exit_device_put;
2852 /* platform_device_add calls probe() */
2853 err = platform_device_add(pdev);
2855 pr_err("Device addition failed (%d)\n", err);
2856 goto exit_device_put;
2862 platform_device_put(pdev);
2864 platform_driver_unregister(&w83627ehf_driver);
2869 static void __exit sensors_w83627ehf_exit(void)
2871 platform_device_unregister(pdev);
2872 platform_driver_unregister(&w83627ehf_driver);
2875 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2876 MODULE_DESCRIPTION("W83627EHF driver");
2877 MODULE_LICENSE("GPL");
2879 module_init(sensors_w83627ehf_init);
2880 module_exit(sensors_w83627ehf_exit);