drivers/hwmon/nct6775.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * nct6775 - Driver for the hardware monitoring functionality of
   4  *             Nuvoton NCT677x Super-I/O chips
   5  *
   6  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   7  *
   8  * Derived from w83627ehf driver
   9  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
  10  * Copyright (C) 2006  Yuan Mu (Winbond),
  11  *                     Rudolf Marek <r.marek@assembler.cz>
  12  *                     David Hubbard <david.c.hubbard@gmail.com>
  13  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  14  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  15  *
  16  * Shamelessly ripped from the w83627hf driver
  17  * Copyright (C) 2003  Mark Studebaker
  18  *
  19  * Supports the following chips:
  20  *
  21  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  22  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  23  * nct6116d     9      5       5       3+3    0xd280 0xc1    0x5ca3
  24  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  25  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  26  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  27  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  28  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  29  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  30  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
  31  * nct6796d    14      7       7       2+6    0xd420 0xc1    0x5ca3
  32  * nct6797d    14      7       7       2+6    0xd450 0xc1    0x5ca3
  33  *                                           (0xd451)
  34  * nct6798d    14      7       7       2+6    0xd428 0xc1    0x5ca3
  35  *                                           (0xd429)
  36  *
  37  * #temp lists the number of monitored temperature sources (first value) plus
  38  * the number of directly connectable temperature sensors (second value).
  39  */
  40
  41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  42
  43 #include <linux/module.h>
  44 #include <linux/init.h>
  45 #include <linux/slab.h>
  46 #include <linux/jiffies.h>
  47 #include <linux/platform_device.h>
  48 #include <linux/hwmon.h>
  49 #include <linux/hwmon-sysfs.h>
  50 #include <linux/hwmon-vid.h>
  51 #include <linux/err.h>
  52 #include <linux/mutex.h>
  53 #include <linux/acpi.h>
  54 #include <linux/bitops.h>
  55 #include <linux/dmi.h>
  56 #include <linux/io.h>
  57 #include <linux/nospec.h>
  58 #include <linux/regmap.h>
  59 #include <linux/wmi.h>
  60 #include "lm75.h"
  61
  62 #define USE_ALTERNATE
  63
  64 enum kinds { nct6106, nct6116, nct6775, nct6776, nct6779, nct6791, nct6792,
  65              nct6793, nct6795, nct6796, nct6797, nct6798 };
  66
  67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  68 static const char * const nct6775_device_names[] = {
  69         "nct6106",
  70         "nct6116",
  71         "nct6775",
  72         "nct6776",
  73         "nct6779",
  74         "nct6791",
  75         "nct6792",
  76         "nct6793",
  77         "nct6795",
  78         "nct6796",
  79         "nct6797",
  80         "nct6798",
  81 };
  82
  83 static const char * const nct6775_sio_names[] __initconst = {
  84         "NCT6106D",
  85         "NCT6116D",
  86         "NCT6775F",
  87         "NCT6776D/F",
  88         "NCT6779D",
  89         "NCT6791D",
  90         "NCT6792D",
  91         "NCT6793D",
  92         "NCT6795D",
  93         "NCT6796D",
  94         "NCT6797D",
  95         "NCT6798D",
  96 };
  97
  98 static unsigned short force_id;
  99 module_param(force_id, ushort, 0);
 100 MODULE_PARM_DESC(force_id, "Override the detected device ID");
 101
 102 static unsigned short fan_debounce;
 103 module_param(fan_debounce, ushort, 0);
 104 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 105
 106 #define DRVNAME "nct6775"
 107
 108 /*
 109  * Super-I/O constants and functions
 110  */
 111
 112 #define NCT6775_LD_ACPI         0x0a
 113 #define NCT6775_LD_HWM          0x0b
 114 #define NCT6775_LD_VID          0x0d
 115 #define NCT6775_LD_12           0x12
 116
 117 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 118 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 119 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 120 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 121
 122 #define SIO_NCT6106_ID          0xc450
 123 #define SIO_NCT6116_ID          0xd280
 124 #define SIO_NCT6775_ID          0xb470
 125 #define SIO_NCT6776_ID          0xc330
 126 #define SIO_NCT6779_ID          0xc560
 127 #define SIO_NCT6791_ID          0xc800
 128 #define SIO_NCT6792_ID          0xc910
 129 #define SIO_NCT6793_ID          0xd120
 130 #define SIO_NCT6795_ID          0xd350
 131 #define SIO_NCT6796_ID          0xd420
 132 #define SIO_NCT6797_ID          0xd450
 133 #define SIO_NCT6798_ID          0xd428
 134 #define SIO_ID_MASK             0xFFF8
 135
 136 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 137 enum sensor_access { access_direct, access_asuswmi };
 138
 139 struct nct6775_sio_data {
 140         int sioreg;
 141         int ld;
 142         enum kinds kind;
 143         enum sensor_access access;
 144
 145         /* superio_() callbacks  */
 146         void (*sio_outb)(struct nct6775_sio_data *sio_data, int reg, int val);
 147         int (*sio_inb)(struct nct6775_sio_data *sio_data, int reg);
 148         void (*sio_select)(struct nct6775_sio_data *sio_data, int ld);
 149         int (*sio_enter)(struct nct6775_sio_data *sio_data);
 150         void (*sio_exit)(struct nct6775_sio_data *sio_data);
 151 };
 152
 153 #define ASUSWMI_MONITORING_GUID         "466747A0-70EC-11DE-8A39-0800200C9A66"
 154 #define ASUSWMI_METHODID_RSIO           0x5253494F
 155 #define ASUSWMI_METHODID_WSIO           0x5753494F
 156 #define ASUSWMI_METHODID_RHWM           0x5248574D
 157 #define ASUSWMI_METHODID_WHWM           0x5748574D
 158 #define ASUSWMI_UNSUPPORTED_METHOD      0xFFFFFFFE
 159
 160 static int nct6775_asuswmi_evaluate_method(u32 method_id, u8 bank, u8 reg, u8 val, u32 *retval)
 161 {
 162 #if IS_ENABLED(CONFIG_ACPI_WMI)
 163         u32 args = bank | (reg << 8) | (val << 16);
 164         struct acpi_buffer input = { (acpi_size) sizeof(args), &args };
 165         struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
 166         acpi_status status;
 167         union acpi_object *obj;
 168         u32 tmp = ASUSWMI_UNSUPPORTED_METHOD;
 169
 170         status = wmi_evaluate_method(ASUSWMI_MONITORING_GUID, 0,
 171                                      method_id, &input, &output);
 172
 173         if (ACPI_FAILURE(status))
 174                 return -EIO;
 175
 176         obj = output.pointer;
 177         if (obj && obj->type == ACPI_TYPE_INTEGER)
 178                 tmp = obj->integer.value;
 179
 180         if (retval)
 181                 *retval = tmp;
 182
 183         kfree(obj);
 184
 185         if (tmp == ASUSWMI_UNSUPPORTED_METHOD)
 186                 return -ENODEV;
 187         return 0;
 188 #else
 189         return -EOPNOTSUPP;
 190 #endif
 191 }
 192
 193 static inline int nct6775_asuswmi_write(u8 bank, u8 reg, u8 val)
 194 {
 195         return nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WHWM, bank,
 196                                               reg, val, NULL);
 197 }
 198
 199 static inline int nct6775_asuswmi_read(u8 bank, u8 reg, u8 *val)
 200 {
 201         u32 ret, tmp = 0;
 202
 203         ret = nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RHWM, bank,
 204                                               reg, 0, &tmp);
 205         *val = tmp;
 206         return ret;
 207 }
 208
 209 static int superio_wmi_inb(struct nct6775_sio_data *sio_data, int reg)
 210 {
 211         int tmp = 0;
 212
 213         nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RSIO, sio_data->ld,
 214                                         reg, 0, &tmp);
 215         return tmp;
 216 }
 217
 218 static void superio_wmi_outb(struct nct6775_sio_data *sio_data, int reg, int val)
 219 {
 220         nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WSIO, sio_data->ld,
 221                                         reg, val, NULL);
 222 }
 223
 224 static void superio_wmi_select(struct nct6775_sio_data *sio_data, int ld)
 225 {
 226         sio_data->ld = ld;
 227 }
 228
 229 static int superio_wmi_enter(struct nct6775_sio_data *sio_data)
 230 {
 231         return 0;
 232 }
 233
 234 static void superio_wmi_exit(struct nct6775_sio_data *sio_data)
 235 {
 236 }
 237
 238 static void superio_outb(struct nct6775_sio_data *sio_data, int reg, int val)
 239 {
 240         int ioreg = sio_data->sioreg;
 241
 242         outb(reg, ioreg);
 243         outb(val, ioreg + 1);
 244 }
 245
 246 static int superio_inb(struct nct6775_sio_data *sio_data, int reg)
 247 {
 248         int ioreg = sio_data->sioreg;
 249
 250         outb(reg, ioreg);
 251         return inb(ioreg + 1);
 252 }
 253
 254 static void superio_select(struct nct6775_sio_data *sio_data, int ld)
 255 {
 256         int ioreg = sio_data->sioreg;
 257
 258         outb(SIO_REG_LDSEL, ioreg);
 259         outb(ld, ioreg + 1);
 260 }
 261
 262 static int superio_enter(struct nct6775_sio_data *sio_data)
 263 {
 264         int ioreg = sio_data->sioreg;
 265
 266         /*
 267          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 268          */
 269         if (!request_muxed_region(ioreg, 2, DRVNAME))
 270                 return -EBUSY;
 271
 272         outb(0x87, ioreg);
 273         outb(0x87, ioreg);
 274
 275         return 0;
 276 }
 277
 278 static void superio_exit(struct nct6775_sio_data *sio_data)
 279 {
 280         int ioreg = sio_data->sioreg;
 281
 282         outb(0xaa, ioreg);
 283         outb(0x02, ioreg);
 284         outb(0x02, ioreg + 1);
 285         release_region(ioreg, 2);
 286 }
 287
 288 /*
 289  * ISA constants
 290  */
 291
 292 #define IOREGION_ALIGNMENT      (~7)
 293 #define IOREGION_OFFSET         5
 294 #define IOREGION_LENGTH         2
 295 #define ADDR_REG_OFFSET         0
 296 #define DATA_REG_OFFSET         1
 297
 298 #define NCT6775_REG_BANK        0x4E
 299 #define NCT6775_REG_CONFIG      0x40
 300 #define NCT6775_PORT_CHIPID     0x58
 301
 302 /*
 303  * Not currently used:
 304  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 305  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 306  * REG_MAN_ID is at port 0x4f
 307  * REG_CHIP_ID is at port 0x58
 308  */
 309
 310 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 311 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 312 #define NUM_TSI_TEMP    8       /* Max number of TSI temp register pairs */
 313
 314 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 315 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 316
 317 #define NUM_FAN         7
 318
 319 /* Common and NCT6775 specific data */
 320
 321 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 322
 323 static const u16 NCT6775_REG_IN_MAX[] = {
 324         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 325         0x55c, 0x55e, 0x560, 0x562 };
 326 static const u16 NCT6775_REG_IN_MIN[] = {
 327         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 328         0x55d, 0x55f, 0x561, 0x563 };
 329 static const u16 NCT6775_REG_IN[] = {
 330         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 331 };
 332
 333 #define NCT6775_REG_VBAT                0x5D
 334 #define NCT6775_REG_DIODE               0x5E
 335 #define NCT6775_DIODE_MASK              0x02
 336
 337 #define NCT6775_REG_FANDIV1             0x506
 338 #define NCT6775_REG_FANDIV2             0x507
 339
 340 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 341
 342 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 343
 344 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 345
 346 static const s8 NCT6775_ALARM_BITS[] = {
 347         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 348         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 349         -1,                             /* unused */
 350         6, 7, 11, -1, -1,               /* fan1..fan5 */
 351         -1, -1, -1,                     /* unused */
 352         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 353         12, -1 };                       /* intrusion0, intrusion1 */
 354
 355 #define FAN_ALARM_BASE          16
 356 #define TEMP_ALARM_BASE         24
 357 #define INTRUSION_ALARM_BASE    30
 358
 359 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 360
 361 /*
 362  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 363  * 30..31 intrusion
 364  */
 365 static const s8 NCT6775_BEEP_BITS[] = {
 366         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 367         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 368         21,                             /* global beep enable */
 369         6, 7, 11, 28, -1,               /* fan1..fan5 */
 370         -1, -1, -1,                     /* unused */
 371         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 372         12, -1 };                       /* intrusion0, intrusion1 */
 373
 374 #define BEEP_ENABLE_BASE                15
 375
 376 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 377 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 378
 379 /* DC or PWM output fan configuration */
 380 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 381 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 382
 383 /* Advanced Fan control, some values are common for all fans */
 384
 385 static const u16 NCT6775_REG_TARGET[] = {
 386         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
 387 static const u16 NCT6775_REG_FAN_MODE[] = {
 388         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
 389 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 390         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
 391 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 392         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
 393 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 394         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
 395 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 396         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
 397 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 398 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 399
 400 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 401         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
 402 static const u16 NCT6775_REG_PWM[] = {
 403         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
 404 static const u16 NCT6775_REG_PWM_READ[] = {
 405         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
 406
 407 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 408 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 409 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
 410         0x641, 0x642, 0x643, 0x644 };
 411 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
 412
 413 static const u16 NCT6775_REG_TEMP[] = {
 414         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 415
 416 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 417
 418 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 419         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 420 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 421         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 422 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 423         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 424
 425 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 426         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 427
 428 static const u16 NCT6775_REG_TEMP_SEL[] = {
 429         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
 430
 431 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 432         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 433 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 434         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 435 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 436         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 437 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 438         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 439 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 440         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 441
 442 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 443
 444 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 445         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
 446 static const u16 NCT6775_REG_AUTO_PWM[] = {
 447         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
 448
 449 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 450 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 451
 452 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 453
 454 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 455         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
 456 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 457         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
 458
 459 static const char *const nct6775_temp_label[] = {
 460         "",
 461         "SYSTIN",
 462         "CPUTIN",
 463         "AUXTIN",
 464         "AMD SB-TSI",
 465         "PECI Agent 0",
 466         "PECI Agent 1",
 467         "PECI Agent 2",
 468         "PECI Agent 3",
 469         "PECI Agent 4",
 470         "PECI Agent 5",
 471         "PECI Agent 6",
 472         "PECI Agent 7",
 473         "PCH_CHIP_CPU_MAX_TEMP",
 474         "PCH_CHIP_TEMP",
 475         "PCH_CPU_TEMP",
 476         "PCH_MCH_TEMP",
 477         "PCH_DIM0_TEMP",
 478         "PCH_DIM1_TEMP",
 479         "PCH_DIM2_TEMP",
 480         "PCH_DIM3_TEMP"
 481 };
 482
 483 #define NCT6775_TEMP_MASK       0x001ffffe
 484 #define NCT6775_VIRT_TEMP_MASK  0x00000000
 485
 486 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 487         [13] = 0x661,
 488         [14] = 0x662,
 489         [15] = 0x664,
 490 };
 491
 492 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
 493         [4] = 0xa00,
 494         [5] = 0xa01,
 495         [6] = 0xa02,
 496         [7] = 0xa03,
 497         [8] = 0xa04,
 498         [9] = 0xa05,
 499         [10] = 0xa06,
 500         [11] = 0xa07
 501 };
 502
 503 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
 504
 505 /* NCT6776 specific data */
 506
 507 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 508 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 509 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 510
 511 static const s8 NCT6776_ALARM_BITS[] = {
 512         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 513         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 514         -1,                             /* unused */
 515         6, 7, 11, 10, 23,               /* fan1..fan5 */
 516         -1, -1, -1,                     /* unused */
 517         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 518         12, 9 };                        /* intrusion0, intrusion1 */
 519
 520 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 521
 522 static const s8 NCT6776_BEEP_BITS[] = {
 523         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 524         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 525         24,                             /* global beep enable */
 526         25, 26, 27, 28, 29,             /* fan1..fan5 */
 527         -1, -1, -1,                     /* unused */
 528         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 529         30, 31 };                       /* intrusion0, intrusion1 */
 530
 531 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 532         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
 533
 534 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 535 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 536
 537 static const u16 NCT6776_REG_FAN_MIN[] = {
 538         0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
 539 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
 540         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 541
 542 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 543         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 544
 545 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 546         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 547
 548 static const char *const nct6776_temp_label[] = {
 549         "",
 550         "SYSTIN",
 551         "CPUTIN",
 552         "AUXTIN",
 553         "SMBUSMASTER 0",
 554         "SMBUSMASTER 1",
 555         "SMBUSMASTER 2",
 556         "SMBUSMASTER 3",
 557         "SMBUSMASTER 4",
 558         "SMBUSMASTER 5",
 559         "SMBUSMASTER 6",
 560         "SMBUSMASTER 7",
 561         "PECI Agent 0",
 562         "PECI Agent 1",
 563         "PCH_CHIP_CPU_MAX_TEMP",
 564         "PCH_CHIP_TEMP",
 565         "PCH_CPU_TEMP",
 566         "PCH_MCH_TEMP",
 567         "PCH_DIM0_TEMP",
 568         "PCH_DIM1_TEMP",
 569         "PCH_DIM2_TEMP",
 570         "PCH_DIM3_TEMP",
 571         "BYTE_TEMP"
 572 };
 573
 574 #define NCT6776_TEMP_MASK       0x007ffffe
 575 #define NCT6776_VIRT_TEMP_MASK  0x00000000
 576
 577 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 578         [14] = 0x401,
 579         [15] = 0x402,
 580         [16] = 0x404,
 581 };
 582
 583 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 584         [11] = 0x709,
 585         [12] = 0x70a,
 586 };
 587
 588 static const u16 NCT6776_REG_TSI_TEMP[] = {
 589         0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
 590
 591 /* NCT6779 specific data */
 592
 593 static const u16 NCT6779_REG_IN[] = {
 594         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 595         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 596
 597 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 598         0x459, 0x45A, 0x45B, 0x568 };
 599
 600 static const s8 NCT6779_ALARM_BITS[] = {
 601         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 602         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 603         -1,                             /* unused */
 604         6, 7, 11, 10, 23,               /* fan1..fan5 */
 605         -1, -1, -1,                     /* unused */
 606         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 607         12, 9 };                        /* intrusion0, intrusion1 */
 608
 609 static const s8 NCT6779_BEEP_BITS[] = {
 610         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 611         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 612         24,                             /* global beep enable */
 613         25, 26, 27, 28, 29,             /* fan1..fan5 */
 614         -1, -1, -1,                     /* unused */
 615         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 616         30, 31 };                       /* intrusion0, intrusion1 */
 617
 618 static const u16 NCT6779_REG_FAN[] = {
 619         0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
 620 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
 621         0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
 622
 623 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 624         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
 625 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 626 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 627         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
 628
 629 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 630 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 631 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 632         0x18, 0x152 };
 633 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 634         0x3a, 0x153 };
 635 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 636         0x39, 0x155 };
 637
 638 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 639         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 640
 641 static const char *const nct6779_temp_label[] = {
 642         "",
 643         "SYSTIN",
 644         "CPUTIN",
 645         "AUXTIN0",
 646         "AUXTIN1",
 647         "AUXTIN2",
 648         "AUXTIN3",
 649         "",
 650         "SMBUSMASTER 0",
 651         "SMBUSMASTER 1",
 652         "SMBUSMASTER 2",
 653         "SMBUSMASTER 3",
 654         "SMBUSMASTER 4",
 655         "SMBUSMASTER 5",
 656         "SMBUSMASTER 6",
 657         "SMBUSMASTER 7",
 658         "PECI Agent 0",
 659         "PECI Agent 1",
 660         "PCH_CHIP_CPU_MAX_TEMP",
 661         "PCH_CHIP_TEMP",
 662         "PCH_CPU_TEMP",
 663         "PCH_MCH_TEMP",
 664         "PCH_DIM0_TEMP",
 665         "PCH_DIM1_TEMP",
 666         "PCH_DIM2_TEMP",
 667         "PCH_DIM3_TEMP",
 668         "BYTE_TEMP",
 669         "",
 670         "",
 671         "",
 672         "",
 673         "Virtual_TEMP"
 674 };
 675
 676 #define NCT6779_TEMP_MASK       0x07ffff7e
 677 #define NCT6779_VIRT_TEMP_MASK  0x00000000
 678 #define NCT6791_TEMP_MASK       0x87ffff7e
 679 #define NCT6791_VIRT_TEMP_MASK  0x80000000
 680
 681 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 682         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 683             0, 0, 0, 0, 0, 0, 0, 0,
 684             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 685             0x408, 0 };
 686
 687 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 688         [15] = 0x709,
 689         [16] = 0x70a,
 690 };
 691
 692 /* NCT6791 specific data */
 693
 694 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 695
 696 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
 697 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
 698 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
 699 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
 700 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
 701 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
 702
 703 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 704         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 705
 706 static const s8 NCT6791_ALARM_BITS[] = {
 707         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 708         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 709         -1,                             /* unused */
 710         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 711         -1, -1,                         /* unused */
 712         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 713         12, 9 };                        /* intrusion0, intrusion1 */
 714
 715 /* NCT6792/NCT6793 specific data */
 716
 717 static const u16 NCT6792_REG_TEMP_MON[] = {
 718         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 719 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 720         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 721
 722 static const char *const nct6792_temp_label[] = {
 723         "",
 724         "SYSTIN",
 725         "CPUTIN",
 726         "AUXTIN0",
 727         "AUXTIN1",
 728         "AUXTIN2",
 729         "AUXTIN3",
 730         "",
 731         "SMBUSMASTER 0",
 732         "SMBUSMASTER 1",
 733         "SMBUSMASTER 2",
 734         "SMBUSMASTER 3",
 735         "SMBUSMASTER 4",
 736         "SMBUSMASTER 5",
 737         "SMBUSMASTER 6",
 738         "SMBUSMASTER 7",
 739         "PECI Agent 0",
 740         "PECI Agent 1",
 741         "PCH_CHIP_CPU_MAX_TEMP",
 742         "PCH_CHIP_TEMP",
 743         "PCH_CPU_TEMP",
 744         "PCH_MCH_TEMP",
 745         "PCH_DIM0_TEMP",
 746         "PCH_DIM1_TEMP",
 747         "PCH_DIM2_TEMP",
 748         "PCH_DIM3_TEMP",
 749         "BYTE_TEMP",
 750         "PECI Agent 0 Calibration",
 751         "PECI Agent 1 Calibration",
 752         "",
 753         "",
 754         "Virtual_TEMP"
 755 };
 756
 757 #define NCT6792_TEMP_MASK       0x9fffff7e
 758 #define NCT6792_VIRT_TEMP_MASK  0x80000000
 759
 760 static const char *const nct6793_temp_label[] = {
 761         "",
 762         "SYSTIN",
 763         "CPUTIN",
 764         "AUXTIN0",
 765         "AUXTIN1",
 766         "AUXTIN2",
 767         "AUXTIN3",
 768         "",
 769         "SMBUSMASTER 0",
 770         "SMBUSMASTER 1",
 771         "",
 772         "",
 773         "",
 774         "",
 775         "",
 776         "",
 777         "PECI Agent 0",
 778         "PECI Agent 1",
 779         "PCH_CHIP_CPU_MAX_TEMP",
 780         "PCH_CHIP_TEMP",
 781         "PCH_CPU_TEMP",
 782         "PCH_MCH_TEMP",
 783         "Agent0 Dimm0 ",
 784         "Agent0 Dimm1",
 785         "Agent1 Dimm0",
 786         "Agent1 Dimm1",
 787         "BYTE_TEMP0",
 788         "BYTE_TEMP1",
 789         "PECI Agent 0 Calibration",
 790         "PECI Agent 1 Calibration",
 791         "",
 792         "Virtual_TEMP"
 793 };
 794
 795 #define NCT6793_TEMP_MASK       0xbfff037e
 796 #define NCT6793_VIRT_TEMP_MASK  0x80000000
 797
 798 static const char *const nct6795_temp_label[] = {
 799         "",
 800         "SYSTIN",
 801         "CPUTIN",
 802         "AUXTIN0",
 803         "AUXTIN1",
 804         "AUXTIN2",
 805         "AUXTIN3",
 806         "",
 807         "SMBUSMASTER 0",
 808         "SMBUSMASTER 1",
 809         "SMBUSMASTER 2",
 810         "SMBUSMASTER 3",
 811         "SMBUSMASTER 4",
 812         "SMBUSMASTER 5",
 813         "SMBUSMASTER 6",
 814         "SMBUSMASTER 7",
 815         "PECI Agent 0",
 816         "PECI Agent 1",
 817         "PCH_CHIP_CPU_MAX_TEMP",
 818         "PCH_CHIP_TEMP",
 819         "PCH_CPU_TEMP",
 820         "PCH_MCH_TEMP",
 821         "Agent0 Dimm0",
 822         "Agent0 Dimm1",
 823         "Agent1 Dimm0",
 824         "Agent1 Dimm1",
 825         "BYTE_TEMP0",
 826         "BYTE_TEMP1",
 827         "PECI Agent 0 Calibration",
 828         "PECI Agent 1 Calibration",
 829         "",
 830         "Virtual_TEMP"
 831 };
 832
 833 #define NCT6795_TEMP_MASK       0xbfffff7e
 834 #define NCT6795_VIRT_TEMP_MASK  0x80000000
 835
 836 static const char *const nct6796_temp_label[] = {
 837         "",
 838         "SYSTIN",
 839         "CPUTIN",
 840         "AUXTIN0",
 841         "AUXTIN1",
 842         "AUXTIN2",
 843         "AUXTIN3",
 844         "AUXTIN4",
 845         "SMBUSMASTER 0",
 846         "SMBUSMASTER 1",
 847         "Virtual_TEMP",
 848         "Virtual_TEMP",
 849         "",
 850         "",
 851         "",
 852         "",
 853         "PECI Agent 0",
 854         "PECI Agent 1",
 855         "PCH_CHIP_CPU_MAX_TEMP",
 856         "PCH_CHIP_TEMP",
 857         "PCH_CPU_TEMP",
 858         "PCH_MCH_TEMP",
 859         "Agent0 Dimm0",
 860         "Agent0 Dimm1",
 861         "Agent1 Dimm0",
 862         "Agent1 Dimm1",
 863         "BYTE_TEMP0",
 864         "BYTE_TEMP1",
 865         "PECI Agent 0 Calibration",
 866         "PECI Agent 1 Calibration",
 867         "",
 868         "Virtual_TEMP"
 869 };
 870
 871 #define NCT6796_TEMP_MASK       0xbfff0ffe
 872 #define NCT6796_VIRT_TEMP_MASK  0x80000c00
 873
 874 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
 875
 876 static const char *const nct6798_temp_label[] = {
 877         "",
 878         "SYSTIN",
 879         "CPUTIN",
 880         "AUXTIN0",
 881         "AUXTIN1",
 882         "AUXTIN2",
 883         "AUXTIN3",
 884         "AUXTIN4",
 885         "SMBUSMASTER 0",
 886         "SMBUSMASTER 1",
 887         "Virtual_TEMP",
 888         "Virtual_TEMP",
 889         "",
 890         "",
 891         "",
 892         "",
 893         "PECI Agent 0",
 894         "PECI Agent 1",
 895         "PCH_CHIP_CPU_MAX_TEMP",
 896         "PCH_CHIP_TEMP",
 897         "PCH_CPU_TEMP",
 898         "PCH_MCH_TEMP",
 899         "Agent0 Dimm0",
 900         "Agent0 Dimm1",
 901         "Agent1 Dimm0",
 902         "Agent1 Dimm1",
 903         "BYTE_TEMP0",
 904         "BYTE_TEMP1",
 905         "PECI Agent 0 Calibration",     /* undocumented */
 906         "PECI Agent 1 Calibration",     /* undocumented */
 907         "",
 908         "Virtual_TEMP"
 909 };
 910
 911 #define NCT6798_TEMP_MASK       0xbfff0ffe
 912 #define NCT6798_VIRT_TEMP_MASK  0x80000c00
 913
 914 /* NCT6102D/NCT6106D specific data */
 915
 916 #define NCT6106_REG_VBAT        0x318
 917 #define NCT6106_REG_DIODE       0x319
 918 #define NCT6106_DIODE_MASK      0x01
 919
 920 static const u16 NCT6106_REG_IN_MAX[] = {
 921         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 922 static const u16 NCT6106_REG_IN_MIN[] = {
 923         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 924 static const u16 NCT6106_REG_IN[] = {
 925         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 926
 927 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 928 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 929 static const u16 NCT6106_REG_TEMP_HYST[] = {
 930         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 931 static const u16 NCT6106_REG_TEMP_OVER[] = {
 932         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 933 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 934         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 935 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 936         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 937 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 938 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 939         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 940
 941 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 942 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 943 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
 944 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
 945
 946 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 947 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 948 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 949 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 950 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 951         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 952
 953 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 954 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 955         0x11b, 0x12b, 0x13b };
 956
 957 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 958 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 959 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 960
 961 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 962 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 963 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 964 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 965 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 966 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 967
 968 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 969
 970 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 971 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 972 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 973 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
 974 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 975 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 976
 977 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 978 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 979
 980 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 981         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 982
 983 static const s8 NCT6106_ALARM_BITS[] = {
 984         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 985         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 986         -1,                             /* unused */
 987         32, 33, 34, -1, -1,             /* fan1..fan5 */
 988         -1, -1, -1,                     /* unused */
 989         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 990         48, -1                          /* intrusion0, intrusion1 */
 991 };
 992
 993 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 994         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 995
 996 static const s8 NCT6106_BEEP_BITS[] = {
 997         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 998         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 999         32,                             /* global beep enable */
1000         24, 25, 26, 27, 28,             /* fan1..fan5 */
1001         -1, -1, -1,                     /* unused */
1002         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
1003         34, -1                          /* intrusion0, intrusion1 */
1004 };
1005
1006 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
1007         [14] = 0x51,
1008         [15] = 0x52,
1009         [16] = 0x54,
1010 };
1011
1012 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
1013         [11] = 0x204,
1014         [12] = 0x205,
1015 };
1016
1017 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
1018
1019 /* NCT6112D/NCT6114D/NCT6116D specific data */
1020
1021 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
1022 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
1023 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
1024 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
1025
1026 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
1027 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
1028 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
1029 static const u16 NCT6116_REG_TEMP_SOURCE[] = {
1030         0xb0, 0xb1, 0xb2 };
1031
1032 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
1033         0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
1034 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
1035         0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
1036
1037 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
1038         0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
1039 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
1040         0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
1041
1042 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
1043         0x114, 0x124, 0x134, 0x194, 0x1a4 };
1044 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
1045         0x115, 0x125, 0x135, 0x195, 0x1a5 };
1046 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
1047         0x116, 0x126, 0x136, 0x196, 0x1a6 };
1048 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
1049         0x117, 0x127, 0x137, 0x197, 0x1a7 };
1050 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
1051         0x118, 0x128, 0x138, 0x198, 0x1a8 };
1052 static const u16 NCT6116_REG_TOLERANCE_H[] = {
1053         0x112, 0x122, 0x132, 0x192, 0x1a2 };
1054
1055 static const u16 NCT6116_REG_TARGET[] = {
1056         0x111, 0x121, 0x131, 0x191, 0x1a1 };
1057
1058 static const u16 NCT6116_REG_AUTO_TEMP[] = {
1059         0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
1060 static const u16 NCT6116_REG_AUTO_PWM[] = {
1061         0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
1062
1063 static const s8 NCT6116_ALARM_BITS[] = {
1064         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
1065         9, -1, -1, -1, -1, -1, -1,      /* in8..in9 */
1066         -1,                             /* unused */
1067         32, 33, 34, 35, 36,             /* fan1..fan5 */
1068         -1, -1, -1,                     /* unused */
1069         16, 17, 18, -1, -1, -1,         /* temp1..temp6 */
1070         48, -1                          /* intrusion0, intrusion1 */
1071 };
1072
1073 static const s8 NCT6116_BEEP_BITS[] = {
1074         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
1075         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
1076         32,                             /* global beep enable */
1077         24, 25, 26, 27, 28,             /* fan1..fan5 */
1078         -1, -1, -1,                     /* unused */
1079         16, 17, 18, -1, -1, -1,         /* temp1..temp6 */
1080         34, -1                          /* intrusion0, intrusion1 */
1081 };
1082
1083 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
1084
1085 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
1086 {
1087         if (mode == 0 && pwm == 255)
1088                 return off;
1089         return mode + 1;
1090 }
1091
1092 static int pwm_enable_to_reg(enum pwm_enable mode)
1093 {
1094         if (mode == off)
1095                 return 0;
1096         return mode - 1;
1097 }
1098
1099 /*
1100  * Conversions
1101  */
1102
1103 /* 1 is DC mode, output in ms */
1104 static unsigned int step_time_from_reg(u8 reg, u8 mode)
1105 {
1106         return mode ? 400 * reg : 100 * reg;
1107 }
1108
1109 static u8 step_time_to_reg(unsigned int msec, u8 mode)
1110 {
1111         return clamp_val((mode ? (msec + 200) / 400 :
1112                                         (msec + 50) / 100), 1, 255);
1113 }
1114
1115 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
1116 {
1117         if (reg == 0 || reg == 255)
1118                 return 0;
1119         return 1350000U / (reg << divreg);
1120 }
1121
1122 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
1123 {
1124         if ((reg & 0xff1f) == 0xff1f)
1125                 return 0;
1126
1127         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
1128
1129         if (reg == 0)
1130                 return 0;
1131
1132         return 1350000U / reg;
1133 }
1134
1135 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
1136 {
1137         if (reg == 0 || reg == 0xffff)
1138                 return 0;
1139
1140         /*
1141          * Even though the registers are 16 bit wide, the fan divisor
1142          * still applies.
1143          */
1144         return 1350000U / (reg << divreg);
1145 }
1146
1147 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
1148 {
1149         return reg;
1150 }
1151
1152 static u16 fan_to_reg(u32 fan, unsigned int divreg)
1153 {
1154         if (!fan)
1155                 return 0;
1156
1157         return (1350000U / fan) >> divreg;
1158 }
1159
1160 static inline unsigned int
1161 div_from_reg(u8 reg)
1162 {
1163         return BIT(reg);
1164 }
1165
1166 /*
1167  * Some of the voltage inputs have internal scaling, the tables below
1168  * contain 8 (the ADC LSB in mV) * scaling factor * 100
1169  */
1170 static const u16 scale_in[15] = {
1171         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
1172         800, 800
1173 };
1174
1175 static inline long in_from_reg(u8 reg, u8 nr)
1176 {
1177         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
1178 }
1179
1180 static inline u8 in_to_reg(u32 val, u8 nr)
1181 {
1182         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
1183 }
1184
1185 /* TSI temperatures are in 8.3 format */
1186 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
1187 {
1188         return (reg >> 5) * 125;
1189 }
1190
1191 /*
1192  * Data structures and manipulation thereof
1193  */
1194
1195 struct nct6775_data {
1196         int addr;       /* IO base of hw monitor block */
1197         struct nct6775_sio_data *sio_data;
1198         enum kinds kind;
1199         const char *name;
1200
1201         const struct attribute_group *groups[7];
1202         u8 num_groups;
1203
1204         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1205                                     * 3=temp_crit, 4=temp_lcrit
1206                                     */
1207         u8 temp_src[NUM_TEMP];
1208         u16 reg_temp_config[NUM_TEMP];
1209         const char * const *temp_label;
1210         u32 temp_mask;
1211         u32 virt_temp_mask;
1212
1213         u16 REG_CONFIG;
1214         u16 REG_VBAT;
1215         u16 REG_DIODE;
1216         u8 DIODE_MASK;
1217
1218         const s8 *ALARM_BITS;
1219         const s8 *BEEP_BITS;
1220
1221         const u16 *REG_VIN;
1222         const u16 *REG_IN_MINMAX[2];
1223
1224         const u16 *REG_TARGET;
1225         const u16 *REG_FAN;
1226         const u16 *REG_FAN_MODE;
1227         const u16 *REG_FAN_MIN;
1228         const u16 *REG_FAN_PULSES;
1229         const u16 *FAN_PULSE_SHIFT;
1230         const u16 *REG_FAN_TIME[3];
1231
1232         const u16 *REG_TOLERANCE_H;
1233
1234         const u8 *REG_PWM_MODE;
1235         const u8 *PWM_MODE_MASK;
1236
1237         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1238                                  * [3]=pwm_max, [4]=pwm_step,
1239                                  * [5]=weight_duty_step, [6]=weight_duty_base
1240                                  */
1241         const u16 *REG_PWM_READ;
1242
1243         const u16 *REG_CRITICAL_PWM_ENABLE;
1244         u8 CRITICAL_PWM_ENABLE_MASK;
1245         const u16 *REG_CRITICAL_PWM;
1246
1247         const u16 *REG_AUTO_TEMP;
1248         const u16 *REG_AUTO_PWM;
1249
1250         const u16 *REG_CRITICAL_TEMP;
1251         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
1252
1253         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
1254         const u16 *REG_TEMP_SEL;
1255         const u16 *REG_WEIGHT_TEMP_SEL;
1256         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
1257
1258         const u16 *REG_TEMP_OFFSET;
1259
1260         const u16 *REG_ALARM;
1261         const u16 *REG_BEEP;
1262
1263         const u16 *REG_TSI_TEMP;
1264
1265         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
1266         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
1267
1268         struct mutex update_lock;
1269         bool valid;             /* true if following fields are valid */
1270         unsigned long last_updated;     /* In jiffies */
1271
1272         /* Register values */
1273         u8 bank;                /* current register bank */
1274         u8 in_num;              /* number of in inputs we have */
1275         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
1276         unsigned int rpm[NUM_FAN];
1277         u16 fan_min[NUM_FAN];
1278         u8 fan_pulses[NUM_FAN];
1279         u8 fan_div[NUM_FAN];
1280         u8 has_pwm;
1281         u8 has_fan;             /* some fan inputs can be disabled */
1282         u8 has_fan_min;         /* some fans don't have min register */
1283         bool has_fan_div;
1284
1285         u8 num_temp_alarms;     /* 2, 3, or 6 */
1286         u8 num_temp_beeps;      /* 2, 3, or 6 */
1287         u8 temp_fixed_num;      /* 3 or 6 */
1288         u8 temp_type[NUM_TEMP_FIXED];
1289         s8 temp_offset[NUM_TEMP_FIXED];
1290         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1291                                 * 3=temp_crit, 4=temp_lcrit */
1292         s16 tsi_temp[NUM_TSI_TEMP];
1293         u64 alarms;
1294         u64 beeps;
1295
1296         u8 pwm_num;     /* number of pwm */
1297         u8 pwm_mode[NUM_FAN];   /* 0->DC variable voltage,
1298                                  * 1->PWM variable duty cycle
1299                                  */
1300         enum pwm_enable pwm_enable[NUM_FAN];
1301                         /* 0->off
1302                          * 1->manual
1303                          * 2->thermal cruise mode (also called SmartFan I)
1304                          * 3->fan speed cruise mode
1305                          * 4->SmartFan III
1306                          * 5->enhanced variable thermal cruise (SmartFan IV)
1307                          */
1308         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1309                                  * [3]=pwm_max, [4]=pwm_step,
1310                                  * [5]=weight_duty_step, [6]=weight_duty_base
1311                                  */
1312
1313         u8 target_temp[NUM_FAN];
1314         u8 target_temp_mask;
1315         u32 target_speed[NUM_FAN];
1316         u32 target_speed_tolerance[NUM_FAN];
1317         u8 speed_tolerance_limit;
1318
1319         u8 temp_tolerance[2][NUM_FAN];
1320         u8 tolerance_mask;
1321
1322         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1323
1324         /* Automatic fan speed control registers */
1325         int auto_pwm_num;
1326         u8 auto_pwm[NUM_FAN][7];
1327         u8 auto_temp[NUM_FAN][7];
1328         u8 pwm_temp_sel[NUM_FAN];
1329         u8 pwm_weight_temp_sel[NUM_FAN];
1330         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1331                                          * 2->temp_base
1332                                          */
1333
1334         u8 vid;
1335         u8 vrm;
1336
1337         bool have_vid;
1338
1339         u16 have_temp;
1340         u16 have_temp_fixed;
1341         u16 have_tsi_temp;
1342         u16 have_in;
1343
1344         /* Remember extra register values over suspend/resume */
1345         u8 vbat;
1346         u8 fandiv1;
1347         u8 fandiv2;
1348         u8 sio_reg_enable;
1349
1350         struct regmap *regmap;
1351         bool read_only;
1352 };
1353
1354 struct sensor_device_template {
1355         struct device_attribute dev_attr;
1356         union {
1357                 struct {
1358                         u8 nr;
1359                         u8 index;
1360                 } s;
1361                 int index;
1362         } u;
1363         bool s2;        /* true if both index and nr are used */
1364 };
1365
1366 struct sensor_device_attr_u {
1367         union {
1368                 struct sensor_device_attribute a1;
1369                 struct sensor_device_attribute_2 a2;
1370         } u;
1371         char name[32];
1372 };
1373
1374 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1375         .attr = {.name = _template, .mode = _mode },            \
1376         .show   = _show,                                        \
1377         .store  = _store,                                       \
1378 }
1379
1380 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1381         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1382           .u.index = _index,                                            \
1383           .s2 = false }
1384
1385 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1386                                  _nr, _index)                           \
1387         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1388           .u.s.index = _index,                                          \
1389           .u.s.nr = _nr,                                                \
1390           .s2 = true }
1391
1392 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1393 static struct sensor_device_template sensor_dev_template_##_name        \
1394         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1395                                  _index)
1396
1397 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1398                           _nr, _index)                                  \
1399 static struct sensor_device_template sensor_dev_template_##_name        \
1400         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1401                                  _nr, _index)
1402
1403 struct sensor_template_group {
1404         struct sensor_device_template **templates;
1405         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1406         int base;
1407 };
1408
1409 static inline umode_t nct6775_attr_mode(struct nct6775_data *data, struct attribute *attr)
1410 {
1411         return data->read_only ? (attr->mode & ~0222) : attr->mode;
1412 }
1413
1414 static int nct6775_add_attr_group(struct nct6775_data *data, const struct attribute_group *group)
1415 {
1416         /* Need to leave a NULL terminator at the end of data->groups */
1417         if (data->num_groups == ARRAY_SIZE(data->groups) - 1)
1418                 return -ENOBUFS;
1419
1420         data->groups[data->num_groups++] = group;
1421         return 0;
1422 }
1423
1424 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
1425                                            const struct sensor_template_group *tg, int repeat)
1426 {
1427         struct attribute_group *group;
1428         struct sensor_device_attr_u *su;
1429         struct sensor_device_attribute *a;
1430         struct sensor_device_attribute_2 *a2;
1431         struct attribute **attrs;
1432         struct sensor_device_template **t;
1433         int i, count;
1434
1435         if (repeat <= 0)
1436                 return -EINVAL;
1437
1438         t = tg->templates;
1439         for (count = 0; *t; t++, count++)
1440                 ;
1441
1442         if (count == 0)
1443                 return -EINVAL;
1444
1445         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1446         if (group == NULL)
1447                 return -ENOMEM;
1448
1449         attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1450                              GFP_KERNEL);
1451         if (attrs == NULL)
1452                 return -ENOMEM;
1453
1454         su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1455                                GFP_KERNEL);
1456         if (su == NULL)
1457                 return -ENOMEM;
1458
1459         group->attrs = attrs;
1460         group->is_visible = tg->is_visible;
1461
1462         for (i = 0; i < repeat; i++) {
1463                 t = tg->templates;
1464                 while (*t != NULL) {
1465                         snprintf(su->name, sizeof(su->name),
1466                                  (*t)->dev_attr.attr.name, tg->base + i);
1467                         if ((*t)->s2) {
1468                                 a2 = &su->u.a2;
1469                                 sysfs_attr_init(&a2->dev_attr.attr);
1470                                 a2->dev_attr.attr.name = su->name;
1471                                 a2->nr = (*t)->u.s.nr + i;
1472                                 a2->index = (*t)->u.s.index;
1473                                 a2->dev_attr.attr.mode =
1474                                   (*t)->dev_attr.attr.mode;
1475                                 a2->dev_attr.show = (*t)->dev_attr.show;
1476                                 a2->dev_attr.store = (*t)->dev_attr.store;
1477                                 *attrs = &a2->dev_attr.attr;
1478                         } else {
1479                                 a = &su->u.a1;
1480                                 sysfs_attr_init(&a->dev_attr.attr);
1481                                 a->dev_attr.attr.name = su->name;
1482                                 a->index = (*t)->u.index + i;
1483                                 a->dev_attr.attr.mode =
1484                                   (*t)->dev_attr.attr.mode;
1485                                 a->dev_attr.show = (*t)->dev_attr.show;
1486                                 a->dev_attr.store = (*t)->dev_attr.store;
1487                                 *attrs = &a->dev_attr.attr;
1488                         }
1489                         attrs++;
1490                         su++;
1491                         t++;
1492                 }
1493         }
1494
1495         return nct6775_add_attr_group(data, group);
1496 }
1497
1498 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1499 {
1500         switch (data->kind) {
1501         case nct6106:
1502                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1503                   (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1504                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1505                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1506         case nct6116:
1507                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1508                   reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1509                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1510                   reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1511                   reg == 0x191 || reg == 0x1a1;
1512         case nct6775:
1513                 return (((reg & 0xff00) == 0x100 ||
1514                     (reg & 0xff00) == 0x200) &&
1515                    ((reg & 0x00ff) == 0x50 ||
1516                     (reg & 0x00ff) == 0x53 ||
1517                     (reg & 0x00ff) == 0x55)) ||
1518                   (reg & 0xfff0) == 0x630 ||
1519                   reg == 0x640 || reg == 0x642 ||
1520                   reg == 0x662 || reg == 0x669 ||
1521                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1522                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1523         case nct6776:
1524                 return (((reg & 0xff00) == 0x100 ||
1525                     (reg & 0xff00) == 0x200) &&
1526                    ((reg & 0x00ff) == 0x50 ||
1527                     (reg & 0x00ff) == 0x53 ||
1528                     (reg & 0x00ff) == 0x55)) ||
1529                   (reg & 0xfff0) == 0x630 ||
1530                   reg == 0x402 ||
1531                   (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1532                   reg == 0x640 || reg == 0x642 ||
1533                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1534                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1535         case nct6779:
1536         case nct6791:
1537         case nct6792:
1538         case nct6793:
1539         case nct6795:
1540         case nct6796:
1541         case nct6797:
1542         case nct6798:
1543                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1544                   (reg & 0xfff0) == 0x4c0 ||
1545                   reg == 0x402 ||
1546                   (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1547                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1548                   reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1549                   reg == 0x64c ||
1550                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1551                   reg == 0x7b || reg == 0x7d;
1552         }
1553         return false;
1554 }
1555
1556 static inline void nct6775_wmi_set_bank(struct nct6775_data *data, u16 reg)
1557 {
1558         u8 bank = reg >> 8;
1559
1560         data->bank = bank;
1561 }
1562
1563 static int nct6775_wmi_reg_read(void *ctx, unsigned int reg, unsigned int *val)
1564 {
1565         struct nct6775_data *data = ctx;
1566         int err, word_sized = is_word_sized(data, reg);
1567         u8 tmp = 0;
1568         u16 res;
1569
1570         nct6775_wmi_set_bank(data, reg);
1571
1572         err = nct6775_asuswmi_read(data->bank, reg & 0xff, &tmp);
1573         if (err)
1574                 return err;
1575
1576         res = tmp;
1577         if (word_sized) {
1578                 err = nct6775_asuswmi_read(data->bank, (reg & 0xff) + 1, &tmp);
1579                 if (err)
1580                         return err;
1581
1582                 res = (res << 8) + tmp;
1583         }
1584         *val = res;
1585         return 0;
1586 }
1587
1588 static inline int nct6775_read_value(struct nct6775_data *data, u16 reg, u16 *value)
1589 {
1590         unsigned int tmp;
1591         int ret = regmap_read(data->regmap, reg, &tmp);
1592
1593         if (!ret)
1594                 *value = tmp;
1595         return ret;
1596 }
1597
1598 static int nct6775_wmi_reg_write(void *ctx, unsigned int reg, unsigned int value)
1599 {
1600         struct nct6775_data *data = ctx;
1601         int res, word_sized = is_word_sized(data, reg);
1602
1603         nct6775_wmi_set_bank(data, reg);
1604
1605         if (word_sized) {
1606                 res = nct6775_asuswmi_write(data->bank, reg & 0xff, value >> 8);
1607                 if (res)
1608                         return res;
1609
1610                 res = nct6775_asuswmi_write(data->bank, (reg & 0xff) + 1, value);
1611         } else {
1612                 res = nct6775_asuswmi_write(data->bank, reg & 0xff, value);
1613         }
1614
1615         return res;
1616 }
1617
1618 static inline int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1619 {
1620         return regmap_write(data->regmap, reg, value);
1621 }
1622
1623 /*
1624  * On older chips, only registers 0x50-0x5f are banked.
1625  * On more recent chips, all registers are banked.
1626  * Assume that is the case and set the bank number for each access.
1627  * Cache the bank number so it only needs to be set if it changes.
1628  */
1629 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1630 {
1631         u8 bank = reg >> 8;
1632
1633         if (data->bank != bank) {
1634                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1635                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1636                 data->bank = bank;
1637         }
1638 }
1639
1640 static int nct6775_reg_read(void *ctx, unsigned int reg, unsigned int *val)
1641 {
1642         struct nct6775_data *data = ctx;
1643         int word_sized = is_word_sized(data, reg);
1644
1645         nct6775_set_bank(data, reg);
1646         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1647         *val = inb_p(data->addr + DATA_REG_OFFSET);
1648         if (word_sized) {
1649                 outb_p((reg & 0xff) + 1,
1650                        data->addr + ADDR_REG_OFFSET);
1651                 *val = (*val << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1652         }
1653         return 0;
1654 }
1655
1656 static int nct6775_reg_write(void *ctx, unsigned int reg, unsigned int value)
1657 {
1658         struct nct6775_data *data = ctx;
1659         int word_sized = is_word_sized(data, reg);
1660
1661         nct6775_set_bank(data, reg);
1662         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1663         if (word_sized) {
1664                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1665                 outb_p((reg & 0xff) + 1,
1666                        data->addr + ADDR_REG_OFFSET);
1667         }
1668         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1669         return 0;
1670 }
1671
1672 /* We left-align 8-bit temperature values to make the code simpler */
1673 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1674 {
1675         int err;
1676
1677         err = nct6775_read_value(data, reg, val);
1678         if (err)
1679                 return err;
1680
1681         if (!is_word_sized(data, reg))
1682                 *val <<= 8;
1683
1684         return 0;
1685 }
1686
1687 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1688 {
1689         if (!is_word_sized(data, reg))
1690                 value >>= 8;
1691         return nct6775_write_value(data, reg, value);
1692 }
1693
1694 /* This function assumes that the caller holds data->update_lock */
1695 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1696 {
1697         u16 reg;
1698         int err;
1699         u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1700         unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
1701
1702         err = nct6775_read_value(data, fandiv_reg, &reg);
1703         if (err)
1704                 return err;
1705         reg &= 0x70 >> oddshift;
1706         reg |= data->fan_div[nr] & (0x7 << oddshift);
1707         return nct6775_write_value(data, fandiv_reg, reg);
1708 }
1709
1710 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1711 {
1712         if (data->kind == nct6775)
1713                 return nct6775_write_fan_div(data, nr);
1714         return 0;
1715 }
1716
1717 static int nct6775_update_fan_div(struct nct6775_data *data)
1718 {
1719         int err;
1720         u16 i;
1721
1722         err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1723         if (err)
1724                 return err;
1725         data->fan_div[0] = i & 0x7;
1726         data->fan_div[1] = (i & 0x70) >> 4;
1727         err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1728         if (err)
1729                 return err;
1730         data->fan_div[2] = i & 0x7;
1731         if (data->has_fan & BIT(3))
1732                 data->fan_div[3] = (i & 0x70) >> 4;
1733
1734         return 0;
1735 }
1736
1737 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1738 {
1739         if (data->kind == nct6775)
1740                 return nct6775_update_fan_div(data);
1741         return 0;
1742 }
1743
1744 static int nct6775_init_fan_div(struct nct6775_data *data)
1745 {
1746         int i, err;
1747
1748         err = nct6775_update_fan_div_common(data);
1749         if (err)
1750                 return err;
1751
1752         /*
1753          * For all fans, start with highest divider value if the divider
1754          * register is not initialized. This ensures that we get a
1755          * reading from the fan count register, even if it is not optimal.
1756          * We'll compute a better divider later on.
1757          */
1758         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1759                 if (!(data->has_fan & BIT(i)))
1760                         continue;
1761                 if (data->fan_div[i] == 0) {
1762                         data->fan_div[i] = 7;
1763                         err = nct6775_write_fan_div_common(data, i);
1764                         if (err)
1765                                 return err;
1766                 }
1767         }
1768
1769         return 0;
1770 }
1771
1772 static int nct6775_init_fan_common(struct device *dev,
1773                                    struct nct6775_data *data)
1774 {
1775         int i, err;
1776         u16 reg;
1777
1778         if (data->has_fan_div) {
1779                 err = nct6775_init_fan_div(data);
1780                 if (err)
1781                         return err;
1782         }
1783
1784         /*
1785          * If fan_min is not set (0), set it to 0xff to disable it. This
1786          * prevents the unnecessary warning when fanX_min is reported as 0.
1787          */
1788         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1789                 if (data->has_fan_min & BIT(i)) {
1790                         err = nct6775_read_value(data, data->REG_FAN_MIN[i], &reg);
1791                         if (err)
1792                                 return err;
1793                         if (!reg) {
1794                                 err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1795                                                           data->has_fan_div ? 0xff : 0xff1f);
1796                                 if (err)
1797                                         return err;
1798                         }
1799                 }
1800         }
1801
1802         return 0;
1803 }
1804
1805 static int nct6775_select_fan_div(struct device *dev,
1806                                   struct nct6775_data *data, int nr, u16 reg)
1807 {
1808         int err;
1809         u8 fan_div = data->fan_div[nr];
1810         u16 fan_min;
1811
1812         if (!data->has_fan_div)
1813                 return 0;
1814
1815         /*
1816          * If we failed to measure the fan speed, or the reported value is not
1817          * in the optimal range, and the clock divider can be modified,
1818          * let's try that for next time.
1819          */
1820         if (reg == 0x00 && fan_div < 0x07)
1821                 fan_div++;
1822         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1823                 fan_div--;
1824
1825         if (fan_div != data->fan_div[nr]) {
1826                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1827                         nr + 1, div_from_reg(data->fan_div[nr]),
1828                         div_from_reg(fan_div));
1829
1830                 /* Preserve min limit if possible */
1831                 if (data->has_fan_min & BIT(nr)) {
1832                         fan_min = data->fan_min[nr];
1833                         if (fan_div > data->fan_div[nr]) {
1834                                 if (fan_min != 255 && fan_min > 1)
1835                                         fan_min >>= 1;
1836                         } else {
1837                                 if (fan_min != 255) {
1838                                         fan_min <<= 1;
1839                                         if (fan_min > 254)
1840                                                 fan_min = 254;
1841                                 }
1842                         }
1843                         if (fan_min != data->fan_min[nr]) {
1844                                 data->fan_min[nr] = fan_min;
1845                                 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1846                                 if (err)
1847                                         return err;
1848                         }
1849                 }
1850                 data->fan_div[nr] = fan_div;
1851                 err = nct6775_write_fan_div_common(data, nr);
1852                 if (err)
1853                         return err;
1854         }
1855
1856         return 0;
1857 }
1858
1859 static int nct6775_update_pwm(struct device *dev)
1860 {
1861         struct nct6775_data *data = dev_get_drvdata(dev);
1862         int i, j, err;
1863         u16 fanmodecfg, reg;
1864         bool duty_is_dc;
1865
1866         for (i = 0; i < data->pwm_num; i++) {
1867                 if (!(data->has_pwm & BIT(i)))
1868                         continue;
1869
1870                 err = nct6775_read_value(data, data->REG_PWM_MODE[i], &reg);
1871                 if (err)
1872                         return err;
1873                 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1874                 data->pwm_mode[i] = !duty_is_dc;
1875
1876                 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1877                 if (err)
1878                         return err;
1879                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1880                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1881                                 err = nct6775_read_value(data, data->REG_PWM[j][i], &reg);
1882                                 if (err)
1883                                         return err;
1884                                 data->pwm[j][i] = reg;
1885                         }
1886                 }
1887
1888                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1889                                                         (fanmodecfg >> 4) & 7);
1890
1891                 if (!data->temp_tolerance[0][i] ||
1892                     data->pwm_enable[i] != speed_cruise)
1893                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1894                 if (!data->target_speed_tolerance[i] ||
1895                     data->pwm_enable[i] == speed_cruise) {
1896                         u8 t = fanmodecfg & 0x0f;
1897
1898                         if (data->REG_TOLERANCE_H) {
1899                                 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], &reg);
1900                                 if (err)
1901                                         return err;
1902                                 t |= (reg & 0x70) >> 1;
1903                         }
1904                         data->target_speed_tolerance[i] = t;
1905                 }
1906
1907                 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], &reg);
1908                 if (err)
1909                         return err;
1910                 data->temp_tolerance[1][i] = reg;
1911
1912                 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &reg);
1913                 if (err)
1914                         return err;
1915                 data->pwm_temp_sel[i] = reg & 0x1f;
1916                 /* If fan can stop, report floor as 0 */
1917                 if (reg & 0x80)
1918                         data->pwm[2][i] = 0;
1919
1920                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1921                         continue;
1922
1923                 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], &reg);
1924                 if (err)
1925                         return err;
1926                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1927                 /* If weight is disabled, report weight source as 0 */
1928                 if (!(reg & 0x80))
1929                         data->pwm_weight_temp_sel[i] = 0;
1930
1931                 /* Weight temp data */
1932                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1933                         err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], &reg);
1934                         if (err)
1935                                 return err;
1936                         data->weight_temp[j][i] = reg;
1937                 }
1938         }
1939
1940         return 0;
1941 }
1942
1943 static int nct6775_update_pwm_limits(struct device *dev)
1944 {
1945         struct nct6775_data *data = dev_get_drvdata(dev);
1946         int i, j, err;
1947         u16 reg, reg_t;
1948
1949         for (i = 0; i < data->pwm_num; i++) {
1950                 if (!(data->has_pwm & BIT(i)))
1951                         continue;
1952
1953                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1954                         err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], &reg);
1955                         if (err)
1956                                 return err;
1957                         data->fan_time[j][i] = reg;
1958                 }
1959
1960                 err = nct6775_read_value(data, data->REG_TARGET[i], &reg_t);
1961                 if (err)
1962                         return err;
1963
1964                 /* Update only in matching mode or if never updated */
1965                 if (!data->target_temp[i] ||
1966                     data->pwm_enable[i] == thermal_cruise)
1967                         data->target_temp[i] = reg_t & data->target_temp_mask;
1968                 if (!data->target_speed[i] ||
1969                     data->pwm_enable[i] == speed_cruise) {
1970                         if (data->REG_TOLERANCE_H) {
1971                                 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], &reg);
1972                                 if (err)
1973                                         return err;
1974                                 reg_t |= (reg & 0x0f) << 8;
1975                         }
1976                         data->target_speed[i] = reg_t;
1977                 }
1978
1979                 for (j = 0; j < data->auto_pwm_num; j++) {
1980                         err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), &reg);
1981                         if (err)
1982                                 return err;
1983                         data->auto_pwm[i][j] = reg;
1984
1985                         err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), &reg);
1986                         if (err)
1987                                 return err;
1988                         data->auto_temp[i][j] = reg;
1989                 }
1990
1991                 /* critical auto_pwm temperature data */
1992                 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], &reg);
1993                 if (err)
1994                         return err;
1995                 data->auto_temp[i][data->auto_pwm_num] = reg;
1996
1997                 switch (data->kind) {
1998                 case nct6775:
1999                         err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], &reg);
2000                         if (err)
2001                                 return err;
2002                         data->auto_pwm[i][data->auto_pwm_num] =
2003                                                 (reg & 0x02) ? 0xff : 0x00;
2004                         break;
2005                 case nct6776:
2006                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
2007                         break;
2008                 case nct6106:
2009                 case nct6116:
2010                 case nct6779:
2011                 case nct6791:
2012                 case nct6792:
2013                 case nct6793:
2014                 case nct6795:
2015                 case nct6796:
2016                 case nct6797:
2017                 case nct6798:
2018                         err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], &reg);
2019                         if (err)
2020                                 return err;
2021                         if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
2022                                 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], &reg);
2023                                 if (err)
2024                                         return err;
2025                         } else {
2026                                 reg = 0xff;
2027                         }
2028                         data->auto_pwm[i][data->auto_pwm_num] = reg;
2029                         break;
2030                 }
2031         }
2032
2033         return 0;
2034 }
2035
2036 static struct nct6775_data *nct6775_update_device(struct device *dev)
2037 {
2038         struct nct6775_data *data = dev_get_drvdata(dev);
2039         int i, j, err = 0;
2040         u16 reg;
2041
2042         mutex_lock(&data->update_lock);
2043
2044         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2045             || !data->valid) {
2046                 /* Fan clock dividers */
2047                 err = nct6775_update_fan_div_common(data);
2048                 if (err)
2049                         goto out;
2050
2051                 /* Measured voltages and limits */
2052                 for (i = 0; i < data->in_num; i++) {
2053                         if (!(data->have_in & BIT(i)))
2054                                 continue;
2055
2056                         err = nct6775_read_value(data, data->REG_VIN[i], &reg);
2057                         if (err)
2058                                 goto out;
2059                         data->in[i][0] = reg;
2060
2061                         err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], &reg);
2062                         if (err)
2063                                 goto out;
2064                         data->in[i][1] = reg;
2065
2066                         err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], &reg);
2067                         if (err)
2068                                 goto out;
2069                         data->in[i][2] = reg;
2070                 }
2071
2072                 /* Measured fan speeds and limits */
2073                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
2074                         if (!(data->has_fan & BIT(i)))
2075                                 continue;
2076
2077                         err = nct6775_read_value(data, data->REG_FAN[i], &reg);
2078                         if (err)
2079                                 goto out;
2080                         data->rpm[i] = data->fan_from_reg(reg,
2081                                                           data->fan_div[i]);
2082
2083                         if (data->has_fan_min & BIT(i)) {
2084                                 err = nct6775_read_value(data, data->REG_FAN_MIN[i], &reg);
2085                                 if (err)
2086                                         goto out;
2087                                 data->fan_min[i] = reg;
2088                         }
2089
2090                         if (data->REG_FAN_PULSES[i]) {
2091                                 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &reg);
2092                                 if (err)
2093                                         goto out;
2094                                 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03;
2095                         }
2096
2097                         err = nct6775_select_fan_div(dev, data, i, reg);
2098                         if (err)
2099                                 goto out;
2100                 }
2101
2102                 err = nct6775_update_pwm(dev);
2103                 if (err)
2104                         goto out;
2105
2106                 err = nct6775_update_pwm_limits(dev);
2107                 if (err)
2108                         goto out;
2109
2110                 /* Measured temperatures and limits */
2111                 for (i = 0; i < NUM_TEMP; i++) {
2112                         if (!(data->have_temp & BIT(i)))
2113                                 continue;
2114                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
2115                                 if (data->reg_temp[j][i]) {
2116                                         err = nct6775_read_temp(data, data->reg_temp[j][i], &reg);
2117                                         if (err)
2118                                                 goto out;
2119                                         data->temp[j][i] = reg;
2120                                 }
2121                         }
2122                         if (i >= NUM_TEMP_FIXED ||
2123                             !(data->have_temp_fixed & BIT(i)))
2124                                 continue;
2125                         err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], &reg);
2126                         if (err)
2127                                 goto out;
2128                         data->temp_offset[i] = reg;
2129                 }
2130
2131                 for (i = 0; i < NUM_TSI_TEMP; i++) {
2132                         if (!(data->have_tsi_temp & BIT(i)))
2133                                 continue;
2134                         err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &reg);
2135                         if (err)
2136                                 goto out;
2137                         data->tsi_temp[i] = reg;
2138                 }
2139
2140                 data->alarms = 0;
2141                 for (i = 0; i < NUM_REG_ALARM; i++) {
2142                         u16 alarm;
2143
2144                         if (!data->REG_ALARM[i])
2145                                 continue;
2146                         err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
2147                         if (err)
2148                                 goto out;
2149                         data->alarms |= ((u64)alarm) << (i << 3);
2150                 }
2151
2152                 data->beeps = 0;
2153                 for (i = 0; i < NUM_REG_BEEP; i++) {
2154                         u16 beep;
2155
2156                         if (!data->REG_BEEP[i])
2157                                 continue;
2158                         err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
2159                         if (err)
2160                                 goto out;
2161                         data->beeps |= ((u64)beep) << (i << 3);
2162                 }
2163
2164                 data->last_updated = jiffies;
2165                 data->valid = true;
2166         }
2167 out:
2168         mutex_unlock(&data->update_lock);
2169         return err ? ERR_PTR(err) : data;
2170 }
2171
2172 /*
2173  * Sysfs callback functions
2174  */
2175 static ssize_t
2176 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
2177 {
2178         struct nct6775_data *data = nct6775_update_device(dev);
2179         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2180         int index = sattr->index;
2181         int nr = sattr->nr;
2182
2183         if (IS_ERR(data))
2184                 return PTR_ERR(data);
2185
2186         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
2187 }
2188
2189 static ssize_t
2190 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
2191              size_t count)
2192 {
2193         struct nct6775_data *data = dev_get_drvdata(dev);
2194         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2195         int index = sattr->index;
2196         int nr = sattr->nr;
2197         unsigned long val;
2198         int err;
2199
2200         err = kstrtoul(buf, 10, &val);
2201         if (err < 0)
2202                 return err;
2203         mutex_lock(&data->update_lock);
2204         data->in[nr][index] = in_to_reg(val, nr);
2205         err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
2206         mutex_unlock(&data->update_lock);
2207         return err ? : count;
2208 }
2209
2210 static ssize_t
2211 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
2212 {
2213         struct nct6775_data *data = nct6775_update_device(dev);
2214         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2215         int nr;
2216
2217         if (IS_ERR(data))
2218                 return PTR_ERR(data);
2219
2220         nr = data->ALARM_BITS[sattr->index];
2221         return sprintf(buf, "%u\n",
2222                        (unsigned int)((data->alarms >> nr) & 0x01));
2223 }
2224
2225 static int find_temp_source(struct nct6775_data *data, int index, int count)
2226 {
2227         int source = data->temp_src[index];
2228         int nr, err;
2229
2230         for (nr = 0; nr < count; nr++) {
2231                 u16 src;
2232
2233                 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
2234                 if (err)
2235                         return err;
2236                 if ((src & 0x1f) == source)
2237                         return nr;
2238         }
2239         return -ENODEV;
2240 }
2241
2242 static ssize_t
2243 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
2244 {
2245         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2246         struct nct6775_data *data = nct6775_update_device(dev);
2247         unsigned int alarm = 0;
2248         int nr;
2249
2250         if (IS_ERR(data))
2251                 return PTR_ERR(data);
2252
2253         /*
2254          * For temperatures, there is no fixed mapping from registers to alarm
2255          * bits. Alarm bits are determined by the temperature source mapping.
2256          */
2257         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
2258         if (nr >= 0) {
2259                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
2260
2261                 alarm = (data->alarms >> bit) & 0x01;
2262         }
2263         return sprintf(buf, "%u\n", alarm);
2264 }
2265
2266 static ssize_t
2267 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
2268 {
2269         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2270         struct nct6775_data *data = nct6775_update_device(dev);
2271         int nr;
2272
2273         if (IS_ERR(data))
2274                 return PTR_ERR(data);
2275
2276         nr = data->BEEP_BITS[sattr->index];
2277
2278         return sprintf(buf, "%u\n",
2279                        (unsigned int)((data->beeps >> nr) & 0x01));
2280 }
2281
2282 static ssize_t
2283 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
2284            size_t count)
2285 {
2286         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2287         struct nct6775_data *data = dev_get_drvdata(dev);
2288         int nr = data->BEEP_BITS[sattr->index];
2289         int regindex = nr >> 3;
2290         unsigned long val;
2291         int err;
2292
2293         err = kstrtoul(buf, 10, &val);
2294         if (err < 0)
2295                 return err;
2296         if (val > 1)
2297                 return -EINVAL;
2298
2299         mutex_lock(&data->update_lock);
2300         if (val)
2301                 data->beeps |= (1ULL << nr);
2302         else
2303                 data->beeps &= ~(1ULL << nr);
2304         err = nct6775_write_value(data, data->REG_BEEP[regindex],
2305                                   (data->beeps >> (regindex << 3)) & 0xff);
2306         mutex_unlock(&data->update_lock);
2307         return err ? : count;
2308 }
2309
2310 static ssize_t
2311 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
2312 {
2313         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2314         struct nct6775_data *data = nct6775_update_device(dev);
2315         unsigned int beep = 0;
2316         int nr;
2317
2318         if (IS_ERR(data))
2319                 return PTR_ERR(data);
2320
2321         /*
2322          * For temperatures, there is no fixed mapping from registers to beep
2323          * enable bits. Beep enable bits are determined by the temperature
2324          * source mapping.
2325          */
2326         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
2327         if (nr >= 0) {
2328                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
2329
2330                 beep = (data->beeps >> bit) & 0x01;
2331         }
2332         return sprintf(buf, "%u\n", beep);
2333 }
2334
2335 static ssize_t
2336 store_temp_beep(struct device *dev, struct device_attribute *attr,
2337                 const char *buf, size_t count)
2338 {
2339         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2340         struct nct6775_data *data = dev_get_drvdata(dev);
2341         int nr, bit, regindex;
2342         unsigned long val;
2343         int err;
2344
2345         err = kstrtoul(buf, 10, &val);
2346         if (err < 0)
2347                 return err;
2348         if (val > 1)
2349                 return -EINVAL;
2350
2351         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
2352         if (nr < 0)
2353                 return nr;
2354
2355         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
2356         regindex = bit >> 3;
2357
2358         mutex_lock(&data->update_lock);
2359         if (val)
2360                 data->beeps |= (1ULL << bit);
2361         else
2362                 data->beeps &= ~(1ULL << bit);
2363         err = nct6775_write_value(data, data->REG_BEEP[regindex],
2364                                   (data->beeps >> (regindex << 3)) & 0xff);
2365         mutex_unlock(&data->update_lock);
2366
2367         return err ? : count;
2368 }
2369
2370 static umode_t nct6775_in_is_visible(struct kobject *kobj,
2371                                      struct attribute *attr, int index)
2372 {
2373         struct device *dev = kobj_to_dev(kobj);
2374         struct nct6775_data *data = dev_get_drvdata(dev);
2375         int in = index / 5;     /* voltage index */
2376
2377         if (!(data->have_in & BIT(in)))
2378                 return 0;
2379
2380         return nct6775_attr_mode(data, attr);
2381 }
2382
2383 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
2384 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
2385 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
2386                 0);
2387 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
2388                   store_in_reg, 0, 1);
2389 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
2390                   store_in_reg, 0, 2);
2391
2392 /*
2393  * nct6775_in_is_visible uses the index into the following array
2394  * to determine if attributes should be created or not.
2395  * Any change in order or content must be matched.
2396  */
2397 static struct sensor_device_template *nct6775_attributes_in_template[] = {
2398         &sensor_dev_template_in_input,
2399         &sensor_dev_template_in_alarm,
2400         &sensor_dev_template_in_beep,
2401         &sensor_dev_template_in_min,
2402         &sensor_dev_template_in_max,
2403         NULL
2404 };
2405
2406 static const struct sensor_template_group nct6775_in_template_group = {
2407         .templates = nct6775_attributes_in_template,
2408         .is_visible = nct6775_in_is_visible,
2409 };
2410
2411 static ssize_t
2412 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
2413 {
2414         struct nct6775_data *data = nct6775_update_device(dev);
2415         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2416         int nr = sattr->index;
2417
2418         if (IS_ERR(data))
2419                 return PTR_ERR(data);
2420
2421         return sprintf(buf, "%d\n", data->rpm[nr]);
2422 }
2423
2424 static ssize_t
2425 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
2426 {
2427         struct nct6775_data *data = nct6775_update_device(dev);
2428         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2429         int nr = sattr->index;
2430
2431         if (IS_ERR(data))
2432                 return PTR_ERR(data);
2433
2434         return sprintf(buf, "%d\n",
2435                        data->fan_from_reg_min(data->fan_min[nr],
2436                                               data->fan_div[nr]));
2437 }
2438
2439 static ssize_t
2440 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
2441 {
2442         struct nct6775_data *data = nct6775_update_device(dev);
2443         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2444         int nr = sattr->index;
2445
2446         if (IS_ERR(data))
2447                 return PTR_ERR(data);
2448
2449         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
2450 }
2451
2452 static ssize_t
2453 store_fan_min(struct device *dev, struct device_attribute *attr,
2454               const char *buf, size_t count)
2455 {
2456         struct nct6775_data *data = dev_get_drvdata(dev);
2457         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2458         int nr = sattr->index;
2459         unsigned long val;
2460         unsigned int reg;
2461         u8 new_div;
2462         int err;
2463
2464         err = kstrtoul(buf, 10, &val);
2465         if (err < 0)
2466                 return err;
2467
2468         mutex_lock(&data->update_lock);
2469         if (!data->has_fan_div) {
2470                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
2471                 if (!val) {
2472                         val = 0xff1f;
2473                 } else {
2474                         if (val > 1350000U)
2475                                 val = 135000U;
2476                         val = 1350000U / val;
2477                         val = (val & 0x1f) | ((val << 3) & 0xff00);
2478                 }
2479                 data->fan_min[nr] = val;
2480                 goto write_min; /* Leave fan divider alone */
2481         }
2482         if (!val) {
2483                 /* No min limit, alarm disabled */
2484                 data->fan_min[nr] = 255;
2485                 new_div = data->fan_div[nr]; /* No change */
2486                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2487                 goto write_div;
2488         }
2489         reg = 1350000U / val;
2490         if (reg >= 128 * 255) {
2491                 /*
2492                  * Speed below this value cannot possibly be represented,
2493                  * even with the highest divider (128)
2494                  */
2495                 data->fan_min[nr] = 254;
2496                 new_div = 7; /* 128 == BIT(7) */
2497                 dev_warn(dev,
2498                          "fan%u low limit %lu below minimum %u, set to minimum\n",
2499                          nr + 1, val, data->fan_from_reg_min(254, 7));
2500         } else if (!reg) {
2501                 /*
2502                  * Speed above this value cannot possibly be represented,
2503                  * even with the lowest divider (1)
2504                  */
2505                 data->fan_min[nr] = 1;
2506                 new_div = 0; /* 1 == BIT(0) */
2507                 dev_warn(dev,
2508                          "fan%u low limit %lu above maximum %u, set to maximum\n",
2509                          nr + 1, val, data->fan_from_reg_min(1, 0));
2510         } else {
2511                 /*
2512                  * Automatically pick the best divider, i.e. the one such
2513                  * that the min limit will correspond to a register value
2514                  * in the 96..192 range
2515                  */
2516                 new_div = 0;
2517                 while (reg > 192 && new_div < 7) {
2518                         reg >>= 1;
2519                         new_div++;
2520                 }
2521                 data->fan_min[nr] = reg;
2522         }
2523
2524 write_div:
2525         /*
2526          * Write both the fan clock divider (if it changed) and the new
2527          * fan min (unconditionally)
2528          */
2529         if (new_div != data->fan_div[nr]) {
2530                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2531                         nr + 1, div_from_reg(data->fan_div[nr]),
2532                         div_from_reg(new_div));
2533                 data->fan_div[nr] = new_div;
2534                 err = nct6775_write_fan_div_common(data, nr);
2535                 if (err)
2536                         goto write_min;
2537                 /* Give the chip time to sample a new speed value */
2538                 data->last_updated = jiffies;
2539         }
2540
2541 write_min:
2542         err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2543         mutex_unlock(&data->update_lock);
2544
2545         return err ? : count;
2546 }
2547
2548 static ssize_t
2549 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2550 {
2551         struct nct6775_data *data = nct6775_update_device(dev);
2552         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2553         int p;
2554
2555         if (IS_ERR(data))
2556                 return PTR_ERR(data);
2557
2558         p = data->fan_pulses[sattr->index];
2559         return sprintf(buf, "%d\n", p ? : 4);
2560 }
2561
2562 static ssize_t
2563 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2564                  const char *buf, size_t count)
2565 {
2566         struct nct6775_data *data = dev_get_drvdata(dev);
2567         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2568         int nr = sattr->index;
2569         unsigned long val;
2570         int err;
2571         u16 reg;
2572
2573         err = kstrtoul(buf, 10, &val);
2574         if (err < 0)
2575                 return err;
2576
2577         if (val > 4)
2578                 return -EINVAL;
2579
2580         mutex_lock(&data->update_lock);
2581         data->fan_pulses[nr] = val & 3;
2582         err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], &reg);
2583         if (err)
2584                 goto out;
2585         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2586         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2587         err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2588 out:
2589         mutex_unlock(&data->update_lock);
2590
2591         return err ? : count;
2592 }
2593
2594 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2595                                       struct attribute *attr, int index)
2596 {
2597         struct device *dev = kobj_to_dev(kobj);
2598         struct nct6775_data *data = dev_get_drvdata(dev);
2599         int fan = index / 6;    /* fan index */
2600         int nr = index % 6;     /* attribute index */
2601
2602         if (!(data->has_fan & BIT(fan)))
2603                 return 0;
2604
2605         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2606                 return 0;
2607         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2608                 return 0;
2609         if (nr == 3 && !data->REG_FAN_PULSES[fan])
2610                 return 0;
2611         if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2612                 return 0;
2613         if (nr == 5 && data->kind != nct6775)
2614                 return 0;
2615
2616         return nct6775_attr_mode(data, attr);
2617 }
2618
2619 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2620 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2621                 FAN_ALARM_BASE);
2622 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2623                 store_beep, FAN_ALARM_BASE);
2624 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2625                 store_fan_pulses, 0);
2626 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2627                 store_fan_min, 0);
2628 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2629
2630 /*
2631  * nct6775_fan_is_visible uses the index into the following array
2632  * to determine if attributes should be created or not.
2633  * Any change in order or content must be matched.
2634  */
2635 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2636         &sensor_dev_template_fan_input,
2637         &sensor_dev_template_fan_alarm, /* 1 */
2638         &sensor_dev_template_fan_beep,  /* 2 */
2639         &sensor_dev_template_fan_pulses,
2640         &sensor_dev_template_fan_min,   /* 4 */
2641         &sensor_dev_template_fan_div,   /* 5 */
2642         NULL
2643 };
2644
2645 static const struct sensor_template_group nct6775_fan_template_group = {
2646         .templates = nct6775_attributes_fan_template,
2647         .is_visible = nct6775_fan_is_visible,
2648         .base = 1,
2649 };
2650
2651 static ssize_t
2652 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2653 {
2654         struct nct6775_data *data = nct6775_update_device(dev);
2655         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2656         int nr = sattr->index;
2657
2658         if (IS_ERR(data))
2659                 return PTR_ERR(data);
2660
2661         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2662 }
2663
2664 static ssize_t
2665 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2666 {
2667         struct nct6775_data *data = nct6775_update_device(dev);
2668         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2669         int nr = sattr->nr;
2670         int index = sattr->index;
2671
2672         if (IS_ERR(data))
2673                 return PTR_ERR(data);
2674
2675         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2676 }
2677
2678 static ssize_t
2679 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2680            size_t count)
2681 {
2682         struct nct6775_data *data = dev_get_drvdata(dev);
2683         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2684         int nr = sattr->nr;
2685         int index = sattr->index;
2686         int err;
2687         long val;
2688
2689         err = kstrtol(buf, 10, &val);
2690         if (err < 0)
2691                 return err;
2692
2693         mutex_lock(&data->update_lock);
2694         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2695         err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2696         mutex_unlock(&data->update_lock);
2697         return err ? : count;
2698 }
2699
2700 static ssize_t
2701 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2702 {
2703         struct nct6775_data *data = nct6775_update_device(dev);
2704         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2705
2706         if (IS_ERR(data))
2707                 return PTR_ERR(data);
2708
2709         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2710 }
2711
2712 static ssize_t
2713 store_temp_offset(struct device *dev, struct device_attribute *attr,
2714                   const char *buf, size_t count)
2715 {
2716         struct nct6775_data *data = dev_get_drvdata(dev);
2717         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2718         int nr = sattr->index;
2719         long val;
2720         int err;
2721
2722         err = kstrtol(buf, 10, &val);
2723         if (err < 0)
2724                 return err;
2725
2726         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2727
2728         mutex_lock(&data->update_lock);
2729         data->temp_offset[nr] = val;
2730         err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2731         mutex_unlock(&data->update_lock);
2732
2733         return err ? : count;
2734 }
2735
2736 static ssize_t
2737 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2738 {
2739         struct nct6775_data *data = nct6775_update_device(dev);
2740         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2741         int nr = sattr->index;
2742
2743         if (IS_ERR(data))
2744                 return PTR_ERR(data);
2745
2746         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2747 }
2748
2749 static ssize_t
2750 store_temp_type(struct device *dev, struct device_attribute *attr,
2751                 const char *buf, size_t count)
2752 {
2753         struct nct6775_data *data = nct6775_update_device(dev);
2754         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2755         int nr = sattr->index;
2756         unsigned long val;
2757         int err;
2758         u8 vbit, dbit;
2759         u16 vbat, diode;
2760
2761         if (IS_ERR(data))
2762                 return PTR_ERR(data);
2763
2764         err = kstrtoul(buf, 10, &val);
2765         if (err < 0)
2766                 return err;
2767
2768         if (val != 1 && val != 3 && val != 4)
2769                 return -EINVAL;
2770
2771         mutex_lock(&data->update_lock);
2772
2773         data->temp_type[nr] = val;
2774         vbit = 0x02 << nr;
2775         dbit = data->DIODE_MASK << nr;
2776
2777         err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2778         if (err)
2779                 goto out;
2780         vbat &= ~vbit;
2781
2782         err = nct6775_read_value(data, data->REG_DIODE, &diode);
2783         if (err)
2784                 goto out;
2785         diode &= ~dbit;
2786
2787         switch (val) {
2788         case 1: /* CPU diode (diode, current mode) */
2789                 vbat |= vbit;
2790                 diode |= dbit;
2791                 break;
2792         case 3: /* diode, voltage mode */
2793                 vbat |= dbit;
2794                 break;
2795         case 4: /* thermistor */
2796                 break;
2797         }
2798         err = nct6775_write_value(data, data->REG_VBAT, vbat);
2799         if (err)
2800                 goto out;
2801         err = nct6775_write_value(data, data->REG_DIODE, diode);
2802 out:
2803         mutex_unlock(&data->update_lock);
2804         return err ? : count;
2805 }
2806
2807 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2808                                        struct attribute *attr, int index)
2809 {
2810         struct device *dev = kobj_to_dev(kobj);
2811         struct nct6775_data *data = dev_get_drvdata(dev);
2812         int temp = index / 10;  /* temp index */
2813         int nr = index % 10;    /* attribute index */
2814
2815         if (!(data->have_temp & BIT(temp)))
2816                 return 0;
2817
2818         if (nr == 1 && !data->temp_label)
2819                 return 0;
2820
2821         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2822                 return 0;                               /* alarm */
2823
2824         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2825                 return 0;                               /* beep */
2826
2827         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2828                 return 0;
2829
2830         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2831                 return 0;
2832
2833         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2834                 return 0;
2835
2836         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2837                 return 0;
2838
2839         /* offset and type only apply to fixed sensors */
2840         if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2841                 return 0;
2842
2843         return nct6775_attr_mode(data, attr);
2844 }
2845
2846 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2847 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2848 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2849                   store_temp, 0, 1);
2850 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2851                   show_temp, store_temp, 0, 2);
2852 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2853                   store_temp, 0, 3);
2854 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2855                   store_temp, 0, 4);
2856 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2857                 show_temp_offset, store_temp_offset, 0);
2858 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2859                 store_temp_type, 0);
2860 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2861 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2862                 store_temp_beep, 0);
2863
2864 /*
2865  * nct6775_temp_is_visible uses the index into the following array
2866  * to determine if attributes should be created or not.
2867  * Any change in order or content must be matched.
2868  */
2869 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2870         &sensor_dev_template_temp_input,
2871         &sensor_dev_template_temp_label,
2872         &sensor_dev_template_temp_alarm,        /* 2 */
2873         &sensor_dev_template_temp_beep,         /* 3 */
2874         &sensor_dev_template_temp_max,          /* 4 */
2875         &sensor_dev_template_temp_max_hyst,     /* 5 */
2876         &sensor_dev_template_temp_crit,         /* 6 */
2877         &sensor_dev_template_temp_lcrit,        /* 7 */
2878         &sensor_dev_template_temp_offset,       /* 8 */
2879         &sensor_dev_template_temp_type,         /* 9 */
2880         NULL
2881 };
2882
2883 static const struct sensor_template_group nct6775_temp_template_group = {
2884         .templates = nct6775_attributes_temp_template,
2885         .is_visible = nct6775_temp_is_visible,
2886         .base = 1,
2887 };
2888
2889 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2890 {
2891         struct nct6775_data *data = nct6775_update_device(dev);
2892         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2893
2894         if (IS_ERR(data))
2895                 return PTR_ERR(data);
2896
2897         return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2898 }
2899
2900 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2901 {
2902         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2903
2904         return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2905 }
2906
2907 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2908 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2909
2910 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2911                                                int index)
2912 {
2913         struct device *dev = kobj_to_dev(kobj);
2914         struct nct6775_data *data = dev_get_drvdata(dev);
2915         int temp = index / 2;
2916
2917         return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2918 }
2919
2920 /*
2921  * The index calculation in nct6775_tsi_temp_is_visible() must be kept in
2922  * sync with the size of this array.
2923  */
2924 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2925         &sensor_dev_template_tsi_temp_input,
2926         &sensor_dev_template_tsi_temp_label,
2927         NULL
2928 };
2929
2930 static ssize_t
2931 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2932 {
2933         struct nct6775_data *data = nct6775_update_device(dev);
2934         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2935
2936         if (IS_ERR(data))
2937                 return PTR_ERR(data);
2938
2939         return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2940 }
2941
2942 static ssize_t
2943 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2944                const char *buf, size_t count)
2945 {
2946         struct nct6775_data *data = dev_get_drvdata(dev);
2947         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2948         int nr = sattr->index;
2949         unsigned long val;
2950         int err;
2951         u16 reg;
2952
2953         err = kstrtoul(buf, 10, &val);
2954         if (err < 0)
2955                 return err;
2956
2957         if (val > 1)
2958                 return -EINVAL;
2959
2960         /* Setting DC mode (0) is not supported for all chips/channels */
2961         if (data->REG_PWM_MODE[nr] == 0) {
2962                 if (!val)
2963                         return -EINVAL;
2964                 return count;
2965         }
2966
2967         mutex_lock(&data->update_lock);
2968         data->pwm_mode[nr] = val;
2969         err = nct6775_read_value(data, data->REG_PWM_MODE[nr], &reg);
2970         if (err)
2971                 goto out;
2972         reg &= ~data->PWM_MODE_MASK[nr];
2973         if (!val)
2974                 reg |= data->PWM_MODE_MASK[nr];
2975         err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2976 out:
2977         mutex_unlock(&data->update_lock);
2978         return err ? : count;
2979 }
2980
2981 static ssize_t
2982 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2983 {
2984         struct nct6775_data *data = nct6775_update_device(dev);
2985         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2986         int nr = sattr->nr;
2987         int index = sattr->index;
2988         int err;
2989         u16 pwm;
2990
2991         if (IS_ERR(data))
2992                 return PTR_ERR(data);
2993
2994         /*
2995          * For automatic fan control modes, show current pwm readings.
2996          * Otherwise, show the configured value.
2997          */
2998         if (index == 0 && data->pwm_enable[nr] > manual) {
2999                 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
3000                 if (err)
3001                         return err;
3002         } else {
3003                 pwm = data->pwm[index][nr];
3004         }
3005
3006         return sprintf(buf, "%d\n", pwm);
3007 }
3008
3009 static ssize_t
3010 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
3011           size_t count)
3012 {
3013         struct nct6775_data *data = dev_get_drvdata(dev);
3014         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3015         int nr = sattr->nr;
3016         int index = sattr->index;
3017         unsigned long val;
3018         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
3019         int maxval[7]
3020           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
3021         int err;
3022         u16 reg;
3023
3024         err = kstrtoul(buf, 10, &val);
3025         if (err < 0)
3026                 return err;
3027         val = clamp_val(val, minval[index], maxval[index]);
3028
3029         mutex_lock(&data->update_lock);
3030         data->pwm[index][nr] = val;
3031         err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
3032         if (err)
3033                 goto out;
3034         if (index == 2) { /* floor: disable if val == 0 */
3035                 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], &reg);
3036                 if (err)
3037                         goto out;
3038                 reg &= 0x7f;
3039                 if (val)
3040                         reg |= 0x80;
3041                 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
3042         }
3043 out:
3044         mutex_unlock(&data->update_lock);
3045         return err ? : count;
3046 }
3047
3048 /* Returns 0 if OK, -EINVAL otherwise */
3049 static int check_trip_points(struct nct6775_data *data, int nr)
3050 {
3051         int i;
3052
3053         for (i = 0; i < data->auto_pwm_num - 1; i++) {
3054                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
3055                         return -EINVAL;
3056         }
3057         for (i = 0; i < data->auto_pwm_num - 1; i++) {
3058                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
3059                         return -EINVAL;
3060         }
3061         /* validate critical temperature and pwm if enabled (pwm > 0) */
3062         if (data->auto_pwm[nr][data->auto_pwm_num]) {
3063                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
3064                                 data->auto_temp[nr][data->auto_pwm_num] ||
3065                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
3066                                 data->auto_pwm[nr][data->auto_pwm_num])
3067                         return -EINVAL;
3068         }
3069         return 0;
3070 }
3071
3072 static int pwm_update_registers(struct nct6775_data *data, int nr)
3073 {
3074         u16 reg;
3075         int err;
3076
3077         switch (data->pwm_enable[nr]) {
3078         case off:
3079         case manual:
3080                 break;
3081         case speed_cruise:
3082                 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
3083                 if (err)
3084                         return err;
3085                 reg = (reg & ~data->tolerance_mask) |
3086                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
3087                 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
3088                 if (err)
3089                         return err;
3090                 err = nct6775_write_value(data, data->REG_TARGET[nr],
3091                                           data->target_speed[nr] & 0xff);
3092                 if (err)
3093                         return err;
3094                 if (data->REG_TOLERANCE_H) {
3095                         reg = (data->target_speed[nr] >> 8) & 0x0f;
3096                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
3097                         err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
3098                         if (err)
3099                                 return err;
3100                 }
3101                 break;
3102         case thermal_cruise:
3103                 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
3104                 if (err)
3105                         return err;
3106                 fallthrough;
3107         default:
3108                 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
3109                 if (err)
3110                         return err;
3111                 reg = (reg & ~data->tolerance_mask) |
3112                   data->temp_tolerance[0][nr];
3113                 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
3114                 if (err)
3115                         return err;
3116                 break;
3117         }
3118
3119         return 0;
3120 }
3121
3122 static ssize_t
3123 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
3124 {
3125         struct nct6775_data *data = nct6775_update_device(dev);
3126         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3127
3128         if (IS_ERR(data))
3129                 return PTR_ERR(data);
3130
3131         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
3132 }
3133
3134 static ssize_t
3135 store_pwm_enable(struct device *dev, struct device_attribute *attr,
3136                  const char *buf, size_t count)
3137 {
3138         struct nct6775_data *data = dev_get_drvdata(dev);
3139         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3140         int nr = sattr->index;
3141         unsigned long val;
3142         int err;
3143         u16 reg;
3144
3145         err = kstrtoul(buf, 10, &val);
3146         if (err < 0)
3147                 return err;
3148
3149         if (val > sf4)
3150                 return -EINVAL;
3151
3152         if (val == sf3 && data->kind != nct6775)
3153                 return -EINVAL;
3154
3155         if (val == sf4 && check_trip_points(data, nr)) {
3156                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
3157                 dev_err(dev, "Adjust trip points and try again\n");
3158                 return -EINVAL;
3159         }
3160
3161         mutex_lock(&data->update_lock);
3162         data->pwm_enable[nr] = val;
3163         if (val == off) {
3164                 /*
3165                  * turn off pwm control: select manual mode, set pwm to maximum
3166                  */
3167                 data->pwm[0][nr] = 255;
3168                 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
3169                 if (err)
3170                         goto out;
3171         }
3172         err = pwm_update_registers(data, nr);
3173         if (err)
3174                 goto out;
3175         err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
3176         if (err)
3177                 goto out;
3178         reg &= 0x0f;
3179         reg |= pwm_enable_to_reg(val) << 4;
3180         err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
3181 out:
3182         mutex_unlock(&data->update_lock);
3183         return err ? : count;
3184 }
3185
3186 static ssize_t
3187 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
3188 {
3189         int i, sel = 0;
3190
3191         for (i = 0; i < NUM_TEMP; i++) {
3192                 if (!(data->have_temp & BIT(i)))
3193                         continue;
3194                 if (src == data->temp_src[i]) {
3195                         sel = i + 1;
3196                         break;
3197                 }
3198         }
3199
3200         return sprintf(buf, "%d\n", sel);
3201 }
3202
3203 static ssize_t
3204 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
3205 {
3206         struct nct6775_data *data = nct6775_update_device(dev);
3207         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3208         int index = sattr->index;
3209
3210         if (IS_ERR(data))
3211                 return PTR_ERR(data);
3212
3213         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
3214 }
3215
3216 static ssize_t
3217 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
3218                    const char *buf, size_t count)
3219 {
3220         struct nct6775_data *data = nct6775_update_device(dev);
3221         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3222         int nr = sattr->index;
3223         unsigned long val;
3224         int err, src;
3225         u16 reg;
3226
3227         if (IS_ERR(data))
3228                 return PTR_ERR(data);
3229
3230         err = kstrtoul(buf, 10, &val);
3231         if (err < 0)
3232                 return err;
3233         if (val == 0 || val > NUM_TEMP)
3234                 return -EINVAL;
3235         if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
3236                 return -EINVAL;
3237
3238         mutex_lock(&data->update_lock);
3239         src = data->temp_src[val - 1];
3240         data->pwm_temp_sel[nr] = src;
3241         err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], &reg);
3242         if (err)
3243                 goto out;
3244         reg &= 0xe0;
3245         reg |= src;
3246         err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
3247 out:
3248         mutex_unlock(&data->update_lock);
3249
3250         return err ? : count;
3251 }
3252
3253 static ssize_t
3254 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
3255                          char *buf)
3256 {
3257         struct nct6775_data *data = nct6775_update_device(dev);
3258         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3259         int index = sattr->index;
3260
3261         if (IS_ERR(data))
3262                 return PTR_ERR(data);
3263
3264         return show_pwm_temp_sel_common(data, buf,
3265                                         data->pwm_weight_temp_sel[index]);
3266 }
3267
3268 static ssize_t
3269 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
3270                           const char *buf, size_t count)
3271 {
3272         struct nct6775_data *data = nct6775_update_device(dev);
3273         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3274         int nr = sattr->index;
3275         unsigned long val;
3276         int err, src;
3277         u16 reg;
3278
3279         if (IS_ERR(data))
3280                 return PTR_ERR(data);
3281
3282         err = kstrtoul(buf, 10, &val);
3283         if (err < 0)
3284                 return err;
3285         if (val > NUM_TEMP)
3286                 return -EINVAL;
3287         val = array_index_nospec(val, NUM_TEMP + 1);
3288         if (val && (!(data->have_temp & BIT(val - 1)) ||
3289                     !data->temp_src[val - 1]))
3290                 return -EINVAL;
3291
3292         mutex_lock(&data->update_lock);
3293         if (val) {
3294                 src = data->temp_src[val - 1];
3295                 data->pwm_weight_temp_sel[nr] = src;
3296                 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], &reg);
3297                 if (err)
3298                         goto out;
3299                 reg &= 0xe0;
3300                 reg |= (src | 0x80);
3301                 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
3302         } else {
3303                 data->pwm_weight_temp_sel[nr] = 0;
3304                 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], &reg);
3305                 if (err)
3306                         goto out;
3307                 reg &= 0x7f;
3308                 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
3309         }
3310 out:
3311         mutex_unlock(&data->update_lock);
3312
3313         return err ? : count;
3314 }
3315
3316 static ssize_t
3317 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
3318 {
3319         struct nct6775_data *data = nct6775_update_device(dev);
3320         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3321
3322         if (IS_ERR(data))
3323                 return PTR_ERR(data);
3324
3325         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
3326 }
3327
3328 static ssize_t
3329 store_target_temp(struct device *dev, struct device_attribute *attr,
3330                   const char *buf, size_t count)
3331 {
3332         struct nct6775_data *data = dev_get_drvdata(dev);
3333         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3334         int nr = sattr->index;
3335         unsigned long val;
3336         int err;
3337
3338         err = kstrtoul(buf, 10, &val);
3339         if (err < 0)
3340                 return err;
3341
3342         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
3343                         data->target_temp_mask);
3344
3345         mutex_lock(&data->update_lock);
3346         data->target_temp[nr] = val;
3347         err = pwm_update_registers(data, nr);
3348         mutex_unlock(&data->update_lock);
3349         return err ? : count;
3350 }
3351
3352 static ssize_t
3353 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
3354 {
3355         struct nct6775_data *data = nct6775_update_device(dev);
3356         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3357         int nr = sattr->index;
3358
3359         if (IS_ERR(data))
3360                 return PTR_ERR(data);
3361
3362         return sprintf(buf, "%d\n",
3363                        fan_from_reg16(data->target_speed[nr],
3364                                       data->fan_div[nr]));
3365 }
3366
3367 static ssize_t
3368 store_target_speed(struct device *dev, struct device_attribute *attr,
3369                    const char *buf, size_t count)
3370 {
3371         struct nct6775_data *data = dev_get_drvdata(dev);
3372         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3373         int nr = sattr->index;
3374         unsigned long val;
3375         int err;
3376         u16 speed;
3377
3378         err = kstrtoul(buf, 10, &val);
3379         if (err < 0)
3380                 return err;
3381
3382         val = clamp_val(val, 0, 1350000U);
3383         speed = fan_to_reg(val, data->fan_div[nr]);
3384
3385         mutex_lock(&data->update_lock);
3386         data->target_speed[nr] = speed;
3387         err = pwm_update_registers(data, nr);
3388         mutex_unlock(&data->update_lock);
3389         return err ? : count;
3390 }
3391
3392 static ssize_t
3393 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
3394                     char *buf)
3395 {
3396         struct nct6775_data *data = nct6775_update_device(dev);
3397         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3398         int nr = sattr->nr;
3399         int index = sattr->index;
3400
3401         if (IS_ERR(data))
3402                 return PTR_ERR(data);
3403
3404         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
3405 }
3406
3407 static ssize_t
3408 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
3409                      const char *buf, size_t count)
3410 {
3411         struct nct6775_data *data = dev_get_drvdata(dev);
3412         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3413         int nr = sattr->nr;
3414         int index = sattr->index;
3415         unsigned long val;
3416         int err;
3417
3418         err = kstrtoul(buf, 10, &val);
3419         if (err < 0)
3420                 return err;
3421
3422         /* Limit tolerance as needed */
3423         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
3424
3425         mutex_lock(&data->update_lock);
3426         data->temp_tolerance[index][nr] = val;
3427         if (index)
3428                 err = pwm_update_registers(data, nr);
3429         else
3430                 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
3431         mutex_unlock(&data->update_lock);
3432         return err ? : count;
3433 }
3434
3435 /*
3436  * Fan speed tolerance is a tricky beast, since the associated register is
3437  * a tick counter, but the value is reported and configured as rpm.
3438  * Compute resulting low and high rpm values and report the difference.
3439  * A fan speed tolerance only makes sense if a fan target speed has been
3440  * configured, so only display values other than 0 if that is the case.
3441  */
3442 static ssize_t
3443 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
3444                      char *buf)
3445 {
3446         struct nct6775_data *data = nct6775_update_device(dev);
3447         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3448         int nr = sattr->index;
3449         int target, tolerance = 0;
3450
3451         if (IS_ERR(data))
3452                 return PTR_ERR(data);
3453
3454         target = data->target_speed[nr];
3455
3456         if (target) {
3457                 int low = target - data->target_speed_tolerance[nr];
3458                 int high = target + data->target_speed_tolerance[nr];
3459
3460                 if (low <= 0)
3461                         low = 1;
3462                 if (high > 0xffff)
3463                         high = 0xffff;
3464                 if (high < low)
3465                         high = low;
3466
3467                 tolerance = (fan_from_reg16(low, data->fan_div[nr])
3468                              - fan_from_reg16(high, data->fan_div[nr])) / 2;
3469         }
3470
3471         return sprintf(buf, "%d\n", tolerance);
3472 }
3473
3474 static ssize_t
3475 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
3476                       const char *buf, size_t count)
3477 {
3478         struct nct6775_data *data = dev_get_drvdata(dev);
3479         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3480         int nr = sattr->index;
3481         unsigned long val;
3482         int err;
3483         int low, high;
3484
3485         err = kstrtoul(buf, 10, &val);
3486         if (err < 0)
3487                 return err;
3488
3489         high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
3490         low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
3491         if (low <= 0)
3492                 low = 1;
3493         if (high < low)
3494                 high = low;
3495
3496         val = (fan_to_reg(low, data->fan_div[nr]) -
3497                fan_to_reg(high, data->fan_div[nr])) / 2;
3498
3499         /* Limit tolerance as needed */
3500         val = clamp_val(val, 0, data->speed_tolerance_limit);
3501
3502         mutex_lock(&data->update_lock);
3503         data->target_speed_tolerance[nr] = val;
3504         err = pwm_update_registers(data, nr);
3505         mutex_unlock(&data->update_lock);
3506         return err ? : count;
3507 }
3508
3509 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
3510 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
3511                 store_pwm_mode, 0);
3512 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
3513                 store_pwm_enable, 0);
3514 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
3515                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
3516 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
3517                 show_target_temp, store_target_temp, 0);
3518 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
3519                 show_target_speed, store_target_speed, 0);
3520 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
3521                 show_speed_tolerance, store_speed_tolerance, 0);
3522
3523 /* Smart Fan registers */
3524
3525 static ssize_t
3526 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
3527 {
3528         struct nct6775_data *data = nct6775_update_device(dev);
3529         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3530         int nr = sattr->nr;
3531         int index = sattr->index;
3532
3533         if (IS_ERR(data))
3534                 return PTR_ERR(data);
3535
3536         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
3537 }
3538
3539 static ssize_t
3540 store_weight_temp(struct device *dev, struct device_attribute *attr,
3541                   const char *buf, size_t count)
3542 {
3543         struct nct6775_data *data = dev_get_drvdata(dev);
3544         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3545         int nr = sattr->nr;
3546         int index = sattr->index;
3547         unsigned long val;
3548         int err;
3549
3550         err = kstrtoul(buf, 10, &val);
3551         if (err < 0)
3552                 return err;
3553
3554         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
3555
3556         mutex_lock(&data->update_lock);
3557         data->weight_temp[index][nr] = val;
3558         err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
3559         mutex_unlock(&data->update_lock);
3560         return err ? : count;
3561 }
3562
3563 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
3564                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3565 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
3566                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
3567 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3568                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
3569 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3570                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
3571 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
3572                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
3573 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
3574                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
3575
3576 static ssize_t
3577 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3578 {
3579         struct nct6775_data *data = nct6775_update_device(dev);
3580         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3581         int nr = sattr->nr;
3582         int index = sattr->index;
3583
3584         if (IS_ERR(data))
3585                 return PTR_ERR(data);
3586
3587         return sprintf(buf, "%d\n",
3588                        step_time_from_reg(data->fan_time[index][nr],
3589                                           data->pwm_mode[nr]));
3590 }
3591
3592 static ssize_t
3593 store_fan_time(struct device *dev, struct device_attribute *attr,
3594                const char *buf, size_t count)
3595 {
3596         struct nct6775_data *data = dev_get_drvdata(dev);
3597         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3598         int nr = sattr->nr;
3599         int index = sattr->index;
3600         unsigned long val;
3601         int err;
3602
3603         err = kstrtoul(buf, 10, &val);
3604         if (err < 0)
3605                 return err;
3606
3607         val = step_time_to_reg(val, data->pwm_mode[nr]);
3608         mutex_lock(&data->update_lock);
3609         data->fan_time[index][nr] = val;
3610         err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3611         mutex_unlock(&data->update_lock);
3612         return err ? : count;
3613 }
3614
3615 static ssize_t
3616 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3617 {
3618         struct nct6775_data *data = nct6775_update_device(dev);
3619         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3620
3621         if (IS_ERR(data))
3622                 return PTR_ERR(data);
3623
3624         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3625 }
3626
3627 static ssize_t
3628 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3629                const char *buf, size_t count)
3630 {
3631         struct nct6775_data *data = dev_get_drvdata(dev);
3632         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3633         int nr = sattr->nr;
3634         int point = sattr->index;
3635         unsigned long val;
3636         int err;
3637         u16 reg;
3638
3639         err = kstrtoul(buf, 10, &val);
3640         if (err < 0)
3641                 return err;
3642         if (val > 255)
3643                 return -EINVAL;
3644
3645         if (point == data->auto_pwm_num) {
3646                 if (data->kind != nct6775 && !val)
3647                         return -EINVAL;
3648                 if (data->kind != nct6779 && val)
3649                         val = 0xff;
3650         }
3651
3652         mutex_lock(&data->update_lock);
3653         data->auto_pwm[nr][point] = val;
3654         if (point < data->auto_pwm_num) {
3655                 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3656                                           data->auto_pwm[nr][point]);
3657         } else {
3658                 switch (data->kind) {
3659                 case nct6775:
3660                         /* disable if needed (pwm == 0) */
3661                         err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], &reg);
3662                         if (err)
3663                                 break;
3664                         if (val)
3665                                 reg |= 0x02;
3666                         else
3667                                 reg &= ~0x02;
3668                         err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3669                         break;
3670                 case nct6776:
3671                         break; /* always enabled, nothing to do */
3672                 case nct6106:
3673                 case nct6116:
3674                 case nct6779:
3675                 case nct6791:
3676                 case nct6792:
3677                 case nct6793:
3678                 case nct6795:
3679                 case nct6796:
3680                 case nct6797:
3681                 case nct6798:
3682                         err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3683                         if (err)
3684                                 break;
3685                         err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], &reg);
3686                         if (err)
3687                                 break;
3688                         if (val == 255)
3689                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3690                         else
3691                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3692                         err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3693                         break;
3694                 }
3695         }
3696         mutex_unlock(&data->update_lock);
3697         return err ? : count;
3698 }
3699
3700 static ssize_t
3701 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3702 {
3703         struct nct6775_data *data = nct6775_update_device(dev);
3704         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3705         int nr = sattr->nr;
3706         int point = sattr->index;
3707
3708         if (IS_ERR(data))
3709                 return PTR_ERR(data);
3710
3711         /*
3712          * We don't know for sure if the temperature is signed or unsigned.
3713          * Assume it is unsigned.
3714          */
3715         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3716 }
3717
3718 static ssize_t
3719 store_auto_temp(struct device *dev, struct device_attribute *attr,
3720                 const char *buf, size_t count)
3721 {
3722         struct nct6775_data *data = dev_get_drvdata(dev);
3723         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3724         int nr = sattr->nr;
3725         int point = sattr->index;
3726         unsigned long val;
3727         int err;
3728
3729         err = kstrtoul(buf, 10, &val);
3730         if (err)
3731                 return err;
3732         if (val > 255000)
3733                 return -EINVAL;
3734
3735         mutex_lock(&data->update_lock);
3736         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3737         if (point < data->auto_pwm_num) {
3738                 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3739                                           data->auto_temp[nr][point]);
3740         } else {
3741                 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3742                                           data->auto_temp[nr][point]);
3743         }
3744         mutex_unlock(&data->update_lock);
3745         return err ? : count;
3746 }
3747
3748 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3749                                       struct attribute *attr, int index)
3750 {
3751         struct device *dev = kobj_to_dev(kobj);
3752         struct nct6775_data *data = dev_get_drvdata(dev);
3753         int pwm = index / 36;   /* pwm index */
3754         int nr = index % 36;    /* attribute index */
3755
3756         if (!(data->has_pwm & BIT(pwm)))
3757                 return 0;
3758
3759         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3760                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3761                         return 0;
3762         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3763                 return 0;
3764         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3765                 return 0;
3766         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3767                 return 0;
3768
3769         if (nr >= 22 && nr <= 35) {             /* auto point */
3770                 int api = (nr - 22) / 2;        /* auto point index */
3771
3772                 if (api > data->auto_pwm_num)
3773                         return 0;
3774         }
3775         return nct6775_attr_mode(data, attr);
3776 }
3777
3778 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3779                   show_fan_time, store_fan_time, 0, 0);
3780 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3781                   show_fan_time, store_fan_time, 0, 1);
3782 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3783                   show_fan_time, store_fan_time, 0, 2);
3784 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3785                   store_pwm, 0, 1);
3786 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3787                   store_pwm, 0, 2);
3788 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3789                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3790 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3791                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3792                   0, 1);
3793
3794 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3795                   0, 3);
3796
3797 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3798                   store_pwm, 0, 4);
3799
3800 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3801                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3802 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3803                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3804
3805 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3806                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3807 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3808                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3809
3810 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3811                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3812 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3813                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3814
3815 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3816                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3817 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3818                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3819
3820 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3821                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3822 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3823                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3824
3825 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3826                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3827 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3828                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3829
3830 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3831                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3832 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3833                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3834
3835 /*
3836  * nct6775_pwm_is_visible uses the index into the following array
3837  * to determine if attributes should be created or not.
3838  * Any change in order or content must be matched.
3839  */
3840 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3841         &sensor_dev_template_pwm,
3842         &sensor_dev_template_pwm_mode,
3843         &sensor_dev_template_pwm_enable,
3844         &sensor_dev_template_pwm_temp_sel,
3845         &sensor_dev_template_pwm_temp_tolerance,
3846         &sensor_dev_template_pwm_crit_temp_tolerance,
3847         &sensor_dev_template_pwm_target_temp,
3848         &sensor_dev_template_fan_target,
3849         &sensor_dev_template_fan_tolerance,
3850         &sensor_dev_template_pwm_stop_time,
3851         &sensor_dev_template_pwm_step_up_time,
3852         &sensor_dev_template_pwm_step_down_time,
3853         &sensor_dev_template_pwm_start,
3854         &sensor_dev_template_pwm_floor,
3855         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3856         &sensor_dev_template_pwm_weight_temp_step,
3857         &sensor_dev_template_pwm_weight_temp_step_tol,
3858         &sensor_dev_template_pwm_weight_temp_step_base,
3859         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3860         &sensor_dev_template_pwm_max,                   /* 19 */
3861         &sensor_dev_template_pwm_step,                  /* 20 */
3862         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3863         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3864         &sensor_dev_template_pwm_auto_point1_temp,
3865         &sensor_dev_template_pwm_auto_point2_pwm,
3866         &sensor_dev_template_pwm_auto_point2_temp,
3867         &sensor_dev_template_pwm_auto_point3_pwm,
3868         &sensor_dev_template_pwm_auto_point3_temp,
3869         &sensor_dev_template_pwm_auto_point4_pwm,
3870         &sensor_dev_template_pwm_auto_point4_temp,
3871         &sensor_dev_template_pwm_auto_point5_pwm,
3872         &sensor_dev_template_pwm_auto_point5_temp,
3873         &sensor_dev_template_pwm_auto_point6_pwm,
3874         &sensor_dev_template_pwm_auto_point6_temp,
3875         &sensor_dev_template_pwm_auto_point7_pwm,
3876         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3877
3878         NULL
3879 };
3880
3881 static const struct sensor_template_group nct6775_pwm_template_group = {
3882         .templates = nct6775_attributes_pwm_template,
3883         .is_visible = nct6775_pwm_is_visible,
3884         .base = 1,
3885 };
3886
3887 static ssize_t
3888 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
3889 {
3890         struct nct6775_data *data = dev_get_drvdata(dev);
3891
3892         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3893 }
3894
3895 static DEVICE_ATTR_RO(cpu0_vid);
3896
3897 /* Case open detection */
3898
3899 static ssize_t
3900 clear_caseopen(struct device *dev, struct device_attribute *attr,
3901                const char *buf, size_t count)
3902 {
3903         struct nct6775_data *data = dev_get_drvdata(dev);
3904         struct nct6775_sio_data *sio_data = data->sio_data;
3905         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3906         unsigned long val;
3907         u8 reg;
3908         int ret;
3909
3910         if (kstrtoul(buf, 10, &val) || val != 0)
3911                 return -EINVAL;
3912
3913         mutex_lock(&data->update_lock);
3914
3915         /*
3916          * Use CR registers to clear caseopen status.
3917          * The CR registers are the same for all chips, and not all chips
3918          * support clearing the caseopen status through "regular" registers.
3919          */
3920         ret = sio_data->sio_enter(sio_data);
3921         if (ret) {
3922                 count = ret;
3923                 goto error;
3924         }
3925
3926         sio_data->sio_select(sio_data, NCT6775_LD_ACPI);
3927         reg = sio_data->sio_inb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3928         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3929         sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3930         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3931         sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3932         sio_data->sio_exit(sio_data);
3933
3934         data->valid = false;    /* Force cache refresh */
3935 error:
3936         mutex_unlock(&data->update_lock);
3937         return count;
3938 }
3939
3940 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3941                           clear_caseopen, INTRUSION_ALARM_BASE);
3942 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3943                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3944 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3945                           store_beep, INTRUSION_ALARM_BASE);
3946 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3947                           store_beep, INTRUSION_ALARM_BASE + 1);
3948 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3949                           store_beep, BEEP_ENABLE_BASE);
3950
3951 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3952                                         struct attribute *attr, int index)
3953 {
3954         struct device *dev = kobj_to_dev(kobj);
3955         struct nct6775_data *data = dev_get_drvdata(dev);
3956
3957         if (index == 0 && !data->have_vid)
3958                 return 0;
3959
3960         if (index == 1 || index == 2) {
3961                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3962                         return 0;
3963         }
3964
3965         if (index == 3 || index == 4) {
3966                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3967                         return 0;
3968         }
3969
3970         return nct6775_attr_mode(data, attr);
3971 }
3972
3973 /*
3974  * nct6775_other_is_visible uses the index into the following array
3975  * to determine if attributes should be created or not.
3976  * Any change in order or content must be matched.
3977  */
3978 static struct attribute *nct6775_attributes_other[] = {
3979         &dev_attr_cpu0_vid.attr,                                /* 0 */
3980         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3981         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3982         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3983         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3984         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3985
3986         NULL
3987 };
3988
3989 static const struct attribute_group nct6775_group_other = {
3990         .attrs = nct6775_attributes_other,
3991         .is_visible = nct6775_other_is_visible,
3992 };
3993
3994 static inline int nct6775_init_device(struct nct6775_data *data)
3995 {
3996         int i, err;
3997         u16 tmp, diode;
3998
3999         /* Start monitoring if needed */
4000         if (data->REG_CONFIG) {
4001                 err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
4002                 if (err)
4003                         return err;
4004                 if (!(tmp & 0x01)) {
4005                         err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
4006                         if (err)
4007                                 return err;
4008                 }
4009         }
4010
4011         /* Enable temperature sensors if needed */
4012         for (i = 0; i < NUM_TEMP; i++) {
4013                 if (!(data->have_temp & BIT(i)))
4014                         continue;
4015                 if (!data->reg_temp_config[i])
4016                         continue;
4017                 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
4018                 if (err)
4019                         return err;
4020                 if (tmp & 0x01) {
4021                         err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
4022                         if (err)
4023                                 return err;
4024                 }
4025         }
4026
4027         /* Enable VBAT monitoring if needed */
4028         err = nct6775_read_value(data, data->REG_VBAT, &tmp);
4029         if (err)
4030                 return err;
4031         if (!(tmp & 0x01)) {
4032                 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
4033                 if (err)
4034                         return err;
4035         }
4036
4037         err = nct6775_read_value(data, data->REG_DIODE, &diode);
4038         if (err)
4039                 return err;
4040
4041         for (i = 0; i < data->temp_fixed_num; i++) {
4042                 if (!(data->have_temp_fixed & BIT(i)))
4043                         continue;
4044                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
4045                         data->temp_type[i]
4046                           = 3 - ((diode >> i) & data->DIODE_MASK);
4047                 else                            /* thermistor */
4048                         data->temp_type[i] = 4;
4049         }
4050
4051         return 0;
4052 }
4053
4054 static void
4055 nct6775_check_fan_inputs(struct nct6775_data *data, struct nct6775_sio_data *sio_data)
4056 {
4057         bool fan3pin = false, fan4pin = false, fan4min = false;
4058         bool fan5pin = false, fan6pin = false, fan7pin = false;
4059         bool pwm3pin = false, pwm4pin = false, pwm5pin = false;
4060         bool pwm6pin = false, pwm7pin = false;
4061
4062         /* Store SIO_REG_ENABLE for use during resume */
4063         sio_data->sio_select(sio_data, NCT6775_LD_HWM);
4064         data->sio_reg_enable = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
4065
4066         /* fan4 and fan5 share some pins with the GPIO and serial flash */
4067         if (data->kind == nct6775) {
4068                 int cr2c = sio_data->sio_inb(sio_data, 0x2c);
4069
4070                 fan3pin = cr2c & BIT(6);
4071                 pwm3pin = cr2c & BIT(7);
4072
4073                 /* On NCT6775, fan4 shares pins with the fdc interface */
4074                 fan4pin = !(sio_data->sio_inb(sio_data, 0x2A) & 0x80);
4075         } else if (data->kind == nct6776) {
4076                 bool gpok = sio_data->sio_inb(sio_data, 0x27) & 0x80;
4077                 const char *board_vendor, *board_name;
4078
4079                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
4080                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
4081
4082                 if (board_name && board_vendor &&
4083                     !strcmp(board_vendor, "ASRock")) {
4084                         /*
4085                          * Auxiliary fan monitoring is not enabled on ASRock
4086                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
4087                          * Observed with BIOS version 2.00.
4088                          */
4089                         if (!strcmp(board_name, "Z77 Pro4-M")) {
4090                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
4091                                         data->sio_reg_enable |= 0xe0;
4092                                         sio_data->sio_outb(sio_data, SIO_REG_ENABLE,
4093                                                      data->sio_reg_enable);
4094                                 }
4095                         }
4096                 }
4097
4098                 if (data->sio_reg_enable & 0x80)
4099                         fan3pin = gpok;
4100                 else
4101                         fan3pin = !(sio_data->sio_inb(sio_data, 0x24) & 0x40);
4102
4103                 if (data->sio_reg_enable & 0x40)
4104                         fan4pin = gpok;
4105                 else
4106                         fan4pin = sio_data->sio_inb(sio_data, 0x1C) & 0x01;
4107
4108                 if (data->sio_reg_enable & 0x20)
4109                         fan5pin = gpok;
4110                 else
4111                         fan5pin = sio_data->sio_inb(sio_data, 0x1C) & 0x02;
4112
4113                 fan4min = fan4pin;
4114                 pwm3pin = fan3pin;
4115         } else if (data->kind == nct6106) {
4116                 int cr24 = sio_data->sio_inb(sio_data, 0x24);
4117
4118                 fan3pin = !(cr24 & 0x80);
4119                 pwm3pin = cr24 & 0x08;
4120         } else if (data->kind == nct6116) {
4121                 int cr1a = sio_data->sio_inb(sio_data, 0x1a);
4122                 int cr1b = sio_data->sio_inb(sio_data, 0x1b);
4123                 int cr24 = sio_data->sio_inb(sio_data, 0x24);
4124                 int cr2a = sio_data->sio_inb(sio_data, 0x2a);
4125                 int cr2b = sio_data->sio_inb(sio_data, 0x2b);
4126                 int cr2f = sio_data->sio_inb(sio_data, 0x2f);
4127
4128                 fan3pin = !(cr2b & 0x10);
4129                 fan4pin = (cr2b & 0x80) ||                      // pin 1(2)
4130                         (!(cr2f & 0x10) && (cr1a & 0x04));      // pin 65(66)
4131                 fan5pin = (cr2b & 0x80) ||                      // pin 126(127)
4132                         (!(cr1b & 0x03) && (cr2a & 0x02));      // pin 94(96)
4133
4134                 pwm3pin = fan3pin && (cr24 & 0x08);
4135                 pwm4pin = fan4pin;
4136                 pwm5pin = fan5pin;
4137         } else {
4138                 /*
4139                  * NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D, NCT6796D,
4140                  * NCT6797D, NCT6798D
4141                  */
4142                 int cr1a = sio_data->sio_inb(sio_data, 0x1a);
4143                 int cr1b = sio_data->sio_inb(sio_data, 0x1b);
4144                 int cr1c = sio_data->sio_inb(sio_data, 0x1c);
4145                 int cr1d = sio_data->sio_inb(sio_data, 0x1d);
4146                 int cr2a = sio_data->sio_inb(sio_data, 0x2a);
4147                 int cr2b = sio_data->sio_inb(sio_data, 0x2b);
4148                 int cr2d = sio_data->sio_inb(sio_data, 0x2d);
4149                 int cr2f = sio_data->sio_inb(sio_data, 0x2f);
4150                 bool dsw_en = cr2f & BIT(3);
4151                 bool ddr4_en = cr2f & BIT(4);
4152                 int cre0;
4153                 int creb;
4154                 int cred;
4155
4156                 sio_data->sio_select(sio_data, NCT6775_LD_12);
4157                 cre0 = sio_data->sio_inb(sio_data, 0xe0);
4158                 creb = sio_data->sio_inb(sio_data, 0xeb);
4159                 cred = sio_data->sio_inb(sio_data, 0xed);
4160
4161                 fan3pin = !(cr1c & BIT(5));
4162                 fan4pin = !(cr1c & BIT(6));
4163                 fan5pin = !(cr1c & BIT(7));
4164
4165                 pwm3pin = !(cr1c & BIT(0));
4166                 pwm4pin = !(cr1c & BIT(1));
4167                 pwm5pin = !(cr1c & BIT(2));
4168
4169                 switch (data->kind) {
4170                 case nct6791:
4171                         fan6pin = cr2d & BIT(1);
4172                         pwm6pin = cr2d & BIT(0);
4173                         break;
4174                 case nct6792:
4175                         fan6pin = !dsw_en && (cr2d & BIT(1));
4176                         pwm6pin = !dsw_en && (cr2d & BIT(0));
4177                         break;
4178                 case nct6793:
4179                         fan5pin |= cr1b & BIT(5);
4180                         fan5pin |= creb & BIT(5);
4181
4182                         fan6pin = !dsw_en && (cr2d & BIT(1));
4183                         fan6pin |= creb & BIT(3);
4184
4185                         pwm5pin |= cr2d & BIT(7);
4186                         pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
4187
4188                         pwm6pin = !dsw_en && (cr2d & BIT(0));
4189                         pwm6pin |= creb & BIT(2);
4190                         break;
4191                 case nct6795:
4192                         fan5pin |= cr1b & BIT(5);
4193                         fan5pin |= creb & BIT(5);
4194
4195                         fan6pin = (cr2a & BIT(4)) &&
4196                                         (!dsw_en || (cred & BIT(4)));
4197                         fan6pin |= creb & BIT(3);
4198
4199                         pwm5pin |= cr2d & BIT(7);
4200                         pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
4201
4202                         pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
4203                         pwm6pin |= creb & BIT(2);
4204                         break;
4205                 case nct6796:
4206                         fan5pin |= cr1b & BIT(5);
4207                         fan5pin |= (cre0 & BIT(3)) && !(cr1b & BIT(0));
4208                         fan5pin |= creb & BIT(5);
4209
4210                         fan6pin = (cr2a & BIT(4)) &&
4211                                         (!dsw_en || (cred & BIT(4)));
4212                         fan6pin |= creb & BIT(3);
4213
4214                         fan7pin = !(cr2b & BIT(2));
4215
4216                         pwm5pin |= cr2d & BIT(7);
4217                         pwm5pin |= (cre0 & BIT(4)) && !(cr1b & BIT(0));
4218                         pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
4219
4220                         pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
4221                         pwm6pin |= creb & BIT(2);
4222
4223                         pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
4224                         break;
4225                 case nct6797:
4226                         fan5pin |= !ddr4_en && (cr1b & BIT(5));
4227                         fan5pin |= creb & BIT(5);
4228
4229                         fan6pin = cr2a & BIT(4);
4230                         fan6pin |= creb & BIT(3);
4231
4232                         fan7pin = cr1a & BIT(1);
4233
4234                         pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
4235                         pwm5pin |= !ddr4_en && (cr2d & BIT(7));
4236
4237                         pwm6pin = creb & BIT(2);
4238                         pwm6pin |= cred & BIT(2);
4239
4240                         pwm7pin = cr1d & BIT(4);
4241                         break;
4242                 case nct6798:
4243                         fan6pin = !(cr1b & BIT(0)) && (cre0 & BIT(3));
4244                         fan6pin |= cr2a & BIT(4);
4245                         fan6pin |= creb & BIT(5);
4246
4247                         fan7pin = cr1b & BIT(5);
4248                         fan7pin |= !(cr2b & BIT(2));
4249                         fan7pin |= creb & BIT(3);
4250
4251                         pwm6pin = !(cr1b & BIT(0)) && (cre0 & BIT(4));
4252                         pwm6pin |= !(cred & BIT(2)) && (cr2a & BIT(3));
4253                         pwm6pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
4254
4255                         pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
4256                         pwm7pin |= cr2d & BIT(7);
4257                         pwm7pin |= creb & BIT(2);
4258                         break;
4259                 default:        /* NCT6779D */
4260                         break;
4261                 }
4262
4263                 fan4min = fan4pin;
4264         }
4265
4266         /* fan 1 and 2 (0x03) are always present */
4267         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
4268                 (fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
4269         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
4270                 (fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
4271         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
4272                 (pwm5pin << 4) | (pwm6pin << 5) | (pwm7pin << 6);
4273 }
4274
4275 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
4276                             int *available, int *mask)
4277 {
4278         int i, err;
4279         u16 src;
4280
4281         for (i = 0; i < data->pwm_num && *available; i++) {
4282                 int index;
4283
4284                 if (!regp[i])
4285                         continue;
4286                 err = nct6775_read_value(data, regp[i], &src);
4287                 if (err)
4288                         return err;
4289                 src &= 0x1f;
4290                 if (!src || (*mask & BIT(src)))
4291                         continue;
4292                 if (!(data->temp_mask & BIT(src)))
4293                         continue;
4294
4295                 index = __ffs(*available);
4296                 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
4297                 if (err)
4298                         return err;
4299                 *available &= ~BIT(index);
4300                 *mask |= BIT(src);
4301         }
4302
4303         return 0;
4304 }
4305
4306 static const struct regmap_config nct6775_regmap_config = {
4307         .reg_bits = 16,
4308         .val_bits = 16,
4309         .reg_read = nct6775_reg_read,
4310         .reg_write = nct6775_reg_write,
4311 };
4312
4313 static const struct regmap_config nct6775_wmi_regmap_config = {
4314         .reg_bits = 16,
4315         .val_bits = 16,
4316         .reg_read = nct6775_wmi_reg_read,
4317         .reg_write = nct6775_wmi_reg_write,
4318 };
4319
4320 static int nct6775_probe(struct platform_device *pdev)
4321 {
4322         struct device *dev = &pdev->dev;
4323         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
4324         struct nct6775_data *data;
4325         struct resource *res;
4326         int i, s, err = 0;
4327         int mask, available;
4328         u16 src;
4329         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
4330         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
4331         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
4332         int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
4333         u8 cr2a;
4334         struct device *hwmon_dev;
4335         struct sensor_template_group tsi_temp_tg;
4336         const struct regmap_config *regmapcfg;
4337
4338         if (sio_data->access == access_direct) {
4339                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
4340                 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
4341                                          DRVNAME))
4342                         return -EBUSY;
4343         }
4344
4345         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
4346                             GFP_KERNEL);
4347         if (!data)
4348                 return -ENOMEM;
4349
4350         data->kind = sio_data->kind;
4351         data->sio_data = sio_data;
4352
4353         if (sio_data->access == access_direct) {
4354                 data->addr = res->start;
4355                 regmapcfg = &nct6775_regmap_config;
4356         } else {
4357                 regmapcfg = &nct6775_wmi_regmap_config;
4358         }
4359
4360         data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
4361         if (IS_ERR(data->regmap))
4362                 return PTR_ERR(data->regmap);
4363
4364         mutex_init(&data->update_lock);
4365         data->name = nct6775_device_names[data->kind];
4366         data->bank = 0xff;              /* Force initial bank selection */
4367         platform_set_drvdata(pdev, data);
4368
4369         switch (data->kind) {
4370         case nct6106:
4371                 data->in_num = 9;
4372                 data->pwm_num = 3;
4373                 data->auto_pwm_num = 4;
4374                 data->temp_fixed_num = 3;
4375                 data->num_temp_alarms = 6;
4376                 data->num_temp_beeps = 6;
4377
4378                 data->fan_from_reg = fan_from_reg13;
4379                 data->fan_from_reg_min = fan_from_reg13;
4380
4381                 data->temp_label = nct6776_temp_label;
4382                 data->temp_mask = NCT6776_TEMP_MASK;
4383                 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
4384
4385                 data->REG_VBAT = NCT6106_REG_VBAT;
4386                 data->REG_DIODE = NCT6106_REG_DIODE;
4387                 data->DIODE_MASK = NCT6106_DIODE_MASK;
4388                 data->REG_VIN = NCT6106_REG_IN;
4389                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
4390                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
4391                 data->REG_TARGET = NCT6106_REG_TARGET;
4392                 data->REG_FAN = NCT6106_REG_FAN;
4393                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
4394                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
4395                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
4396                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
4397                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
4398                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
4399                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
4400                 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
4401                 data->REG_PWM[0] = NCT6116_REG_PWM;
4402                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
4403                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
4404                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
4405                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
4406                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
4407                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
4408                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
4409                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
4410                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
4411                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
4412                 data->REG_CRITICAL_TEMP_TOLERANCE
4413                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
4414                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
4415                 data->CRITICAL_PWM_ENABLE_MASK
4416                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
4417                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
4418                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
4419                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
4420                 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
4421                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
4422                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
4423                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
4424                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
4425                 data->REG_ALARM = NCT6106_REG_ALARM;
4426                 data->ALARM_BITS = NCT6106_ALARM_BITS;
4427                 data->REG_BEEP = NCT6106_REG_BEEP;
4428                 data->BEEP_BITS = NCT6106_BEEP_BITS;
4429                 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
4430
4431                 reg_temp = NCT6106_REG_TEMP;
4432                 reg_temp_mon = NCT6106_REG_TEMP_MON;
4433                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
4434                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
4435                 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
4436                 reg_temp_over = NCT6106_REG_TEMP_OVER;
4437                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
4438                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
4439                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
4440                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
4441                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
4442                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
4443
4444                 break;
4445         case nct6116:
4446                 data->in_num = 9;
4447                 data->pwm_num = 3;
4448                 data->auto_pwm_num = 4;
4449                 data->temp_fixed_num = 3;
4450                 data->num_temp_alarms = 3;
4451                 data->num_temp_beeps = 3;
4452
4453                 data->fan_from_reg = fan_from_reg13;
4454                 data->fan_from_reg_min = fan_from_reg13;
4455
4456                 data->temp_label = nct6776_temp_label;
4457                 data->temp_mask = NCT6776_TEMP_MASK;
4458                 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
4459
4460                 data->REG_VBAT = NCT6106_REG_VBAT;
4461                 data->REG_DIODE = NCT6106_REG_DIODE;
4462                 data->DIODE_MASK = NCT6106_DIODE_MASK;
4463                 data->REG_VIN = NCT6106_REG_IN;
4464                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
4465                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
4466                 data->REG_TARGET = NCT6116_REG_TARGET;
4467                 data->REG_FAN = NCT6116_REG_FAN;
4468                 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
4469                 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
4470                 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
4471                 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
4472                 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
4473                 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
4474                 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
4475                 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
4476                 data->REG_PWM[0] = NCT6116_REG_PWM;
4477                 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
4478                 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
4479                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
4480                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
4481                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
4482                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
4483                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
4484                 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
4485                 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
4486                 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
4487                 data->REG_CRITICAL_TEMP_TOLERANCE
4488                   = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
4489                 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
4490                 data->CRITICAL_PWM_ENABLE_MASK
4491                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
4492                 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
4493                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
4494                 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
4495                 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
4496                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
4497                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
4498                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
4499                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
4500                 data->REG_ALARM = NCT6106_REG_ALARM;
4501                 data->ALARM_BITS = NCT6116_ALARM_BITS;
4502                 data->REG_BEEP = NCT6106_REG_BEEP;
4503                 data->BEEP_BITS = NCT6116_BEEP_BITS;
4504                 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
4505
4506                 reg_temp = NCT6106_REG_TEMP;
4507                 reg_temp_mon = NCT6106_REG_TEMP_MON;
4508                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
4509                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
4510                 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
4511                 reg_temp_over = NCT6106_REG_TEMP_OVER;
4512                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
4513                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
4514                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
4515                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
4516                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
4517                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
4518
4519                 break;
4520         case nct6775:
4521                 data->in_num = 9;
4522                 data->pwm_num = 3;
4523                 data->auto_pwm_num = 6;
4524                 data->has_fan_div = true;
4525                 data->temp_fixed_num = 3;
4526                 data->num_temp_alarms = 3;
4527                 data->num_temp_beeps = 3;
4528
4529                 data->ALARM_BITS = NCT6775_ALARM_BITS;
4530                 data->BEEP_BITS = NCT6775_BEEP_BITS;
4531
4532                 data->fan_from_reg = fan_from_reg16;
4533                 data->fan_from_reg_min = fan_from_reg8;
4534                 data->target_temp_mask = 0x7f;
4535                 data->tolerance_mask = 0x0f;
4536                 data->speed_tolerance_limit = 15;
4537
4538                 data->temp_label = nct6775_temp_label;
4539                 data->temp_mask = NCT6775_TEMP_MASK;
4540                 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
4541
4542                 data->REG_CONFIG = NCT6775_REG_CONFIG;
4543                 data->REG_VBAT = NCT6775_REG_VBAT;
4544                 data->REG_DIODE = NCT6775_REG_DIODE;
4545                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4546                 data->REG_VIN = NCT6775_REG_IN;
4547                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4548                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4549                 data->REG_TARGET = NCT6775_REG_TARGET;
4550                 data->REG_FAN = NCT6775_REG_FAN;
4551                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4552                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
4553                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
4554                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4555                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4556                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
4557                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
4558                 data->REG_PWM[0] = NCT6775_REG_PWM;
4559                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4560                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4561                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
4562                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
4563                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
4564                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4565                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
4566                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
4567                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4568                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4569                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4570                 data->REG_CRITICAL_TEMP_TOLERANCE
4571                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4572                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
4573                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4574                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4575                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
4576                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
4577                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
4578                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
4579                 data->REG_ALARM = NCT6775_REG_ALARM;
4580                 data->REG_BEEP = NCT6775_REG_BEEP;
4581                 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
4582
4583                 reg_temp = NCT6775_REG_TEMP;
4584                 reg_temp_mon = NCT6775_REG_TEMP_MON;
4585                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
4586                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
4587                 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
4588                 reg_temp_over = NCT6775_REG_TEMP_OVER;
4589                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
4590                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
4591                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
4592                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
4593
4594                 break;
4595         case nct6776:
4596                 data->in_num = 9;
4597                 data->pwm_num = 3;
4598                 data->auto_pwm_num = 4;
4599                 data->has_fan_div = false;
4600                 data->temp_fixed_num = 3;
4601                 data->num_temp_alarms = 3;
4602                 data->num_temp_beeps = 6;
4603
4604                 data->ALARM_BITS = NCT6776_ALARM_BITS;
4605                 data->BEEP_BITS = NCT6776_BEEP_BITS;
4606
4607                 data->fan_from_reg = fan_from_reg13;
4608                 data->fan_from_reg_min = fan_from_reg13;
4609                 data->target_temp_mask = 0xff;
4610                 data->tolerance_mask = 0x07;
4611                 data->speed_tolerance_limit = 63;
4612
4613                 data->temp_label = nct6776_temp_label;
4614                 data->temp_mask = NCT6776_TEMP_MASK;
4615                 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
4616
4617                 data->REG_CONFIG = NCT6775_REG_CONFIG;
4618                 data->REG_VBAT = NCT6775_REG_VBAT;
4619                 data->REG_DIODE = NCT6775_REG_DIODE;
4620                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4621                 data->REG_VIN = NCT6775_REG_IN;
4622                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4623                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4624                 data->REG_TARGET = NCT6775_REG_TARGET;
4625                 data->REG_FAN = NCT6775_REG_FAN;
4626                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4627                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4628                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
4629                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4630                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4631                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4632                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4633                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4634                 data->REG_PWM[0] = NCT6775_REG_PWM;
4635                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4636                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4637                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
4638                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
4639                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4640                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4641                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4642                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4643                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4644                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4645                 data->REG_CRITICAL_TEMP_TOLERANCE
4646                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4647                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
4648                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4649                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4650                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
4651                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
4652                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
4653                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
4654                 data->REG_ALARM = NCT6775_REG_ALARM;
4655                 data->REG_BEEP = NCT6776_REG_BEEP;
4656                 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
4657
4658                 reg_temp = NCT6775_REG_TEMP;
4659                 reg_temp_mon = NCT6775_REG_TEMP_MON;
4660                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
4661                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
4662                 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4663                 reg_temp_over = NCT6775_REG_TEMP_OVER;
4664                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
4665                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
4666                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
4667                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
4668
4669                 break;
4670         case nct6779:
4671                 data->in_num = 15;
4672                 data->pwm_num = 5;
4673                 data->auto_pwm_num = 4;
4674                 data->has_fan_div = false;
4675                 data->temp_fixed_num = 6;
4676                 data->num_temp_alarms = 2;
4677                 data->num_temp_beeps = 2;
4678
4679                 data->ALARM_BITS = NCT6779_ALARM_BITS;
4680                 data->BEEP_BITS = NCT6779_BEEP_BITS;
4681
4682                 data->fan_from_reg = fan_from_reg_rpm;
4683                 data->fan_from_reg_min = fan_from_reg13;
4684                 data->target_temp_mask = 0xff;
4685                 data->tolerance_mask = 0x07;
4686                 data->speed_tolerance_limit = 63;
4687
4688                 data->temp_label = nct6779_temp_label;
4689                 data->temp_mask = NCT6779_TEMP_MASK;
4690                 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
4691
4692                 data->REG_CONFIG = NCT6775_REG_CONFIG;
4693                 data->REG_VBAT = NCT6775_REG_VBAT;
4694                 data->REG_DIODE = NCT6775_REG_DIODE;
4695                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4696                 data->REG_VIN = NCT6779_REG_IN;
4697                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4698                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4699                 data->REG_TARGET = NCT6775_REG_TARGET;
4700                 data->REG_FAN = NCT6779_REG_FAN;
4701                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4702                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4703                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4704                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4705                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4706                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4707                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4708                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4709                 data->REG_PWM[0] = NCT6775_REG_PWM;
4710                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4711                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4712                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
4713                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
4714                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4715                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4716                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4717                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4718                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4719                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4720                 data->REG_CRITICAL_TEMP_TOLERANCE
4721                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4722                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4723                 data->CRITICAL_PWM_ENABLE_MASK
4724                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4725                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4726                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4727                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4728                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4729                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
4730                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
4731                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
4732                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
4733                 data->REG_ALARM = NCT6779_REG_ALARM;
4734                 data->REG_BEEP = NCT6776_REG_BEEP;
4735                 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
4736
4737                 reg_temp = NCT6779_REG_TEMP;
4738                 reg_temp_mon = NCT6779_REG_TEMP_MON;
4739                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4740                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4741                 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4742                 reg_temp_over = NCT6779_REG_TEMP_OVER;
4743                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4744                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4745                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4746                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4747
4748                 break;
4749         case nct6791:
4750         case nct6792:
4751         case nct6793:
4752         case nct6795:
4753         case nct6796:
4754         case nct6797:
4755         case nct6798:
4756                 data->in_num = 15;
4757                 data->pwm_num = (data->kind == nct6796 ||
4758                                  data->kind == nct6797 ||
4759                                  data->kind == nct6798) ? 7 : 6;
4760                 data->auto_pwm_num = 4;
4761                 data->has_fan_div = false;
4762                 data->temp_fixed_num = 6;
4763                 data->num_temp_alarms = 2;
4764                 data->num_temp_beeps = 2;
4765
4766                 data->ALARM_BITS = NCT6791_ALARM_BITS;
4767                 data->BEEP_BITS = NCT6779_BEEP_BITS;
4768
4769                 data->fan_from_reg = fan_from_reg_rpm;
4770                 data->fan_from_reg_min = fan_from_reg13;
4771                 data->target_temp_mask = 0xff;
4772                 data->tolerance_mask = 0x07;
4773                 data->speed_tolerance_limit = 63;
4774
4775                 switch (data->kind) {
4776                 default:
4777                 case nct6791:
4778                         data->temp_label = nct6779_temp_label;
4779                         data->temp_mask = NCT6791_TEMP_MASK;
4780                         data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
4781                         break;
4782                 case nct6792:
4783                         data->temp_label = nct6792_temp_label;
4784                         data->temp_mask = NCT6792_TEMP_MASK;
4785                         data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
4786                         break;
4787                 case nct6793:
4788                         data->temp_label = nct6793_temp_label;
4789                         data->temp_mask = NCT6793_TEMP_MASK;
4790                         data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
4791                         break;
4792                 case nct6795:
4793                 case nct6797:
4794                         data->temp_label = nct6795_temp_label;
4795                         data->temp_mask = NCT6795_TEMP_MASK;
4796                         data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
4797                         break;
4798                 case nct6796:
4799                         data->temp_label = nct6796_temp_label;
4800                         data->temp_mask = NCT6796_TEMP_MASK;
4801                         data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
4802                         break;
4803                 case nct6798:
4804                         data->temp_label = nct6798_temp_label;
4805                         data->temp_mask = NCT6798_TEMP_MASK;
4806                         data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
4807                         break;
4808                 }
4809
4810                 data->REG_CONFIG = NCT6775_REG_CONFIG;
4811                 data->REG_VBAT = NCT6775_REG_VBAT;
4812                 data->REG_DIODE = NCT6775_REG_DIODE;
4813                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4814                 data->REG_VIN = NCT6779_REG_IN;
4815                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4816                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4817                 data->REG_TARGET = NCT6775_REG_TARGET;
4818                 data->REG_FAN = NCT6779_REG_FAN;
4819                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4820                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4821                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4822                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4823                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4824                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4825                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4826                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4827                 data->REG_PWM[0] = NCT6775_REG_PWM;
4828                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4829                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4830                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4831                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4832                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4833                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4834                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4835                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4836                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4837                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4838                 data->REG_CRITICAL_TEMP_TOLERANCE
4839                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4840                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4841                 data->CRITICAL_PWM_ENABLE_MASK
4842                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4843                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4844                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4845                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4846                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4847                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4848                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4849                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4850                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4851                 data->REG_ALARM = NCT6791_REG_ALARM;
4852                 if (data->kind == nct6791)
4853                         data->REG_BEEP = NCT6776_REG_BEEP;
4854                 else
4855                         data->REG_BEEP = NCT6792_REG_BEEP;
4856                 switch (data->kind) {
4857                 case nct6791:
4858                 case nct6792:
4859                 case nct6793:
4860                         data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
4861                         num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4862                         break;
4863                 case nct6795:
4864                 case nct6796:
4865                 case nct6797:
4866                 case nct6798:
4867                         data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4868                         num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4869                         break;
4870                 default:
4871                         num_reg_tsi_temp = 0;
4872                         break;
4873                 }
4874
4875                 reg_temp = NCT6779_REG_TEMP;
4876                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4877                 if (data->kind == nct6791) {
4878                         reg_temp_mon = NCT6779_REG_TEMP_MON;
4879                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4880                 } else {
4881                         reg_temp_mon = NCT6792_REG_TEMP_MON;
4882                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4883                 }
4884                 reg_temp_over = NCT6779_REG_TEMP_OVER;
4885                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4886                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4887                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4888                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4889
4890                 break;
4891         default:
4892                 return -ENODEV;
4893         }
4894         data->have_in = BIT(data->in_num) - 1;
4895         data->have_temp = 0;
4896
4897         /*
4898          * On some boards, not all available temperature sources are monitored,
4899          * even though some of the monitoring registers are unused.
4900          * Get list of unused monitoring registers, then detect if any fan
4901          * controls are configured to use unmonitored temperature sources.
4902          * If so, assign the unmonitored temperature sources to available
4903          * monitoring registers.
4904          */
4905         mask = 0;
4906         available = 0;
4907         for (i = 0; i < num_reg_temp; i++) {
4908                 if (reg_temp[i] == 0)
4909                         continue;
4910
4911                 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4912                 if (err)
4913                         return err;
4914                 src &= 0x1f;
4915                 if (!src || (mask & BIT(src)))
4916                         available |= BIT(i);
4917
4918                 mask |= BIT(src);
4919         }
4920
4921         /*
4922          * Now find unmonitored temperature registers and enable monitoring
4923          * if additional monitoring registers are available.
4924          */
4925         err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4926         if (err)
4927                 return err;
4928         err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4929         if (err)
4930                 return err;
4931
4932         mask = 0;
4933         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
4934         for (i = 0; i < num_reg_temp; i++) {
4935                 if (reg_temp[i] == 0)
4936                         continue;
4937
4938                 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4939                 if (err)
4940                         return err;
4941                 src &= 0x1f;
4942                 if (!src || (mask & BIT(src)))
4943                         continue;
4944
4945                 if (!(data->temp_mask & BIT(src))) {
4946                         dev_info(dev,
4947                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4948                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4949                         continue;
4950                 }
4951
4952                 mask |= BIT(src);
4953
4954                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4955                 if (src <= data->temp_fixed_num) {
4956                         data->have_temp |= BIT(src - 1);
4957                         data->have_temp_fixed |= BIT(src - 1);
4958                         data->reg_temp[0][src - 1] = reg_temp[i];
4959                         data->reg_temp[1][src - 1] = reg_temp_over[i];
4960                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4961                         if (reg_temp_crit_h && reg_temp_crit_h[i])
4962                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4963                         else if (reg_temp_crit[src - 1])
4964                                 data->reg_temp[3][src - 1]
4965                                   = reg_temp_crit[src - 1];
4966                         if (reg_temp_crit_l && reg_temp_crit_l[i])
4967                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4968                         data->reg_temp_config[src - 1] = reg_temp_config[i];
4969                         data->temp_src[src - 1] = src;
4970                         continue;
4971                 }
4972
4973                 if (s >= NUM_TEMP)
4974                         continue;
4975
4976                 /* Use dynamic index for other sources */
4977                 data->have_temp |= BIT(s);
4978                 data->reg_temp[0][s] = reg_temp[i];
4979                 data->reg_temp[1][s] = reg_temp_over[i];
4980                 data->reg_temp[2][s] = reg_temp_hyst[i];
4981                 data->reg_temp_config[s] = reg_temp_config[i];
4982                 if (reg_temp_crit_h && reg_temp_crit_h[i])
4983                         data->reg_temp[3][s] = reg_temp_crit_h[i];
4984                 else if (reg_temp_crit[src - 1])
4985                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
4986                 if (reg_temp_crit_l && reg_temp_crit_l[i])
4987                         data->reg_temp[4][s] = reg_temp_crit_l[i];
4988
4989                 data->temp_src[s] = src;
4990                 s++;
4991         }
4992
4993         /*
4994          * Repeat with temperatures used for fan control.
4995          * This set of registers does not support limits.
4996          */
4997         for (i = 0; i < num_reg_temp_mon; i++) {
4998                 if (reg_temp_mon[i] == 0)
4999                         continue;
5000
5001                 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
5002                 if (err)
5003                         return err;
5004                 src &= 0x1f;
5005                 if (!src)
5006                         continue;
5007
5008                 if (!(data->temp_mask & BIT(src))) {
5009                         dev_info(dev,
5010                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
5011                                  src, i, data->REG_TEMP_SEL[i],
5012                                  reg_temp_mon[i]);
5013                         continue;
5014                 }
5015
5016                 /*
5017                  * For virtual temperature sources, the 'virtual' temperature
5018                  * for each fan reflects a different temperature, and there
5019                  * are no duplicates.
5020                  */
5021                 if (!(data->virt_temp_mask & BIT(src))) {
5022                         if (mask & BIT(src))
5023                                 continue;
5024                         mask |= BIT(src);
5025                 }
5026
5027                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
5028                 if (src <= data->temp_fixed_num) {
5029                         if (data->have_temp & BIT(src - 1))
5030                                 continue;
5031                         data->have_temp |= BIT(src - 1);
5032                         data->have_temp_fixed |= BIT(src - 1);
5033                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
5034                         data->temp_src[src - 1] = src;
5035                         continue;
5036                 }
5037
5038                 if (s >= NUM_TEMP)
5039                         continue;
5040
5041                 /* Use dynamic index for other sources */
5042                 data->have_temp |= BIT(s);
5043                 data->reg_temp[0][s] = reg_temp_mon[i];
5044                 data->temp_src[s] = src;
5045                 s++;
5046         }
5047
5048 #ifdef USE_ALTERNATE
5049         /*
5050          * Go through the list of alternate temp registers and enable
5051          * if possible.
5052          * The temperature is already monitored if the respective bit in <mask>
5053          * is set.
5054          */
5055         for (i = 0; i < 31; i++) {
5056                 if (!(data->temp_mask & BIT(i + 1)))
5057                         continue;
5058                 if (!reg_temp_alternate[i])
5059                         continue;
5060                 if (mask & BIT(i + 1))
5061                         continue;
5062                 if (i < data->temp_fixed_num) {
5063                         if (data->have_temp & BIT(i))
5064                                 continue;
5065                         data->have_temp |= BIT(i);
5066                         data->have_temp_fixed |= BIT(i);
5067                         data->reg_temp[0][i] = reg_temp_alternate[i];
5068                         if (i < num_reg_temp) {
5069                                 data->reg_temp[1][i] = reg_temp_over[i];
5070                                 data->reg_temp[2][i] = reg_temp_hyst[i];
5071                         }
5072                         data->temp_src[i] = i + 1;
5073                         continue;
5074                 }
5075
5076                 if (s >= NUM_TEMP)      /* Abort if no more space */
5077                         break;
5078
5079                 data->have_temp |= BIT(s);
5080                 data->reg_temp[0][s] = reg_temp_alternate[i];
5081                 data->temp_src[s] = i + 1;
5082                 s++;
5083         }
5084 #endif /* USE_ALTERNATE */
5085
5086         /* Check which TSIx_TEMP registers are active */
5087         for (i = 0; i < num_reg_tsi_temp; i++) {
5088                 u16 tmp;
5089
5090                 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
5091                 if (err)
5092                         return err;
5093                 if (tmp)
5094                         data->have_tsi_temp |= BIT(i);
5095         }
5096
5097         /* Initialize the chip */
5098         err = nct6775_init_device(data);
5099         if (err)
5100                 return err;
5101
5102         err = sio_data->sio_enter(sio_data);
5103         if (err)
5104                 return err;
5105
5106         cr2a = sio_data->sio_inb(sio_data, 0x2a);
5107         switch (data->kind) {
5108         case nct6775:
5109                 data->have_vid = (cr2a & 0x40);
5110                 break;
5111         case nct6776:
5112                 data->have_vid = (cr2a & 0x60) == 0x40;
5113                 break;
5114         case nct6106:
5115         case nct6116:
5116         case nct6779:
5117         case nct6791:
5118         case nct6792:
5119         case nct6793:
5120         case nct6795:
5121         case nct6796:
5122         case nct6797:
5123         case nct6798:
5124                 break;
5125         }
5126
5127         /*
5128          * Read VID value
5129          * We can get the VID input values directly at logical device D 0xe3.
5130          */
5131         if (data->have_vid) {
5132                 sio_data->sio_select(sio_data, NCT6775_LD_VID);
5133                 data->vid = sio_data->sio_inb(sio_data, 0xe3);
5134                 data->vrm = vid_which_vrm();
5135         }
5136
5137         if (fan_debounce) {
5138                 u8 tmp;
5139
5140                 sio_data->sio_select(sio_data, NCT6775_LD_HWM);
5141                 tmp = sio_data->sio_inb(sio_data,
5142                                     NCT6775_REG_CR_FAN_DEBOUNCE);
5143                 switch (data->kind) {
5144                 case nct6106:
5145                 case nct6116:
5146                         tmp |= 0xe0;
5147                         break;
5148                 case nct6775:
5149                         tmp |= 0x1e;
5150                         break;
5151                 case nct6776:
5152                 case nct6779:
5153                         tmp |= 0x3e;
5154                         break;
5155                 case nct6791:
5156                 case nct6792:
5157                 case nct6793:
5158                 case nct6795:
5159                 case nct6796:
5160                 case nct6797:
5161                 case nct6798:
5162                         tmp |= 0x7e;
5163                         break;
5164                 }
5165                 sio_data->sio_outb(sio_data, NCT6775_REG_CR_FAN_DEBOUNCE,
5166                              tmp);
5167                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
5168                          data->name);
5169         }
5170
5171         nct6775_check_fan_inputs(data, sio_data);
5172
5173         sio_data->sio_exit(sio_data);
5174
5175         /* Read fan clock dividers immediately */
5176         err = nct6775_init_fan_common(dev, data);
5177         if (err)
5178                 return err;
5179
5180         /* Register sysfs hooks */
5181         err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
5182                                               data->pwm_num);
5183         if (err)
5184                 return err;
5185
5186         err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
5187                                               fls(data->have_in));
5188         if (err)
5189                 return err;
5190
5191         err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
5192                                               fls(data->has_fan));
5193         if (err)
5194                 return err;
5195
5196         err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
5197                                               fls(data->have_temp));
5198         if (err)
5199                 return err;
5200
5201         if (data->have_tsi_temp) {
5202                 tsi_temp_tg.templates = nct6775_tsi_temp_template;
5203                 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
5204                 tsi_temp_tg.base = fls(data->have_temp) + 1;
5205                 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
5206                                                       fls(data->have_tsi_temp));
5207                 if (err)
5208                         return err;
5209         }
5210
5211         err = nct6775_add_attr_group(data, &nct6775_group_other);
5212         if (err)
5213                 return err;
5214
5215         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
5216                                                            data, data->groups);
5217         return PTR_ERR_OR_ZERO(hwmon_dev);
5218 }
5219
5220 static void nct6791_enable_io_mapping(struct nct6775_sio_data *sio_data)
5221 {
5222         int val;
5223
5224         val = sio_data->sio_inb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
5225         if (val & 0x10) {
5226                 pr_info("Enabling hardware monitor logical device mappings.\n");
5227                 sio_data->sio_outb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
5228                                val & ~0x10);
5229         }
5230 }
5231
5232 static int __maybe_unused nct6775_suspend(struct device *dev)
5233 {
5234         int err;
5235         u16 tmp;
5236         struct nct6775_data *data = nct6775_update_device(dev);
5237
5238         if (IS_ERR(data))
5239                 return PTR_ERR(data);
5240
5241         mutex_lock(&data->update_lock);
5242         err = nct6775_read_value(data, data->REG_VBAT, &tmp);
5243         if (err)
5244                 goto out;
5245         data->vbat = tmp;
5246         if (data->kind == nct6775) {
5247                 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &tmp);
5248                 if (err)
5249                         goto out;
5250                 data->fandiv1 = tmp;
5251
5252                 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &tmp);
5253                 if (err)
5254                         goto out;
5255                 data->fandiv2 = tmp;
5256         }
5257 out:
5258         mutex_unlock(&data->update_lock);
5259
5260         return err;
5261 }
5262
5263 static int __maybe_unused nct6775_resume(struct device *dev)
5264 {
5265         struct nct6775_data *data = dev_get_drvdata(dev);
5266         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
5267         int i, j, err = 0;
5268         u8 reg;
5269
5270         mutex_lock(&data->update_lock);
5271         data->bank = 0xff;              /* Force initial bank selection */
5272
5273         err = sio_data->sio_enter(sio_data);
5274         if (err)
5275                 goto abort;
5276
5277         sio_data->sio_select(sio_data, NCT6775_LD_HWM);
5278         reg = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
5279         if (reg != data->sio_reg_enable)
5280                 sio_data->sio_outb(sio_data, SIO_REG_ENABLE, data->sio_reg_enable);
5281
5282         if (data->kind == nct6791 || data->kind == nct6792 ||
5283             data->kind == nct6793 || data->kind == nct6795 ||
5284             data->kind == nct6796 || data->kind == nct6797 ||
5285             data->kind == nct6798)
5286                 nct6791_enable_io_mapping(sio_data);
5287
5288         sio_data->sio_exit(sio_data);
5289
5290         /* Restore limits */
5291         for (i = 0; i < data->in_num; i++) {
5292                 if (!(data->have_in & BIT(i)))
5293                         continue;
5294
5295                 err = nct6775_write_value(data, data->REG_IN_MINMAX[0][i], data->in[i][1]);
5296                 if (err)
5297                         goto abort;
5298                 err = nct6775_write_value(data, data->REG_IN_MINMAX[1][i], data->in[i][2]);
5299                 if (err)
5300                         goto abort;
5301         }
5302
5303         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
5304                 if (!(data->has_fan_min & BIT(i)))
5305                         continue;
5306
5307                 err = nct6775_write_value(data, data->REG_FAN_MIN[i], data->fan_min[i]);
5308                 if (err)
5309                         goto abort;
5310         }
5311
5312         for (i = 0; i < NUM_TEMP; i++) {
5313                 if (!(data->have_temp & BIT(i)))
5314                         continue;
5315
5316                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
5317                         if (data->reg_temp[j][i]) {
5318                                 err = nct6775_write_temp(data, data->reg_temp[j][i],
5319                                                          data->temp[j][i]);
5320                                 if (err)
5321                                         goto abort;
5322                         }
5323         }
5324
5325         /* Restore other settings */
5326         err = nct6775_write_value(data, data->REG_VBAT, data->vbat);
5327         if (err)
5328                 goto abort;
5329         if (data->kind == nct6775) {
5330                 err = nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
5331                 if (err)
5332                         goto abort;
5333                 err = nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
5334         }
5335
5336 abort:
5337         /* Force re-reading all values */
5338         data->valid = false;
5339         mutex_unlock(&data->update_lock);
5340
5341         return err;
5342 }
5343
5344 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
5345
5346 static struct platform_driver nct6775_driver = {
5347         .driver = {
5348                 .name   = DRVNAME,
5349                 .pm     = &nct6775_dev_pm_ops,
5350         },
5351         .probe          = nct6775_probe,
5352 };
5353
5354 /* nct6775_find() looks for a '627 in the Super-I/O config space */
5355 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
5356 {
5357         u16 val;
5358         int err;
5359         int addr;
5360
5361         sio_data->access = access_direct;
5362         sio_data->sioreg = sioaddr;
5363
5364         err = sio_data->sio_enter(sio_data);
5365         if (err)
5366                 return err;
5367
5368         val = (sio_data->sio_inb(sio_data, SIO_REG_DEVID) << 8) |
5369                 sio_data->sio_inb(sio_data, SIO_REG_DEVID + 1);
5370         if (force_id && val != 0xffff)
5371                 val = force_id;
5372
5373         switch (val & SIO_ID_MASK) {
5374         case SIO_NCT6106_ID:
5375                 sio_data->kind = nct6106;
5376                 break;
5377         case SIO_NCT6116_ID:
5378                 sio_data->kind = nct6116;
5379                 break;
5380         case SIO_NCT6775_ID:
5381                 sio_data->kind = nct6775;
5382                 break;
5383         case SIO_NCT6776_ID:
5384                 sio_data->kind = nct6776;
5385                 break;
5386         case SIO_NCT6779_ID:
5387                 sio_data->kind = nct6779;
5388                 break;
5389         case SIO_NCT6791_ID:
5390                 sio_data->kind = nct6791;
5391                 break;
5392         case SIO_NCT6792_ID:
5393                 sio_data->kind = nct6792;
5394                 break;
5395         case SIO_NCT6793_ID:
5396                 sio_data->kind = nct6793;
5397                 break;
5398         case SIO_NCT6795_ID:
5399                 sio_data->kind = nct6795;
5400                 break;
5401         case SIO_NCT6796_ID:
5402                 sio_data->kind = nct6796;
5403                 break;
5404         case SIO_NCT6797_ID:
5405                 sio_data->kind = nct6797;
5406                 break;
5407         case SIO_NCT6798_ID:
5408                 sio_data->kind = nct6798;
5409                 break;
5410         default:
5411                 if (val != 0xffff)
5412                         pr_debug("unsupported chip ID: 0x%04x\n", val);
5413                 sio_data->sio_exit(sio_data);
5414                 return -ENODEV;
5415         }
5416
5417         /* We have a known chip, find the HWM I/O address */
5418         sio_data->sio_select(sio_data, NCT6775_LD_HWM);
5419         val = (sio_data->sio_inb(sio_data, SIO_REG_ADDR) << 8)
5420             | sio_data->sio_inb(sio_data, SIO_REG_ADDR + 1);
5421         addr = val & IOREGION_ALIGNMENT;
5422         if (addr == 0) {
5423                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
5424                 sio_data->sio_exit(sio_data);
5425                 return -ENODEV;
5426         }
5427
5428         /* Activate logical device if needed */
5429         val = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
5430         if (!(val & 0x01)) {
5431                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
5432                 sio_data->sio_outb(sio_data, SIO_REG_ENABLE, val | 0x01);
5433         }
5434
5435         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
5436             sio_data->kind == nct6793 || sio_data->kind == nct6795 ||
5437             sio_data->kind == nct6796 || sio_data->kind == nct6797 ||
5438             sio_data->kind == nct6798)
5439                 nct6791_enable_io_mapping(sio_data);
5440
5441         sio_data->sio_exit(sio_data);
5442         pr_info("Found %s or compatible chip at %#x:%#x\n",
5443                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
5444
5445         return addr;
5446 }
5447
5448 /*
5449  * when Super-I/O functions move to a separate file, the Super-I/O
5450  * bus will manage the lifetime of the device and this module will only keep
5451  * track of the nct6775 driver. But since we use platform_device_alloc(), we
5452  * must keep track of the device
5453  */
5454 static struct platform_device *pdev[2];
5455
5456 static const char * const asus_wmi_boards[] = {
5457         "ProArt X570-CREATOR WIFI",
5458         "Pro B550M-C",
5459         "Pro WS X570-ACE",
5460         "PRIME B360-PLUS",
5461         "PRIME B460-PLUS",
5462         "PRIME B550-PLUS",
5463         "PRIME B550M-A",
5464         "PRIME B550M-A (WI-FI)",
5465         "PRIME X570-P",
5466         "PRIME X570-PRO",
5467         "ROG CROSSHAIR VIII DARK HERO",
5468         "ROG CROSSHAIR VIII FORMULA",
5469         "ROG CROSSHAIR VIII HERO",
5470         "ROG CROSSHAIR VIII IMPACT",
5471         "ROG STRIX B550-A GAMING",
5472         "ROG STRIX B550-E GAMING",
5473         "ROG STRIX B550-F GAMING",
5474         "ROG STRIX B550-F GAMING (WI-FI)",
5475         "ROG STRIX B550-F GAMING WIFI II",
5476         "ROG STRIX B550-I GAMING",
5477         "ROG STRIX B550-XE GAMING (WI-FI)",
5478         "ROG STRIX X570-E GAMING",
5479         "ROG STRIX X570-F GAMING",
5480         "ROG STRIX X570-I GAMING",
5481         "ROG STRIX Z390-E GAMING",
5482         "ROG STRIX Z390-F GAMING",
5483         "ROG STRIX Z390-H GAMING",
5484         "ROG STRIX Z390-I GAMING",
5485         "ROG STRIX Z490-A GAMING",
5486         "ROG STRIX Z490-E GAMING",
5487         "ROG STRIX Z490-F GAMING",
5488         "ROG STRIX Z490-G GAMING",
5489         "ROG STRIX Z490-G GAMING (WI-FI)",
5490         "ROG STRIX Z490-H GAMING",
5491         "ROG STRIX Z490-I GAMING",
5492         "TUF GAMING B550M-PLUS",
5493         "TUF GAMING B550M-PLUS (WI-FI)",
5494         "TUF GAMING B550-PLUS",
5495         "TUF GAMING B550-PRO",
5496         "TUF GAMING X570-PLUS",
5497         "TUF GAMING X570-PLUS (WI-FI)",
5498         "TUF GAMING X570-PRO (WI-FI)",
5499         "TUF GAMING Z490-PLUS",
5500         "TUF GAMING Z490-PLUS (WI-FI)",
5501 };
5502
5503 static int __init sensors_nct6775_init(void)
5504 {
5505         int i, err;
5506         bool found = false;
5507         int address;
5508         struct resource res;
5509         struct nct6775_sio_data sio_data;
5510         int sioaddr[2] = { 0x2e, 0x4e };
5511         enum sensor_access access = access_direct;
5512         const char *board_vendor, *board_name;
5513         u8 tmp;
5514
5515         err = platform_driver_register(&nct6775_driver);
5516         if (err)
5517                 return err;
5518
5519         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
5520         board_name = dmi_get_system_info(DMI_BOARD_NAME);
5521
5522         if (board_name && board_vendor &&
5523             !strcmp(board_vendor, "ASUSTeK COMPUTER INC.")) {
5524                 err = match_string(asus_wmi_boards, ARRAY_SIZE(asus_wmi_boards),
5525                                    board_name);
5526                 if (err >= 0) {
5527                         /* if reading chip id via WMI succeeds, use WMI */
5528                         if (!nct6775_asuswmi_read(0, NCT6775_PORT_CHIPID, &tmp) && tmp) {
5529                                 pr_info("Using Asus WMI to access %#x chip.\n", tmp);
5530                                 access = access_asuswmi;
5531                         } else {
5532                                 pr_err("Can't read ChipID by Asus WMI.\n");
5533                         }
5534                 }
5535         }
5536
5537         /*
5538          * initialize sio_data->kind and sio_data->sioreg.
5539          *
5540          * when Super-I/O functions move to a separate file, the Super-I/O
5541          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
5542          * nct6775 hardware monitor, and call probe()
5543          */
5544         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
5545                 sio_data.sio_outb = superio_outb;
5546                 sio_data.sio_inb = superio_inb;
5547                 sio_data.sio_select = superio_select;
5548                 sio_data.sio_enter = superio_enter;
5549                 sio_data.sio_exit = superio_exit;
5550
5551                 address = nct6775_find(sioaddr[i], &sio_data);
5552                 if (address <= 0)
5553                         continue;
5554
5555                 found = true;
5556
5557                 sio_data.access = access;
5558
5559                 if (access == access_asuswmi) {
5560                         sio_data.sio_outb = superio_wmi_outb;
5561                         sio_data.sio_inb = superio_wmi_inb;
5562                         sio_data.sio_select = superio_wmi_select;
5563                         sio_data.sio_enter = superio_wmi_enter;
5564                         sio_data.sio_exit = superio_wmi_exit;
5565                 }
5566
5567                 pdev[i] = platform_device_alloc(DRVNAME, address);
5568                 if (!pdev[i]) {
5569                         err = -ENOMEM;
5570                         goto exit_device_unregister;
5571                 }
5572
5573                 err = platform_device_add_data(pdev[i], &sio_data,
5574                                                sizeof(struct nct6775_sio_data));
5575                 if (err)
5576                         goto exit_device_put;
5577
5578                 if (sio_data.access == access_direct) {
5579                         memset(&res, 0, sizeof(res));
5580                         res.name = DRVNAME;
5581                         res.start = address + IOREGION_OFFSET;
5582                         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
5583                         res.flags = IORESOURCE_IO;
5584
5585                         err = acpi_check_resource_conflict(&res);
5586                         if (err) {
5587                                 platform_device_put(pdev[i]);
5588                                 pdev[i] = NULL;
5589                                 continue;
5590                         }
5591
5592                         err = platform_device_add_resources(pdev[i], &res, 1);
5593                         if (err)
5594                                 goto exit_device_put;
5595                 }
5596
5597                 /* platform_device_add calls probe() */
5598                 err = platform_device_add(pdev[i]);
5599                 if (err)
5600                         goto exit_device_put;
5601         }
5602         if (!found) {
5603                 err = -ENODEV;
5604                 goto exit_unregister;
5605         }
5606
5607         return 0;
5608
5609 exit_device_put:
5610         platform_device_put(pdev[i]);
5611 exit_device_unregister:
5612         while (--i >= 0) {
5613                 if (pdev[i])
5614                         platform_device_unregister(pdev[i]);
5615         }
5616 exit_unregister:
5617         platform_driver_unregister(&nct6775_driver);
5618         return err;
5619 }
5620
5621 static void __exit sensors_nct6775_exit(void)
5622 {
5623         int i;
5624
5625         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
5626                 if (pdev[i])
5627                         platform_device_unregister(pdev[i]);
5628         }
5629         platform_driver_unregister(&nct6775_driver);
5630 }
5631
5632 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
5633 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
5634 MODULE_LICENSE("GPL");
5635
5636 module_init(sensors_nct6775_init);
5637 module_exit(sensors_nct6775_exit);