1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * nct6775 - Driver for the hardware monitoring functionality of
4 * Nuvoton NCT677x Super-I/O chips
6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
8 * Derived from w83627ehf driver
9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
10 * Copyright (C) 2006 Yuan Mu (Winbond),
11 * Rudolf Marek <r.marek@assembler.cz>
12 * David Hubbard <david.c.hubbard@gmail.com>
13 * Daniel J Blueman <daniel.blueman@gmail.com>
14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
16 * Shamelessly ripped from the w83627hf driver
17 * Copyright (C) 2003 Mark Studebaker
19 * Supports the following chips:
21 * Chip #vin #fan #pwm #temp chip IDs man ID
22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
36 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3
37 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3
39 * #temp lists the number of monitored temperature sources (first value) plus
40 * the number of directly connectable temperature sensors (second value).
43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45 #include <linux/module.h>
46 #include <linux/init.h>
47 #include <linux/slab.h>
48 #include <linux/jiffies.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/bitops.h>
54 #include <linux/nospec.h>
55 #include <linux/regmap.h>
59 #undef DEFAULT_SYMBOL_NAMESPACE
60 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775
64 /* used to set data->name = nct6775_device_names[data->sio_kind] */
65 static const char * const nct6775_device_names[] = {
81 /* Common and NCT6775 specific data */
84 * Voltage min/max registers for nr=7..14 are in bank 5
85 * min/max: 15-17 for NCT6799 only
88 static const u16 NCT6775_REG_IN_MAX[] = {
89 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
90 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 };
91 static const u16 NCT6775_REG_IN_MIN[] = {
92 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
93 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 };
94 static const u16 NCT6775_REG_IN[] = {
95 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
98 #define NCT6775_REG_VBAT 0x5D
99 #define NCT6775_REG_DIODE 0x5E
100 #define NCT6775_DIODE_MASK 0x02
102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
104 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = {
105 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
106 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
107 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
108 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
109 12, -1, /* intr0-intr1 */
112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
114 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = {
115 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */
116 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
117 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
118 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
119 12, -1, 21 /* intr0-intr1, beep_en */
122 /* DC or PWM output fan configuration */
123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
126 /* Advanced Fan control, some values are common for all fans */
128 static const u16 NCT6775_REG_TARGET[] = {
129 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
130 static const u16 NCT6775_REG_FAN_MODE[] = {
131 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
132 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
133 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
134 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
135 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
136 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
137 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
138 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
139 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
143 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
144 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
145 static const u16 NCT6775_REG_PWM[] = {
146 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
147 static const u16 NCT6775_REG_PWM_READ[] = {
148 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
152 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
153 0x641, 0x642, 0x643, 0x644 };
154 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
156 static const u16 NCT6775_REG_TEMP[] = {
157 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
161 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
162 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
163 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
164 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
165 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
166 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
168 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
169 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
171 static const u16 NCT6775_REG_TEMP_SEL[] = {
172 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
174 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
175 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
176 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
177 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
179 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
180 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
181 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
182 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
183 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
187 static const u16 NCT6775_REG_AUTO_TEMP[] = {
188 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
189 static const u16 NCT6775_REG_AUTO_PWM[] = {
190 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
192 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
193 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
197 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
198 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
199 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
200 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
202 static const char *const nct6775_temp_label[] = {
216 "PCH_CHIP_CPU_MAX_TEMP",
226 #define NCT6775_TEMP_MASK 0x001ffffe
227 #define NCT6775_VIRT_TEMP_MASK 0x00000000
229 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
235 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
248 /* NCT6776 specific data */
250 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
251 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
252 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
254 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = {
255 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
256 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
257 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
258 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
259 12, 9, /* intr0-intr1 */
262 /* 0xbf: nct6799 only */
263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
265 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = {
266 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */
267 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
268 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
269 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
270 30, 31, 24 /* intr0-intr1, beep_en */
273 static const u16 NCT6776_REG_TOLERANCE_H[] = {
274 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
279 static const u16 NCT6776_REG_FAN_MIN[] = {
280 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
281 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
282 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
284 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
285 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
287 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
290 static const char *const nct6776_temp_label[] = {
305 "PCH_CHIP_CPU_MAX_TEMP",
316 #define NCT6776_TEMP_MASK 0x007ffffe
317 #define NCT6776_VIRT_TEMP_MASK 0x00000000
319 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
325 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
330 static const u16 NCT6776_REG_TSI_TEMP[] = {
331 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
333 /* NCT6779 specific data */
336 * 15-17 for NCT6799 only, register labels are:
337 * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB
338 * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9
341 static const u16 NCT6779_REG_IN[] = {
342 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
343 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f,
346 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
347 0x459, 0x45A, 0x45B, 0x568 };
349 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = {
350 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
351 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
352 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
353 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
354 12, 9, /* intr0-intr1 */
357 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = {
358 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
359 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
360 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
361 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
362 30, 31, 24 /* intr0-intr1, beep_en */
365 static const u16 NCT6779_REG_FAN[] = {
366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
373 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
385 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 };
388 static const char *const nct6779_temp_label[] = {
407 "PCH_CHIP_CPU_MAX_TEMP",
423 #define NCT6779_TEMP_MASK 0x07ffff7e
424 #define NCT6779_VIRT_TEMP_MASK 0x00000000
425 #define NCT6791_TEMP_MASK 0x87ffff7e
426 #define NCT6791_VIRT_TEMP_MASK 0x80000000
428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
430 0, 0, 0, 0, 0, 0, 0, 0,
431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
434 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
439 /* NCT6791 specific data */
441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
449 0x459, 0x45A, 0x45B, 0x568, 0x45D };
451 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = {
452 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
453 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
454 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
455 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
456 12, 9, /* intr0-intr1 */
459 /* NCT6792/NCT6793 specific data */
461 static const u16 NCT6792_REG_TEMP_MON[] = {
462 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
463 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
464 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
466 static const char *const nct6792_temp_label[] = {
485 "PCH_CHIP_CPU_MAX_TEMP",
494 "PECI Agent 0 Calibration",
495 "PECI Agent 1 Calibration",
501 #define NCT6792_TEMP_MASK 0x9fffff7e
502 #define NCT6792_VIRT_TEMP_MASK 0x80000000
504 static const char *const nct6793_temp_label[] = {
523 "PCH_CHIP_CPU_MAX_TEMP",
533 "PECI Agent 0 Calibration",
534 "PECI Agent 1 Calibration",
539 #define NCT6793_TEMP_MASK 0xbfff037e
540 #define NCT6793_VIRT_TEMP_MASK 0x80000000
542 static const char *const nct6795_temp_label[] = {
561 "PCH_CHIP_CPU_MAX_TEMP",
571 "PECI Agent 0 Calibration",
572 "PECI Agent 1 Calibration",
577 #define NCT6795_TEMP_MASK 0xbfffff7e
578 #define NCT6795_VIRT_TEMP_MASK 0x80000000
580 static const char *const nct6796_temp_label[] = {
599 "PCH_CHIP_CPU_MAX_TEMP",
609 "PECI Agent 0 Calibration",
610 "PECI Agent 1 Calibration",
615 #define NCT6796_TEMP_MASK 0xbfff0ffe
616 #define NCT6796_VIRT_TEMP_MASK 0x80000c00
618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
620 static const u16 NCT6798_REG_TEMP[] = {
621 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a};
623 static const u16 NCT6798_REG_TEMP_SOURCE[] = {
624 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b };
626 static const u16 NCT6798_REG_TEMP_MON[] = {
627 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 };
628 static const u16 NCT6798_REG_TEMP_OVER[] = {
629 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f };
630 static const u16 NCT6798_REG_TEMP_HYST[] = {
631 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 };
633 static const u16 NCT6798_REG_TEMP_CRIT[32] = {
634 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 };
636 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = {
637 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0,
638 0, 0, 0, 0, 0x4a2, 0, 0, 0,
639 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
640 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 };
642 static const char *const nct6798_temp_label[] = {
661 "PCH_CHIP_CPU_MAX_TEMP",
671 "PECI Agent 0 Calibration", /* undocumented */
672 "PECI Agent 1 Calibration", /* undocumented */
677 #define NCT6798_TEMP_MASK 0xbfff0ffe
678 #define NCT6798_VIRT_TEMP_MASK 0x80000c00
680 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = {
681 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 };
683 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = {
684 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */
685 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
686 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
687 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */
688 12, 9, /* intr0-intr1 */
691 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = {
692 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
693 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */
694 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
695 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */
696 30, 31, 24 /* intr0-intr1, beep_en */
699 /* PECI Calibration only for NCT6799D, not NCT6796D-S */
700 static const char *const nct6799_temp_label[] = {
719 "PCH_CHIP_CPU_MAX_TEMP",
729 "PECI/TSI Agent 0 Calibration",
730 "PECI/TSI Agent 1 Calibration",
735 #define NCT6799_TEMP_MASK 0xbfff2ffe
736 #define NCT6799_VIRT_TEMP_MASK 0x80000c00
738 /* NCT6102D/NCT6106D specific data */
740 #define NCT6106_REG_VBAT 0x318
741 #define NCT6106_REG_DIODE 0x319
742 #define NCT6106_DIODE_MASK 0x01
744 static const u16 NCT6106_REG_IN_MAX[] = {
745 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
746 static const u16 NCT6106_REG_IN_MIN[] = {
747 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
748 static const u16 NCT6106_REG_IN[] = {
749 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
753 static const u16 NCT6106_REG_TEMP_HYST[] = {
754 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
755 static const u16 NCT6106_REG_TEMP_OVER[] = {
756 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
757 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
758 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
759 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
760 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
762 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
763 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
774 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
775 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
778 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
779 0x11b, 0x12b, 0x13b };
781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
804 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
805 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
807 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = {
808 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
809 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
810 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
811 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
812 48, -1, /* intr0-intr1 */
815 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
816 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
818 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = {
819 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
820 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
821 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
822 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
823 34, -1, 32 /* intr0-intr1, beep_en */
826 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
832 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
839 /* NCT6112D/NCT6114D/NCT6116D specific data */
841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
849 static const u16 NCT6116_REG_TEMP_SOURCE[] = {
852 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
853 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
854 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
855 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
857 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
858 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
859 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
860 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
862 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
863 0x114, 0x124, 0x134, 0x194, 0x1a4 };
864 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
865 0x115, 0x125, 0x135, 0x195, 0x1a5 };
866 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
867 0x116, 0x126, 0x136, 0x196, 0x1a6 };
868 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
869 0x117, 0x127, 0x137, 0x197, 0x1a7 };
870 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
871 0x118, 0x128, 0x138, 0x198, 0x1a8 };
872 static const u16 NCT6116_REG_TOLERANCE_H[] = {
873 0x112, 0x122, 0x132, 0x192, 0x1a2 };
875 static const u16 NCT6116_REG_TARGET[] = {
876 0x111, 0x121, 0x131, 0x191, 0x1a1 };
878 static const u16 NCT6116_REG_AUTO_TEMP[] = {
879 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
880 static const u16 NCT6116_REG_AUTO_PWM[] = {
881 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
883 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = {
884 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
885 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
886 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
887 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
888 48, -1, /* intr0-intr1 */
891 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = {
892 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
893 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
894 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
895 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
896 34, -1, 32 /* intr0-intr1, beep_en */
899 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
901 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
903 if (mode == 0 && pwm == 255)
908 static int pwm_enable_to_reg(enum pwm_enable mode)
919 /* 1 is DC mode, output in ms */
920 static unsigned int step_time_from_reg(u8 reg, u8 mode)
922 return mode ? 400 * reg : 100 * reg;
925 static u8 step_time_to_reg(unsigned int msec, u8 mode)
927 return clamp_val((mode ? (msec + 200) / 400 :
928 (msec + 50) / 100), 1, 255);
931 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
933 if (reg == 0 || reg == 255)
935 return 1350000U / (reg << divreg);
938 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
940 if ((reg & 0xff1f) == 0xff1f)
943 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
948 return 1350000U / reg;
951 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
953 if (reg == 0 || reg == 0xffff)
957 * Even though the registers are 16 bit wide, the fan divisor
960 return 1350000U / (reg << divreg);
963 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
968 static u16 fan_to_reg(u32 fan, unsigned int divreg)
973 return (1350000U / fan) >> divreg;
976 static inline unsigned int
983 * Some of the voltage inputs have internal scaling, the tables below
984 * contain 8 (the ADC LSB in mV) * scaling factor * 100
986 static const u16 scale_in[15] = {
987 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
993 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2,
994 * IN3, IN7, IN9, VHIF, IN10
995 * 15-17 for NCT6799 only
997 static const u16 scale_in_6798[NUM_IN] = {
998 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800,
999 800, 800, 800, 1600, 800
1002 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales)
1004 return DIV_ROUND_CLOSEST(reg * scales[nr], 100);
1007 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales)
1009 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255);
1012 /* TSI temperatures are in 8.3 format */
1013 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
1015 return (reg >> 5) * 125;
1019 * Data structures and manipulation thereof
1022 struct sensor_device_template {
1023 struct device_attribute dev_attr;
1031 bool s2; /* true if both index and nr are used */
1034 struct sensor_device_attr_u {
1036 struct sensor_device_attribute a1;
1037 struct sensor_device_attribute_2 a2;
1042 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
1043 .attr = {.name = _template, .mode = _mode }, \
1048 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1049 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1050 .u.index = _index, \
1053 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1055 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1056 .u.s.index = _index, \
1060 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1061 static struct sensor_device_template sensor_dev_template_##_name \
1062 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
1065 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
1067 static struct sensor_device_template sensor_dev_template_##_name \
1068 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1071 struct sensor_template_group {
1072 struct sensor_device_template **templates;
1073 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1077 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
1078 const struct sensor_template_group *tg, int repeat)
1080 struct attribute_group *group;
1081 struct sensor_device_attr_u *su;
1082 struct sensor_device_attribute *a;
1083 struct sensor_device_attribute_2 *a2;
1084 struct attribute **attrs;
1085 struct sensor_device_template **t;
1092 for (count = 0; *t; t++, count++)
1098 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1102 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1107 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1112 group->attrs = attrs;
1113 group->is_visible = tg->is_visible;
1115 for (i = 0; i < repeat; i++) {
1117 while (*t != NULL) {
1118 snprintf(su->name, sizeof(su->name),
1119 (*t)->dev_attr.attr.name, tg->base + i);
1122 sysfs_attr_init(&a2->dev_attr.attr);
1123 a2->dev_attr.attr.name = su->name;
1124 a2->nr = (*t)->u.s.nr + i;
1125 a2->index = (*t)->u.s.index;
1126 a2->dev_attr.attr.mode =
1127 (*t)->dev_attr.attr.mode;
1128 a2->dev_attr.show = (*t)->dev_attr.show;
1129 a2->dev_attr.store = (*t)->dev_attr.store;
1130 *attrs = &a2->dev_attr.attr;
1133 sysfs_attr_init(&a->dev_attr.attr);
1134 a->dev_attr.attr.name = su->name;
1135 a->index = (*t)->u.index + i;
1136 a->dev_attr.attr.mode =
1137 (*t)->dev_attr.attr.mode;
1138 a->dev_attr.show = (*t)->dev_attr.show;
1139 a->dev_attr.store = (*t)->dev_attr.store;
1140 *attrs = &a->dev_attr.attr;
1148 return nct6775_add_attr_group(data, group);
1151 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1153 switch (data->kind) {
1155 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1156 (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1157 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1158 reg == 0x111 || reg == 0x121 || reg == 0x131;
1160 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1161 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1162 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1163 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1164 reg == 0x191 || reg == 0x1a1;
1166 return (((reg & 0xff00) == 0x100 ||
1167 (reg & 0xff00) == 0x200) &&
1168 ((reg & 0x00ff) == 0x50 ||
1169 (reg & 0x00ff) == 0x53 ||
1170 (reg & 0x00ff) == 0x55)) ||
1171 (reg & 0xfff0) == 0x630 ||
1172 reg == 0x640 || reg == 0x642 ||
1173 reg == 0x662 || reg == 0x669 ||
1174 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1175 reg == 0x73 || reg == 0x75 || reg == 0x77;
1177 return (((reg & 0xff00) == 0x100 ||
1178 (reg & 0xff00) == 0x200) &&
1179 ((reg & 0x00ff) == 0x50 ||
1180 (reg & 0x00ff) == 0x53 ||
1181 (reg & 0x00ff) == 0x55)) ||
1182 (reg & 0xfff0) == 0x630 ||
1184 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1185 reg == 0x640 || reg == 0x642 ||
1186 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1187 reg == 0x73 || reg == 0x75 || reg == 0x77;
1197 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1198 (reg & 0xfff0) == 0x4c0 ||
1200 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1201 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1202 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1204 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1205 reg == 0x7b || reg == 0x7d;
1209 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
1211 /* We left-align 8-bit temperature values to make the code simpler */
1212 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1216 err = nct6775_read_value(data, reg, val);
1220 if (!nct6775_reg_is_word_sized(data, reg))
1226 /* This function assumes that the caller holds data->update_lock */
1227 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1231 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1232 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
1234 err = nct6775_read_value(data, fandiv_reg, ®);
1237 reg &= 0x70 >> oddshift;
1238 reg |= (data->fan_div[nr] & 0x7) << oddshift;
1239 return nct6775_write_value(data, fandiv_reg, reg);
1242 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1244 if (data->kind == nct6775)
1245 return nct6775_write_fan_div(data, nr);
1249 static int nct6775_update_fan_div(struct nct6775_data *data)
1254 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1257 data->fan_div[0] = i & 0x7;
1258 data->fan_div[1] = (i & 0x70) >> 4;
1259 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1262 data->fan_div[2] = i & 0x7;
1263 if (data->has_fan & BIT(3))
1264 data->fan_div[3] = (i & 0x70) >> 4;
1269 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1271 if (data->kind == nct6775)
1272 return nct6775_update_fan_div(data);
1276 static int nct6775_init_fan_div(struct nct6775_data *data)
1280 err = nct6775_update_fan_div_common(data);
1285 * For all fans, start with highest divider value if the divider
1286 * register is not initialized. This ensures that we get a
1287 * reading from the fan count register, even if it is not optimal.
1288 * We'll compute a better divider later on.
1290 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1291 if (!(data->has_fan & BIT(i)))
1293 if (data->fan_div[i] == 0) {
1294 data->fan_div[i] = 7;
1295 err = nct6775_write_fan_div_common(data, i);
1304 static int nct6775_init_fan_common(struct device *dev,
1305 struct nct6775_data *data)
1310 if (data->has_fan_div) {
1311 err = nct6775_init_fan_div(data);
1317 * If fan_min is not set (0), set it to 0xff to disable it. This
1318 * prevents the unnecessary warning when fanX_min is reported as 0.
1320 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1321 if (data->has_fan_min & BIT(i)) {
1322 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1326 err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1327 data->has_fan_div ? 0xff : 0xff1f);
1337 static int nct6775_select_fan_div(struct device *dev,
1338 struct nct6775_data *data, int nr, u16 reg)
1341 u8 fan_div = data->fan_div[nr];
1344 if (!data->has_fan_div)
1348 * If we failed to measure the fan speed, or the reported value is not
1349 * in the optimal range, and the clock divider can be modified,
1350 * let's try that for next time.
1352 if (reg == 0x00 && fan_div < 0x07)
1354 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1357 if (fan_div != data->fan_div[nr]) {
1358 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1359 nr + 1, div_from_reg(data->fan_div[nr]),
1360 div_from_reg(fan_div));
1362 /* Preserve min limit if possible */
1363 if (data->has_fan_min & BIT(nr)) {
1364 fan_min = data->fan_min[nr];
1365 if (fan_div > data->fan_div[nr]) {
1366 if (fan_min != 255 && fan_min > 1)
1369 if (fan_min != 255) {
1375 if (fan_min != data->fan_min[nr]) {
1376 data->fan_min[nr] = fan_min;
1377 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1382 data->fan_div[nr] = fan_div;
1383 err = nct6775_write_fan_div_common(data, nr);
1391 static int nct6775_update_pwm(struct device *dev)
1393 struct nct6775_data *data = dev_get_drvdata(dev);
1395 u16 fanmodecfg, reg;
1398 for (i = 0; i < data->pwm_num; i++) {
1399 if (!(data->has_pwm & BIT(i)))
1402 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
1405 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1406 data->pwm_mode[i] = !duty_is_dc;
1408 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1411 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1412 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1413 err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
1416 data->pwm[j][i] = reg;
1420 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1421 (fanmodecfg >> 4) & 7);
1423 if (!data->temp_tolerance[0][i] ||
1424 data->pwm_enable[i] != speed_cruise)
1425 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1426 if (!data->target_speed_tolerance[i] ||
1427 data->pwm_enable[i] == speed_cruise) {
1428 u8 t = fanmodecfg & 0x0f;
1430 if (data->REG_TOLERANCE_H) {
1431 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1434 t |= (reg & 0x70) >> 1;
1436 data->target_speed_tolerance[i] = t;
1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
1442 data->temp_tolerance[1][i] = reg;
1444 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
1447 data->pwm_temp_sel[i] = reg & 0x1f;
1448 /* If fan can stop, report floor as 0 */
1450 data->pwm[2][i] = 0;
1452 if (!data->REG_WEIGHT_TEMP_SEL[i])
1455 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
1458 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1459 /* If weight is disabled, report weight source as 0 */
1461 data->pwm_weight_temp_sel[i] = 0;
1463 /* Weight temp data */
1464 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1465 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
1468 data->weight_temp[j][i] = reg;
1475 static int nct6775_update_pwm_limits(struct device *dev)
1477 struct nct6775_data *data = dev_get_drvdata(dev);
1481 for (i = 0; i < data->pwm_num; i++) {
1482 if (!(data->has_pwm & BIT(i)))
1485 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1486 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
1489 data->fan_time[j][i] = reg;
1492 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t);
1496 /* Update only in matching mode or if never updated */
1497 if (!data->target_temp[i] ||
1498 data->pwm_enable[i] == thermal_cruise)
1499 data->target_temp[i] = reg_t & data->target_temp_mask;
1500 if (!data->target_speed[i] ||
1501 data->pwm_enable[i] == speed_cruise) {
1502 if (data->REG_TOLERANCE_H) {
1503 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1506 reg_t |= (reg & 0x0f) << 8;
1508 data->target_speed[i] = reg_t;
1511 for (j = 0; j < data->auto_pwm_num; j++) {
1512 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
1515 data->auto_pwm[i][j] = reg;
1517 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
1520 data->auto_temp[i][j] = reg;
1523 /* critical auto_pwm temperature data */
1524 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
1527 data->auto_temp[i][data->auto_pwm_num] = reg;
1529 switch (data->kind) {
1531 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
1534 data->auto_pwm[i][data->auto_pwm_num] =
1535 (reg & 0x02) ? 0xff : 0x00;
1538 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1551 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
1554 if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1555 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
1561 data->auto_pwm[i][data->auto_pwm_num] = reg;
1569 struct nct6775_data *nct6775_update_device(struct device *dev)
1571 struct nct6775_data *data = dev_get_drvdata(dev);
1575 mutex_lock(&data->update_lock);
1577 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1579 /* Fan clock dividers */
1580 err = nct6775_update_fan_div_common(data);
1584 /* Measured voltages and limits */
1585 for (i = 0; i < data->in_num; i++) {
1586 if (!(data->have_in & BIT(i)))
1589 err = nct6775_read_value(data, data->REG_VIN[i], ®);
1592 data->in[i][0] = reg;
1594 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
1597 data->in[i][1] = reg;
1599 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
1602 data->in[i][2] = reg;
1605 /* Measured fan speeds and limits */
1606 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1607 if (!(data->has_fan & BIT(i)))
1610 err = nct6775_read_value(data, data->REG_FAN[i], ®);
1613 data->rpm[i] = data->fan_from_reg(reg,
1616 if (data->has_fan_min & BIT(i)) {
1617 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1620 data->fan_min[i] = reg;
1623 if (data->REG_FAN_PULSES[i]) {
1624 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®);
1627 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1630 err = nct6775_select_fan_div(dev, data, i, reg);
1635 err = nct6775_update_pwm(dev);
1639 err = nct6775_update_pwm_limits(dev);
1643 /* Measured temperatures and limits */
1644 for (i = 0; i < NUM_TEMP; i++) {
1645 if (!(data->have_temp & BIT(i)))
1647 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1648 if (data->reg_temp[j][i]) {
1649 err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
1652 data->temp[j][i] = reg;
1655 if (i >= NUM_TEMP_FIXED ||
1656 !(data->have_temp_fixed & BIT(i)))
1658 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
1661 data->temp_offset[i] = reg;
1664 for (i = 0; i < NUM_TSI_TEMP; i++) {
1665 if (!(data->have_tsi_temp & BIT(i)))
1667 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
1670 data->tsi_temp[i] = reg;
1674 for (i = 0; i < NUM_REG_ALARM; i++) {
1677 if (!data->REG_ALARM[i])
1679 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
1682 data->alarms |= ((u64)alarm) << (i << 3);
1686 for (i = 0; i < NUM_REG_BEEP; i++) {
1689 if (!data->REG_BEEP[i])
1691 err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
1694 data->beeps |= ((u64)beep) << (i << 3);
1697 data->last_updated = jiffies;
1701 mutex_unlock(&data->update_lock);
1702 return err ? ERR_PTR(err) : data;
1704 EXPORT_SYMBOL_GPL(nct6775_update_device);
1707 * Sysfs callback functions
1710 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1712 struct nct6775_data *data = nct6775_update_device(dev);
1713 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1714 int index = sattr->index;
1718 return PTR_ERR(data);
1720 return sprintf(buf, "%ld\n",
1721 in_from_reg(data->in[nr][index], nr, data->scale_in));
1725 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1728 struct nct6775_data *data = dev_get_drvdata(dev);
1729 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1730 int index = sattr->index;
1735 err = kstrtoul(buf, 10, &val);
1738 mutex_lock(&data->update_lock);
1739 data->in[nr][index] = in_to_reg(val, nr, data->scale_in);
1740 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
1741 mutex_unlock(&data->update_lock);
1742 return err ? : count;
1746 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1748 struct nct6775_data *data = nct6775_update_device(dev);
1749 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1753 return PTR_ERR(data);
1755 nr = data->ALARM_BITS[sattr->index];
1756 return sprintf(buf, "%u\n",
1757 (unsigned int)((data->alarms >> nr) & 0x01));
1759 EXPORT_SYMBOL_GPL(nct6775_show_alarm);
1761 static int find_temp_source(struct nct6775_data *data, int index, int count)
1763 int source = data->temp_src[index];
1766 for (nr = 0; nr < count; nr++) {
1769 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
1772 if ((src & 0x1f) == source)
1779 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1781 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1782 struct nct6775_data *data = nct6775_update_device(dev);
1783 unsigned int alarm = 0;
1787 return PTR_ERR(data);
1790 * For temperatures, there is no fixed mapping from registers to alarm
1791 * bits. Alarm bits are determined by the temperature source mapping.
1793 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1795 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1797 alarm = (data->alarms >> bit) & 0x01;
1799 return sprintf(buf, "%u\n", alarm);
1803 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1805 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1806 struct nct6775_data *data = nct6775_update_device(dev);
1810 return PTR_ERR(data);
1812 nr = data->BEEP_BITS[sattr->index];
1814 return sprintf(buf, "%u\n",
1815 (unsigned int)((data->beeps >> nr) & 0x01));
1817 EXPORT_SYMBOL_GPL(nct6775_show_beep);
1820 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1822 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1823 struct nct6775_data *data = dev_get_drvdata(dev);
1824 int nr = data->BEEP_BITS[sattr->index];
1825 int regindex = nr >> 3;
1829 err = kstrtoul(buf, 10, &val);
1835 mutex_lock(&data->update_lock);
1837 data->beeps |= (1ULL << nr);
1839 data->beeps &= ~(1ULL << nr);
1840 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1841 (data->beeps >> (regindex << 3)) & 0xff);
1842 mutex_unlock(&data->update_lock);
1843 return err ? : count;
1845 EXPORT_SYMBOL_GPL(nct6775_store_beep);
1848 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1850 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1851 struct nct6775_data *data = nct6775_update_device(dev);
1852 unsigned int beep = 0;
1856 return PTR_ERR(data);
1859 * For temperatures, there is no fixed mapping from registers to beep
1860 * enable bits. Beep enable bits are determined by the temperature
1863 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1865 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1867 beep = (data->beeps >> bit) & 0x01;
1869 return sprintf(buf, "%u\n", beep);
1873 store_temp_beep(struct device *dev, struct device_attribute *attr,
1874 const char *buf, size_t count)
1876 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1877 struct nct6775_data *data = dev_get_drvdata(dev);
1878 int nr, bit, regindex;
1882 err = kstrtoul(buf, 10, &val);
1888 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1892 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1893 regindex = bit >> 3;
1895 mutex_lock(&data->update_lock);
1897 data->beeps |= (1ULL << bit);
1899 data->beeps &= ~(1ULL << bit);
1900 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1901 (data->beeps >> (regindex << 3)) & 0xff);
1902 mutex_unlock(&data->update_lock);
1904 return err ? : count;
1907 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1908 struct attribute *attr, int index)
1910 struct device *dev = kobj_to_dev(kobj);
1911 struct nct6775_data *data = dev_get_drvdata(dev);
1912 int in = index / 5; /* voltage index */
1914 if (!(data->have_in & BIT(in)))
1917 return nct6775_attr_mode(data, attr);
1920 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1921 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1922 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1923 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1924 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
1927 * nct6775_in_is_visible uses the index into the following array
1928 * to determine if attributes should be created or not.
1929 * Any change in order or content must be matched.
1931 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1932 &sensor_dev_template_in_input,
1933 &sensor_dev_template_in_alarm,
1934 &sensor_dev_template_in_beep,
1935 &sensor_dev_template_in_min,
1936 &sensor_dev_template_in_max,
1940 static const struct sensor_template_group nct6775_in_template_group = {
1941 .templates = nct6775_attributes_in_template,
1942 .is_visible = nct6775_in_is_visible,
1946 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1948 struct nct6775_data *data = nct6775_update_device(dev);
1949 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1950 int nr = sattr->index;
1953 return PTR_ERR(data);
1955 return sprintf(buf, "%d\n", data->rpm[nr]);
1959 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1961 struct nct6775_data *data = nct6775_update_device(dev);
1962 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1963 int nr = sattr->index;
1966 return PTR_ERR(data);
1968 return sprintf(buf, "%d\n",
1969 data->fan_from_reg_min(data->fan_min[nr],
1970 data->fan_div[nr]));
1974 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1976 struct nct6775_data *data = nct6775_update_device(dev);
1977 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1978 int nr = sattr->index;
1981 return PTR_ERR(data);
1983 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1987 store_fan_min(struct device *dev, struct device_attribute *attr,
1988 const char *buf, size_t count)
1990 struct nct6775_data *data = dev_get_drvdata(dev);
1991 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1992 int nr = sattr->index;
1998 err = kstrtoul(buf, 10, &val);
2002 mutex_lock(&data->update_lock);
2003 if (!data->has_fan_div) {
2004 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
2010 val = 1350000U / val;
2011 val = (val & 0x1f) | ((val << 3) & 0xff00);
2013 data->fan_min[nr] = val;
2014 goto write_min; /* Leave fan divider alone */
2017 /* No min limit, alarm disabled */
2018 data->fan_min[nr] = 255;
2019 new_div = data->fan_div[nr]; /* No change */
2020 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2023 reg = 1350000U / val;
2024 if (reg >= 128 * 255) {
2026 * Speed below this value cannot possibly be represented,
2027 * even with the highest divider (128)
2029 data->fan_min[nr] = 254;
2030 new_div = 7; /* 128 == BIT(7) */
2032 "fan%u low limit %lu below minimum %u, set to minimum\n",
2033 nr + 1, val, data->fan_from_reg_min(254, 7));
2036 * Speed above this value cannot possibly be represented,
2037 * even with the lowest divider (1)
2039 data->fan_min[nr] = 1;
2040 new_div = 0; /* 1 == BIT(0) */
2042 "fan%u low limit %lu above maximum %u, set to maximum\n",
2043 nr + 1, val, data->fan_from_reg_min(1, 0));
2046 * Automatically pick the best divider, i.e. the one such
2047 * that the min limit will correspond to a register value
2048 * in the 96..192 range
2051 while (reg > 192 && new_div < 7) {
2055 data->fan_min[nr] = reg;
2060 * Write both the fan clock divider (if it changed) and the new
2061 * fan min (unconditionally)
2063 if (new_div != data->fan_div[nr]) {
2064 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2065 nr + 1, div_from_reg(data->fan_div[nr]),
2066 div_from_reg(new_div));
2067 data->fan_div[nr] = new_div;
2068 err = nct6775_write_fan_div_common(data, nr);
2071 /* Give the chip time to sample a new speed value */
2072 data->last_updated = jiffies;
2076 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2077 mutex_unlock(&data->update_lock);
2079 return err ? : count;
2083 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2085 struct nct6775_data *data = nct6775_update_device(dev);
2086 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2090 return PTR_ERR(data);
2092 p = data->fan_pulses[sattr->index];
2093 return sprintf(buf, "%d\n", p ? : 4);
2097 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2098 const char *buf, size_t count)
2100 struct nct6775_data *data = dev_get_drvdata(dev);
2101 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2102 int nr = sattr->index;
2107 err = kstrtoul(buf, 10, &val);
2114 mutex_lock(&data->update_lock);
2115 data->fan_pulses[nr] = val & 3;
2116 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
2119 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2120 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2121 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2123 mutex_unlock(&data->update_lock);
2125 return err ? : count;
2128 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2129 struct attribute *attr, int index)
2131 struct device *dev = kobj_to_dev(kobj);
2132 struct nct6775_data *data = dev_get_drvdata(dev);
2133 int fan = index / 6; /* fan index */
2134 int nr = index % 6; /* attribute index */
2136 if (!(data->has_fan & BIT(fan)))
2139 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2141 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2143 if (nr == 3 && !data->REG_FAN_PULSES[fan])
2145 if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2147 if (nr == 5 && data->kind != nct6775)
2150 return nct6775_attr_mode(data, attr);
2153 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2154 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
2155 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
2156 nct6775_store_beep, FAN_ALARM_BASE);
2157 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2158 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2159 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2162 * nct6775_fan_is_visible uses the index into the following array
2163 * to determine if attributes should be created or not.
2164 * Any change in order or content must be matched.
2166 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2167 &sensor_dev_template_fan_input,
2168 &sensor_dev_template_fan_alarm, /* 1 */
2169 &sensor_dev_template_fan_beep, /* 2 */
2170 &sensor_dev_template_fan_pulses,
2171 &sensor_dev_template_fan_min, /* 4 */
2172 &sensor_dev_template_fan_div, /* 5 */
2176 static const struct sensor_template_group nct6775_fan_template_group = {
2177 .templates = nct6775_attributes_fan_template,
2178 .is_visible = nct6775_fan_is_visible,
2183 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2185 struct nct6775_data *data = nct6775_update_device(dev);
2186 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2187 int nr = sattr->index;
2190 return PTR_ERR(data);
2192 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2196 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2198 struct nct6775_data *data = nct6775_update_device(dev);
2199 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2201 int index = sattr->index;
2204 return PTR_ERR(data);
2206 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2210 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2213 struct nct6775_data *data = dev_get_drvdata(dev);
2214 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2216 int index = sattr->index;
2220 err = kstrtol(buf, 10, &val);
2224 mutex_lock(&data->update_lock);
2225 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2226 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2227 mutex_unlock(&data->update_lock);
2228 return err ? : count;
2232 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2234 struct nct6775_data *data = nct6775_update_device(dev);
2235 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2238 return PTR_ERR(data);
2240 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2244 store_temp_offset(struct device *dev, struct device_attribute *attr,
2245 const char *buf, size_t count)
2247 struct nct6775_data *data = dev_get_drvdata(dev);
2248 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2249 int nr = sattr->index;
2253 err = kstrtol(buf, 10, &val);
2257 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2259 mutex_lock(&data->update_lock);
2260 data->temp_offset[nr] = val;
2261 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2262 mutex_unlock(&data->update_lock);
2264 return err ? : count;
2268 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2270 struct nct6775_data *data = nct6775_update_device(dev);
2271 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2272 int nr = sattr->index;
2275 return PTR_ERR(data);
2277 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2281 store_temp_type(struct device *dev, struct device_attribute *attr,
2282 const char *buf, size_t count)
2284 struct nct6775_data *data = nct6775_update_device(dev);
2285 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2286 int nr = sattr->index;
2293 return PTR_ERR(data);
2295 err = kstrtoul(buf, 10, &val);
2299 if (val != 1 && val != 3 && val != 4)
2302 mutex_lock(&data->update_lock);
2304 data->temp_type[nr] = val;
2306 dbit = data->DIODE_MASK << nr;
2308 err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2313 err = nct6775_read_value(data, data->REG_DIODE, &diode);
2319 case 1: /* CPU diode (diode, current mode) */
2323 case 3: /* diode, voltage mode */
2326 case 4: /* thermistor */
2329 err = nct6775_write_value(data, data->REG_VBAT, vbat);
2332 err = nct6775_write_value(data, data->REG_DIODE, diode);
2334 mutex_unlock(&data->update_lock);
2335 return err ? : count;
2338 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2339 struct attribute *attr, int index)
2341 struct device *dev = kobj_to_dev(kobj);
2342 struct nct6775_data *data = dev_get_drvdata(dev);
2343 int temp = index / 10; /* temp index */
2344 int nr = index % 10; /* attribute index */
2346 if (!(data->have_temp & BIT(temp)))
2349 if (nr == 1 && !data->temp_label)
2352 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2353 return 0; /* alarm */
2355 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2356 return 0; /* beep */
2358 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2361 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2364 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2367 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2370 /* offset and type only apply to fixed sensors */
2371 if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2374 return nct6775_attr_mode(data, attr);
2377 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2378 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2379 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2380 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2381 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2382 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2383 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2384 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2385 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2386 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2389 * nct6775_temp_is_visible uses the index into the following array
2390 * to determine if attributes should be created or not.
2391 * Any change in order or content must be matched.
2393 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2394 &sensor_dev_template_temp_input,
2395 &sensor_dev_template_temp_label,
2396 &sensor_dev_template_temp_alarm, /* 2 */
2397 &sensor_dev_template_temp_beep, /* 3 */
2398 &sensor_dev_template_temp_max, /* 4 */
2399 &sensor_dev_template_temp_max_hyst, /* 5 */
2400 &sensor_dev_template_temp_crit, /* 6 */
2401 &sensor_dev_template_temp_lcrit, /* 7 */
2402 &sensor_dev_template_temp_offset, /* 8 */
2403 &sensor_dev_template_temp_type, /* 9 */
2407 static const struct sensor_template_group nct6775_temp_template_group = {
2408 .templates = nct6775_attributes_temp_template,
2409 .is_visible = nct6775_temp_is_visible,
2413 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2415 struct nct6775_data *data = nct6775_update_device(dev);
2416 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2419 return PTR_ERR(data);
2421 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2424 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2426 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2428 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2431 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2432 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2434 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2437 struct device *dev = kobj_to_dev(kobj);
2438 struct nct6775_data *data = dev_get_drvdata(dev);
2439 int temp = index / 2;
2441 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2445 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in
2446 * sync with the size of this array.
2448 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2449 &sensor_dev_template_tsi_temp_input,
2450 &sensor_dev_template_tsi_temp_label,
2455 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2457 struct nct6775_data *data = nct6775_update_device(dev);
2458 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2461 return PTR_ERR(data);
2463 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2467 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2468 const char *buf, size_t count)
2470 struct nct6775_data *data = dev_get_drvdata(dev);
2471 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2472 int nr = sattr->index;
2477 err = kstrtoul(buf, 10, &val);
2484 /* Setting DC mode (0) is not supported for all chips/channels */
2485 if (data->REG_PWM_MODE[nr] == 0) {
2491 mutex_lock(&data->update_lock);
2492 data->pwm_mode[nr] = val;
2493 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
2496 reg &= ~data->PWM_MODE_MASK[nr];
2498 reg |= data->PWM_MODE_MASK[nr];
2499 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2501 mutex_unlock(&data->update_lock);
2502 return err ? : count;
2506 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2508 struct nct6775_data *data = nct6775_update_device(dev);
2509 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2511 int index = sattr->index;
2516 return PTR_ERR(data);
2519 * For automatic fan control modes, show current pwm readings.
2520 * Otherwise, show the configured value.
2522 if (index == 0 && data->pwm_enable[nr] > manual) {
2523 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
2527 pwm = data->pwm[index][nr];
2530 return sprintf(buf, "%d\n", pwm);
2534 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2537 struct nct6775_data *data = dev_get_drvdata(dev);
2538 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2540 int index = sattr->index;
2542 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2544 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2548 err = kstrtoul(buf, 10, &val);
2551 val = clamp_val(val, minval[index], maxval[index]);
2553 mutex_lock(&data->update_lock);
2554 data->pwm[index][nr] = val;
2555 err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
2558 if (index == 2) { /* floor: disable if val == 0 */
2559 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2565 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2568 mutex_unlock(&data->update_lock);
2569 return err ? : count;
2572 /* Returns 0 if OK, -EINVAL otherwise */
2573 static int check_trip_points(struct nct6775_data *data, int nr)
2577 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2578 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2581 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2582 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2585 /* validate critical temperature and pwm if enabled (pwm > 0) */
2586 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2587 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2588 data->auto_temp[nr][data->auto_pwm_num] ||
2589 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2590 data->auto_pwm[nr][data->auto_pwm_num])
2596 static int pwm_update_registers(struct nct6775_data *data, int nr)
2601 switch (data->pwm_enable[nr]) {
2606 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2609 reg = (reg & ~data->tolerance_mask) |
2610 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2611 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2614 err = nct6775_write_value(data, data->REG_TARGET[nr],
2615 data->target_speed[nr] & 0xff);
2618 if (data->REG_TOLERANCE_H) {
2619 reg = (data->target_speed[nr] >> 8) & 0x0f;
2620 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2621 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2626 case thermal_cruise:
2627 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
2632 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2635 reg = (reg & ~data->tolerance_mask) |
2636 data->temp_tolerance[0][nr];
2637 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2647 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2649 struct nct6775_data *data = nct6775_update_device(dev);
2650 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2653 return PTR_ERR(data);
2655 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2659 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2660 const char *buf, size_t count)
2662 struct nct6775_data *data = dev_get_drvdata(dev);
2663 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2664 int nr = sattr->index;
2669 err = kstrtoul(buf, 10, &val);
2676 if (val == sf3 && data->kind != nct6775)
2679 if (val == sf4 && check_trip_points(data, nr)) {
2680 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2681 dev_err(dev, "Adjust trip points and try again\n");
2685 mutex_lock(&data->update_lock);
2686 data->pwm_enable[nr] = val;
2689 * turn off pwm control: select manual mode, set pwm to maximum
2691 data->pwm[0][nr] = 255;
2692 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2696 err = pwm_update_registers(data, nr);
2699 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2703 reg |= pwm_enable_to_reg(val) << 4;
2704 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2706 mutex_unlock(&data->update_lock);
2707 return err ? : count;
2711 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2715 for (i = 0; i < NUM_TEMP; i++) {
2716 if (!(data->have_temp & BIT(i)))
2718 if (src == data->temp_src[i]) {
2724 return sprintf(buf, "%d\n", sel);
2728 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2730 struct nct6775_data *data = nct6775_update_device(dev);
2731 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2732 int index = sattr->index;
2735 return PTR_ERR(data);
2737 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2741 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2742 const char *buf, size_t count)
2744 struct nct6775_data *data = nct6775_update_device(dev);
2745 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2746 int nr = sattr->index;
2752 return PTR_ERR(data);
2754 err = kstrtoul(buf, 10, &val);
2757 if (val == 0 || val > NUM_TEMP)
2759 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2762 mutex_lock(&data->update_lock);
2763 src = data->temp_src[val - 1];
2764 data->pwm_temp_sel[nr] = src;
2765 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2770 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2772 mutex_unlock(&data->update_lock);
2774 return err ? : count;
2778 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2781 struct nct6775_data *data = nct6775_update_device(dev);
2782 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2783 int index = sattr->index;
2786 return PTR_ERR(data);
2788 return show_pwm_temp_sel_common(data, buf,
2789 data->pwm_weight_temp_sel[index]);
2793 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2794 const char *buf, size_t count)
2796 struct nct6775_data *data = nct6775_update_device(dev);
2797 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2798 int nr = sattr->index;
2804 return PTR_ERR(data);
2806 err = kstrtoul(buf, 10, &val);
2811 val = array_index_nospec(val, NUM_TEMP + 1);
2812 if (val && (!(data->have_temp & BIT(val - 1)) ||
2813 !data->temp_src[val - 1]))
2816 mutex_lock(&data->update_lock);
2818 src = data->temp_src[val - 1];
2819 data->pwm_weight_temp_sel[nr] = src;
2820 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2824 reg |= (src | 0x80);
2825 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2827 data->pwm_weight_temp_sel[nr] = 0;
2828 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2832 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2835 mutex_unlock(&data->update_lock);
2837 return err ? : count;
2841 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2843 struct nct6775_data *data = nct6775_update_device(dev);
2844 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2847 return PTR_ERR(data);
2849 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2853 store_target_temp(struct device *dev, struct device_attribute *attr,
2854 const char *buf, size_t count)
2856 struct nct6775_data *data = dev_get_drvdata(dev);
2857 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2858 int nr = sattr->index;
2862 err = kstrtoul(buf, 10, &val);
2866 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2867 data->target_temp_mask);
2869 mutex_lock(&data->update_lock);
2870 data->target_temp[nr] = val;
2871 err = pwm_update_registers(data, nr);
2872 mutex_unlock(&data->update_lock);
2873 return err ? : count;
2877 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2879 struct nct6775_data *data = nct6775_update_device(dev);
2880 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2881 int nr = sattr->index;
2884 return PTR_ERR(data);
2886 return sprintf(buf, "%d\n",
2887 fan_from_reg16(data->target_speed[nr],
2888 data->fan_div[nr]));
2892 store_target_speed(struct device *dev, struct device_attribute *attr,
2893 const char *buf, size_t count)
2895 struct nct6775_data *data = dev_get_drvdata(dev);
2896 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2897 int nr = sattr->index;
2902 err = kstrtoul(buf, 10, &val);
2906 val = clamp_val(val, 0, 1350000U);
2907 speed = fan_to_reg(val, data->fan_div[nr]);
2909 mutex_lock(&data->update_lock);
2910 data->target_speed[nr] = speed;
2911 err = pwm_update_registers(data, nr);
2912 mutex_unlock(&data->update_lock);
2913 return err ? : count;
2917 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2920 struct nct6775_data *data = nct6775_update_device(dev);
2921 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2923 int index = sattr->index;
2926 return PTR_ERR(data);
2928 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2932 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2933 const char *buf, size_t count)
2935 struct nct6775_data *data = dev_get_drvdata(dev);
2936 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2938 int index = sattr->index;
2942 err = kstrtoul(buf, 10, &val);
2946 /* Limit tolerance as needed */
2947 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2949 mutex_lock(&data->update_lock);
2950 data->temp_tolerance[index][nr] = val;
2952 err = pwm_update_registers(data, nr);
2954 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
2955 mutex_unlock(&data->update_lock);
2956 return err ? : count;
2960 * Fan speed tolerance is a tricky beast, since the associated register is
2961 * a tick counter, but the value is reported and configured as rpm.
2962 * Compute resulting low and high rpm values and report the difference.
2963 * A fan speed tolerance only makes sense if a fan target speed has been
2964 * configured, so only display values other than 0 if that is the case.
2967 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2970 struct nct6775_data *data = nct6775_update_device(dev);
2971 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2972 int nr = sattr->index;
2973 int target, tolerance = 0;
2976 return PTR_ERR(data);
2978 target = data->target_speed[nr];
2981 int low = target - data->target_speed_tolerance[nr];
2982 int high = target + data->target_speed_tolerance[nr];
2991 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2992 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2995 return sprintf(buf, "%d\n", tolerance);
2999 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
3000 const char *buf, size_t count)
3002 struct nct6775_data *data = dev_get_drvdata(dev);
3003 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3004 int nr = sattr->index;
3009 err = kstrtoul(buf, 10, &val);
3013 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
3014 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
3020 val = (fan_to_reg(low, data->fan_div[nr]) -
3021 fan_to_reg(high, data->fan_div[nr])) / 2;
3023 /* Limit tolerance as needed */
3024 val = clamp_val(val, 0, data->speed_tolerance_limit);
3026 mutex_lock(&data->update_lock);
3027 data->target_speed_tolerance[nr] = val;
3028 err = pwm_update_registers(data, nr);
3029 mutex_unlock(&data->update_lock);
3030 return err ? : count;
3033 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
3034 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
3035 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
3036 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
3037 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
3038 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
3039 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
3040 store_speed_tolerance, 0);
3042 /* Smart Fan registers */
3045 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
3047 struct nct6775_data *data = nct6775_update_device(dev);
3048 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3050 int index = sattr->index;
3053 return PTR_ERR(data);
3055 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
3059 store_weight_temp(struct device *dev, struct device_attribute *attr,
3060 const char *buf, size_t count)
3062 struct nct6775_data *data = dev_get_drvdata(dev);
3063 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3065 int index = sattr->index;
3069 err = kstrtoul(buf, 10, &val);
3073 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
3075 mutex_lock(&data->update_lock);
3076 data->weight_temp[index][nr] = val;
3077 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
3078 mutex_unlock(&data->update_lock);
3079 return err ? : count;
3082 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
3083 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3084 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
3085 0644, show_weight_temp, store_weight_temp, 0, 0);
3086 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3087 0644, show_weight_temp, store_weight_temp, 0, 1);
3088 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3089 0644, show_weight_temp, store_weight_temp, 0, 2);
3090 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3091 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3094 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3096 struct nct6775_data *data = nct6775_update_device(dev);
3097 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3099 int index = sattr->index;
3102 return PTR_ERR(data);
3104 return sprintf(buf, "%d\n",
3105 step_time_from_reg(data->fan_time[index][nr],
3106 data->pwm_mode[nr]));
3110 store_fan_time(struct device *dev, struct device_attribute *attr,
3111 const char *buf, size_t count)
3113 struct nct6775_data *data = dev_get_drvdata(dev);
3114 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3116 int index = sattr->index;
3120 err = kstrtoul(buf, 10, &val);
3124 val = step_time_to_reg(val, data->pwm_mode[nr]);
3125 mutex_lock(&data->update_lock);
3126 data->fan_time[index][nr] = val;
3127 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3128 mutex_unlock(&data->update_lock);
3129 return err ? : count;
3133 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3135 struct nct6775_data *data = nct6775_update_device(dev);
3136 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3139 return PTR_ERR(data);
3141 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3145 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3146 const char *buf, size_t count)
3148 struct nct6775_data *data = dev_get_drvdata(dev);
3149 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3151 int point = sattr->index;
3156 err = kstrtoul(buf, 10, &val);
3162 if (point == data->auto_pwm_num) {
3163 if (data->kind != nct6775 && !val)
3165 if (data->kind != nct6779 && val)
3169 mutex_lock(&data->update_lock);
3170 data->auto_pwm[nr][point] = val;
3171 if (point < data->auto_pwm_num) {
3172 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3173 data->auto_pwm[nr][point]);
3175 switch (data->kind) {
3177 /* disable if needed (pwm == 0) */
3178 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
3185 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3188 break; /* always enabled, nothing to do */
3200 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3203 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
3207 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3209 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3210 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3214 mutex_unlock(&data->update_lock);
3215 return err ? : count;
3219 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3221 struct nct6775_data *data = nct6775_update_device(dev);
3222 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3224 int point = sattr->index;
3227 return PTR_ERR(data);
3230 * We don't know for sure if the temperature is signed or unsigned.
3231 * Assume it is unsigned.
3233 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3237 store_auto_temp(struct device *dev, struct device_attribute *attr,
3238 const char *buf, size_t count)
3240 struct nct6775_data *data = dev_get_drvdata(dev);
3241 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3243 int point = sattr->index;
3247 err = kstrtoul(buf, 10, &val);
3253 mutex_lock(&data->update_lock);
3254 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3255 if (point < data->auto_pwm_num) {
3256 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3257 data->auto_temp[nr][point]);
3259 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3260 data->auto_temp[nr][point]);
3262 mutex_unlock(&data->update_lock);
3263 return err ? : count;
3266 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3267 struct attribute *attr, int index)
3269 struct device *dev = kobj_to_dev(kobj);
3270 struct nct6775_data *data = dev_get_drvdata(dev);
3271 int pwm = index / 36; /* pwm index */
3272 int nr = index % 36; /* attribute index */
3274 if (!(data->has_pwm & BIT(pwm)))
3277 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3278 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3280 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3282 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3284 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3287 if (nr >= 22 && nr <= 35) { /* auto point */
3288 int api = (nr - 22) / 2; /* auto point index */
3290 if (api > data->auto_pwm_num)
3293 return nct6775_attr_mode(data, attr);
3296 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3297 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
3298 show_fan_time, store_fan_time, 0, 1);
3299 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
3300 show_fan_time, store_fan_time, 0, 2);
3301 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3302 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3303 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
3304 show_temp_tolerance, store_temp_tolerance, 0, 0);
3305 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3306 0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3308 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3310 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3312 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3313 0644, show_auto_pwm, store_auto_pwm, 0, 0);
3314 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3315 0644, show_auto_temp, store_auto_temp, 0, 0);
3317 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3318 0644, show_auto_pwm, store_auto_pwm, 0, 1);
3319 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3320 0644, show_auto_temp, store_auto_temp, 0, 1);
3322 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3323 0644, show_auto_pwm, store_auto_pwm, 0, 2);
3324 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3325 0644, show_auto_temp, store_auto_temp, 0, 2);
3327 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3328 0644, show_auto_pwm, store_auto_pwm, 0, 3);
3329 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3330 0644, show_auto_temp, store_auto_temp, 0, 3);
3332 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3333 0644, show_auto_pwm, store_auto_pwm, 0, 4);
3334 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3335 0644, show_auto_temp, store_auto_temp, 0, 4);
3337 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3338 0644, show_auto_pwm, store_auto_pwm, 0, 5);
3339 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3340 0644, show_auto_temp, store_auto_temp, 0, 5);
3342 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3343 0644, show_auto_pwm, store_auto_pwm, 0, 6);
3344 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3345 0644, show_auto_temp, store_auto_temp, 0, 6);
3348 * nct6775_pwm_is_visible uses the index into the following array
3349 * to determine if attributes should be created or not.
3350 * Any change in order or content must be matched.
3352 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3353 &sensor_dev_template_pwm,
3354 &sensor_dev_template_pwm_mode,
3355 &sensor_dev_template_pwm_enable,
3356 &sensor_dev_template_pwm_temp_sel,
3357 &sensor_dev_template_pwm_temp_tolerance,
3358 &sensor_dev_template_pwm_crit_temp_tolerance,
3359 &sensor_dev_template_pwm_target_temp,
3360 &sensor_dev_template_fan_target,
3361 &sensor_dev_template_fan_tolerance,
3362 &sensor_dev_template_pwm_stop_time,
3363 &sensor_dev_template_pwm_step_up_time,
3364 &sensor_dev_template_pwm_step_down_time,
3365 &sensor_dev_template_pwm_start,
3366 &sensor_dev_template_pwm_floor,
3367 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3368 &sensor_dev_template_pwm_weight_temp_step,
3369 &sensor_dev_template_pwm_weight_temp_step_tol,
3370 &sensor_dev_template_pwm_weight_temp_step_base,
3371 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3372 &sensor_dev_template_pwm_max, /* 19 */
3373 &sensor_dev_template_pwm_step, /* 20 */
3374 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3375 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3376 &sensor_dev_template_pwm_auto_point1_temp,
3377 &sensor_dev_template_pwm_auto_point2_pwm,
3378 &sensor_dev_template_pwm_auto_point2_temp,
3379 &sensor_dev_template_pwm_auto_point3_pwm,
3380 &sensor_dev_template_pwm_auto_point3_temp,
3381 &sensor_dev_template_pwm_auto_point4_pwm,
3382 &sensor_dev_template_pwm_auto_point4_temp,
3383 &sensor_dev_template_pwm_auto_point5_pwm,
3384 &sensor_dev_template_pwm_auto_point5_temp,
3385 &sensor_dev_template_pwm_auto_point6_pwm,
3386 &sensor_dev_template_pwm_auto_point6_temp,
3387 &sensor_dev_template_pwm_auto_point7_pwm,
3388 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3393 static const struct sensor_template_group nct6775_pwm_template_group = {
3394 .templates = nct6775_attributes_pwm_template,
3395 .is_visible = nct6775_pwm_is_visible,
3399 static inline int nct6775_init_device(struct nct6775_data *data)
3404 /* Start monitoring if needed */
3405 if (data->REG_CONFIG) {
3406 err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
3409 if (!(tmp & 0x01)) {
3410 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3416 /* Enable temperature sensors if needed */
3417 for (i = 0; i < NUM_TEMP; i++) {
3418 if (!(data->have_temp & BIT(i)))
3420 if (!data->reg_temp_config[i])
3422 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
3426 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
3432 /* Enable VBAT monitoring if needed */
3433 err = nct6775_read_value(data, data->REG_VBAT, &tmp);
3436 if (!(tmp & 0x01)) {
3437 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3442 err = nct6775_read_value(data, data->REG_DIODE, &diode);
3446 for (i = 0; i < data->temp_fixed_num; i++) {
3447 if (!(data->have_temp_fixed & BIT(i)))
3449 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3451 = 3 - ((diode >> i) & data->DIODE_MASK);
3452 else /* thermistor */
3453 data->temp_type[i] = 4;
3459 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3460 int *available, int *mask)
3465 for (i = 0; i < data->pwm_num && *available; i++) {
3470 err = nct6775_read_value(data, regp[i], &src);
3474 if (!src || (*mask & BIT(src)))
3476 if (!(data->temp_mask & BIT(src)))
3479 index = __ffs(*available);
3480 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3483 *available &= ~BIT(index);
3490 int nct6775_probe(struct device *dev, struct nct6775_data *data,
3491 const struct regmap_config *regmapcfg)
3494 int mask, available;
3496 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3497 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3498 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3499 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
3500 struct device *hwmon_dev;
3501 struct sensor_template_group tsi_temp_tg;
3503 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
3504 if (IS_ERR(data->regmap))
3505 return PTR_ERR(data->regmap);
3507 mutex_init(&data->update_lock);
3508 data->name = nct6775_device_names[data->kind];
3509 data->bank = 0xff; /* Force initial bank selection */
3510 data->scale_in = scale_in;
3512 switch (data->kind) {
3516 data->auto_pwm_num = 4;
3517 data->temp_fixed_num = 3;
3518 data->num_temp_alarms = 6;
3519 data->num_temp_beeps = 6;
3521 data->fan_from_reg = fan_from_reg13;
3522 data->fan_from_reg_min = fan_from_reg13;
3524 data->temp_label = nct6776_temp_label;
3525 data->temp_mask = NCT6776_TEMP_MASK;
3526 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3528 data->REG_VBAT = NCT6106_REG_VBAT;
3529 data->REG_DIODE = NCT6106_REG_DIODE;
3530 data->DIODE_MASK = NCT6106_DIODE_MASK;
3531 data->REG_VIN = NCT6106_REG_IN;
3532 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3533 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3534 data->REG_TARGET = NCT6106_REG_TARGET;
3535 data->REG_FAN = NCT6106_REG_FAN;
3536 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3537 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3538 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3539 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3540 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3541 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3542 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3543 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3544 data->REG_PWM[0] = NCT6116_REG_PWM;
3545 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3546 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3547 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3548 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3549 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3550 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3551 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3552 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3553 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3554 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3555 data->REG_CRITICAL_TEMP_TOLERANCE
3556 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3557 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3558 data->CRITICAL_PWM_ENABLE_MASK
3559 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3560 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3561 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3562 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3563 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3564 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3565 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3566 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3567 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3568 data->REG_ALARM = NCT6106_REG_ALARM;
3569 data->ALARM_BITS = NCT6106_ALARM_BITS;
3570 data->REG_BEEP = NCT6106_REG_BEEP;
3571 data->BEEP_BITS = NCT6106_BEEP_BITS;
3572 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
3574 reg_temp = NCT6106_REG_TEMP;
3575 reg_temp_mon = NCT6106_REG_TEMP_MON;
3576 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3577 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3578 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
3579 reg_temp_over = NCT6106_REG_TEMP_OVER;
3580 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3581 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3582 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3583 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3584 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3585 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3591 data->auto_pwm_num = 4;
3592 data->temp_fixed_num = 3;
3593 data->num_temp_alarms = 3;
3594 data->num_temp_beeps = 3;
3596 data->fan_from_reg = fan_from_reg13;
3597 data->fan_from_reg_min = fan_from_reg13;
3599 data->temp_label = nct6776_temp_label;
3600 data->temp_mask = NCT6776_TEMP_MASK;
3601 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3603 data->REG_VBAT = NCT6106_REG_VBAT;
3604 data->REG_DIODE = NCT6106_REG_DIODE;
3605 data->DIODE_MASK = NCT6106_DIODE_MASK;
3606 data->REG_VIN = NCT6106_REG_IN;
3607 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3608 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3609 data->REG_TARGET = NCT6116_REG_TARGET;
3610 data->REG_FAN = NCT6116_REG_FAN;
3611 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
3612 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
3613 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
3614 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
3615 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
3616 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
3617 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
3618 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
3619 data->REG_PWM[0] = NCT6116_REG_PWM;
3620 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
3621 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
3622 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3623 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3624 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3625 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3626 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3627 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
3628 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
3629 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
3630 data->REG_CRITICAL_TEMP_TOLERANCE
3631 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
3632 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
3633 data->CRITICAL_PWM_ENABLE_MASK
3634 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3635 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
3636 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3637 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
3638 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3639 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3640 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3641 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3642 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3643 data->REG_ALARM = NCT6106_REG_ALARM;
3644 data->ALARM_BITS = NCT6116_ALARM_BITS;
3645 data->REG_BEEP = NCT6106_REG_BEEP;
3646 data->BEEP_BITS = NCT6116_BEEP_BITS;
3647 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
3649 reg_temp = NCT6106_REG_TEMP;
3650 reg_temp_mon = NCT6106_REG_TEMP_MON;
3651 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3652 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3653 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
3654 reg_temp_over = NCT6106_REG_TEMP_OVER;
3655 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3656 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3657 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3658 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3659 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3660 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3666 data->auto_pwm_num = 6;
3667 data->has_fan_div = true;
3668 data->temp_fixed_num = 3;
3669 data->num_temp_alarms = 3;
3670 data->num_temp_beeps = 3;
3672 data->ALARM_BITS = NCT6775_ALARM_BITS;
3673 data->BEEP_BITS = NCT6775_BEEP_BITS;
3675 data->fan_from_reg = fan_from_reg16;
3676 data->fan_from_reg_min = fan_from_reg8;
3677 data->target_temp_mask = 0x7f;
3678 data->tolerance_mask = 0x0f;
3679 data->speed_tolerance_limit = 15;
3681 data->temp_label = nct6775_temp_label;
3682 data->temp_mask = NCT6775_TEMP_MASK;
3683 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3685 data->REG_CONFIG = NCT6775_REG_CONFIG;
3686 data->REG_VBAT = NCT6775_REG_VBAT;
3687 data->REG_DIODE = NCT6775_REG_DIODE;
3688 data->DIODE_MASK = NCT6775_DIODE_MASK;
3689 data->REG_VIN = NCT6775_REG_IN;
3690 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3691 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3692 data->REG_TARGET = NCT6775_REG_TARGET;
3693 data->REG_FAN = NCT6775_REG_FAN;
3694 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3695 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3696 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3697 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3698 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3699 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3700 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3701 data->REG_PWM[0] = NCT6775_REG_PWM;
3702 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3703 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3704 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3705 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3706 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3707 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3708 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3709 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3710 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3711 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3712 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3713 data->REG_CRITICAL_TEMP_TOLERANCE
3714 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3715 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3716 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3717 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3718 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3719 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3720 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3721 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3722 data->REG_ALARM = NCT6775_REG_ALARM;
3723 data->REG_BEEP = NCT6775_REG_BEEP;
3724 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
3726 reg_temp = NCT6775_REG_TEMP;
3727 reg_temp_mon = NCT6775_REG_TEMP_MON;
3728 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3729 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3730 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
3731 reg_temp_over = NCT6775_REG_TEMP_OVER;
3732 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3733 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3734 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3735 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3741 data->auto_pwm_num = 4;
3742 data->has_fan_div = false;
3743 data->temp_fixed_num = 3;
3744 data->num_temp_alarms = 3;
3745 data->num_temp_beeps = 6;
3747 data->ALARM_BITS = NCT6776_ALARM_BITS;
3748 data->BEEP_BITS = NCT6776_BEEP_BITS;
3750 data->fan_from_reg = fan_from_reg13;
3751 data->fan_from_reg_min = fan_from_reg13;
3752 data->target_temp_mask = 0xff;
3753 data->tolerance_mask = 0x07;
3754 data->speed_tolerance_limit = 63;
3756 data->temp_label = nct6776_temp_label;
3757 data->temp_mask = NCT6776_TEMP_MASK;
3758 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3760 data->REG_CONFIG = NCT6775_REG_CONFIG;
3761 data->REG_VBAT = NCT6775_REG_VBAT;
3762 data->REG_DIODE = NCT6775_REG_DIODE;
3763 data->DIODE_MASK = NCT6775_DIODE_MASK;
3764 data->REG_VIN = NCT6775_REG_IN;
3765 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3766 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3767 data->REG_TARGET = NCT6775_REG_TARGET;
3768 data->REG_FAN = NCT6775_REG_FAN;
3769 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3770 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3771 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3772 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3773 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3774 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3775 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3776 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3777 data->REG_PWM[0] = NCT6775_REG_PWM;
3778 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3779 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3780 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3781 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3782 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3783 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3784 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3785 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3786 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3787 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3788 data->REG_CRITICAL_TEMP_TOLERANCE
3789 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3790 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3791 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3792 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3793 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3794 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3795 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3796 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3797 data->REG_ALARM = NCT6775_REG_ALARM;
3798 data->REG_BEEP = NCT6776_REG_BEEP;
3799 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3801 reg_temp = NCT6775_REG_TEMP;
3802 reg_temp_mon = NCT6775_REG_TEMP_MON;
3803 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3804 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3805 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3806 reg_temp_over = NCT6775_REG_TEMP_OVER;
3807 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3808 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3809 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3810 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3816 data->auto_pwm_num = 4;
3817 data->has_fan_div = false;
3818 data->temp_fixed_num = 6;
3819 data->num_temp_alarms = 2;
3820 data->num_temp_beeps = 2;
3822 data->ALARM_BITS = NCT6779_ALARM_BITS;
3823 data->BEEP_BITS = NCT6779_BEEP_BITS;
3825 data->fan_from_reg = fan_from_reg_rpm;
3826 data->fan_from_reg_min = fan_from_reg13;
3827 data->target_temp_mask = 0xff;
3828 data->tolerance_mask = 0x07;
3829 data->speed_tolerance_limit = 63;
3831 data->temp_label = nct6779_temp_label;
3832 data->temp_mask = NCT6779_TEMP_MASK;
3833 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3835 data->REG_CONFIG = NCT6775_REG_CONFIG;
3836 data->REG_VBAT = NCT6775_REG_VBAT;
3837 data->REG_DIODE = NCT6775_REG_DIODE;
3838 data->DIODE_MASK = NCT6775_DIODE_MASK;
3839 data->REG_VIN = NCT6779_REG_IN;
3840 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3841 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3842 data->REG_TARGET = NCT6775_REG_TARGET;
3843 data->REG_FAN = NCT6779_REG_FAN;
3844 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3845 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3846 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3847 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3848 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3849 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3850 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3851 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3852 data->REG_PWM[0] = NCT6775_REG_PWM;
3853 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3854 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3855 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3856 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3857 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3858 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3859 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3860 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3861 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3862 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3863 data->REG_CRITICAL_TEMP_TOLERANCE
3864 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3865 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3866 data->CRITICAL_PWM_ENABLE_MASK
3867 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3868 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3869 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3870 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3871 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3872 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3873 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3874 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3875 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3876 data->REG_ALARM = NCT6779_REG_ALARM;
3877 data->REG_BEEP = NCT6776_REG_BEEP;
3878 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3880 reg_temp = NCT6779_REG_TEMP;
3881 reg_temp_mon = NCT6779_REG_TEMP_MON;
3882 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3883 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3884 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3885 reg_temp_over = NCT6779_REG_TEMP_OVER;
3886 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3887 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3888 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3889 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3899 data->pwm_num = (data->kind == nct6796 ||
3900 data->kind == nct6797) ? 7 : 6;
3901 data->auto_pwm_num = 4;
3902 data->has_fan_div = false;
3903 data->temp_fixed_num = 6;
3904 data->num_temp_alarms = 2;
3905 data->num_temp_beeps = 2;
3907 data->ALARM_BITS = NCT6791_ALARM_BITS;
3908 data->BEEP_BITS = NCT6779_BEEP_BITS;
3910 data->fan_from_reg = fan_from_reg_rpm;
3911 data->fan_from_reg_min = fan_from_reg13;
3912 data->target_temp_mask = 0xff;
3913 data->tolerance_mask = 0x07;
3914 data->speed_tolerance_limit = 63;
3916 switch (data->kind) {
3919 data->temp_label = nct6779_temp_label;
3920 data->temp_mask = NCT6791_TEMP_MASK;
3921 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3924 data->temp_label = nct6792_temp_label;
3925 data->temp_mask = NCT6792_TEMP_MASK;
3926 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3929 data->temp_label = nct6793_temp_label;
3930 data->temp_mask = NCT6793_TEMP_MASK;
3931 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3935 data->temp_label = nct6795_temp_label;
3936 data->temp_mask = NCT6795_TEMP_MASK;
3937 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3940 data->temp_label = nct6796_temp_label;
3941 data->temp_mask = NCT6796_TEMP_MASK;
3942 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3946 data->REG_CONFIG = NCT6775_REG_CONFIG;
3947 data->REG_VBAT = NCT6775_REG_VBAT;
3948 data->REG_DIODE = NCT6775_REG_DIODE;
3949 data->DIODE_MASK = NCT6775_DIODE_MASK;
3950 data->REG_VIN = NCT6779_REG_IN;
3951 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3952 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3953 data->REG_TARGET = NCT6775_REG_TARGET;
3954 data->REG_FAN = NCT6779_REG_FAN;
3955 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3956 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3957 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3958 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3959 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3960 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3961 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3962 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3963 data->REG_PWM[0] = NCT6775_REG_PWM;
3964 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3965 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3966 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3967 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3968 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3969 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3970 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3971 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3972 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3973 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3974 data->REG_CRITICAL_TEMP_TOLERANCE
3975 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3976 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3977 data->CRITICAL_PWM_ENABLE_MASK
3978 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3979 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3980 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3981 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3982 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3983 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3984 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3985 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3986 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3987 data->REG_ALARM = NCT6791_REG_ALARM;
3988 if (data->kind == nct6791)
3989 data->REG_BEEP = NCT6776_REG_BEEP;
3991 data->REG_BEEP = NCT6792_REG_BEEP;
3992 switch (data->kind) {
3996 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3997 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4002 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4003 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4006 num_reg_tsi_temp = 0;
4010 reg_temp = NCT6779_REG_TEMP;
4011 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4012 if (data->kind == nct6791) {
4013 reg_temp_mon = NCT6779_REG_TEMP_MON;
4014 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4016 reg_temp_mon = NCT6792_REG_TEMP_MON;
4017 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4019 reg_temp_over = NCT6779_REG_TEMP_OVER;
4020 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4021 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4022 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4023 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4028 data->in_num = data->kind == nct6799 ? 18 : 15;
4029 data->scale_in = scale_in_6798;
4031 data->auto_pwm_num = 4;
4032 data->has_fan_div = false;
4033 data->temp_fixed_num = 6;
4034 data->num_temp_alarms = 7;
4035 data->num_temp_beeps = 8;
4037 data->ALARM_BITS = NCT6799_ALARM_BITS;
4038 data->BEEP_BITS = NCT6799_BEEP_BITS;
4040 data->fan_from_reg = fan_from_reg_rpm;
4041 data->fan_from_reg_min = fan_from_reg13;
4042 data->target_temp_mask = 0xff;
4043 data->tolerance_mask = 0x07;
4044 data->speed_tolerance_limit = 63;
4046 switch (data->kind) {
4049 data->temp_label = nct6798_temp_label;
4050 data->temp_mask = NCT6798_TEMP_MASK;
4051 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
4054 data->temp_label = nct6799_temp_label;
4055 data->temp_mask = NCT6799_TEMP_MASK;
4056 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK;
4060 data->REG_CONFIG = NCT6775_REG_CONFIG;
4061 data->REG_VBAT = NCT6775_REG_VBAT;
4062 data->REG_DIODE = NCT6775_REG_DIODE;
4063 data->DIODE_MASK = NCT6775_DIODE_MASK;
4064 data->REG_VIN = NCT6779_REG_IN;
4065 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4066 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4067 data->REG_TARGET = NCT6775_REG_TARGET;
4068 data->REG_FAN = NCT6779_REG_FAN;
4069 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4070 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4071 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4072 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4073 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4074 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4075 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4076 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4077 data->REG_PWM[0] = NCT6775_REG_PWM;
4078 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4079 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4080 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4081 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4082 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4083 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4084 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4085 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4086 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4087 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4088 data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4089 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4090 data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4091 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4092 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4093 data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE;
4094 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4095 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4096 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4097 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4098 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4099 data->REG_ALARM = NCT6799_REG_ALARM;
4100 data->REG_BEEP = NCT6792_REG_BEEP;
4101 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4102 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4104 reg_temp = NCT6798_REG_TEMP;
4105 num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP);
4106 reg_temp_mon = NCT6798_REG_TEMP_MON;
4107 num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON);
4108 reg_temp_over = NCT6798_REG_TEMP_OVER;
4109 reg_temp_hyst = NCT6798_REG_TEMP_HYST;
4110 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4111 reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE;
4112 reg_temp_crit = NCT6798_REG_TEMP_CRIT;
4118 data->have_in = BIT(data->in_num) - 1;
4119 data->have_temp = 0;
4122 * On some boards, not all available temperature sources are monitored,
4123 * even though some of the monitoring registers are unused.
4124 * Get list of unused monitoring registers, then detect if any fan
4125 * controls are configured to use unmonitored temperature sources.
4126 * If so, assign the unmonitored temperature sources to available
4127 * monitoring registers.
4131 for (i = 0; i < num_reg_temp; i++) {
4132 if (reg_temp[i] == 0)
4135 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4139 if (!src || (mask & BIT(src)))
4140 available |= BIT(i);
4146 * Now find unmonitored temperature registers and enable monitoring
4147 * if additional monitoring registers are available.
4149 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4152 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4157 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
4158 for (i = 0; i < num_reg_temp; i++) {
4159 if (reg_temp[i] == 0)
4162 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4166 if (!src || (mask & BIT(src)))
4169 if (!(data->temp_mask & BIT(src))) {
4171 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4172 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4178 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4179 if (src <= data->temp_fixed_num) {
4180 data->have_temp |= BIT(src - 1);
4181 data->have_temp_fixed |= BIT(src - 1);
4182 data->reg_temp[0][src - 1] = reg_temp[i];
4183 data->reg_temp[1][src - 1] = reg_temp_over[i];
4184 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4185 if (reg_temp_crit_h && reg_temp_crit_h[i])
4186 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4187 else if (reg_temp_crit[src - 1])
4188 data->reg_temp[3][src - 1]
4189 = reg_temp_crit[src - 1];
4190 if (reg_temp_crit_l && reg_temp_crit_l[i])
4191 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4192 data->reg_temp_config[src - 1] = reg_temp_config[i];
4193 data->temp_src[src - 1] = src;
4200 /* Use dynamic index for other sources */
4201 data->have_temp |= BIT(s);
4202 data->reg_temp[0][s] = reg_temp[i];
4203 data->reg_temp[1][s] = reg_temp_over[i];
4204 data->reg_temp[2][s] = reg_temp_hyst[i];
4205 data->reg_temp_config[s] = reg_temp_config[i];
4206 if (reg_temp_crit_h && reg_temp_crit_h[i])
4207 data->reg_temp[3][s] = reg_temp_crit_h[i];
4208 else if (reg_temp_crit[src - 1])
4209 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4210 if (reg_temp_crit_l && reg_temp_crit_l[i])
4211 data->reg_temp[4][s] = reg_temp_crit_l[i];
4213 data->temp_src[s] = src;
4218 * Repeat with temperatures used for fan control.
4219 * This set of registers does not support limits.
4221 for (i = 0; i < num_reg_temp_mon; i++) {
4222 if (reg_temp_mon[i] == 0)
4225 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
4232 if (!(data->temp_mask & BIT(src))) {
4234 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4235 src, i, data->REG_TEMP_SEL[i],
4241 * For virtual temperature sources, the 'virtual' temperature
4242 * for each fan reflects a different temperature, and there
4243 * are no duplicates.
4245 if (!(data->virt_temp_mask & BIT(src))) {
4246 if (mask & BIT(src))
4251 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4252 if (src <= data->temp_fixed_num) {
4253 if (data->have_temp & BIT(src - 1))
4255 data->have_temp |= BIT(src - 1);
4256 data->have_temp_fixed |= BIT(src - 1);
4257 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4258 data->temp_src[src - 1] = src;
4265 /* Use dynamic index for other sources */
4266 data->have_temp |= BIT(s);
4267 data->reg_temp[0][s] = reg_temp_mon[i];
4268 data->temp_src[s] = src;
4272 #ifdef USE_ALTERNATE
4274 * Go through the list of alternate temp registers and enable
4276 * The temperature is already monitored if the respective bit in <mask>
4279 for (i = 0; i < 31; i++) {
4280 if (!(data->temp_mask & BIT(i + 1)))
4282 if (!reg_temp_alternate[i])
4284 if (mask & BIT(i + 1))
4286 if (i < data->temp_fixed_num) {
4287 if (data->have_temp & BIT(i))
4289 data->have_temp |= BIT(i);
4290 data->have_temp_fixed |= BIT(i);
4291 data->reg_temp[0][i] = reg_temp_alternate[i];
4292 if (i < num_reg_temp) {
4293 data->reg_temp[1][i] = reg_temp_over[i];
4294 data->reg_temp[2][i] = reg_temp_hyst[i];
4296 data->temp_src[i] = i + 1;
4300 if (s >= NUM_TEMP) /* Abort if no more space */
4303 data->have_temp |= BIT(s);
4304 data->reg_temp[0][s] = reg_temp_alternate[i];
4305 data->temp_src[s] = i + 1;
4308 #endif /* USE_ALTERNATE */
4310 /* Check which TSIx_TEMP registers are active */
4311 for (i = 0; i < num_reg_tsi_temp; i++) {
4314 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
4318 data->have_tsi_temp |= BIT(i);
4321 /* Initialize the chip */
4322 err = nct6775_init_device(data);
4326 if (data->driver_init) {
4327 err = data->driver_init(data);
4332 /* Read fan clock dividers immediately */
4333 err = nct6775_init_fan_common(dev, data);
4337 /* Register sysfs hooks */
4338 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
4343 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
4344 fls(data->have_in));
4348 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
4349 fls(data->has_fan));
4353 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
4354 fls(data->have_temp));
4358 if (data->have_tsi_temp) {
4359 tsi_temp_tg.templates = nct6775_tsi_temp_template;
4360 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
4361 tsi_temp_tg.base = fls(data->have_temp) + 1;
4362 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
4363 fls(data->have_tsi_temp));
4368 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4369 data, data->groups);
4370 return PTR_ERR_OR_ZERO(hwmon_dev);
4372 EXPORT_SYMBOL_GPL(nct6775_probe);
4374 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4375 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
4376 MODULE_LICENSE("GPL");