hwmon: (it87) Simplify error return in it87_device_add
[linux-block.git] / drivers / hwmon / it87.c
1 /*
2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
3  *           monitoring.
4  *
5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
8  *  Fan Controller)
9  *
10  *  This driver supports only the Environment Controller in the IT8705F and
11  *  similar parts.  The other devices are supported by different drivers.
12  *
13  *  Supports: IT8603E  Super I/O chip w/LPC interface
14  *            IT8620E  Super I/O chip w/LPC interface
15  *            IT8623E  Super I/O chip w/LPC interface
16  *            IT8705F  Super I/O chip w/LPC interface
17  *            IT8712F  Super I/O chip w/LPC interface
18  *            IT8716F  Super I/O chip w/LPC interface
19  *            IT8718F  Super I/O chip w/LPC interface
20  *            IT8720F  Super I/O chip w/LPC interface
21  *            IT8721F  Super I/O chip w/LPC interface
22  *            IT8726F  Super I/O chip w/LPC interface
23  *            IT8728F  Super I/O chip w/LPC interface
24  *            IT8732F  Super I/O chip w/LPC interface
25  *            IT8758E  Super I/O chip w/LPC interface
26  *            IT8771E  Super I/O chip w/LPC interface
27  *            IT8772E  Super I/O chip w/LPC interface
28  *            IT8781F  Super I/O chip w/LPC interface
29  *            IT8782F  Super I/O chip w/LPC interface
30  *            IT8783E/F Super I/O chip w/LPC interface
31  *            IT8786E  Super I/O chip w/LPC interface
32  *            IT8790E  Super I/O chip w/LPC interface
33  *            Sis950   A clone of the IT8705F
34  *
35  *  Copyright (C) 2001 Chris Gauthron
36  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
37  *
38  *  This program is free software; you can redistribute it and/or modify
39  *  it under the terms of the GNU General Public License as published by
40  *  the Free Software Foundation; either version 2 of the License, or
41  *  (at your option) any later version.
42  *
43  *  This program is distributed in the hope that it will be useful,
44  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
45  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
46  *  GNU General Public License for more details.
47  *
48  *  You should have received a copy of the GNU General Public License
49  *  along with this program; if not, write to the Free Software
50  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
51  */
52
53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
54
55 #include <linux/module.h>
56 #include <linux/init.h>
57 #include <linux/slab.h>
58 #include <linux/jiffies.h>
59 #include <linux/platform_device.h>
60 #include <linux/hwmon.h>
61 #include <linux/hwmon-sysfs.h>
62 #include <linux/hwmon-vid.h>
63 #include <linux/err.h>
64 #include <linux/mutex.h>
65 #include <linux/sysfs.h>
66 #include <linux/string.h>
67 #include <linux/dmi.h>
68 #include <linux/acpi.h>
69 #include <linux/io.h>
70
71 #define DRVNAME "it87"
72
73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
74              it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
75              it8620 };
76
77 static unsigned short force_id;
78 module_param(force_id, ushort, 0);
79 MODULE_PARM_DESC(force_id, "Override the detected device ID");
80
81 static struct platform_device *pdev;
82
83 #define REG     0x2e    /* The register to read/write */
84 #define DEV     0x07    /* Register: Logical device select */
85 #define VAL     0x2f    /* The value to read/write */
86 #define PME     0x04    /* The device with the fan registers in it */
87
88 /* The device with the IT8718F/IT8720F VID value in it */
89 #define GPIO    0x07
90
91 #define DEVID   0x20    /* Register: Device ID */
92 #define DEVREV  0x22    /* Register: Device Revision */
93
94 static inline int superio_inb(int reg)
95 {
96         outb(reg, REG);
97         return inb(VAL);
98 }
99
100 static inline void superio_outb(int reg, int val)
101 {
102         outb(reg, REG);
103         outb(val, VAL);
104 }
105
106 static int superio_inw(int reg)
107 {
108         int val;
109         outb(reg++, REG);
110         val = inb(VAL) << 8;
111         outb(reg, REG);
112         val |= inb(VAL);
113         return val;
114 }
115
116 static inline void superio_select(int ldn)
117 {
118         outb(DEV, REG);
119         outb(ldn, VAL);
120 }
121
122 static inline int superio_enter(void)
123 {
124         /*
125          * Try to reserve REG and REG + 1 for exclusive access.
126          */
127         if (!request_muxed_region(REG, 2, DRVNAME))
128                 return -EBUSY;
129
130         outb(0x87, REG);
131         outb(0x01, REG);
132         outb(0x55, REG);
133         outb(0x55, REG);
134         return 0;
135 }
136
137 static inline void superio_exit(void)
138 {
139         outb(0x02, REG);
140         outb(0x02, VAL);
141         release_region(REG, 2);
142 }
143
144 /* Logical device 4 registers */
145 #define IT8712F_DEVID 0x8712
146 #define IT8705F_DEVID 0x8705
147 #define IT8716F_DEVID 0x8716
148 #define IT8718F_DEVID 0x8718
149 #define IT8720F_DEVID 0x8720
150 #define IT8721F_DEVID 0x8721
151 #define IT8726F_DEVID 0x8726
152 #define IT8728F_DEVID 0x8728
153 #define IT8732F_DEVID 0x8732
154 #define IT8771E_DEVID 0x8771
155 #define IT8772E_DEVID 0x8772
156 #define IT8781F_DEVID 0x8781
157 #define IT8782F_DEVID 0x8782
158 #define IT8783E_DEVID 0x8783
159 #define IT8786E_DEVID 0x8786
160 #define IT8790E_DEVID 0x8790
161 #define IT8603E_DEVID 0x8603
162 #define IT8620E_DEVID 0x8620
163 #define IT8623E_DEVID 0x8623
164 #define IT87_ACT_REG  0x30
165 #define IT87_BASE_REG 0x60
166
167 /* Logical device 7 registers (IT8712F and later) */
168 #define IT87_SIO_GPIO1_REG      0x25
169 #define IT87_SIO_GPIO2_REG      0x26
170 #define IT87_SIO_GPIO3_REG      0x27
171 #define IT87_SIO_GPIO4_REG      0x28
172 #define IT87_SIO_GPIO5_REG      0x29
173 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
174 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
175 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
176 #define IT87_SIO_VID_REG        0xfc    /* VID value */
177 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
178
179 /* Update battery voltage after every reading if true */
180 static bool update_vbat;
181
182 /* Not all BIOSes properly configure the PWM registers */
183 static bool fix_pwm_polarity;
184
185 /* Many IT87 constants specified below */
186
187 /* Length of ISA address segment */
188 #define IT87_EXTENT 8
189
190 /* Length of ISA address segment for Environmental Controller */
191 #define IT87_EC_EXTENT 2
192
193 /* Offset of EC registers from ISA base address */
194 #define IT87_EC_OFFSET 5
195
196 /* Where are the ISA address/data registers relative to the EC base address */
197 #define IT87_ADDR_REG_OFFSET 0
198 #define IT87_DATA_REG_OFFSET 1
199
200 /*----- The IT87 registers -----*/
201
202 #define IT87_REG_CONFIG        0x00
203
204 #define IT87_REG_ALARM1        0x01
205 #define IT87_REG_ALARM2        0x02
206 #define IT87_REG_ALARM3        0x03
207
208 /*
209  * The IT8718F and IT8720F have the VID value in a different register, in
210  * Super-I/O configuration space.
211  */
212 #define IT87_REG_VID           0x0a
213 /*
214  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
215  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
216  * mode.
217  */
218 #define IT87_REG_FAN_DIV       0x0b
219 #define IT87_REG_FAN_16BIT     0x0c
220
221 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
222
223 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
224 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
225 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
226 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
227 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
228
229 #define IT87_REG_FAN_MAIN_CTRL 0x13
230 #define IT87_REG_FAN_CTL       0x14
231 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
232 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
233
234 #define IT87_REG_VIN(nr)       (0x20 + (nr))
235 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
236
237 #define IT87_REG_AVCC3          0x2f
238
239 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
240 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
241 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
242 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
243
244 #define IT87_REG_VIN_ENABLE    0x50
245 #define IT87_REG_TEMP_ENABLE   0x51
246 #define IT87_REG_TEMP_EXTRA    0x55
247 #define IT87_REG_BEEP_ENABLE   0x5c
248
249 #define IT87_REG_CHIPID        0x58
250
251 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
252 #define IT87_REG_AUTO_PWM(nr, i)  (0x65 + (nr) * 8 + (i))
253
254 struct it87_devices {
255         const char *name;
256         const char * const suffix;
257         u16 features;
258         u8 peci_mask;
259         u8 old_peci_mask;
260 };
261
262 #define FEAT_12MV_ADC           (1 << 0)
263 #define FEAT_NEWER_AUTOPWM      (1 << 1)
264 #define FEAT_OLD_AUTOPWM        (1 << 2)
265 #define FEAT_16BIT_FANS         (1 << 3)
266 #define FEAT_TEMP_OFFSET        (1 << 4)
267 #define FEAT_TEMP_PECI          (1 << 5)
268 #define FEAT_TEMP_OLD_PECI      (1 << 6)
269 #define FEAT_FAN16_CONFIG       (1 << 7)        /* Need to enable 16-bit fans */
270 #define FEAT_FIVE_FANS          (1 << 8)        /* Supports five fans */
271 #define FEAT_VID                (1 << 9)        /* Set if chip supports VID */
272 #define FEAT_IN7_INTERNAL       (1 << 10)       /* Set if in7 is internal */
273 #define FEAT_SIX_FANS           (1 << 11)       /* Supports six fans */
274 #define FEAT_10_9MV_ADC         (1 << 12)
275 #define FEAT_AVCC3              (1 << 13)       /* Chip supports in9/AVCC3 */
276 #define FEAT_SIX_PWM            (1 << 14)       /* Chip supports 6 pwm chn */
277 #define FEAT_PWM_FREQ2          (1 << 15)       /* Separate pwm freq 2 */
278
279 static const struct it87_devices it87_devices[] = {
280         [it87] = {
281                 .name = "it87",
282                 .suffix = "F",
283                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
284         },
285         [it8712] = {
286                 .name = "it8712",
287                 .suffix = "F",
288                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
289                                                 /* may need to overwrite */
290         },
291         [it8716] = {
292                 .name = "it8716",
293                 .suffix = "F",
294                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
295                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
296         },
297         [it8718] = {
298                 .name = "it8718",
299                 .suffix = "F",
300                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
301                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
302                   | FEAT_PWM_FREQ2,
303                 .old_peci_mask = 0x4,
304         },
305         [it8720] = {
306                 .name = "it8720",
307                 .suffix = "F",
308                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
309                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
310                   | FEAT_PWM_FREQ2,
311                 .old_peci_mask = 0x4,
312         },
313         [it8721] = {
314                 .name = "it8721",
315                 .suffix = "F",
316                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
317                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
318                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
319                   | FEAT_PWM_FREQ2,
320                 .peci_mask = 0x05,
321                 .old_peci_mask = 0x02,  /* Actually reports PCH */
322         },
323         [it8728] = {
324                 .name = "it8728",
325                 .suffix = "F",
326                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
327                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
328                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
329                 .peci_mask = 0x07,
330         },
331         [it8732] = {
332                 .name = "it8732",
333                 .suffix = "F",
334                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
335                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
336                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
337                 .peci_mask = 0x07,
338                 .old_peci_mask = 0x02,  /* Actually reports PCH */
339         },
340         [it8771] = {
341                 .name = "it8771",
342                 .suffix = "E",
343                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
344                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
345                   | FEAT_PWM_FREQ2,
346                                 /* PECI: guesswork */
347                                 /* 12mV ADC (OHM) */
348                                 /* 16 bit fans (OHM) */
349                                 /* three fans, always 16 bit (guesswork) */
350                 .peci_mask = 0x07,
351         },
352         [it8772] = {
353                 .name = "it8772",
354                 .suffix = "E",
355                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
356                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
357                   | FEAT_PWM_FREQ2,
358                                 /* PECI (coreboot) */
359                                 /* 12mV ADC (HWSensors4, OHM) */
360                                 /* 16 bit fans (HWSensors4, OHM) */
361                                 /* three fans, always 16 bit (datasheet) */
362                 .peci_mask = 0x07,
363         },
364         [it8781] = {
365                 .name = "it8781",
366                 .suffix = "F",
367                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
368                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
369                 .old_peci_mask = 0x4,
370         },
371         [it8782] = {
372                 .name = "it8782",
373                 .suffix = "F",
374                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
375                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
376                 .old_peci_mask = 0x4,
377         },
378         [it8783] = {
379                 .name = "it8783",
380                 .suffix = "E/F",
381                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
382                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
383                 .old_peci_mask = 0x4,
384         },
385         [it8786] = {
386                 .name = "it8786",
387                 .suffix = "E",
388                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
389                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
390                   | FEAT_PWM_FREQ2,
391                 .peci_mask = 0x07,
392         },
393         [it8790] = {
394                 .name = "it8790",
395                 .suffix = "E",
396                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
397                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
398                   | FEAT_PWM_FREQ2,
399                 .peci_mask = 0x07,
400         },
401         [it8603] = {
402                 .name = "it8603",
403                 .suffix = "E",
404                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
405                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
406                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
407                 .peci_mask = 0x07,
408         },
409         [it8620] = {
410                 .name = "it8620",
411                 .suffix = "E",
412                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
413                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
414                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2,
415                 .peci_mask = 0x07,
416         },
417 };
418
419 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
420 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
421 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
422 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
423 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
424 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
425 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
426                                  ((data)->peci_mask & (1 << nr)))
427 #define has_temp_old_peci(data, nr) \
428                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
429                                  ((data)->old_peci_mask & (1 << nr)))
430 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
431 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
432                                                      FEAT_SIX_FANS))
433 #define has_vid(data)           ((data)->features & FEAT_VID)
434 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
435 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
436 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
437 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
438 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
439
440 struct it87_sio_data {
441         enum chips type;
442         /* Values read from Super-I/O config space */
443         u8 revision;
444         u8 vid_value;
445         u8 beep_pin;
446         u8 internal;    /* Internal sensors can be labeled */
447         /* Features skipped based on config or DMI */
448         u16 skip_in;
449         u8 skip_vid;
450         u8 skip_fan;
451         u8 skip_pwm;
452         u8 skip_temp;
453 };
454
455 /*
456  * For each registered chip, we need to keep some data in memory.
457  * The structure is dynamically allocated.
458  */
459 struct it87_data {
460         struct device *hwmon_dev;
461         enum chips type;
462         u16 features;
463         u8 peci_mask;
464         u8 old_peci_mask;
465
466         unsigned short addr;
467         const char *name;
468         struct mutex update_lock;
469         char valid;             /* !=0 if following fields are valid */
470         unsigned long last_updated;     /* In jiffies */
471
472         u16 in_scaled;          /* Internal voltage sensors are scaled */
473         u8 in[10][3];           /* [nr][0]=in, [1]=min, [2]=max */
474         u8 has_fan;             /* Bitfield, fans enabled */
475         u16 fan[6][2];          /* Register values, [nr][0]=fan, [1]=min */
476         u8 has_temp;            /* Bitfield, temp sensors enabled */
477         s8 temp[3][4];          /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
478         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
479         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
480         u8 fan_div[3];          /* Register encoding, shifted right */
481         u8 vid;                 /* Register encoding, combined */
482         u8 vrm;
483         u32 alarms;             /* Register encoding, combined */
484         u8 beeps;               /* Register encoding */
485         u8 fan_main_ctrl;       /* Register value */
486         u8 fan_ctl;             /* Register value */
487
488         /*
489          * The following 3 arrays correspond to the same registers up to
490          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
491          * 7, and we want to preserve settings on mode changes, so we have
492          * to track all values separately.
493          * Starting with the IT8721F, the manual PWM duty cycles are stored
494          * in separate registers (8-bit values), so the separate tracking
495          * is no longer needed, but it is still done to keep the driver
496          * simple.
497          */
498         u8 pwm_ctrl[6];         /* Register value */
499         u8 pwm_duty[6];         /* Manual PWM value set by user */
500         u8 pwm_temp_map[6];     /* PWM to temp. chan. mapping (bits 1-0) */
501
502         /* Automatic fan speed control registers */
503         u8 auto_pwm[3][4];      /* [nr][3] is hard-coded */
504         s8 auto_temp[3][5];     /* [nr][0] is point1_temp_hyst */
505 };
506
507 static int adc_lsb(const struct it87_data *data, int nr)
508 {
509         int lsb;
510
511         if (has_12mv_adc(data))
512                 lsb = 120;
513         else if (has_10_9mv_adc(data))
514                 lsb = 109;
515         else
516                 lsb = 160;
517         if (data->in_scaled & (1 << nr))
518                 lsb <<= 1;
519         return lsb;
520 }
521
522 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
523 {
524         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
525         return clamp_val(val, 0, 255);
526 }
527
528 static int in_from_reg(const struct it87_data *data, int nr, int val)
529 {
530         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
531 }
532
533 static inline u8 FAN_TO_REG(long rpm, int div)
534 {
535         if (rpm == 0)
536                 return 255;
537         rpm = clamp_val(rpm, 1, 1000000);
538         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
539 }
540
541 static inline u16 FAN16_TO_REG(long rpm)
542 {
543         if (rpm == 0)
544                 return 0xffff;
545         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
546 }
547
548 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
549                                 1350000 / ((val) * (div)))
550 /* The divider is fixed to 2 in 16-bit mode */
551 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
552                              1350000 / ((val) * 2))
553
554 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
555                                     ((val) + 500) / 1000), -128, 127))
556 #define TEMP_FROM_REG(val) ((val) * 1000)
557
558 static u8 pwm_to_reg(const struct it87_data *data, long val)
559 {
560         if (has_newer_autopwm(data))
561                 return val;
562         else
563                 return val >> 1;
564 }
565
566 static int pwm_from_reg(const struct it87_data *data, u8 reg)
567 {
568         if (has_newer_autopwm(data))
569                 return reg;
570         else
571                 return (reg & 0x7f) << 1;
572 }
573
574
575 static int DIV_TO_REG(int val)
576 {
577         int answer = 0;
578         while (answer < 7 && (val >>= 1))
579                 answer++;
580         return answer;
581 }
582 #define DIV_FROM_REG(val) (1 << (val))
583
584 /*
585  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
586  * depending on the chip type, to calculate the actual PWM frequency.
587  *
588  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
589  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
590  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
591  * sometimes just one. It is unknown if this is a datasheet error or real,
592  * so this is ignored for now.
593  */
594 static const unsigned int pwm_freq[8] = {
595         48000000,
596         24000000,
597         12000000,
598         8000000,
599         6000000,
600         3000000,
601         1500000,
602         750000,
603 };
604
605 static int it87_probe(struct platform_device *pdev);
606 static int it87_remove(struct platform_device *pdev);
607
608 static int it87_read_value(struct it87_data *data, u8 reg);
609 static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
610 static struct it87_data *it87_update_device(struct device *dev);
611 static int it87_check_pwm(struct device *dev);
612 static void it87_init_device(struct platform_device *pdev);
613
614
615 static struct platform_driver it87_driver = {
616         .driver = {
617                 .name   = DRVNAME,
618         },
619         .probe  = it87_probe,
620         .remove = it87_remove,
621 };
622
623 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
624                        char *buf)
625 {
626         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
627         int nr = sattr->nr;
628         int index = sattr->index;
629
630         struct it87_data *data = it87_update_device(dev);
631         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
632 }
633
634 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
635                       const char *buf, size_t count)
636 {
637         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
638         int nr = sattr->nr;
639         int index = sattr->index;
640
641         struct it87_data *data = dev_get_drvdata(dev);
642         unsigned long val;
643
644         if (kstrtoul(buf, 10, &val) < 0)
645                 return -EINVAL;
646
647         mutex_lock(&data->update_lock);
648         data->in[nr][index] = in_to_reg(data, nr, val);
649         it87_write_value(data,
650                          index == 1 ? IT87_REG_VIN_MIN(nr)
651                                     : IT87_REG_VIN_MAX(nr),
652                          data->in[nr][index]);
653         mutex_unlock(&data->update_lock);
654         return count;
655 }
656
657 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
658 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
659                             0, 1);
660 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
661                             0, 2);
662
663 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
664 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
665                             1, 1);
666 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
667                             1, 2);
668
669 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
670 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
671                             2, 1);
672 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
673                             2, 2);
674
675 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
676 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
677                             3, 1);
678 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
679                             3, 2);
680
681 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
682 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
683                             4, 1);
684 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
685                             4, 2);
686
687 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
688 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
689                             5, 1);
690 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
691                             5, 2);
692
693 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
694 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
695                             6, 1);
696 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
697                             6, 2);
698
699 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
700 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
701                             7, 1);
702 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
703                             7, 2);
704
705 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
706 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
707
708 /* 3 temperatures */
709 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
710                          char *buf)
711 {
712         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
713         int nr = sattr->nr;
714         int index = sattr->index;
715         struct it87_data *data = it87_update_device(dev);
716
717         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
718 }
719
720 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
721                         const char *buf, size_t count)
722 {
723         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
724         int nr = sattr->nr;
725         int index = sattr->index;
726         struct it87_data *data = dev_get_drvdata(dev);
727         long val;
728         u8 reg, regval;
729
730         if (kstrtol(buf, 10, &val) < 0)
731                 return -EINVAL;
732
733         mutex_lock(&data->update_lock);
734
735         switch (index) {
736         default:
737         case 1:
738                 reg = IT87_REG_TEMP_LOW(nr);
739                 break;
740         case 2:
741                 reg = IT87_REG_TEMP_HIGH(nr);
742                 break;
743         case 3:
744                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
745                 if (!(regval & 0x80)) {
746                         regval |= 0x80;
747                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
748                 }
749                 data->valid = 0;
750                 reg = IT87_REG_TEMP_OFFSET[nr];
751                 break;
752         }
753
754         data->temp[nr][index] = TEMP_TO_REG(val);
755         it87_write_value(data, reg, data->temp[nr][index]);
756         mutex_unlock(&data->update_lock);
757         return count;
758 }
759
760 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
761 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
762                             0, 1);
763 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
764                             0, 2);
765 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
766                             set_temp, 0, 3);
767 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
768 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
769                             1, 1);
770 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
771                             1, 2);
772 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
773                             set_temp, 1, 3);
774 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
775 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
776                             2, 1);
777 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
778                             2, 2);
779 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
780                             set_temp, 2, 3);
781
782 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
783                               char *buf)
784 {
785         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
786         int nr = sensor_attr->index;
787         struct it87_data *data = it87_update_device(dev);
788         u8 reg = data->sensor;      /* In case value is updated while used */
789         u8 extra = data->extra;
790
791         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
792             || (has_temp_old_peci(data, nr) && (extra & 0x80)))
793                 return sprintf(buf, "6\n");  /* Intel PECI */
794         if (reg & (1 << nr))
795                 return sprintf(buf, "3\n");  /* thermal diode */
796         if (reg & (8 << nr))
797                 return sprintf(buf, "4\n");  /* thermistor */
798         return sprintf(buf, "0\n");      /* disabled */
799 }
800
801 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
802                              const char *buf, size_t count)
803 {
804         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
805         int nr = sensor_attr->index;
806
807         struct it87_data *data = dev_get_drvdata(dev);
808         long val;
809         u8 reg, extra;
810
811         if (kstrtol(buf, 10, &val) < 0)
812                 return -EINVAL;
813
814         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
815         reg &= ~(1 << nr);
816         reg &= ~(8 << nr);
817         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
818                 reg &= 0x3f;
819         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
820         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
821                 extra &= 0x7f;
822         if (val == 2) { /* backwards compatibility */
823                 dev_warn(dev,
824                          "Sensor type 2 is deprecated, please use 4 instead\n");
825                 val = 4;
826         }
827         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
828         if (val == 3)
829                 reg |= 1 << nr;
830         else if (val == 4)
831                 reg |= 8 << nr;
832         else if (has_temp_peci(data, nr) && val == 6)
833                 reg |= (nr + 1) << 6;
834         else if (has_temp_old_peci(data, nr) && val == 6)
835                 extra |= 0x80;
836         else if (val != 0)
837                 return -EINVAL;
838
839         mutex_lock(&data->update_lock);
840         data->sensor = reg;
841         data->extra = extra;
842         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
843         if (has_temp_old_peci(data, nr))
844                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
845         data->valid = 0;        /* Force cache refresh */
846         mutex_unlock(&data->update_lock);
847         return count;
848 }
849
850 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
851                           set_temp_type, 0);
852 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
853                           set_temp_type, 1);
854 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
855                           set_temp_type, 2);
856
857 /* 3 Fans */
858
859 static int pwm_mode(const struct it87_data *data, int nr)
860 {
861         int ctrl = data->fan_main_ctrl & (1 << nr);
862
863         if (ctrl == 0 && data->type != it8603)          /* Full speed */
864                 return 0;
865         if (data->pwm_ctrl[nr] & 0x80)                  /* Automatic mode */
866                 return 2;
867         else                                            /* Manual mode */
868                 return 1;
869 }
870
871 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
872                         char *buf)
873 {
874         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
875         int nr = sattr->nr;
876         int index = sattr->index;
877         int speed;
878         struct it87_data *data = it87_update_device(dev);
879
880         speed = has_16bit_fans(data) ?
881                 FAN16_FROM_REG(data->fan[nr][index]) :
882                 FAN_FROM_REG(data->fan[nr][index],
883                              DIV_FROM_REG(data->fan_div[nr]));
884         return sprintf(buf, "%d\n", speed);
885 }
886
887 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
888                 char *buf)
889 {
890         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
891         int nr = sensor_attr->index;
892
893         struct it87_data *data = it87_update_device(dev);
894         return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
895 }
896 static ssize_t show_pwm_enable(struct device *dev,
897                 struct device_attribute *attr, char *buf)
898 {
899         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
900         int nr = sensor_attr->index;
901
902         struct it87_data *data = it87_update_device(dev);
903         return sprintf(buf, "%d\n", pwm_mode(data, nr));
904 }
905 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
906                 char *buf)
907 {
908         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
909         int nr = sensor_attr->index;
910
911         struct it87_data *data = it87_update_device(dev);
912         return sprintf(buf, "%d\n",
913                        pwm_from_reg(data, data->pwm_duty[nr]));
914 }
915 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
916                 char *buf)
917 {
918         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
919         struct it87_data *data = it87_update_device(dev);
920         int nr = sensor_attr->index;
921         unsigned int freq;
922         int index;
923
924         if (has_pwm_freq2(data) && nr == 1)
925                 index = (data->extra >> 4) & 0x07;
926         else
927                 index = (data->fan_ctl >> 4) & 0x07;
928
929         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
930
931         return sprintf(buf, "%u\n", freq);
932 }
933
934 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
935                        const char *buf, size_t count)
936 {
937         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
938         int nr = sattr->nr;
939         int index = sattr->index;
940
941         struct it87_data *data = dev_get_drvdata(dev);
942         long val;
943         u8 reg;
944
945         if (kstrtol(buf, 10, &val) < 0)
946                 return -EINVAL;
947
948         mutex_lock(&data->update_lock);
949
950         if (has_16bit_fans(data)) {
951                 data->fan[nr][index] = FAN16_TO_REG(val);
952                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
953                                  data->fan[nr][index] & 0xff);
954                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
955                                  data->fan[nr][index] >> 8);
956         } else {
957                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
958                 switch (nr) {
959                 case 0:
960                         data->fan_div[nr] = reg & 0x07;
961                         break;
962                 case 1:
963                         data->fan_div[nr] = (reg >> 3) & 0x07;
964                         break;
965                 case 2:
966                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
967                         break;
968                 }
969                 data->fan[nr][index] =
970                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
971                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
972                                  data->fan[nr][index]);
973         }
974
975         mutex_unlock(&data->update_lock);
976         return count;
977 }
978
979 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
980                 const char *buf, size_t count)
981 {
982         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
983         int nr = sensor_attr->index;
984
985         struct it87_data *data = dev_get_drvdata(dev);
986         unsigned long val;
987         int min;
988         u8 old;
989
990         if (kstrtoul(buf, 10, &val) < 0)
991                 return -EINVAL;
992
993         mutex_lock(&data->update_lock);
994         old = it87_read_value(data, IT87_REG_FAN_DIV);
995
996         /* Save fan min limit */
997         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
998
999         switch (nr) {
1000         case 0:
1001         case 1:
1002                 data->fan_div[nr] = DIV_TO_REG(val);
1003                 break;
1004         case 2:
1005                 if (val < 8)
1006                         data->fan_div[nr] = 1;
1007                 else
1008                         data->fan_div[nr] = 3;
1009         }
1010         val = old & 0x80;
1011         val |= (data->fan_div[0] & 0x07);
1012         val |= (data->fan_div[1] & 0x07) << 3;
1013         if (data->fan_div[2] == 3)
1014                 val |= 0x1 << 6;
1015         it87_write_value(data, IT87_REG_FAN_DIV, val);
1016
1017         /* Restore fan min limit */
1018         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1019         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1020
1021         mutex_unlock(&data->update_lock);
1022         return count;
1023 }
1024
1025 /* Returns 0 if OK, -EINVAL otherwise */
1026 static int check_trip_points(struct device *dev, int nr)
1027 {
1028         const struct it87_data *data = dev_get_drvdata(dev);
1029         int i, err = 0;
1030
1031         if (has_old_autopwm(data)) {
1032                 for (i = 0; i < 3; i++) {
1033                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1034                                 err = -EINVAL;
1035                 }
1036                 for (i = 0; i < 2; i++) {
1037                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1038                                 err = -EINVAL;
1039                 }
1040         }
1041
1042         if (err) {
1043                 dev_err(dev,
1044                         "Inconsistent trip points, not switching to automatic mode\n");
1045                 dev_err(dev, "Adjust the trip points and try again\n");
1046         }
1047         return err;
1048 }
1049
1050 static ssize_t set_pwm_enable(struct device *dev,
1051                 struct device_attribute *attr, const char *buf, size_t count)
1052 {
1053         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1054         int nr = sensor_attr->index;
1055
1056         struct it87_data *data = dev_get_drvdata(dev);
1057         long val;
1058
1059         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1060                 return -EINVAL;
1061
1062         /* Check trip points before switching to automatic mode */
1063         if (val == 2) {
1064                 if (check_trip_points(dev, nr) < 0)
1065                         return -EINVAL;
1066         }
1067
1068         /* IT8603E does not have on/off mode */
1069         if (val == 0 && data->type == it8603)
1070                 return -EINVAL;
1071
1072         mutex_lock(&data->update_lock);
1073
1074         if (val == 0) {
1075                 int tmp;
1076                 /* make sure the fan is on when in on/off mode */
1077                 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1078                 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1079                 /* set on/off mode */
1080                 data->fan_main_ctrl &= ~(1 << nr);
1081                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1082                                  data->fan_main_ctrl);
1083         } else {
1084                 if (val == 1)                           /* Manual mode */
1085                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1086                                              data->pwm_temp_map[nr] :
1087                                              data->pwm_duty[nr];
1088                 else                                    /* Automatic mode */
1089                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1090                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1091
1092                 if (data->type != it8603) {
1093                         /* set SmartGuardian mode */
1094                         data->fan_main_ctrl |= (1 << nr);
1095                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1096                                          data->fan_main_ctrl);
1097                 }
1098         }
1099
1100         mutex_unlock(&data->update_lock);
1101         return count;
1102 }
1103 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1104                 const char *buf, size_t count)
1105 {
1106         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1107         int nr = sensor_attr->index;
1108
1109         struct it87_data *data = dev_get_drvdata(dev);
1110         long val;
1111
1112         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1113                 return -EINVAL;
1114
1115         mutex_lock(&data->update_lock);
1116         if (has_newer_autopwm(data)) {
1117                 /*
1118                  * If we are in automatic mode, the PWM duty cycle register
1119                  * is read-only so we can't write the value.
1120                  */
1121                 if (data->pwm_ctrl[nr] & 0x80) {
1122                         mutex_unlock(&data->update_lock);
1123                         return -EBUSY;
1124                 }
1125                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1126                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1127                                  data->pwm_duty[nr]);
1128         } else {
1129                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1130                 /*
1131                  * If we are in manual mode, write the duty cycle immediately;
1132                  * otherwise, just store it for later use.
1133                  */
1134                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1135                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1136                         it87_write_value(data, IT87_REG_PWM[nr],
1137                                          data->pwm_ctrl[nr]);
1138                 }
1139         }
1140         mutex_unlock(&data->update_lock);
1141         return count;
1142 }
1143 static ssize_t set_pwm_freq(struct device *dev,
1144                 struct device_attribute *attr, const char *buf, size_t count)
1145 {
1146         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1147         struct it87_data *data = dev_get_drvdata(dev);
1148         int nr = sensor_attr->index;
1149         unsigned long val;
1150         int i;
1151
1152         if (kstrtoul(buf, 10, &val) < 0)
1153                 return -EINVAL;
1154
1155         val = clamp_val(val, 0, 1000000);
1156         val *= has_newer_autopwm(data) ? 256 : 128;
1157
1158         /* Search for the nearest available frequency */
1159         for (i = 0; i < 7; i++) {
1160                 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1161                         break;
1162         }
1163
1164         mutex_lock(&data->update_lock);
1165         if (nr == 0) {
1166                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1167                 data->fan_ctl |= i << 4;
1168                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1169         } else {
1170                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1171                 data->extra |= i << 4;
1172                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1173         }
1174         mutex_unlock(&data->update_lock);
1175
1176         return count;
1177 }
1178 static ssize_t show_pwm_temp_map(struct device *dev,
1179                 struct device_attribute *attr, char *buf)
1180 {
1181         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1182         int nr = sensor_attr->index;
1183
1184         struct it87_data *data = it87_update_device(dev);
1185         int map;
1186
1187         if (data->pwm_temp_map[nr] < 3)
1188                 map = 1 << data->pwm_temp_map[nr];
1189         else
1190                 map = 0;                        /* Should never happen */
1191         return sprintf(buf, "%d\n", map);
1192 }
1193 static ssize_t set_pwm_temp_map(struct device *dev,
1194                 struct device_attribute *attr, const char *buf, size_t count)
1195 {
1196         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1197         int nr = sensor_attr->index;
1198
1199         struct it87_data *data = dev_get_drvdata(dev);
1200         long val;
1201         u8 reg;
1202
1203         /*
1204          * This check can go away if we ever support automatic fan speed
1205          * control on newer chips.
1206          */
1207         if (!has_old_autopwm(data)) {
1208                 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1209                 return -EINVAL;
1210         }
1211
1212         if (kstrtol(buf, 10, &val) < 0)
1213                 return -EINVAL;
1214
1215         switch (val) {
1216         case (1 << 0):
1217                 reg = 0x00;
1218                 break;
1219         case (1 << 1):
1220                 reg = 0x01;
1221                 break;
1222         case (1 << 2):
1223                 reg = 0x02;
1224                 break;
1225         default:
1226                 return -EINVAL;
1227         }
1228
1229         mutex_lock(&data->update_lock);
1230         data->pwm_temp_map[nr] = reg;
1231         /*
1232          * If we are in automatic mode, write the temp mapping immediately;
1233          * otherwise, just store it for later use.
1234          */
1235         if (data->pwm_ctrl[nr] & 0x80) {
1236                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1237                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1238         }
1239         mutex_unlock(&data->update_lock);
1240         return count;
1241 }
1242
1243 static ssize_t show_auto_pwm(struct device *dev,
1244                 struct device_attribute *attr, char *buf)
1245 {
1246         struct it87_data *data = it87_update_device(dev);
1247         struct sensor_device_attribute_2 *sensor_attr =
1248                         to_sensor_dev_attr_2(attr);
1249         int nr = sensor_attr->nr;
1250         int point = sensor_attr->index;
1251
1252         return sprintf(buf, "%d\n",
1253                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1254 }
1255
1256 static ssize_t set_auto_pwm(struct device *dev,
1257                 struct device_attribute *attr, const char *buf, size_t count)
1258 {
1259         struct it87_data *data = dev_get_drvdata(dev);
1260         struct sensor_device_attribute_2 *sensor_attr =
1261                         to_sensor_dev_attr_2(attr);
1262         int nr = sensor_attr->nr;
1263         int point = sensor_attr->index;
1264         long val;
1265
1266         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1267                 return -EINVAL;
1268
1269         mutex_lock(&data->update_lock);
1270         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1271         it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1272                          data->auto_pwm[nr][point]);
1273         mutex_unlock(&data->update_lock);
1274         return count;
1275 }
1276
1277 static ssize_t show_auto_temp(struct device *dev,
1278                 struct device_attribute *attr, char *buf)
1279 {
1280         struct it87_data *data = it87_update_device(dev);
1281         struct sensor_device_attribute_2 *sensor_attr =
1282                         to_sensor_dev_attr_2(attr);
1283         int nr = sensor_attr->nr;
1284         int point = sensor_attr->index;
1285
1286         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1287 }
1288
1289 static ssize_t set_auto_temp(struct device *dev,
1290                 struct device_attribute *attr, const char *buf, size_t count)
1291 {
1292         struct it87_data *data = dev_get_drvdata(dev);
1293         struct sensor_device_attribute_2 *sensor_attr =
1294                         to_sensor_dev_attr_2(attr);
1295         int nr = sensor_attr->nr;
1296         int point = sensor_attr->index;
1297         long val;
1298
1299         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1300                 return -EINVAL;
1301
1302         mutex_lock(&data->update_lock);
1303         data->auto_temp[nr][point] = TEMP_TO_REG(val);
1304         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1305                          data->auto_temp[nr][point]);
1306         mutex_unlock(&data->update_lock);
1307         return count;
1308 }
1309
1310 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1311 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1312                             0, 1);
1313 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1314                           set_fan_div, 0);
1315
1316 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1317 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1318                             1, 1);
1319 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1320                           set_fan_div, 1);
1321
1322 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1323 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1324                             2, 1);
1325 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1326                           set_fan_div, 2);
1327
1328 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1329 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1330                             3, 1);
1331
1332 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1333 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1334                             4, 1);
1335
1336 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1337 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1338                             5, 1);
1339
1340 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1341                           show_pwm_enable, set_pwm_enable, 0);
1342 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1343 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1344                           set_pwm_freq, 0);
1345 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1346                           show_pwm_temp_map, set_pwm_temp_map, 0);
1347 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1348                             show_auto_pwm, set_auto_pwm, 0, 0);
1349 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1350                             show_auto_pwm, set_auto_pwm, 0, 1);
1351 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1352                             show_auto_pwm, set_auto_pwm, 0, 2);
1353 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1354                             show_auto_pwm, NULL, 0, 3);
1355 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1356                             show_auto_temp, set_auto_temp, 0, 1);
1357 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1358                             show_auto_temp, set_auto_temp, 0, 0);
1359 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1360                             show_auto_temp, set_auto_temp, 0, 2);
1361 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1362                             show_auto_temp, set_auto_temp, 0, 3);
1363 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1364                             show_auto_temp, set_auto_temp, 0, 4);
1365
1366 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1367                           show_pwm_enable, set_pwm_enable, 1);
1368 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1369 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1370 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1371                           show_pwm_temp_map, set_pwm_temp_map, 1);
1372 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1373                             show_auto_pwm, set_auto_pwm, 1, 0);
1374 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1375                             show_auto_pwm, set_auto_pwm, 1, 1);
1376 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1377                             show_auto_pwm, set_auto_pwm, 1, 2);
1378 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1379                             show_auto_pwm, NULL, 1, 3);
1380 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1381                             show_auto_temp, set_auto_temp, 1, 1);
1382 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1383                             show_auto_temp, set_auto_temp, 1, 0);
1384 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1385                             show_auto_temp, set_auto_temp, 1, 2);
1386 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1387                             show_auto_temp, set_auto_temp, 1, 3);
1388 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1389                             show_auto_temp, set_auto_temp, 1, 4);
1390
1391 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1392                           show_pwm_enable, set_pwm_enable, 2);
1393 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1394 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1395 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1396                           show_pwm_temp_map, set_pwm_temp_map, 2);
1397 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1398                             show_auto_pwm, set_auto_pwm, 2, 0);
1399 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1400                             show_auto_pwm, set_auto_pwm, 2, 1);
1401 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1402                             show_auto_pwm, set_auto_pwm, 2, 2);
1403 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1404                             show_auto_pwm, NULL, 2, 3);
1405 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1406                             show_auto_temp, set_auto_temp, 2, 1);
1407 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1408                             show_auto_temp, set_auto_temp, 2, 0);
1409 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1410                             show_auto_temp, set_auto_temp, 2, 2);
1411 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1412                             show_auto_temp, set_auto_temp, 2, 3);
1413 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1414                             show_auto_temp, set_auto_temp, 2, 4);
1415
1416 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1417                           show_pwm_enable, set_pwm_enable, 3);
1418 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1419 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1420 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO | S_IWUSR,
1421                           show_pwm_temp_map, set_pwm_temp_map, 3);
1422
1423 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1424                           show_pwm_enable, set_pwm_enable, 4);
1425 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1426 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1427 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO | S_IWUSR,
1428                           show_pwm_temp_map, set_pwm_temp_map, 4);
1429
1430 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1431                           show_pwm_enable, set_pwm_enable, 5);
1432 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1433 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1434 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO | S_IWUSR,
1435                           show_pwm_temp_map, set_pwm_temp_map, 5);
1436
1437 /* Alarms */
1438 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1439                 char *buf)
1440 {
1441         struct it87_data *data = it87_update_device(dev);
1442         return sprintf(buf, "%u\n", data->alarms);
1443 }
1444 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1445
1446 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1447                 char *buf)
1448 {
1449         int bitnr = to_sensor_dev_attr(attr)->index;
1450         struct it87_data *data = it87_update_device(dev);
1451         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1452 }
1453
1454 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1455                 *attr, const char *buf, size_t count)
1456 {
1457         struct it87_data *data = dev_get_drvdata(dev);
1458         long val;
1459         int config;
1460
1461         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1462                 return -EINVAL;
1463
1464         mutex_lock(&data->update_lock);
1465         config = it87_read_value(data, IT87_REG_CONFIG);
1466         if (config < 0) {
1467                 count = config;
1468         } else {
1469                 config |= 1 << 5;
1470                 it87_write_value(data, IT87_REG_CONFIG, config);
1471                 /* Invalidate cache to force re-read */
1472                 data->valid = 0;
1473         }
1474         mutex_unlock(&data->update_lock);
1475
1476         return count;
1477 }
1478
1479 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1480 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1481 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1482 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1483 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1484 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1485 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1486 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1487 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1488 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1489 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1490 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1491 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1492 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1493 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1494 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1495 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1496 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1497                           show_alarm, clear_intrusion, 4);
1498
1499 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1500                 char *buf)
1501 {
1502         int bitnr = to_sensor_dev_attr(attr)->index;
1503         struct it87_data *data = it87_update_device(dev);
1504         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1505 }
1506 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1507                 const char *buf, size_t count)
1508 {
1509         int bitnr = to_sensor_dev_attr(attr)->index;
1510         struct it87_data *data = dev_get_drvdata(dev);
1511         long val;
1512
1513         if (kstrtol(buf, 10, &val) < 0
1514          || (val != 0 && val != 1))
1515                 return -EINVAL;
1516
1517         mutex_lock(&data->update_lock);
1518         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1519         if (val)
1520                 data->beeps |= (1 << bitnr);
1521         else
1522                 data->beeps &= ~(1 << bitnr);
1523         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1524         mutex_unlock(&data->update_lock);
1525         return count;
1526 }
1527
1528 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1529                           show_beep, set_beep, 1);
1530 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1531 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1532 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1533 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1534 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1535 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1536 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1537 /* fanX_beep writability is set later */
1538 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1539 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1540 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1541 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1542 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1543 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1544 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1545                           show_beep, set_beep, 2);
1546 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1547 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1548
1549 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1550                 char *buf)
1551 {
1552         struct it87_data *data = dev_get_drvdata(dev);
1553         return sprintf(buf, "%u\n", data->vrm);
1554 }
1555 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1556                 const char *buf, size_t count)
1557 {
1558         struct it87_data *data = dev_get_drvdata(dev);
1559         unsigned long val;
1560
1561         if (kstrtoul(buf, 10, &val) < 0)
1562                 return -EINVAL;
1563
1564         data->vrm = val;
1565
1566         return count;
1567 }
1568 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1569
1570 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1571                 char *buf)
1572 {
1573         struct it87_data *data = it87_update_device(dev);
1574         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1575 }
1576 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1577
1578 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1579                 char *buf)
1580 {
1581         static const char * const labels[] = {
1582                 "+5V",
1583                 "5VSB",
1584                 "Vbat",
1585         };
1586         static const char * const labels_it8721[] = {
1587                 "+3.3V",
1588                 "3VSB",
1589                 "Vbat",
1590         };
1591         struct it87_data *data = dev_get_drvdata(dev);
1592         int nr = to_sensor_dev_attr(attr)->index;
1593         const char *label;
1594
1595         if (has_12mv_adc(data) || has_10_9mv_adc(data))
1596                 label = labels_it8721[nr];
1597         else
1598                 label = labels[nr];
1599
1600         return sprintf(buf, "%s\n", label);
1601 }
1602 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1603 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1604 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1605 /* AVCC3 */
1606 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1607
1608 static ssize_t show_name(struct device *dev, struct device_attribute
1609                          *devattr, char *buf)
1610 {
1611         struct it87_data *data = dev_get_drvdata(dev);
1612         return sprintf(buf, "%s\n", data->name);
1613 }
1614 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1615
1616 static struct attribute *it87_attributes_in[10][5] = {
1617 {
1618         &sensor_dev_attr_in0_input.dev_attr.attr,
1619         &sensor_dev_attr_in0_min.dev_attr.attr,
1620         &sensor_dev_attr_in0_max.dev_attr.attr,
1621         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1622         NULL
1623 }, {
1624         &sensor_dev_attr_in1_input.dev_attr.attr,
1625         &sensor_dev_attr_in1_min.dev_attr.attr,
1626         &sensor_dev_attr_in1_max.dev_attr.attr,
1627         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1628         NULL
1629 }, {
1630         &sensor_dev_attr_in2_input.dev_attr.attr,
1631         &sensor_dev_attr_in2_min.dev_attr.attr,
1632         &sensor_dev_attr_in2_max.dev_attr.attr,
1633         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1634         NULL
1635 }, {
1636         &sensor_dev_attr_in3_input.dev_attr.attr,
1637         &sensor_dev_attr_in3_min.dev_attr.attr,
1638         &sensor_dev_attr_in3_max.dev_attr.attr,
1639         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1640         NULL
1641 }, {
1642         &sensor_dev_attr_in4_input.dev_attr.attr,
1643         &sensor_dev_attr_in4_min.dev_attr.attr,
1644         &sensor_dev_attr_in4_max.dev_attr.attr,
1645         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1646         NULL
1647 }, {
1648         &sensor_dev_attr_in5_input.dev_attr.attr,
1649         &sensor_dev_attr_in5_min.dev_attr.attr,
1650         &sensor_dev_attr_in5_max.dev_attr.attr,
1651         &sensor_dev_attr_in5_alarm.dev_attr.attr,
1652         NULL
1653 }, {
1654         &sensor_dev_attr_in6_input.dev_attr.attr,
1655         &sensor_dev_attr_in6_min.dev_attr.attr,
1656         &sensor_dev_attr_in6_max.dev_attr.attr,
1657         &sensor_dev_attr_in6_alarm.dev_attr.attr,
1658         NULL
1659 }, {
1660         &sensor_dev_attr_in7_input.dev_attr.attr,
1661         &sensor_dev_attr_in7_min.dev_attr.attr,
1662         &sensor_dev_attr_in7_max.dev_attr.attr,
1663         &sensor_dev_attr_in7_alarm.dev_attr.attr,
1664         NULL
1665 }, {
1666         &sensor_dev_attr_in8_input.dev_attr.attr,
1667         NULL
1668 }, {
1669         &sensor_dev_attr_in9_input.dev_attr.attr,
1670         NULL
1671 } };
1672
1673 static const struct attribute_group it87_group_in[10] = {
1674         { .attrs = it87_attributes_in[0] },
1675         { .attrs = it87_attributes_in[1] },
1676         { .attrs = it87_attributes_in[2] },
1677         { .attrs = it87_attributes_in[3] },
1678         { .attrs = it87_attributes_in[4] },
1679         { .attrs = it87_attributes_in[5] },
1680         { .attrs = it87_attributes_in[6] },
1681         { .attrs = it87_attributes_in[7] },
1682         { .attrs = it87_attributes_in[8] },
1683         { .attrs = it87_attributes_in[9] },
1684 };
1685
1686 static struct attribute *it87_attributes_temp[3][6] = {
1687 {
1688         &sensor_dev_attr_temp1_input.dev_attr.attr,
1689         &sensor_dev_attr_temp1_max.dev_attr.attr,
1690         &sensor_dev_attr_temp1_min.dev_attr.attr,
1691         &sensor_dev_attr_temp1_type.dev_attr.attr,
1692         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1693         NULL
1694 } , {
1695         &sensor_dev_attr_temp2_input.dev_attr.attr,
1696         &sensor_dev_attr_temp2_max.dev_attr.attr,
1697         &sensor_dev_attr_temp2_min.dev_attr.attr,
1698         &sensor_dev_attr_temp2_type.dev_attr.attr,
1699         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1700         NULL
1701 } , {
1702         &sensor_dev_attr_temp3_input.dev_attr.attr,
1703         &sensor_dev_attr_temp3_max.dev_attr.attr,
1704         &sensor_dev_attr_temp3_min.dev_attr.attr,
1705         &sensor_dev_attr_temp3_type.dev_attr.attr,
1706         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1707         NULL
1708 } };
1709
1710 static const struct attribute_group it87_group_temp[3] = {
1711         { .attrs = it87_attributes_temp[0] },
1712         { .attrs = it87_attributes_temp[1] },
1713         { .attrs = it87_attributes_temp[2] },
1714 };
1715
1716 static struct attribute *it87_attributes_temp_offset[] = {
1717         &sensor_dev_attr_temp1_offset.dev_attr.attr,
1718         &sensor_dev_attr_temp2_offset.dev_attr.attr,
1719         &sensor_dev_attr_temp3_offset.dev_attr.attr,
1720 };
1721
1722 static struct attribute *it87_attributes[] = {
1723         &dev_attr_alarms.attr,
1724         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1725         &dev_attr_name.attr,
1726         NULL
1727 };
1728
1729 static const struct attribute_group it87_group = {
1730         .attrs = it87_attributes,
1731 };
1732
1733 static struct attribute *it87_attributes_in_beep[] = {
1734         &sensor_dev_attr_in0_beep.dev_attr.attr,
1735         &sensor_dev_attr_in1_beep.dev_attr.attr,
1736         &sensor_dev_attr_in2_beep.dev_attr.attr,
1737         &sensor_dev_attr_in3_beep.dev_attr.attr,
1738         &sensor_dev_attr_in4_beep.dev_attr.attr,
1739         &sensor_dev_attr_in5_beep.dev_attr.attr,
1740         &sensor_dev_attr_in6_beep.dev_attr.attr,
1741         &sensor_dev_attr_in7_beep.dev_attr.attr,
1742         NULL,
1743         NULL,
1744 };
1745
1746 static struct attribute *it87_attributes_temp_beep[] = {
1747         &sensor_dev_attr_temp1_beep.dev_attr.attr,
1748         &sensor_dev_attr_temp2_beep.dev_attr.attr,
1749         &sensor_dev_attr_temp3_beep.dev_attr.attr,
1750 };
1751
1752 static struct attribute *it87_attributes_fan[6][3+1] = { {
1753         &sensor_dev_attr_fan1_input.dev_attr.attr,
1754         &sensor_dev_attr_fan1_min.dev_attr.attr,
1755         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1756         NULL
1757 }, {
1758         &sensor_dev_attr_fan2_input.dev_attr.attr,
1759         &sensor_dev_attr_fan2_min.dev_attr.attr,
1760         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1761         NULL
1762 }, {
1763         &sensor_dev_attr_fan3_input.dev_attr.attr,
1764         &sensor_dev_attr_fan3_min.dev_attr.attr,
1765         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1766         NULL
1767 }, {
1768         &sensor_dev_attr_fan4_input.dev_attr.attr,
1769         &sensor_dev_attr_fan4_min.dev_attr.attr,
1770         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1771         NULL
1772 }, {
1773         &sensor_dev_attr_fan5_input.dev_attr.attr,
1774         &sensor_dev_attr_fan5_min.dev_attr.attr,
1775         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1776         NULL
1777 }, {
1778         &sensor_dev_attr_fan6_input.dev_attr.attr,
1779         &sensor_dev_attr_fan6_min.dev_attr.attr,
1780         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1781         NULL
1782 } };
1783
1784 static const struct attribute_group it87_group_fan[6] = {
1785         { .attrs = it87_attributes_fan[0] },
1786         { .attrs = it87_attributes_fan[1] },
1787         { .attrs = it87_attributes_fan[2] },
1788         { .attrs = it87_attributes_fan[3] },
1789         { .attrs = it87_attributes_fan[4] },
1790         { .attrs = it87_attributes_fan[5] },
1791 };
1792
1793 static const struct attribute *it87_attributes_fan_div[] = {
1794         &sensor_dev_attr_fan1_div.dev_attr.attr,
1795         &sensor_dev_attr_fan2_div.dev_attr.attr,
1796         &sensor_dev_attr_fan3_div.dev_attr.attr,
1797 };
1798
1799 static struct attribute *it87_attributes_pwm[6][4+1] = { {
1800         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1801         &sensor_dev_attr_pwm1.dev_attr.attr,
1802         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1803         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1804         NULL
1805 }, {
1806         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1807         &sensor_dev_attr_pwm2.dev_attr.attr,
1808         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1809         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1810         NULL
1811 }, {
1812         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1813         &sensor_dev_attr_pwm3.dev_attr.attr,
1814         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1815         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1816         NULL
1817 }, {
1818         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
1819         &sensor_dev_attr_pwm4.dev_attr.attr,
1820         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
1821         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
1822         NULL
1823 }, {
1824         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1825         &sensor_dev_attr_pwm5.dev_attr.attr,
1826         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1827         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
1828         NULL
1829 }, {
1830         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
1831         &sensor_dev_attr_pwm6.dev_attr.attr,
1832         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1833         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
1834         NULL
1835 } };
1836
1837 static umode_t pwm_attribute_mode(struct kobject *kobj, struct attribute *attr,
1838                                   int index)
1839 {
1840         struct device *dev = container_of(kobj, struct device, kobj);
1841         struct it87_data *data = dev_get_drvdata(dev);
1842
1843         if (has_pwm_freq2(data) && index == 2)
1844                 return attr->mode | S_IWUSR;
1845
1846         return attr->mode;
1847 }
1848
1849 static const struct attribute_group it87_group_pwm[6] = {
1850         { .attrs = it87_attributes_pwm[0] },
1851         { .attrs = it87_attributes_pwm[1],
1852           .is_visible = pwm_attribute_mode, },
1853         { .attrs = it87_attributes_pwm[2] },
1854         { .attrs = it87_attributes_pwm[3] },
1855         { .attrs = it87_attributes_pwm[4] },
1856         { .attrs = it87_attributes_pwm[5] },
1857 };
1858
1859 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1860         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1861         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1862         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1863         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1864         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1865         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1866         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1867         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1868         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1869         NULL
1870 }, {
1871         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1872         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1873         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1874         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1875         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1876         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1877         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1878         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1879         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1880         NULL
1881 }, {
1882         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1883         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1884         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1885         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1886         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1887         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1888         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1889         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1890         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1891         NULL
1892 } };
1893
1894 static const struct attribute_group it87_group_autopwm[3] = {
1895         { .attrs = it87_attributes_autopwm[0] },
1896         { .attrs = it87_attributes_autopwm[1] },
1897         { .attrs = it87_attributes_autopwm[2] },
1898 };
1899
1900 static struct attribute *it87_attributes_fan_beep[] = {
1901         &sensor_dev_attr_fan1_beep.dev_attr.attr,
1902         &sensor_dev_attr_fan2_beep.dev_attr.attr,
1903         &sensor_dev_attr_fan3_beep.dev_attr.attr,
1904         &sensor_dev_attr_fan4_beep.dev_attr.attr,
1905         &sensor_dev_attr_fan5_beep.dev_attr.attr,
1906         &sensor_dev_attr_fan6_beep.dev_attr.attr,
1907 };
1908
1909 static struct attribute *it87_attributes_vid[] = {
1910         &dev_attr_vrm.attr,
1911         &dev_attr_cpu0_vid.attr,
1912         NULL
1913 };
1914
1915 static const struct attribute_group it87_group_vid = {
1916         .attrs = it87_attributes_vid,
1917 };
1918
1919 static struct attribute *it87_attributes_label[] = {
1920         &sensor_dev_attr_in3_label.dev_attr.attr,
1921         &sensor_dev_attr_in7_label.dev_attr.attr,
1922         &sensor_dev_attr_in8_label.dev_attr.attr,
1923         &sensor_dev_attr_in9_label.dev_attr.attr,
1924         NULL
1925 };
1926
1927 static const struct attribute_group it87_group_label = {
1928         .attrs = it87_attributes_label,
1929 };
1930
1931 /* SuperIO detection - will change isa_address if a chip is found */
1932 static int __init it87_find(unsigned short *address,
1933         struct it87_sio_data *sio_data)
1934 {
1935         int err;
1936         u16 chip_type;
1937         const char *board_vendor, *board_name;
1938         const struct it87_devices *config;
1939
1940         err = superio_enter();
1941         if (err)
1942                 return err;
1943
1944         err = -ENODEV;
1945         chip_type = force_id ? force_id : superio_inw(DEVID);
1946
1947         switch (chip_type) {
1948         case IT8705F_DEVID:
1949                 sio_data->type = it87;
1950                 break;
1951         case IT8712F_DEVID:
1952                 sio_data->type = it8712;
1953                 break;
1954         case IT8716F_DEVID:
1955         case IT8726F_DEVID:
1956                 sio_data->type = it8716;
1957                 break;
1958         case IT8718F_DEVID:
1959                 sio_data->type = it8718;
1960                 break;
1961         case IT8720F_DEVID:
1962                 sio_data->type = it8720;
1963                 break;
1964         case IT8721F_DEVID:
1965                 sio_data->type = it8721;
1966                 break;
1967         case IT8728F_DEVID:
1968                 sio_data->type = it8728;
1969                 break;
1970         case IT8732F_DEVID:
1971                 sio_data->type = it8732;
1972                 break;
1973         case IT8771E_DEVID:
1974                 sio_data->type = it8771;
1975                 break;
1976         case IT8772E_DEVID:
1977                 sio_data->type = it8772;
1978                 break;
1979         case IT8781F_DEVID:
1980                 sio_data->type = it8781;
1981                 break;
1982         case IT8782F_DEVID:
1983                 sio_data->type = it8782;
1984                 break;
1985         case IT8783E_DEVID:
1986                 sio_data->type = it8783;
1987                 break;
1988         case IT8786E_DEVID:
1989                 sio_data->type = it8786;
1990                 break;
1991         case IT8790E_DEVID:
1992                 sio_data->type = it8790;
1993                 break;
1994         case IT8603E_DEVID:
1995         case IT8623E_DEVID:
1996                 sio_data->type = it8603;
1997                 break;
1998         case IT8620E_DEVID:
1999                 sio_data->type = it8620;
2000                 break;
2001         case 0xffff:    /* No device at all */
2002                 goto exit;
2003         default:
2004                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2005                 goto exit;
2006         }
2007
2008         superio_select(PME);
2009         if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
2010                 pr_info("Device not activated, skipping\n");
2011                 goto exit;
2012         }
2013
2014         *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2015         if (*address == 0) {
2016                 pr_info("Base address not set, skipping\n");
2017                 goto exit;
2018         }
2019
2020         err = 0;
2021         sio_data->revision = superio_inb(DEVREV) & 0x0f;
2022         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2023                 it87_devices[sio_data->type].suffix,
2024                 *address, sio_data->revision);
2025
2026         config = &it87_devices[sio_data->type];
2027
2028         /* in7 (VSB or VCCH5V) is always internal on some chips */
2029         if (has_in7_internal(config))
2030                 sio_data->internal |= (1 << 1);
2031
2032         /* in8 (Vbat) is always internal */
2033         sio_data->internal |= (1 << 2);
2034
2035         /* in9 (AVCC3), always internal if supported */
2036         if (has_avcc3(config))
2037                 sio_data->internal |= (1 << 3); /* in9 is AVCC */
2038         else
2039                 sio_data->skip_in |= (1 << 9);
2040
2041         if (!has_six_pwm(config))
2042                 sio_data->skip_pwm |= (1 << 3) | (1 << 4) | (1 << 5);
2043
2044         if (!has_vid(config))
2045                 sio_data->skip_vid = 1;
2046
2047         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2048         if (sio_data->type == it87) {
2049                 /* The IT8705F has a different LD number for GPIO */
2050                 superio_select(5);
2051                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2052         } else if (sio_data->type == it8783) {
2053                 int reg25, reg27, reg2a, reg2c, regef;
2054
2055                 superio_select(GPIO);
2056
2057                 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
2058                 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
2059                 reg2a = superio_inb(IT87_SIO_PINX1_REG);
2060                 reg2c = superio_inb(IT87_SIO_PINX2_REG);
2061                 regef = superio_inb(IT87_SIO_SPI_REG);
2062
2063                 /* Check if fan3 is there or not */
2064                 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
2065                         sio_data->skip_fan |= (1 << 2);
2066                 if ((reg25 & (1 << 4))
2067                     || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
2068                         sio_data->skip_pwm |= (1 << 2);
2069
2070                 /* Check if fan2 is there or not */
2071                 if (reg27 & (1 << 7))
2072                         sio_data->skip_fan |= (1 << 1);
2073                 if (reg27 & (1 << 3))
2074                         sio_data->skip_pwm |= (1 << 1);
2075
2076                 /* VIN5 */
2077                 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
2078                         sio_data->skip_in |= (1 << 5); /* No VIN5 */
2079
2080                 /* VIN6 */
2081                 if (reg27 & (1 << 1))
2082                         sio_data->skip_in |= (1 << 6); /* No VIN6 */
2083
2084                 /*
2085                  * VIN7
2086                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2087                  */
2088                 if (reg27 & (1 << 2)) {
2089                         /*
2090                          * The data sheet is a bit unclear regarding the
2091                          * internal voltage divider for VCCH5V. It says
2092                          * "This bit enables and switches VIN7 (pin 91) to the
2093                          * internal voltage divider for VCCH5V".
2094                          * This is different to other chips, where the internal
2095                          * voltage divider would connect VIN7 to an internal
2096                          * voltage source. Maybe that is the case here as well.
2097                          *
2098                          * Since we don't know for sure, re-route it if that is
2099                          * not the case, and ask the user to report if the
2100                          * resulting voltage is sane.
2101                          */
2102                         if (!(reg2c & (1 << 1))) {
2103                                 reg2c |= (1 << 1);
2104                                 superio_outb(IT87_SIO_PINX2_REG, reg2c);
2105                                 pr_notice("Routing internal VCCH5V to in7.\n");
2106                         }
2107                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2108                         pr_notice("Please report if it displays a reasonable voltage.\n");
2109                 }
2110
2111                 if (reg2c & (1 << 0))
2112                         sio_data->internal |= (1 << 0);
2113                 if (reg2c & (1 << 1))
2114                         sio_data->internal |= (1 << 1);
2115
2116                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2117         } else if (sio_data->type == it8603) {
2118                 int reg27, reg29;
2119
2120                 superio_select(GPIO);
2121
2122                 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
2123
2124                 /* Check if fan3 is there or not */
2125                 if (reg27 & (1 << 6))
2126                         sio_data->skip_pwm |= (1 << 2);
2127                 if (reg27 & (1 << 7))
2128                         sio_data->skip_fan |= (1 << 2);
2129
2130                 /* Check if fan2 is there or not */
2131                 reg29 = superio_inb(IT87_SIO_GPIO5_REG);
2132                 if (reg29 & (1 << 1))
2133                         sio_data->skip_pwm |= (1 << 1);
2134                 if (reg29 & (1 << 2))
2135                         sio_data->skip_fan |= (1 << 1);
2136
2137                 sio_data->skip_in |= (1 << 5); /* No VIN5 */
2138                 sio_data->skip_in |= (1 << 6); /* No VIN6 */
2139
2140                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2141         } else if (sio_data->type == it8620) {
2142                 int reg;
2143
2144                 superio_select(GPIO);
2145
2146                 /* Check for pwm5 */
2147                 reg = superio_inb(IT87_SIO_GPIO1_REG);
2148                 if (reg & (1 << 6))
2149                         sio_data->skip_pwm |= (1 << 4);
2150
2151                 /* Check for fan4, fan5 */
2152                 reg = superio_inb(IT87_SIO_GPIO2_REG);
2153                 if (!(reg & (1 << 5)))
2154                         sio_data->skip_fan |= (1 << 3);
2155                 if (!(reg & (1 << 4)))
2156                         sio_data->skip_fan |= (1 << 4);
2157
2158                 /* Check for pwm3, fan3 */
2159                 reg = superio_inb(IT87_SIO_GPIO3_REG);
2160                 if (reg & (1 << 6))
2161                         sio_data->skip_pwm |= (1 << 2);
2162                 if (reg & (1 << 7))
2163                         sio_data->skip_fan |= (1 << 2);
2164
2165                 /* Check for pwm4 */
2166                 reg = superio_inb(IT87_SIO_GPIO4_REG);
2167                 if (!(reg & (1 << 2)))
2168                         sio_data->skip_pwm |= (1 << 3);
2169
2170                 /* Check for pwm2, fan2 */
2171                 reg = superio_inb(IT87_SIO_GPIO5_REG);
2172                 if (reg & (1 << 1))
2173                         sio_data->skip_pwm |= (1 << 1);
2174                 if (reg & (1 << 2))
2175                         sio_data->skip_fan |= (1 << 1);
2176                 /* Check for pwm6, fan6 */
2177                 if (!(reg & (1 << 7))) {
2178                         sio_data->skip_pwm |= (1 << 5);
2179                         sio_data->skip_fan |= (1 << 5);
2180                 }
2181
2182                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2183         } else {
2184                 int reg;
2185                 bool uart6;
2186
2187                 superio_select(GPIO);
2188
2189                 reg = superio_inb(IT87_SIO_GPIO3_REG);
2190                 if (!sio_data->skip_vid) {
2191                         /* We need at least 4 VID pins */
2192                         if (reg & 0x0f) {
2193                                 pr_info("VID is disabled (pins used for GPIO)\n");
2194                                 sio_data->skip_vid = 1;
2195                         }
2196                 }
2197
2198                 /* Check if fan3 is there or not */
2199                 if (reg & (1 << 6))
2200                         sio_data->skip_pwm |= (1 << 2);
2201                 if (reg & (1 << 7))
2202                         sio_data->skip_fan |= (1 << 2);
2203
2204                 /* Check if fan2 is there or not */
2205                 reg = superio_inb(IT87_SIO_GPIO5_REG);
2206                 if (reg & (1 << 1))
2207                         sio_data->skip_pwm |= (1 << 1);
2208                 if (reg & (1 << 2))
2209                         sio_data->skip_fan |= (1 << 1);
2210
2211                 if ((sio_data->type == it8718 || sio_data->type == it8720)
2212                  && !(sio_data->skip_vid))
2213                         sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
2214
2215                 reg = superio_inb(IT87_SIO_PINX2_REG);
2216
2217                 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
2218
2219                 /*
2220                  * The IT8720F has no VIN7 pin, so VCCH should always be
2221                  * routed internally to VIN7 with an internal divider.
2222                  * Curiously, there still is a configuration bit to control
2223                  * this, which means it can be set incorrectly. And even
2224                  * more curiously, many boards out there are improperly
2225                  * configured, even though the IT8720F datasheet claims
2226                  * that the internal routing of VCCH to VIN7 is the default
2227                  * setting. So we force the internal routing in this case.
2228                  *
2229                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2230                  * If UART6 is enabled, re-route VIN7 to the internal divider
2231                  * if that is not already the case.
2232                  */
2233                 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
2234                         reg |= (1 << 1);
2235                         superio_outb(IT87_SIO_PINX2_REG, reg);
2236                         pr_notice("Routing internal VCCH to in7\n");
2237                 }
2238                 if (reg & (1 << 0))
2239                         sio_data->internal |= (1 << 0);
2240                 if (reg & (1 << 1))
2241                         sio_data->internal |= (1 << 1);
2242
2243                 /*
2244                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2245                  * While VIN7 can be routed to the internal voltage divider,
2246                  * VIN5 and VIN6 are not available if UART6 is enabled.
2247                  *
2248                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2249                  * is the temperature source. Since we can not read the
2250                  * temperature source here, skip_temp is preliminary.
2251                  */
2252                 if (uart6) {
2253                         sio_data->skip_in |= (1 << 5) | (1 << 6);
2254                         sio_data->skip_temp |= (1 << 2);
2255                 }
2256
2257                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2258         }
2259         if (sio_data->beep_pin)
2260                 pr_info("Beeping is supported\n");
2261
2262         /* Disable specific features based on DMI strings */
2263         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2264         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2265         if (board_vendor && board_name) {
2266                 if (strcmp(board_vendor, "nVIDIA") == 0
2267                  && strcmp(board_name, "FN68PT") == 0) {
2268                         /*
2269                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2270                          * connected to a fan, but to something else. One user
2271                          * has reported instant system power-off when changing
2272                          * the PWM2 duty cycle, so we disable it.
2273                          * I use the board name string as the trigger in case
2274                          * the same board is ever used in other systems.
2275                          */
2276                         pr_info("Disabling pwm2 due to hardware constraints\n");
2277                         sio_data->skip_pwm = (1 << 1);
2278                 }
2279         }
2280
2281 exit:
2282         superio_exit();
2283         return err;
2284 }
2285
2286 static void it87_remove_files(struct device *dev)
2287 {
2288         struct it87_data *data = platform_get_drvdata(pdev);
2289         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2290         int i;
2291
2292         sysfs_remove_group(&dev->kobj, &it87_group);
2293         for (i = 0; i < 10; i++) {
2294                 if (sio_data->skip_in & (1 << i))
2295                         continue;
2296                 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2297                 if (it87_attributes_in_beep[i])
2298                         sysfs_remove_file(&dev->kobj,
2299                                           it87_attributes_in_beep[i]);
2300         }
2301         for (i = 0; i < 3; i++) {
2302                 if (!(data->has_temp & (1 << i)))
2303                         continue;
2304                 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2305                 if (has_temp_offset(data))
2306                         sysfs_remove_file(&dev->kobj,
2307                                           it87_attributes_temp_offset[i]);
2308                 if (sio_data->beep_pin)
2309                         sysfs_remove_file(&dev->kobj,
2310                                           it87_attributes_temp_beep[i]);
2311         }
2312         for (i = 0; i < 6; i++) {
2313                 if (!(data->has_fan & (1 << i)))
2314                         continue;
2315                 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2316                 if (sio_data->beep_pin)
2317                         sysfs_remove_file(&dev->kobj,
2318                                           it87_attributes_fan_beep[i]);
2319                 if (i < 3 && !has_16bit_fans(data))
2320                         sysfs_remove_file(&dev->kobj,
2321                                           it87_attributes_fan_div[i]);
2322         }
2323         for (i = 0; i < 6; i++) {
2324                 if (sio_data->skip_pwm & (1 << i))
2325                         continue;
2326                 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2327                 if (has_old_autopwm(data))
2328                         sysfs_remove_group(&dev->kobj,
2329                                            &it87_group_autopwm[i]);
2330         }
2331         if (!sio_data->skip_vid)
2332                 sysfs_remove_group(&dev->kobj, &it87_group_vid);
2333         sysfs_remove_group(&dev->kobj, &it87_group_label);
2334 }
2335
2336 static int it87_probe(struct platform_device *pdev)
2337 {
2338         struct it87_data *data;
2339         struct resource *res;
2340         struct device *dev = &pdev->dev;
2341         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2342         int err = 0, i;
2343         int enable_pwm_interface;
2344         int fan_beep_need_rw;
2345
2346         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2347         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2348                                  DRVNAME)) {
2349                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2350                         (unsigned long)res->start,
2351                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2352                 return -EBUSY;
2353         }
2354
2355         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2356         if (!data)
2357                 return -ENOMEM;
2358
2359         data->addr = res->start;
2360         data->type = sio_data->type;
2361         data->features = it87_devices[sio_data->type].features;
2362         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2363         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2364         data->name = it87_devices[sio_data->type].name;
2365         /*
2366          * IT8705F Datasheet 0.4.1, 3h == Version G.
2367          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2368          * These are the first revisions with 16-bit tachometer support.
2369          */
2370         switch (data->type) {
2371         case it87:
2372                 if (sio_data->revision >= 0x03) {
2373                         data->features &= ~FEAT_OLD_AUTOPWM;
2374                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2375                 }
2376                 break;
2377         case it8712:
2378                 if (sio_data->revision >= 0x08) {
2379                         data->features &= ~FEAT_OLD_AUTOPWM;
2380                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2381                                           FEAT_FIVE_FANS;
2382                 }
2383                 break;
2384         default:
2385                 break;
2386         }
2387
2388         /* Now, we do the remaining detection. */
2389         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2390          || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2391                 return -ENODEV;
2392
2393         platform_set_drvdata(pdev, data);
2394
2395         mutex_init(&data->update_lock);
2396
2397         /* Check PWM configuration */
2398         enable_pwm_interface = it87_check_pwm(dev);
2399
2400         /* Starting with IT8721F, we handle scaling of internal voltages */
2401         if (has_12mv_adc(data)) {
2402                 if (sio_data->internal & (1 << 0))
2403                         data->in_scaled |= (1 << 3);    /* in3 is AVCC */
2404                 if (sio_data->internal & (1 << 1))
2405                         data->in_scaled |= (1 << 7);    /* in7 is VSB */
2406                 if (sio_data->internal & (1 << 2))
2407                         data->in_scaled |= (1 << 8);    /* in8 is Vbat */
2408                 if (sio_data->internal & (1 << 3))
2409                         data->in_scaled |= (1 << 9);    /* in9 is AVCC */
2410         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2411                    sio_data->type == it8783) {
2412                 if (sio_data->internal & (1 << 0))
2413                         data->in_scaled |= (1 << 3);    /* in3 is VCC5V */
2414                 if (sio_data->internal & (1 << 1))
2415                         data->in_scaled |= (1 << 7);    /* in7 is VCCH5V */
2416         }
2417
2418         data->has_temp = 0x07;
2419         if (sio_data->skip_temp & (1 << 2)) {
2420                 if (sio_data->type == it8782
2421                     && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2422                         data->has_temp &= ~(1 << 2);
2423         }
2424
2425         /* Initialize the IT87 chip */
2426         it87_init_device(pdev);
2427
2428         /* Register sysfs hooks */
2429         err = sysfs_create_group(&dev->kobj, &it87_group);
2430         if (err)
2431                 return err;
2432
2433         for (i = 0; i < 10; i++) {
2434                 if (sio_data->skip_in & (1 << i))
2435                         continue;
2436                 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2437                 if (err)
2438                         goto error;
2439                 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2440                         err = sysfs_create_file(&dev->kobj,
2441                                                 it87_attributes_in_beep[i]);
2442                         if (err)
2443                                 goto error;
2444                 }
2445         }
2446
2447         for (i = 0; i < 3; i++) {
2448                 if (!(data->has_temp & (1 << i)))
2449                         continue;
2450                 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2451                 if (err)
2452                         goto error;
2453                 if (has_temp_offset(data)) {
2454                         err = sysfs_create_file(&dev->kobj,
2455                                                 it87_attributes_temp_offset[i]);
2456                         if (err)
2457                                 goto error;
2458                 }
2459                 if (sio_data->beep_pin) {
2460                         err = sysfs_create_file(&dev->kobj,
2461                                                 it87_attributes_temp_beep[i]);
2462                         if (err)
2463                                 goto error;
2464                 }
2465         }
2466
2467         /* Do not create fan files for disabled fans */
2468         fan_beep_need_rw = 1;
2469         for (i = 0; i < 6; i++) {
2470                 if (!(data->has_fan & (1 << i)))
2471                         continue;
2472                 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2473                 if (err)
2474                         goto error;
2475
2476                 if (i < 3 && !has_16bit_fans(data)) {
2477                         err = sysfs_create_file(&dev->kobj,
2478                                                 it87_attributes_fan_div[i]);
2479                         if (err)
2480                                 goto error;
2481                 }
2482
2483                 if (sio_data->beep_pin) {
2484                         err = sysfs_create_file(&dev->kobj,
2485                                                 it87_attributes_fan_beep[i]);
2486                         if (err)
2487                                 goto error;
2488                         if (!fan_beep_need_rw)
2489                                 continue;
2490
2491                         /*
2492                          * As we have a single beep enable bit for all fans,
2493                          * only the first enabled fan has a writable attribute
2494                          * for it.
2495                          */
2496                         if (sysfs_chmod_file(&dev->kobj,
2497                                              it87_attributes_fan_beep[i],
2498                                              S_IRUGO | S_IWUSR))
2499                                 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2500                                         i + 1);
2501                         fan_beep_need_rw = 0;
2502                 }
2503         }
2504
2505         if (enable_pwm_interface) {
2506                 for (i = 0; i < 6; i++) {
2507                         if (sio_data->skip_pwm & (1 << i))
2508                                 continue;
2509                         err = sysfs_create_group(&dev->kobj,
2510                                                  &it87_group_pwm[i]);
2511                         if (err)
2512                                 goto error;
2513
2514                         if (!has_old_autopwm(data))
2515                                 continue;
2516                         err = sysfs_create_group(&dev->kobj,
2517                                                  &it87_group_autopwm[i]);
2518                         if (err)
2519                                 goto error;
2520                 }
2521         }
2522
2523         if (!sio_data->skip_vid) {
2524                 data->vrm = vid_which_vrm();
2525                 /* VID reading from Super-I/O config space if available */
2526                 data->vid = sio_data->vid_value;
2527                 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2528                 if (err)
2529                         goto error;
2530         }
2531
2532         /* Export labels for internal sensors */
2533         for (i = 0; i < 4; i++) {
2534                 if (!(sio_data->internal & (1 << i)))
2535                         continue;
2536                 err = sysfs_create_file(&dev->kobj,
2537                                         it87_attributes_label[i]);
2538                 if (err)
2539                         goto error;
2540         }
2541
2542         data->hwmon_dev = hwmon_device_register(dev);
2543         if (IS_ERR(data->hwmon_dev)) {
2544                 err = PTR_ERR(data->hwmon_dev);
2545                 goto error;
2546         }
2547
2548         return 0;
2549
2550 error:
2551         it87_remove_files(dev);
2552         return err;
2553 }
2554
2555 static int it87_remove(struct platform_device *pdev)
2556 {
2557         struct it87_data *data = platform_get_drvdata(pdev);
2558
2559         hwmon_device_unregister(data->hwmon_dev);
2560         it87_remove_files(&pdev->dev);
2561
2562         return 0;
2563 }
2564
2565 /*
2566  * Must be called with data->update_lock held, except during initialization.
2567  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2568  * would slow down the IT87 access and should not be necessary.
2569  */
2570 static int it87_read_value(struct it87_data *data, u8 reg)
2571 {
2572         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2573         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
2574 }
2575
2576 /*
2577  * Must be called with data->update_lock held, except during initialization.
2578  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2579  * would slow down the IT87 access and should not be necessary.
2580  */
2581 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
2582 {
2583         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2584         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
2585 }
2586
2587 /* Return 1 if and only if the PWM interface is safe to use */
2588 static int it87_check_pwm(struct device *dev)
2589 {
2590         struct it87_data *data = dev_get_drvdata(dev);
2591         /*
2592          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2593          * and polarity set to active low is sign that this is the case so we
2594          * disable pwm control to protect the user.
2595          */
2596         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2597         if ((tmp & 0x87) == 0) {
2598                 if (fix_pwm_polarity) {
2599                         /*
2600                          * The user asks us to attempt a chip reconfiguration.
2601                          * This means switching to active high polarity and
2602                          * inverting all fan speed values.
2603                          */
2604                         int i;
2605                         u8 pwm[3];
2606
2607                         for (i = 0; i < 3; i++)
2608                                 pwm[i] = it87_read_value(data,
2609                                                          IT87_REG_PWM[i]);
2610
2611                         /*
2612                          * If any fan is in automatic pwm mode, the polarity
2613                          * might be correct, as suspicious as it seems, so we
2614                          * better don't change anything (but still disable the
2615                          * PWM interface).
2616                          */
2617                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2618                                 dev_info(dev,
2619                                          "Reconfiguring PWM to active high polarity\n");
2620                                 it87_write_value(data, IT87_REG_FAN_CTL,
2621                                                  tmp | 0x87);
2622                                 for (i = 0; i < 3; i++)
2623                                         it87_write_value(data,
2624                                                          IT87_REG_PWM[i],
2625                                                          0x7f & ~pwm[i]);
2626                                 return 1;
2627                         }
2628
2629                         dev_info(dev,
2630                                  "PWM configuration is too broken to be fixed\n");
2631                 }
2632
2633                 dev_info(dev,
2634                          "Detected broken BIOS defaults, disabling PWM interface\n");
2635                 return 0;
2636         } else if (fix_pwm_polarity) {
2637                 dev_info(dev,
2638                          "PWM configuration looks sane, won't touch\n");
2639         }
2640
2641         return 1;
2642 }
2643
2644 /* Called when we have found a new IT87. */
2645 static void it87_init_device(struct platform_device *pdev)
2646 {
2647         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2648         struct it87_data *data = platform_get_drvdata(pdev);
2649         int tmp, i;
2650         u8 mask;
2651
2652         /*
2653          * For each PWM channel:
2654          * - If it is in automatic mode, setting to manual mode should set
2655          *   the fan to full speed by default.
2656          * - If it is in manual mode, we need a mapping to temperature
2657          *   channels to use when later setting to automatic mode later.
2658          *   Use a 1:1 mapping by default (we are clueless.)
2659          * In both cases, the value can (and should) be changed by the user
2660          * prior to switching to a different mode.
2661          * Note that this is no longer needed for the IT8721F and later, as
2662          * these have separate registers for the temperature mapping and the
2663          * manual duty cycle.
2664          */
2665         for (i = 0; i < 3; i++) {
2666                 data->pwm_temp_map[i] = i;
2667                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2668                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2669         }
2670
2671         /*
2672          * Some chips seem to have default value 0xff for all limit
2673          * registers. For low voltage limits it makes no sense and triggers
2674          * alarms, so change to 0 instead. For high temperature limits, it
2675          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2676          * but is still confusing, so change to 127 degrees C.
2677          */
2678         for (i = 0; i < 8; i++) {
2679                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2680                 if (tmp == 0xff)
2681                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2682         }
2683         for (i = 0; i < 3; i++) {
2684                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2685                 if (tmp == 0xff)
2686                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2687         }
2688
2689         /*
2690          * Temperature channels are not forcibly enabled, as they can be
2691          * set to two different sensor types and we can't guess which one
2692          * is correct for a given system. These channels can be enabled at
2693          * run-time through the temp{1-3}_type sysfs accessors if needed.
2694          */
2695
2696         /* Check if voltage monitors are reset manually or by some reason */
2697         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2698         if ((tmp & 0xff) == 0) {
2699                 /* Enable all voltage monitors */
2700                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2701         }
2702
2703         /* Check if tachometers are reset manually or by some reason */
2704         mask = 0x70 & ~(sio_data->skip_fan << 4);
2705         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2706         if ((data->fan_main_ctrl & mask) == 0) {
2707                 /* Enable all fan tachometers */
2708                 data->fan_main_ctrl |= mask;
2709                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2710                                  data->fan_main_ctrl);
2711         }
2712         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2713
2714         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2715
2716         /* Set tachometers to 16-bit mode if needed */
2717         if (has_fan16_config(data)) {
2718                 if (~tmp & 0x07 & data->has_fan) {
2719                         dev_dbg(&pdev->dev,
2720                                 "Setting fan1-3 to 16-bit mode\n");
2721                         it87_write_value(data, IT87_REG_FAN_16BIT,
2722                                          tmp | 0x07);
2723                 }
2724         }
2725
2726         /* Check for additional fans */
2727         if (has_five_fans(data)) {
2728                 if (tmp & (1 << 4))
2729                         data->has_fan |= (1 << 3); /* fan4 enabled */
2730                 if (tmp & (1 << 5))
2731                         data->has_fan |= (1 << 4); /* fan5 enabled */
2732                 if (has_six_fans(data) && (tmp & (1 << 2)))
2733                         data->has_fan |= (1 << 5); /* fan6 enabled */
2734         }
2735
2736         /* Fan input pins may be used for alternative functions */
2737         data->has_fan &= ~sio_data->skip_fan;
2738
2739         /* Check if pwm5, pwm6 are enabled */
2740         if (has_six_pwm(data)) {
2741                 /* The following code may be IT8620E specific */
2742                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2743                 if ((tmp & 0xc0) == 0xc0)
2744                         sio_data->skip_pwm |= (1 << 4);
2745                 if (!(tmp & (1 << 3)))
2746                         sio_data->skip_pwm |= (1 << 5);
2747         }
2748
2749         /* Start monitoring */
2750         it87_write_value(data, IT87_REG_CONFIG,
2751                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2752                          | (update_vbat ? 0x41 : 0x01));
2753 }
2754
2755 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2756 {
2757         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
2758         if (has_newer_autopwm(data)) {
2759                 data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
2760                         nr < 3 ? 0 : 3;
2761                 data->pwm_duty[nr] = it87_read_value(data,
2762                                                      IT87_REG_PWM_DUTY[nr]);
2763         } else {
2764                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
2765                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2766                 else                            /* Manual mode */
2767                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2768         }
2769
2770         if (has_old_autopwm(data)) {
2771                 int i;
2772
2773                 for (i = 0; i < 5 ; i++)
2774                         data->auto_temp[nr][i] = it87_read_value(data,
2775                                                 IT87_REG_AUTO_TEMP(nr, i));
2776                 for (i = 0; i < 3 ; i++)
2777                         data->auto_pwm[nr][i] = it87_read_value(data,
2778                                                 IT87_REG_AUTO_PWM(nr, i));
2779         }
2780 }
2781
2782 static struct it87_data *it87_update_device(struct device *dev)
2783 {
2784         struct it87_data *data = dev_get_drvdata(dev);
2785         int i;
2786
2787         mutex_lock(&data->update_lock);
2788
2789         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2790             || !data->valid) {
2791                 if (update_vbat) {
2792                         /*
2793                          * Cleared after each update, so reenable.  Value
2794                          * returned by this read will be previous value
2795                          */
2796                         it87_write_value(data, IT87_REG_CONFIG,
2797                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2798                 }
2799                 for (i = 0; i <= 7; i++) {
2800                         data->in[i][0] =
2801                                 it87_read_value(data, IT87_REG_VIN(i));
2802                         data->in[i][1] =
2803                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
2804                         data->in[i][2] =
2805                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
2806                 }
2807                 /* in8 (battery) has no limit registers */
2808                 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
2809                 if (has_avcc3(data))
2810                         data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
2811
2812                 for (i = 0; i < 6; i++) {
2813                         /* Skip disabled fans */
2814                         if (!(data->has_fan & (1 << i)))
2815                                 continue;
2816
2817                         data->fan[i][1] =
2818                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
2819                         data->fan[i][0] = it87_read_value(data,
2820                                        IT87_REG_FAN[i]);
2821                         /* Add high byte if in 16-bit mode */
2822                         if (has_16bit_fans(data)) {
2823                                 data->fan[i][0] |= it87_read_value(data,
2824                                                 IT87_REG_FANX[i]) << 8;
2825                                 data->fan[i][1] |= it87_read_value(data,
2826                                                 IT87_REG_FANX_MIN[i]) << 8;
2827                         }
2828                 }
2829                 for (i = 0; i < 3; i++) {
2830                         if (!(data->has_temp & (1 << i)))
2831                                 continue;
2832                         data->temp[i][0] =
2833                                 it87_read_value(data, IT87_REG_TEMP(i));
2834                         data->temp[i][1] =
2835                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
2836                         data->temp[i][2] =
2837                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2838                         if (has_temp_offset(data))
2839                                 data->temp[i][3] =
2840                                   it87_read_value(data,
2841                                                   IT87_REG_TEMP_OFFSET[i]);
2842                 }
2843
2844                 /* Newer chips don't have clock dividers */
2845                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2846                         i = it87_read_value(data, IT87_REG_FAN_DIV);
2847                         data->fan_div[0] = i & 0x07;
2848                         data->fan_div[1] = (i >> 3) & 0x07;
2849                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
2850                 }
2851
2852                 data->alarms =
2853                         it87_read_value(data, IT87_REG_ALARM1) |
2854                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2855                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
2856                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2857
2858                 data->fan_main_ctrl = it87_read_value(data,
2859                                 IT87_REG_FAN_MAIN_CTRL);
2860                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2861                 for (i = 0; i < 6; i++)
2862                         it87_update_pwm_ctrl(data, i);
2863
2864                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2865                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
2866                 /*
2867                  * The IT8705F does not have VID capability.
2868                  * The IT8718F and later don't use IT87_REG_VID for the
2869                  * same purpose.
2870                  */
2871                 if (data->type == it8712 || data->type == it8716) {
2872                         data->vid = it87_read_value(data, IT87_REG_VID);
2873                         /*
2874                          * The older IT8712F revisions had only 5 VID pins,
2875                          * but we assume it is always safe to read 6 bits.
2876                          */
2877                         data->vid &= 0x3f;
2878                 }
2879                 data->last_updated = jiffies;
2880                 data->valid = 1;
2881         }
2882
2883         mutex_unlock(&data->update_lock);
2884
2885         return data;
2886 }
2887
2888 static int __init it87_device_add(unsigned short address,
2889                                   const struct it87_sio_data *sio_data)
2890 {
2891         struct resource res = {
2892                 .start  = address + IT87_EC_OFFSET,
2893                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2894                 .name   = DRVNAME,
2895                 .flags  = IORESOURCE_IO,
2896         };
2897         int err;
2898
2899         err = acpi_check_resource_conflict(&res);
2900         if (err)
2901                 return err;
2902
2903         pdev = platform_device_alloc(DRVNAME, address);
2904         if (!pdev)
2905                 return -ENOMEM;
2906
2907         err = platform_device_add_resources(pdev, &res, 1);
2908         if (err) {
2909                 pr_err("Device resource addition failed (%d)\n", err);
2910                 goto exit_device_put;
2911         }
2912
2913         err = platform_device_add_data(pdev, sio_data,
2914                                        sizeof(struct it87_sio_data));
2915         if (err) {
2916                 pr_err("Platform data allocation failed\n");
2917                 goto exit_device_put;
2918         }
2919
2920         err = platform_device_add(pdev);
2921         if (err) {
2922                 pr_err("Device addition failed (%d)\n", err);
2923                 goto exit_device_put;
2924         }
2925
2926         return 0;
2927
2928 exit_device_put:
2929         platform_device_put(pdev);
2930         return err;
2931 }
2932
2933 static int __init sm_it87_init(void)
2934 {
2935         int err;
2936         unsigned short isa_address = 0;
2937         struct it87_sio_data sio_data;
2938
2939         memset(&sio_data, 0, sizeof(struct it87_sio_data));
2940         err = it87_find(&isa_address, &sio_data);
2941         if (err)
2942                 return err;
2943         err = platform_driver_register(&it87_driver);
2944         if (err)
2945                 return err;
2946
2947         err = it87_device_add(isa_address, &sio_data);
2948         if (err) {
2949                 platform_driver_unregister(&it87_driver);
2950                 return err;
2951         }
2952
2953         return 0;
2954 }
2955
2956 static void __exit sm_it87_exit(void)
2957 {
2958         platform_device_unregister(pdev);
2959         platform_driver_unregister(&it87_driver);
2960 }
2961
2962
2963 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2964 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2965 module_param(update_vbat, bool, 0);
2966 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2967 module_param(fix_pwm_polarity, bool, 0);
2968 MODULE_PARM_DESC(fix_pwm_polarity,
2969                  "Force PWM polarity to active high (DANGEROUS)");
2970 MODULE_LICENSE("GPL");
2971
2972 module_init(sm_it87_init);
2973 module_exit(sm_it87_exit);