drivers/hwmon/corsair-psu.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
   4  * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
   5  */
   6
   7 #include <linux/completion.h>
   8 #include <linux/debugfs.h>
   9 #include <linux/errno.h>
  10 #include <linux/hid.h>
  11 #include <linux/hwmon.h>
  12 #include <linux/hwmon-sysfs.h>
  13 #include <linux/jiffies.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/mutex.h>
  17 #include <linux/slab.h>
  18 #include <linux/types.h>
  19
  20 /*
  21  * Corsair protocol for PSUs
  22  *
  23  * message size = 64 bytes (request and response, little endian)
  24  * request:
  25  *      [length][command][param0][param1][paramX]...
  26  * reply:
  27  *      [echo of length][echo of command][data0][data1][dataX]...
  28  *
  29  *      - commands are byte sized opcodes
  30  *      - length is the sum of all bytes of the commands/params
  31  *      - the micro-controller of most of these PSUs support concatenation in the request and reply,
  32  *        but it is better to not rely on this (it is also hard to parse)
  33  *      - the driver uses raw events to be accessible from userspace (though this is not really
  34  *        supported, it is just there for convenience, may be removed in the future)
  35  *      - a reply always starts with the length and command in the same order the request used it
  36  *      - length of the reply data is specific to the command used
  37  *      - some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
  38  *        1 = 5v, 2 = 3.3v)
  39  *      - the format of the init command 0xFE is swapped length/command bytes
  40  *      - parameter bytes amount and values are specific to the command (rail setting is the only
  41  *        one for now that uses non-zero values)
  42  *      - the driver supports debugfs for values not fitting into the hwmon class
  43  *      - not every device class (HXi or RMi) supports all commands
  44  *      - if configured wrong the PSU resets or shuts down, often before actually hitting the
  45  *      - reported critical temperature
  46  */
  47
  48 #define DRIVER_NAME             "corsair-psu"
  49
  50 #define REPLY_SIZE              16 /* max length of a reply to a single command */
  51 #define CMD_BUFFER_SIZE         64
  52 #define CMD_TIMEOUT_MS          250
  53 #define SECONDS_PER_HOUR        (60 * 60)
  54 #define SECONDS_PER_DAY         (SECONDS_PER_HOUR * 24)
  55 #define RAIL_COUNT              3 /* 3v3 + 5v + 12v */
  56 #define TEMP_COUNT              2
  57 #define OCP_MULTI_RAIL          0x02
  58
  59 #define PSU_CMD_SELECT_RAIL     0x00 /* expects length 2 */
  60 #define PSU_CMD_FAN_PWM         0x3B /* the rest of the commands expect length 3 */
  61 #define PSU_CMD_RAIL_VOLTS_HCRIT 0x40
  62 #define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
  63 #define PSU_CMD_RAIL_AMPS_HCRIT 0x46
  64 #define PSU_CMD_TEMP_HCRIT      0x4F
  65 #define PSU_CMD_IN_VOLTS        0x88
  66 #define PSU_CMD_IN_AMPS         0x89
  67 #define PSU_CMD_RAIL_VOLTS      0x8B
  68 #define PSU_CMD_RAIL_AMPS       0x8C
  69 #define PSU_CMD_TEMP0           0x8D
  70 #define PSU_CMD_TEMP1           0x8E
  71 #define PSU_CMD_FAN             0x90
  72 #define PSU_CMD_RAIL_WATTS      0x96
  73 #define PSU_CMD_VEND_STR        0x99
  74 #define PSU_CMD_PROD_STR        0x9A
  75 #define PSU_CMD_TOTAL_UPTIME    0xD1
  76 #define PSU_CMD_UPTIME          0xD2
  77 #define PSU_CMD_OCPMODE         0xD8
  78 #define PSU_CMD_TOTAL_WATTS     0xEE
  79 #define PSU_CMD_FAN_PWM_ENABLE  0xF0
  80 #define PSU_CMD_INIT            0xFE
  81
  82 #define L_IN_VOLTS              "v_in"
  83 #define L_OUT_VOLTS_12V         "v_out +12v"
  84 #define L_OUT_VOLTS_5V          "v_out +5v"
  85 #define L_OUT_VOLTS_3_3V        "v_out +3.3v"
  86 #define L_IN_AMPS               "curr in"
  87 #define L_AMPS_12V              "curr +12v"
  88 #define L_AMPS_5V               "curr +5v"
  89 #define L_AMPS_3_3V             "curr +3.3v"
  90 #define L_FAN                   "psu fan"
  91 #define L_TEMP0                 "vrm temp"
  92 #define L_TEMP1                 "case temp"
  93 #define L_WATTS                 "power total"
  94 #define L_WATTS_12V             "power +12v"
  95 #define L_WATTS_5V              "power +5v"
  96 #define L_WATTS_3_3V            "power +3.3v"
  97
  98 static const char *const label_watts[] = {
  99         L_WATTS,
 100         L_WATTS_12V,
 101         L_WATTS_5V,
 102         L_WATTS_3_3V
 103 };
 104
 105 static const char *const label_volts[] = {
 106         L_IN_VOLTS,
 107         L_OUT_VOLTS_12V,
 108         L_OUT_VOLTS_5V,
 109         L_OUT_VOLTS_3_3V
 110 };
 111
 112 static const char *const label_amps[] = {
 113         L_IN_AMPS,
 114         L_AMPS_12V,
 115         L_AMPS_5V,
 116         L_AMPS_3_3V
 117 };
 118
 119 struct corsairpsu_data {
 120         struct hid_device *hdev;
 121         struct device *hwmon_dev;
 122         struct dentry *debugfs;
 123         struct completion wait_completion;
 124         struct mutex lock; /* for locking access to cmd_buffer */
 125         u8 *cmd_buffer;
 126         char vendor[REPLY_SIZE];
 127         char product[REPLY_SIZE];
 128         long temp_crit[TEMP_COUNT];
 129         long in_crit[RAIL_COUNT];
 130         long in_lcrit[RAIL_COUNT];
 131         long curr_crit[RAIL_COUNT];
 132         u8 temp_crit_support;
 133         u8 in_crit_support;
 134         u8 in_lcrit_support;
 135         u8 curr_crit_support;
 136         bool in_curr_cmd_support; /* not all commands are supported on every PSU */
 137 };
 138
 139 /* some values are SMBus LINEAR11 data which need a conversion */
 140 static int corsairpsu_linear11_to_int(const u16 val, const int scale)
 141 {
 142         const int exp = ((s16)val) >> 11;
 143         const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
 144         const int result = mant * scale;
 145
 146         return (exp >= 0) ? (result << exp) : (result >> -exp);
 147 }
 148
 149 /* the micro-controller uses percentage values to control pwm */
 150 static int corsairpsu_dutycycle_to_pwm(const long dutycycle)
 151 {
 152         const int result = (256 << 16) / 100;
 153
 154         return (result * dutycycle) >> 16;
 155 }
 156
 157 static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
 158 {
 159         unsigned long time;
 160         int ret;
 161
 162         memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
 163         priv->cmd_buffer[0] = p0;
 164         priv->cmd_buffer[1] = p1;
 165         priv->cmd_buffer[2] = p2;
 166
 167         reinit_completion(&priv->wait_completion);
 168
 169         ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
 170         if (ret < 0)
 171                 return ret;
 172
 173         time = wait_for_completion_timeout(&priv->wait_completion,
 174                                            msecs_to_jiffies(CMD_TIMEOUT_MS));
 175         if (!time)
 176                 return -ETIMEDOUT;
 177
 178         /*
 179          * at the start of the reply is an echo of the send command/length in the same order it
 180          * was send, not every command is supported on every device class, if a command is not
 181          * supported, the length value in the reply is okay, but the command value is set to 0
 182          */
 183         if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
 184                 return -EOPNOTSUPP;
 185
 186         if (data)
 187                 memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
 188
 189         return 0;
 190 }
 191
 192 static int corsairpsu_init(struct corsairpsu_data *priv)
 193 {
 194         /*
 195          * PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
 196          * actually generates a reply, but we don't need it
 197          */
 198         return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
 199 }
 200
 201 static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
 202 {
 203         int ret;
 204
 205         ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
 206         if (ret < 0)
 207                 return ret;
 208
 209         ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
 210         if (ret < 0)
 211                 return ret;
 212
 213         return 0;
 214 }
 215
 216 static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
 217 {
 218         int ret;
 219
 220         mutex_lock(&priv->lock);
 221         switch (cmd) {
 222         case PSU_CMD_RAIL_VOLTS_HCRIT:
 223         case PSU_CMD_RAIL_VOLTS_LCRIT:
 224         case PSU_CMD_RAIL_AMPS_HCRIT:
 225         case PSU_CMD_RAIL_VOLTS:
 226         case PSU_CMD_RAIL_AMPS:
 227         case PSU_CMD_RAIL_WATTS:
 228                 ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
 229                 if (ret < 0)
 230                         goto cmd_fail;
 231                 break;
 232         default:
 233                 break;
 234         }
 235
 236         ret = corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
 237
 238 cmd_fail:
 239         mutex_unlock(&priv->lock);
 240         return ret;
 241 }
 242
 243 static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
 244 {
 245         u8 data[REPLY_SIZE];
 246         long tmp;
 247         int ret;
 248
 249         ret = corsairpsu_request(priv, cmd, rail, data);
 250         if (ret < 0)
 251                 return ret;
 252
 253         /*
 254          * the biggest value here comes from the uptime command and to exceed MAXINT total uptime
 255          * needs to be about 68 years, the rest are u16 values and the biggest value coming out of
 256          * the LINEAR11 conversion are the watts values which are about 1500 for the strongest psu
 257          * supported (HX1500i)
 258          */
 259         tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
 260         switch (cmd) {
 261         case PSU_CMD_RAIL_VOLTS_HCRIT:
 262         case PSU_CMD_RAIL_VOLTS_LCRIT:
 263         case PSU_CMD_RAIL_AMPS_HCRIT:
 264         case PSU_CMD_TEMP_HCRIT:
 265         case PSU_CMD_IN_VOLTS:
 266         case PSU_CMD_IN_AMPS:
 267         case PSU_CMD_RAIL_VOLTS:
 268         case PSU_CMD_RAIL_AMPS:
 269         case PSU_CMD_TEMP0:
 270         case PSU_CMD_TEMP1:
 271                 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
 272                 break;
 273         case PSU_CMD_FAN:
 274                 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
 275                 break;
 276         case PSU_CMD_FAN_PWM_ENABLE:
 277                 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
 278                 /*
 279                  * 0 = automatic mode, means the micro-controller controls the fan using a plan
 280                  *     which can be modified, but changing this plan is not supported by this
 281                  *     driver, the matching PWM mode is automatic fan speed control = PWM 2
 282                  * 1 = fixed mode, fan runs at a fixed speed represented by a percentage
 283                  *     value 0-100, this matches the PWM manual fan speed control = PWM 1
 284                  * technically there is no PWM no fan speed control mode, it would be a combination
 285                  * of 1 at 100%
 286                  */
 287                 if (*val == 0)
 288                         *val = 2;
 289                 break;
 290         case PSU_CMD_FAN_PWM:
 291                 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
 292                 *val = corsairpsu_dutycycle_to_pwm(*val);
 293                 break;
 294         case PSU_CMD_RAIL_WATTS:
 295         case PSU_CMD_TOTAL_WATTS:
 296                 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
 297                 break;
 298         case PSU_CMD_TOTAL_UPTIME:
 299         case PSU_CMD_UPTIME:
 300         case PSU_CMD_OCPMODE:
 301                 *val = tmp;
 302                 break;
 303         default:
 304                 ret = -EOPNOTSUPP;
 305                 break;
 306         }
 307
 308         return ret;
 309 }
 310
 311 static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
 312 {
 313         long tmp;
 314         int rail;
 315
 316         for (rail = 0; rail < TEMP_COUNT; ++rail) {
 317                 if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
 318                         priv->temp_crit_support |= BIT(rail);
 319                         priv->temp_crit[rail] = tmp;
 320                 }
 321         }
 322
 323         for (rail = 0; rail < RAIL_COUNT; ++rail) {
 324                 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
 325                         priv->in_crit_support |= BIT(rail);
 326                         priv->in_crit[rail] = tmp;
 327                 }
 328
 329                 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
 330                         priv->in_lcrit_support |= BIT(rail);
 331                         priv->in_lcrit[rail] = tmp;
 332                 }
 333
 334                 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
 335                         priv->curr_crit_support |= BIT(rail);
 336                         priv->curr_crit[rail] = tmp;
 337                 }
 338         }
 339 }
 340
 341 static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
 342 {
 343         long tmp;
 344
 345         priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
 346 }
 347
 348 static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
 349                                                 int channel)
 350 {
 351         umode_t res = 0444;
 352
 353         switch (attr) {
 354         case hwmon_temp_input:
 355         case hwmon_temp_label:
 356         case hwmon_temp_crit:
 357                 if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
 358                         res = 0;
 359                 break;
 360         default:
 361                 break;
 362         }
 363
 364         return res;
 365 }
 366
 367 static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
 368                                                int channel)
 369 {
 370         switch (attr) {
 371         case hwmon_fan_input:
 372         case hwmon_fan_label:
 373                 return 0444;
 374         default:
 375                 return 0;
 376         }
 377 }
 378
 379 static umode_t corsairpsu_hwmon_pwm_is_visible(const struct corsairpsu_data *priv, u32 attr,
 380                                                int channel)
 381 {
 382         switch (attr) {
 383         case hwmon_pwm_input:
 384         case hwmon_pwm_enable:
 385                 return 0444;
 386         default:
 387                 return 0;
 388         }
 389 }
 390
 391 static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
 392                                                  int channel)
 393 {
 394         switch (attr) {
 395         case hwmon_power_input:
 396         case hwmon_power_label:
 397                 return 0444;
 398         default:
 399                 return 0;
 400         }
 401 }
 402
 403 static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
 404                                               int channel)
 405 {
 406         umode_t res = 0444;
 407
 408         switch (attr) {
 409         case hwmon_in_input:
 410         case hwmon_in_label:
 411         case hwmon_in_crit:
 412                 if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
 413                         res = 0;
 414                 break;
 415         case hwmon_in_lcrit:
 416                 if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
 417                         res = 0;
 418                 break;
 419         default:
 420                 break;
 421         }
 422
 423         return res;
 424 }
 425
 426 static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
 427                                                 int channel)
 428 {
 429         umode_t res = 0444;
 430
 431         switch (attr) {
 432         case hwmon_curr_input:
 433                 if (channel == 0 && !priv->in_curr_cmd_support)
 434                         res = 0;
 435                 break;
 436         case hwmon_curr_label:
 437         case hwmon_curr_crit:
 438                 if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
 439                         res = 0;
 440                 break;
 441         default:
 442                 break;
 443         }
 444
 445         return res;
 446 }
 447
 448 static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
 449                                                u32 attr, int channel)
 450 {
 451         const struct corsairpsu_data *priv = data;
 452
 453         switch (type) {
 454         case hwmon_temp:
 455                 return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
 456         case hwmon_fan:
 457                 return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
 458         case hwmon_pwm:
 459                 return corsairpsu_hwmon_pwm_is_visible(priv, attr, channel);
 460         case hwmon_power:
 461                 return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
 462         case hwmon_in:
 463                 return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
 464         case hwmon_curr:
 465                 return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
 466         default:
 467                 return 0;
 468         }
 469 }
 470
 471 static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
 472                                       long *val)
 473 {
 474         int err = -EOPNOTSUPP;
 475
 476         switch (attr) {
 477         case hwmon_temp_input:
 478                 return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
 479                                             channel, val);
 480         case hwmon_temp_crit:
 481                 *val = priv->temp_crit[channel];
 482                 err = 0;
 483                 break;
 484         default:
 485                 break;
 486         }
 487
 488         return err;
 489 }
 490
 491 static int corsairpsu_hwmon_pwm_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
 492 {
 493         switch (attr) {
 494         case hwmon_pwm_input:
 495                 return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM, 0, val);
 496         case hwmon_pwm_enable:
 497                 return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM_ENABLE, 0, val);
 498         default:
 499                 break;
 500         }
 501
 502         return -EOPNOTSUPP;
 503 }
 504
 505 static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
 506                                        long *val)
 507 {
 508         if (attr == hwmon_power_input) {
 509                 switch (channel) {
 510                 case 0:
 511                         return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
 512                 case 1 ... 3:
 513                         return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
 514                 default:
 515                         break;
 516                 }
 517         }
 518
 519         return -EOPNOTSUPP;
 520 }
 521
 522 static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
 523 {
 524         int err = -EOPNOTSUPP;
 525
 526         switch (attr) {
 527         case hwmon_in_input:
 528                 switch (channel) {
 529                 case 0:
 530                         return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
 531                 case 1 ... 3:
 532                         return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
 533                 default:
 534                         break;
 535                 }
 536                 break;
 537         case hwmon_in_crit:
 538                 *val = priv->in_crit[channel - 1];
 539                 err = 0;
 540                 break;
 541         case hwmon_in_lcrit:
 542                 *val = priv->in_lcrit[channel - 1];
 543                 err = 0;
 544                 break;
 545         }
 546
 547         return err;
 548 }
 549
 550 static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
 551                                       long *val)
 552 {
 553         int err = -EOPNOTSUPP;
 554
 555         switch (attr) {
 556         case hwmon_curr_input:
 557                 switch (channel) {
 558                 case 0:
 559                         return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
 560                 case 1 ... 3:
 561                         return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
 562                 default:
 563                         break;
 564                 }
 565                 break;
 566         case hwmon_curr_crit:
 567                 *val = priv->curr_crit[channel - 1];
 568                 err = 0;
 569                 break;
 570         default:
 571                 break;
 572         }
 573
 574         return err;
 575 }
 576
 577 static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
 578                                      int channel, long *val)
 579 {
 580         struct corsairpsu_data *priv = dev_get_drvdata(dev);
 581
 582         switch (type) {
 583         case hwmon_temp:
 584                 return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
 585         case hwmon_fan:
 586                 if (attr == hwmon_fan_input)
 587                         return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
 588                 return -EOPNOTSUPP;
 589         case hwmon_pwm:
 590                 return corsairpsu_hwmon_pwm_read(priv, attr, channel, val);
 591         case hwmon_power:
 592                 return corsairpsu_hwmon_power_read(priv, attr, channel, val);
 593         case hwmon_in:
 594                 return corsairpsu_hwmon_in_read(priv, attr, channel, val);
 595         case hwmon_curr:
 596                 return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
 597         default:
 598                 return -EOPNOTSUPP;
 599         }
 600 }
 601
 602 static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
 603                                             u32 attr, int channel, const char **str)
 604 {
 605         if (type == hwmon_temp && attr == hwmon_temp_label) {
 606                 *str = channel ? L_TEMP1 : L_TEMP0;
 607                 return 0;
 608         } else if (type == hwmon_fan && attr == hwmon_fan_label) {
 609                 *str = L_FAN;
 610                 return 0;
 611         } else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
 612                 *str = label_watts[channel];
 613                 return 0;
 614         } else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
 615                 *str = label_volts[channel];
 616                 return 0;
 617         } else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
 618                 *str = label_amps[channel];
 619                 return 0;
 620         }
 621
 622         return -EOPNOTSUPP;
 623 }
 624
 625 static const struct hwmon_ops corsairpsu_hwmon_ops = {
 626         .is_visible     = corsairpsu_hwmon_ops_is_visible,
 627         .read           = corsairpsu_hwmon_ops_read,
 628         .read_string    = corsairpsu_hwmon_ops_read_string,
 629 };
 630
 631 static const struct hwmon_channel_info *const corsairpsu_info[] = {
 632         HWMON_CHANNEL_INFO(chip,
 633                            HWMON_C_REGISTER_TZ),
 634         HWMON_CHANNEL_INFO(temp,
 635                            HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
 636                            HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
 637         HWMON_CHANNEL_INFO(fan,
 638                            HWMON_F_INPUT | HWMON_F_LABEL),
 639         HWMON_CHANNEL_INFO(pwm,
 640                            HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
 641         HWMON_CHANNEL_INFO(power,
 642                            HWMON_P_INPUT | HWMON_P_LABEL,
 643                            HWMON_P_INPUT | HWMON_P_LABEL,
 644                            HWMON_P_INPUT | HWMON_P_LABEL,
 645                            HWMON_P_INPUT | HWMON_P_LABEL),
 646         HWMON_CHANNEL_INFO(in,
 647                            HWMON_I_INPUT | HWMON_I_LABEL,
 648                            HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
 649                            HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
 650                            HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
 651         HWMON_CHANNEL_INFO(curr,
 652                            HWMON_C_INPUT | HWMON_C_LABEL,
 653                            HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
 654                            HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
 655                            HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
 656         NULL
 657 };
 658
 659 static const struct hwmon_chip_info corsairpsu_chip_info = {
 660         .ops    = &corsairpsu_hwmon_ops,
 661         .info   = corsairpsu_info,
 662 };
 663
 664 #ifdef CONFIG_DEBUG_FS
 665
 666 static void print_uptime(struct seq_file *seqf, u8 cmd)
 667 {
 668         struct corsairpsu_data *priv = seqf->private;
 669         long val;
 670         int ret;
 671
 672         ret = corsairpsu_get_value(priv, cmd, 0, &val);
 673         if (ret < 0) {
 674                 seq_puts(seqf, "N/A\n");
 675                 return;
 676         }
 677
 678         if (val > SECONDS_PER_DAY) {
 679                 seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
 680                            val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
 681                            val % 60);
 682                 return;
 683         }
 684
 685         seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
 686                    val % SECONDS_PER_HOUR / 60, val % 60);
 687 }
 688
 689 static int uptime_show(struct seq_file *seqf, void *unused)
 690 {
 691         print_uptime(seqf, PSU_CMD_UPTIME);
 692
 693         return 0;
 694 }
 695 DEFINE_SHOW_ATTRIBUTE(uptime);
 696
 697 static int uptime_total_show(struct seq_file *seqf, void *unused)
 698 {
 699         print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
 700
 701         return 0;
 702 }
 703 DEFINE_SHOW_ATTRIBUTE(uptime_total);
 704
 705 static int vendor_show(struct seq_file *seqf, void *unused)
 706 {
 707         struct corsairpsu_data *priv = seqf->private;
 708
 709         seq_printf(seqf, "%s\n", priv->vendor);
 710
 711         return 0;
 712 }
 713 DEFINE_SHOW_ATTRIBUTE(vendor);
 714
 715 static int product_show(struct seq_file *seqf, void *unused)
 716 {
 717         struct corsairpsu_data *priv = seqf->private;
 718
 719         seq_printf(seqf, "%s\n", priv->product);
 720
 721         return 0;
 722 }
 723 DEFINE_SHOW_ATTRIBUTE(product);
 724
 725 static int ocpmode_show(struct seq_file *seqf, void *unused)
 726 {
 727         struct corsairpsu_data *priv = seqf->private;
 728         long val;
 729         int ret;
 730
 731         /*
 732          * The rail mode is switchable on the fly. The RAW interface can be used for this. But it
 733          * will not be included here, because I consider it somewhat dangerous for the health of the
 734          * PSU. The returned value can be a bogus one, if the PSU is in the process of switching and
 735          * getting of the value itself can also fail during this. Because of this every other value
 736          * than OCP_MULTI_RAIL can be considered as "single rail".
 737          */
 738         ret = corsairpsu_get_value(priv, PSU_CMD_OCPMODE, 0, &val);
 739         if (ret < 0)
 740                 seq_puts(seqf, "N/A\n");
 741         else
 742                 seq_printf(seqf, "%s\n", (val == OCP_MULTI_RAIL) ? "multi rail" : "single rail");
 743
 744         return 0;
 745 }
 746 DEFINE_SHOW_ATTRIBUTE(ocpmode);
 747
 748 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
 749 {
 750         char name[32];
 751
 752         scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
 753
 754         priv->debugfs = debugfs_create_dir(name, NULL);
 755         debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
 756         debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
 757         debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
 758         debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
 759         debugfs_create_file("ocpmode", 0444, priv->debugfs, priv, &ocpmode_fops);
 760 }
 761
 762 #else
 763
 764 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
 765 {
 766 }
 767
 768 #endif
 769
 770 static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
 771 {
 772         struct corsairpsu_data *priv;
 773         int ret;
 774
 775         priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
 776         if (!priv)
 777                 return -ENOMEM;
 778
 779         priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
 780         if (!priv->cmd_buffer)
 781                 return -ENOMEM;
 782
 783         ret = hid_parse(hdev);
 784         if (ret)
 785                 return ret;
 786
 787         ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
 788         if (ret)
 789                 return ret;
 790
 791         ret = hid_hw_open(hdev);
 792         if (ret)
 793                 goto fail_and_stop;
 794
 795         priv->hdev = hdev;
 796         hid_set_drvdata(hdev, priv);
 797         mutex_init(&priv->lock);
 798         init_completion(&priv->wait_completion);
 799
 800         hid_device_io_start(hdev);
 801
 802         ret = corsairpsu_init(priv);
 803         if (ret < 0) {
 804                 dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
 805                 goto fail_and_stop;
 806         }
 807
 808         ret = corsairpsu_fwinfo(priv);
 809         if (ret < 0) {
 810                 dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
 811                 goto fail_and_stop;
 812         }
 813
 814         corsairpsu_get_criticals(priv);
 815         corsairpsu_check_cmd_support(priv);
 816
 817         priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
 818                                                           &corsairpsu_chip_info, NULL);
 819
 820         if (IS_ERR(priv->hwmon_dev)) {
 821                 ret = PTR_ERR(priv->hwmon_dev);
 822                 goto fail_and_close;
 823         }
 824
 825         corsairpsu_debugfs_init(priv);
 826
 827         return 0;
 828
 829 fail_and_close:
 830         hid_hw_close(hdev);
 831 fail_and_stop:
 832         hid_hw_stop(hdev);
 833         return ret;
 834 }
 835
 836 static void corsairpsu_remove(struct hid_device *hdev)
 837 {
 838         struct corsairpsu_data *priv = hid_get_drvdata(hdev);
 839
 840         debugfs_remove_recursive(priv->debugfs);
 841         hwmon_device_unregister(priv->hwmon_dev);
 842         hid_hw_close(hdev);
 843         hid_hw_stop(hdev);
 844 }
 845
 846 static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
 847                                 int size)
 848 {
 849         struct corsairpsu_data *priv = hid_get_drvdata(hdev);
 850
 851         if (completion_done(&priv->wait_completion))
 852                 return 0;
 853
 854         memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
 855         complete(&priv->wait_completion);
 856
 857         return 0;
 858 }
 859
 860 #ifdef CONFIG_PM
 861 static int corsairpsu_resume(struct hid_device *hdev)
 862 {
 863         struct corsairpsu_data *priv = hid_get_drvdata(hdev);
 864
 865         /* some PSUs turn off the microcontroller during standby, so a reinit is required */
 866         return corsairpsu_init(priv);
 867 }
 868 #endif
 869
 870 static const struct hid_device_id corsairpsu_idtable[] = {
 871         { HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
 872         { HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
 873         { HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
 874         { HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
 875         { HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i Series 2022 */
 876         { HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i */
 877         { HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
 878         { HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
 879         { HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
 880         { HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
 881         { HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
 882         { HID_USB_DEVICE(0x1b1c, 0x1c1e) }, /* Corsair HX1000i Series 2023 */
 883         { HID_USB_DEVICE(0x1b1c, 0x1c1f) }, /* Corsair HX1500i Series 2022 */
 884         { },
 885 };
 886 MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
 887
 888 static struct hid_driver corsairpsu_driver = {
 889         .name           = DRIVER_NAME,
 890         .id_table       = corsairpsu_idtable,
 891         .probe          = corsairpsu_probe,
 892         .remove         = corsairpsu_remove,
 893         .raw_event      = corsairpsu_raw_event,
 894 #ifdef CONFIG_PM
 895         .resume         = corsairpsu_resume,
 896         .reset_resume   = corsairpsu_resume,
 897 #endif
 898 };
 899 module_hid_driver(corsairpsu_driver);
 900
 901 MODULE_LICENSE("GPL");
 902 MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
 903 MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");