1 // SPDX-License-Identifier: GPL-2.0
3 * Fan Control HDL CORE driver
5 * Copyright 2019 Analog Devices Inc.
7 #include <linux/bits.h>
9 #include <linux/fpga/adi-axi-common.h>
10 #include <linux/hwmon.h>
11 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
16 #include <linux/platform_device.h>
18 #define ADI_AXI_PCORE_VER_MAJOR(version) (((version) >> 16) & 0xff)
19 #define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff)
20 #define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff)
23 #define ADI_REG_RSTN 0x0080
24 #define ADI_REG_PWM_WIDTH 0x0084
25 #define ADI_REG_TACH_PERIOD 0x0088
26 #define ADI_REG_TACH_TOLERANCE 0x008c
27 #define ADI_REG_PWM_PERIOD 0x00c0
28 #define ADI_REG_TACH_MEASUR 0x00c4
29 #define ADI_REG_TEMPERATURE 0x00c8
31 #define ADI_REG_IRQ_MASK 0x0040
32 #define ADI_REG_IRQ_PENDING 0x0044
33 #define ADI_REG_IRQ_SRC 0x0048
36 #define ADI_IRQ_SRC_PWM_CHANGED BIT(0)
37 #define ADI_IRQ_SRC_TACH_ERR BIT(1)
38 #define ADI_IRQ_SRC_TEMP_INCREASE BIT(2)
39 #define ADI_IRQ_SRC_NEW_MEASUR BIT(3)
40 #define ADI_IRQ_SRC_MASK GENMASK(3, 0)
41 #define ADI_IRQ_MASK_OUT_ALL 0xFFFFFFFFU
43 #define SYSFS_PWM_MAX 255
45 struct axi_fan_control_data {
48 unsigned long clk_rate;
50 /* pulses per revolution */
53 bool update_tacho_params;
57 static inline void axi_iowrite(const u32 val, const u32 reg,
58 const struct axi_fan_control_data *ctl)
60 iowrite32(val, ctl->base + reg);
63 static inline u32 axi_ioread(const u32 reg,
64 const struct axi_fan_control_data *ctl)
66 return ioread32(ctl->base + reg);
69 static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl)
71 u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl);
72 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
74 * PWM_PERIOD is a RO register set by the core. It should never be 0.
75 * For now we are trusting the HW...
77 return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period);
80 static int axi_fan_control_set_pwm_duty(const long val,
81 struct axi_fan_control_data *ctl)
83 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
85 long __val = clamp_val(val, 0, SYSFS_PWM_MAX);
87 new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX);
89 axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl);
94 static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl)
96 const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
99 /* should we return error, EAGAIN maybe? */
102 * The tacho period should be:
103 * TACH = 60/(ppr * rpm), where rpm is revolutions per second
104 * and ppr is pulses per revolution.
105 * Given the tacho period, we can multiply it by the input clock
106 * so that we know how many clocks we need to have this period.
107 * From this, we can derive the RPM value.
109 return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach);
112 static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val)
114 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
118 case hwmon_temp_input:
119 raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl);
121 * The formula for the temperature is:
122 * T = (ADC * 501.3743 / 2^bits) - 273.6777
123 * It's multiplied by 1000 to have millidegrees as
124 * specified by the hwmon sysfs interface.
126 *val = ((raw_temp * 501374) >> 16) - 273677;
133 static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val)
135 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
138 case hwmon_fan_fault:
139 *val = ctl->fan_fault;
143 case hwmon_fan_input:
144 *val = axi_fan_control_get_fan_rpm(ctl);
151 static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val)
153 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
156 case hwmon_pwm_input:
157 *val = axi_fan_control_get_pwm_duty(ctl);
164 static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val)
166 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
169 case hwmon_pwm_input:
170 return axi_fan_control_set_pwm_duty(val, ctl);
176 static int axi_fan_control_read_labels(struct device *dev,
177 enum hwmon_sensor_types type,
178 u32 attr, int channel, const char **str)
192 static int axi_fan_control_read(struct device *dev,
193 enum hwmon_sensor_types type,
194 u32 attr, int channel, long *val)
198 return axi_fan_control_read_fan(dev, attr, val);
200 return axi_fan_control_read_pwm(dev, attr, val);
202 return axi_fan_control_read_temp(dev, attr, val);
208 static int axi_fan_control_write(struct device *dev,
209 enum hwmon_sensor_types type,
210 u32 attr, int channel, long val)
214 return axi_fan_control_write_pwm(dev, attr, val);
220 static umode_t axi_fan_control_fan_is_visible(const u32 attr)
223 case hwmon_fan_input:
224 case hwmon_fan_fault:
225 case hwmon_fan_label:
232 static umode_t axi_fan_control_pwm_is_visible(const u32 attr)
235 case hwmon_pwm_input:
242 static umode_t axi_fan_control_temp_is_visible(const u32 attr)
245 case hwmon_temp_input:
246 case hwmon_temp_label:
253 static umode_t axi_fan_control_is_visible(const void *data,
254 enum hwmon_sensor_types type,
255 u32 attr, int channel)
259 return axi_fan_control_fan_is_visible(attr);
261 return axi_fan_control_pwm_is_visible(attr);
263 return axi_fan_control_temp_is_visible(attr);
270 * This core has two main ways of changing the PWM duty cycle. It is done,
271 * either by a request from userspace (writing on pwm1_input) or by the
272 * core itself. When the change is done by the core, it will use predefined
273 * parameters to evaluate the tach signal and, on that case we cannot set them.
274 * On the other hand, when the request is done by the user, with some arbitrary
275 * value that the core does not now about, we have to provide the tach
276 * parameters so that, the core can evaluate the signal. On the IRQ handler we
277 * distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell
278 * us that the CORE requested a new duty cycle. After this, there is 5s delay
279 * on which the core waits for the fan rotation speed to stabilize. After this
280 * we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set
281 * the tach parameters or not on the next tach measurement cycle (corresponding
282 * already to the ney duty cycle) based on the %ctl->hw_pwm_req flag.
284 static irqreturn_t axi_fan_control_irq_handler(int irq, void *data)
286 struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data;
287 u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl);
290 if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) {
291 if (ctl->update_tacho_params) {
292 u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
294 /* get 25% tolerance */
295 u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100);
296 /* set new tacho parameters */
297 axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl);
298 axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl);
299 ctl->update_tacho_params = false;
303 if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) {
305 * if the pwm changes on behalf of software,
306 * we need to provide new tacho parameters to the core.
307 * Wait for the next measurement for that...
309 if (!ctl->hw_pwm_req) {
310 ctl->update_tacho_params = true;
312 ctl->hw_pwm_req = false;
313 sysfs_notify(&ctl->hdev->kobj, NULL, "pwm1");
317 if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE)
318 /* hardware requested a new pwm */
319 ctl->hw_pwm_req = true;
321 if (irq_pending & ADI_IRQ_SRC_TACH_ERR)
324 /* clear all interrupts */
325 clear_mask = irq_pending & ADI_IRQ_SRC_MASK;
326 axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl);
331 static int axi_fan_control_init(struct axi_fan_control_data *ctl,
332 const struct device_node *np)
336 /* get fan pulses per revolution */
337 ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr);
341 /* 1, 2 and 4 are the typical and accepted values */
342 if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4)
347 axi_iowrite(ADI_IRQ_MASK_OUT_ALL &
348 ~(ADI_IRQ_SRC_NEW_MEASUR | ADI_IRQ_SRC_TACH_ERR |
349 ADI_IRQ_SRC_PWM_CHANGED | ADI_IRQ_SRC_TEMP_INCREASE),
350 ADI_REG_IRQ_MASK, ctl);
352 /* bring the device out of reset */
353 axi_iowrite(0x01, ADI_REG_RSTN, ctl);
358 static const struct hwmon_channel_info *axi_fan_control_info[] = {
359 HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT),
360 HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_LABEL),
361 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL),
365 static const struct hwmon_ops axi_fan_control_hwmon_ops = {
366 .is_visible = axi_fan_control_is_visible,
367 .read = axi_fan_control_read,
368 .write = axi_fan_control_write,
369 .read_string = axi_fan_control_read_labels,
372 static const struct hwmon_chip_info axi_chip_info = {
373 .ops = &axi_fan_control_hwmon_ops,
374 .info = axi_fan_control_info,
377 static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a');
379 static const struct of_device_id axi_fan_control_of_match[] = {
380 { .compatible = "adi,axi-fan-control-1.00.a",
381 .data = (void *)&version_1_0_0},
384 MODULE_DEVICE_TABLE(of, axi_fan_control_of_match);
386 static int axi_fan_control_probe(struct platform_device *pdev)
388 struct axi_fan_control_data *ctl;
390 const struct of_device_id *id;
391 const char *name = "axi_fan_control";
395 id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node);
399 ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL);
403 ctl->base = devm_platform_ioremap_resource(pdev, 0);
404 if (IS_ERR(ctl->base))
405 return PTR_ERR(ctl->base);
407 clk = devm_clk_get(&pdev->dev, NULL);
409 dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk));
413 ctl->clk_rate = clk_get_rate(clk);
417 version = axi_ioread(ADI_AXI_REG_VERSION, ctl);
418 if (ADI_AXI_PCORE_VER_MAJOR(version) !=
419 ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data))) {
420 dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
421 ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data)),
422 ADI_AXI_PCORE_VER_MINOR((*(u32 *)id->data)),
423 ADI_AXI_PCORE_VER_PATCH((*(u32 *)id->data)),
424 ADI_AXI_PCORE_VER_MAJOR(version),
425 ADI_AXI_PCORE_VER_MINOR(version),
426 ADI_AXI_PCORE_VER_PATCH(version));
430 ctl->irq = platform_get_irq(pdev, 0);
434 ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL,
435 axi_fan_control_irq_handler,
436 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
437 pdev->driver_override, ctl);
439 dev_err(&pdev->dev, "failed to request an irq, %d", ret);
443 ret = axi_fan_control_init(ctl, pdev->dev.of_node);
445 dev_err(&pdev->dev, "Failed to initialize device\n");
449 ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev,
455 return PTR_ERR_OR_ZERO(ctl->hdev);
458 static struct platform_driver axi_fan_control_driver = {
460 .name = "axi_fan_control_driver",
461 .of_match_table = axi_fan_control_of_match,
463 .probe = axi_fan_control_probe,
465 module_platform_driver(axi_fan_control_driver);
467 MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
468 MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver");
469 MODULE_LICENSE("GPL");