2 * Copyright 2016 Linaro Ltd.
3 * Copyright 2016 ZTE Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/component.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/hdmi.h>
16 #include <linux/irq.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/of_device.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_edid.h>
25 #include <drm/drm_of.h>
28 #include "zx_hdmi_regs.h"
31 #define ZX_HDMI_INFOFRAME_SIZE 31
32 #define DDC_SEGMENT_ADDR 0x30
35 struct i2c_adapter adap;
40 struct drm_connector connector;
41 struct drm_encoder encoder;
42 struct zx_hdmi_i2c *ddc;
44 struct drm_device *drm;
51 const struct vou_inf *inf;
54 #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
56 static const struct vou_inf vou_inf_hdmi = {
58 .data_sel = VOU_YUV444,
59 .clocks_en_bits = BIT(24) | BIT(18) | BIT(6),
60 .clocks_sel_bits = BIT(13) | BIT(2),
63 static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
65 return readl_relaxed(hdmi->mmio + offset * 4);
68 static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
70 writel_relaxed(val, hdmi->mmio + offset * 4);
73 static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
78 tmp = hdmi_readb(hdmi, offset);
79 tmp = (tmp & ~mask) | (val & mask);
80 hdmi_writeb(hdmi, offset, tmp);
83 static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
84 union hdmi_infoframe *frame, u8 fsel)
86 u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
90 hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);
92 num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
94 DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
98 for (i = 0; i < num; i++)
99 hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);
101 hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
103 hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
109 static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
110 struct drm_display_mode *mode)
112 union hdmi_infoframe frame;
115 ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
118 DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
123 return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
126 static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
127 struct drm_display_mode *mode)
129 union hdmi_infoframe frame;
132 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode);
134 DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
139 /* We always use YUV444 for HDMI output. */
140 frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
142 return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
145 static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
146 struct drm_display_mode *mode,
147 struct drm_display_mode *adj_mode)
149 struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
151 if (hdmi->sink_is_hdmi) {
152 zx_hdmi_config_video_avi(hdmi, mode);
153 zx_hdmi_config_video_vsi(hdmi, mode);
157 static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
159 /* Copy from ZTE BSP code */
160 hdmi_writeb(hdmi, 0x222, 0x0);
161 hdmi_writeb(hdmi, 0x224, 0x4);
162 hdmi_writeb(hdmi, 0x909, 0x0);
163 hdmi_writeb(hdmi, 0x7b0, 0x90);
164 hdmi_writeb(hdmi, 0x7b1, 0x00);
165 hdmi_writeb(hdmi, 0x7b2, 0xa7);
166 hdmi_writeb(hdmi, 0x7b8, 0xaa);
167 hdmi_writeb(hdmi, 0x7b2, 0xa7);
168 hdmi_writeb(hdmi, 0x7b3, 0x0f);
169 hdmi_writeb(hdmi, 0x7b4, 0x0f);
170 hdmi_writeb(hdmi, 0x7b5, 0x55);
171 hdmi_writeb(hdmi, 0x7b7, 0x03);
172 hdmi_writeb(hdmi, 0x7b9, 0x12);
173 hdmi_writeb(hdmi, 0x7ba, 0x32);
174 hdmi_writeb(hdmi, 0x7bc, 0x68);
175 hdmi_writeb(hdmi, 0x7be, 0x40);
176 hdmi_writeb(hdmi, 0x7bf, 0x84);
177 hdmi_writeb(hdmi, 0x7c1, 0x0f);
178 hdmi_writeb(hdmi, 0x7c8, 0x02);
179 hdmi_writeb(hdmi, 0x7c9, 0x03);
180 hdmi_writeb(hdmi, 0x7ca, 0x40);
181 hdmi_writeb(hdmi, 0x7dc, 0x31);
182 hdmi_writeb(hdmi, 0x7e2, 0x04);
183 hdmi_writeb(hdmi, 0x7e0, 0x06);
184 hdmi_writeb(hdmi, 0x7cb, 0x68);
185 hdmi_writeb(hdmi, 0x7f9, 0x02);
186 hdmi_writeb(hdmi, 0x7b6, 0x02);
187 hdmi_writeb(hdmi, 0x7f3, 0x0);
190 static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
193 hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);
195 /* Enable HDMI for TX */
196 hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);
198 /* Enable deep color packet */
199 hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
201 /* Enable HDMI/MHL mode for output */
202 hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
203 TEST_TXCTRL_HDMI_MODE);
205 /* Configure reg_qc_sel */
206 hdmi_writeb(hdmi, HDMICTL4, 0x3);
208 /* Enable interrupt */
209 hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
210 INTR1_MONITOR_DETECT);
213 zx_hdmi_phy_start(hdmi);
216 static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
218 /* Disable interrupt */
219 hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);
221 /* Disable deep color packet */
222 hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
224 /* Disable HDMI for TX */
225 hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);
228 hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
231 static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
233 struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
235 clk_prepare_enable(hdmi->cec_clk);
236 clk_prepare_enable(hdmi->osc_clk);
237 clk_prepare_enable(hdmi->xclk);
239 zx_hdmi_hw_enable(hdmi);
241 vou_inf_enable(hdmi->inf, encoder->crtc);
244 static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
246 struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
248 vou_inf_disable(hdmi->inf, encoder->crtc);
250 zx_hdmi_hw_disable(hdmi);
252 clk_disable_unprepare(hdmi->xclk);
253 clk_disable_unprepare(hdmi->osc_clk);
254 clk_disable_unprepare(hdmi->cec_clk);
257 static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
258 .enable = zx_hdmi_encoder_enable,
259 .disable = zx_hdmi_encoder_disable,
260 .mode_set = zx_hdmi_encoder_mode_set,
263 static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
264 .destroy = drm_encoder_cleanup,
267 static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
269 struct zx_hdmi *hdmi = to_zx_hdmi(connector);
273 edid = drm_get_edid(connector, &hdmi->ddc->adap);
277 hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
278 hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
279 drm_mode_connector_update_edid_property(connector, edid);
280 ret = drm_add_edid_modes(connector, edid);
286 static enum drm_mode_status
287 zx_hdmi_connector_mode_valid(struct drm_connector *connector,
288 struct drm_display_mode *mode)
293 static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
294 .get_modes = zx_hdmi_connector_get_modes,
295 .mode_valid = zx_hdmi_connector_mode_valid,
298 static enum drm_connector_status
299 zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
301 struct zx_hdmi *hdmi = to_zx_hdmi(connector);
303 return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
304 connector_status_connected : connector_status_disconnected;
307 static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
308 .dpms = drm_atomic_helper_connector_dpms,
309 .fill_modes = drm_helper_probe_single_connector_modes,
310 .detect = zx_hdmi_connector_detect,
311 .destroy = drm_connector_cleanup,
312 .reset = drm_atomic_helper_connector_reset,
313 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
314 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
317 static int zx_hdmi_register(struct drm_device *drm, struct zx_hdmi *hdmi)
319 struct drm_encoder *encoder = &hdmi->encoder;
321 encoder->possible_crtcs = VOU_CRTC_MASK;
323 drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
324 DRM_MODE_ENCODER_TMDS, NULL);
325 drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);
327 hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
329 drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
330 DRM_MODE_CONNECTOR_HDMIA);
331 drm_connector_helper_add(&hdmi->connector,
332 &zx_hdmi_connector_helper_funcs);
334 drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
339 static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
341 struct zx_hdmi *hdmi = dev_id;
343 drm_helper_hpd_irq_event(hdmi->connector.dev);
348 static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
350 struct zx_hdmi *hdmi = dev_id;
353 lstat = hdmi_readb(hdmi, L1_INTR_STAT);
355 /* Monitor detect/HPD interrupt */
356 if (lstat & L1_INTR_STAT_INTR1) {
359 stat = hdmi_readb(hdmi, INTR1_STAT);
360 hdmi_writeb(hdmi, INTR1_STAT, stat);
362 if (stat & INTR1_MONITOR_DETECT)
363 return IRQ_WAKE_THREAD;
369 static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
376 /* Bits [9:8] of bytes */
377 hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
378 /* Bits [7:0] of bytes */
379 hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);
382 hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);
384 /* Kick off the read */
385 hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
386 DDC_CMD_SEQUENTIAL_READ);
391 /* FIFO needs some time to get ready */
392 usleep_range(500, 1000);
394 cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
397 DRM_DEV_ERROR(hdmi->dev,
398 "DDC FIFO read timed out!");
404 for (i = 0; i < cnt; i++)
405 *buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
412 static int zx_hdmi_i2c_write(struct zx_hdmi *hdmi, struct i2c_msg *msg)
415 * The DDC I2C adapter is only for reading EDID data, so we assume
416 * that the write to this adapter must be the EDID data offset.
418 if ((msg->len != 1) ||
419 ((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
422 if (msg->addr == DDC_SEGMENT_ADDR)
423 hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
424 else if (msg->addr == DDC_ADDR)
425 hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);
427 hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);
432 static int zx_hdmi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
435 struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
436 struct zx_hdmi_i2c *ddc = hdmi->ddc;
439 mutex_lock(&ddc->lock);
441 /* Enable DDC master access */
442 hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);
444 for (i = 0; i < num; i++) {
445 DRM_DEV_DEBUG(hdmi->dev,
446 "xfer: num: %d/%d, len: %d, flags: %#x\n",
447 i + 1, num, msgs[i].len, msgs[i].flags);
449 if (msgs[i].flags & I2C_M_RD)
450 ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
452 ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);
461 /* Disable DDC master access */
462 hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);
464 mutex_unlock(&ddc->lock);
469 static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
471 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
474 static const struct i2c_algorithm zx_hdmi_algorithm = {
475 .master_xfer = zx_hdmi_i2c_xfer,
476 .functionality = zx_hdmi_i2c_func,
479 static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
481 struct i2c_adapter *adap;
482 struct zx_hdmi_i2c *ddc;
485 ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
490 mutex_init(&ddc->lock);
493 adap->owner = THIS_MODULE;
494 adap->class = I2C_CLASS_DDC;
495 adap->dev.parent = hdmi->dev;
496 adap->algo = &zx_hdmi_algorithm;
497 snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");
499 ret = i2c_add_adapter(adap);
501 DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
506 i2c_set_adapdata(adap, hdmi);
511 static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
513 struct platform_device *pdev = to_platform_device(dev);
514 struct drm_device *drm = data;
515 struct resource *res;
516 struct zx_hdmi *hdmi;
520 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
526 hdmi->inf = &vou_inf_hdmi;
528 dev_set_drvdata(dev, hdmi);
530 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
531 hdmi->mmio = devm_ioremap_resource(dev, res);
532 if (IS_ERR(hdmi->mmio)) {
533 ret = PTR_ERR(hdmi->mmio);
534 DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
538 irq = platform_get_irq(pdev, 0);
542 hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
543 if (IS_ERR(hdmi->cec_clk)) {
544 ret = PTR_ERR(hdmi->cec_clk);
545 DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
549 hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
550 if (IS_ERR(hdmi->osc_clk)) {
551 ret = PTR_ERR(hdmi->osc_clk);
552 DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
556 hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
557 if (IS_ERR(hdmi->xclk)) {
558 ret = PTR_ERR(hdmi->xclk);
559 DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
563 ret = zx_hdmi_ddc_register(hdmi);
565 DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
569 ret = zx_hdmi_register(drm, hdmi);
571 DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
575 ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
576 zx_hdmi_irq_thread, IRQF_SHARED,
577 dev_name(dev), hdmi);
579 DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
586 static void zx_hdmi_unbind(struct device *dev, struct device *master,
589 struct zx_hdmi *hdmi = dev_get_drvdata(dev);
591 hdmi->connector.funcs->destroy(&hdmi->connector);
592 hdmi->encoder.funcs->destroy(&hdmi->encoder);
595 static const struct component_ops zx_hdmi_component_ops = {
596 .bind = zx_hdmi_bind,
597 .unbind = zx_hdmi_unbind,
600 static int zx_hdmi_probe(struct platform_device *pdev)
602 return component_add(&pdev->dev, &zx_hdmi_component_ops);
605 static int zx_hdmi_remove(struct platform_device *pdev)
607 component_del(&pdev->dev, &zx_hdmi_component_ops);
611 static const struct of_device_id zx_hdmi_of_match[] = {
612 { .compatible = "zte,zx296718-hdmi", },
615 MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);
617 struct platform_driver zx_hdmi_driver = {
618 .probe = zx_hdmi_probe,
619 .remove = zx_hdmi_remove,
622 .of_match_table = zx_hdmi_of_match,