1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021 Intel Corporation
8 #include <kunit/static_stub.h>
9 #include <linux/device/driver.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/pm_runtime.h>
14 #include <drm/drm_color_mgmt.h>
15 #include <drm/drm_drv.h>
16 #include <drm/xe_pciids.h>
18 #include "display/xe_display.h"
19 #include "regs/xe_gt_regs.h"
20 #include "xe_device.h"
23 #include "xe_macros.h"
25 #include "xe_module.h"
26 #include "xe_pci_types.h"
37 struct xe_subplatform_desc {
38 enum xe_subplatform subplatform;
49 struct xe_device_desc {
50 /* Should only ever be set for platforms without GMD_ID */
51 const struct xe_graphics_desc *graphics;
52 /* Should only ever be set for platforms without GMD_ID */
53 const struct xe_media_desc *media;
55 const char *platform_name;
56 const struct xe_subplatform_desc *subplatforms;
58 enum xe_platform platform;
60 u8 require_force_probe:1;
74 __diag_ignore_all("-Woverride-init", "Allow field overrides in table");
82 static const struct xe_graphics_desc graphics_xelp = {
87 .hw_engine_mask = BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0),
94 static const struct xe_graphics_desc graphics_xelpp = {
99 .hw_engine_mask = BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0),
106 #define XE_HP_FEATURES \
107 .has_range_tlb_invalidation = true, \
108 .has_flat_ccs = true, \
109 .dma_mask_size = 46, \
113 static const struct xe_graphics_desc graphics_xehpg = {
119 BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
120 BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) |
121 BIT(XE_HW_ENGINE_CCS2) | BIT(XE_HW_ENGINE_CCS3),
124 .vram_flags = XE_VRAM_FLAGS_NEED64K,
127 static const struct xe_graphics_desc graphics_xehpc = {
133 BIT(XE_HW_ENGINE_BCS0) | BIT(XE_HW_ENGINE_BCS1) |
134 BIT(XE_HW_ENGINE_BCS2) | BIT(XE_HW_ENGINE_BCS3) |
135 BIT(XE_HW_ENGINE_BCS4) | BIT(XE_HW_ENGINE_BCS5) |
136 BIT(XE_HW_ENGINE_BCS6) | BIT(XE_HW_ENGINE_BCS7) |
137 BIT(XE_HW_ENGINE_BCS8) |
138 BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) |
139 BIT(XE_HW_ENGINE_CCS2) | BIT(XE_HW_ENGINE_CCS3),
143 .max_remote_tiles = 1,
146 .vram_flags = XE_VRAM_FLAGS_NEED64K,
153 static const struct xe_graphics_desc graphics_xelpg = {
156 BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
157 BIT(XE_HW_ENGINE_CCS0),
163 #define XE2_GFX_FEATURES \
164 .dma_mask_size = 46, \
167 .has_range_tlb_invalidation = 1, \
172 BIT(XE_HW_ENGINE_RCS0) | \
173 BIT(XE_HW_ENGINE_BCS8) | BIT(XE_HW_ENGINE_BCS0) | \
174 GENMASK(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0)
176 static const struct xe_graphics_desc graphics_xe2 = {
182 static const struct xe_media_desc media_xem = {
188 BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) |
189 BIT(XE_HW_ENGINE_VECS0),
192 static const struct xe_media_desc media_xehpm = {
198 BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) |
199 BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VECS1),
202 static const struct xe_media_desc media_xelpmp = {
205 BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) |
206 BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_GSCCS0)
209 static const struct xe_media_desc media_xe2 = {
212 BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0), /* TODO: GSC0 */
215 static const struct xe_device_desc tgl_desc = {
216 .graphics = &graphics_xelp,
218 PLATFORM(XE_TIGERLAKE),
221 .require_force_probe = true,
224 static const struct xe_device_desc rkl_desc = {
225 .graphics = &graphics_xelp,
227 PLATFORM(XE_ROCKETLAKE),
230 .require_force_probe = true,
233 static const u16 adls_rpls_ids[] = { XE_RPLS_IDS(NOP), 0 };
235 static const struct xe_device_desc adl_s_desc = {
236 .graphics = &graphics_xelp,
238 PLATFORM(XE_ALDERLAKE_S),
241 .require_force_probe = true,
242 .subplatforms = (const struct xe_subplatform_desc[]) {
243 { XE_SUBPLATFORM_ALDERLAKE_S_RPLS, "RPLS", adls_rpls_ids },
248 static const u16 adlp_rplu_ids[] = { XE_RPLU_IDS(NOP), 0 };
250 static const struct xe_device_desc adl_p_desc = {
251 .graphics = &graphics_xelp,
253 PLATFORM(XE_ALDERLAKE_P),
256 .require_force_probe = true,
257 .subplatforms = (const struct xe_subplatform_desc[]) {
258 { XE_SUBPLATFORM_ALDERLAKE_P_RPLU, "RPLU", adlp_rplu_ids },
263 static const struct xe_device_desc adl_n_desc = {
264 .graphics = &graphics_xelp,
266 PLATFORM(XE_ALDERLAKE_N),
269 .require_force_probe = true,
272 #define DGFX_FEATURES \
275 static const struct xe_device_desc dg1_desc = {
276 .graphics = &graphics_xelpp,
282 .require_force_probe = true,
285 static const u16 dg2_g10_ids[] = { XE_DG2_G10_IDS(NOP), XE_ATS_M150_IDS(NOP), 0 };
286 static const u16 dg2_g11_ids[] = { XE_DG2_G11_IDS(NOP), XE_ATS_M75_IDS(NOP), 0 };
287 static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
289 #define DG2_FEATURES \
292 .has_heci_gscfi = 1, \
293 .subplatforms = (const struct xe_subplatform_desc[]) { \
294 { XE_SUBPLATFORM_DG2_G10, "G10", dg2_g10_ids }, \
295 { XE_SUBPLATFORM_DG2_G11, "G11", dg2_g11_ids }, \
296 { XE_SUBPLATFORM_DG2_G12, "G12", dg2_g12_ids }, \
300 static const struct xe_device_desc ats_m_desc = {
301 .graphics = &graphics_xehpg,
302 .media = &media_xehpm,
303 .require_force_probe = true,
306 .has_display = false,
309 static const struct xe_device_desc dg2_desc = {
310 .graphics = &graphics_xehpg,
311 .media = &media_xehpm,
312 .require_force_probe = true,
318 static const __maybe_unused struct xe_device_desc pvc_desc = {
319 .graphics = &graphics_xehpc,
322 .has_display = false,
324 .require_force_probe = true,
327 static const struct xe_device_desc mtl_desc = {
328 /* .graphics and .media determined via GMD_ID */
329 .require_force_probe = true,
330 PLATFORM(XE_METEORLAKE),
334 static const struct xe_device_desc lnl_desc = {
335 PLATFORM(XE_LUNARLAKE),
336 .require_force_probe = true,
342 /* Map of GMD_ID values to graphics IP */
343 static const struct gmdid_map graphics_ip_map[] = {
344 { 1270, &graphics_xelpg },
345 { 1271, &graphics_xelpg },
346 { 2004, &graphics_xe2 },
349 /* Map of GMD_ID values to media IP */
350 static const struct gmdid_map media_ip_map[] = {
351 { 1300, &media_xelpmp },
352 { 2000, &media_xe2 },
355 #define INTEL_VGA_DEVICE(id, info) { \
356 PCI_DEVICE(PCI_VENDOR_ID_INTEL, id), \
357 PCI_BASE_CLASS_DISPLAY << 16, 0xff << 16, \
358 (unsigned long) info }
361 * Make sure any device matches here are from most specific to most
362 * general. For example, since the Quanta match is based on the subsystem
363 * and subvendor IDs, we need it to come before the more general IVB
364 * PCI ID matches, otherwise we'll use the wrong info struct above.
366 static const struct pci_device_id pciidlist[] = {
367 XE_TGL_IDS(INTEL_VGA_DEVICE, &tgl_desc),
368 XE_RKL_IDS(INTEL_VGA_DEVICE, &rkl_desc),
369 XE_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc),
370 XE_ADLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc),
371 XE_ADLN_IDS(INTEL_VGA_DEVICE, &adl_n_desc),
372 XE_RPLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc),
373 XE_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc),
374 XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc),
375 XE_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc),
376 XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc),
377 XE_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc),
378 XE_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
381 MODULE_DEVICE_TABLE(pci, pciidlist);
383 #undef INTEL_VGA_DEVICE
385 /* is device_id present in comma separated list of ids */
386 static bool device_id_in_list(u16 device_id, const char *devices, bool negative)
391 if (!devices || !*devices)
394 /* match everything */
395 if (negative && strcmp(devices, "!*") == 0)
397 if (!negative && strcmp(devices, "*") == 0)
400 s = kstrdup(devices, GFP_KERNEL);
404 for (p = s, ret = false; (tok = strsep(&p, ",")) != NULL; ) {
407 if (negative && tok[0] == '!')
409 else if ((negative && tok[0] != '!') ||
410 (!negative && tok[0] == '!'))
413 if (kstrtou16(tok, 16, &val) == 0 && val == device_id) {
424 static bool id_forced(u16 device_id)
426 return device_id_in_list(device_id, xe_modparam.force_probe, false);
429 static bool id_blocked(u16 device_id)
431 return device_id_in_list(device_id, xe_modparam.force_probe, true);
434 static const struct xe_subplatform_desc *
435 find_subplatform(const struct xe_device *xe, const struct xe_device_desc *desc)
437 const struct xe_subplatform_desc *sp;
440 for (sp = desc->subplatforms; sp && sp->subplatform; sp++)
441 for (id = sp->pciidlist; *id; id++)
442 if (*id == xe->info.devid)
453 static void read_gmdid(struct xe_device *xe, enum xe_gmdid_type type, u32 *ver, u32 *revid)
455 struct xe_gt *gt = xe_root_mmio_gt(xe);
456 struct xe_reg gmdid_reg = GMD_ID;
459 KUNIT_STATIC_STUB_REDIRECT(read_gmdid, xe, type, ver, revid);
461 if (type == GMDID_MEDIA)
462 gmdid_reg.addr += MEDIA_GT_GSI_OFFSET;
464 val = xe_mmio_read32(gt, gmdid_reg);
465 *ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val) * 100 + REG_FIELD_GET(GMD_ID_RELEASE_MASK, val);
466 *revid = REG_FIELD_GET(GMD_ID_REVID, val);
470 * Pre-GMD_ID platform: device descriptor already points to the appropriate
471 * graphics descriptor. Simply forward the description and calculate the version
472 * appropriately. "graphics" should be present in all such platforms, while
475 static void handle_pre_gmdid(struct xe_device *xe,
476 const struct xe_graphics_desc *graphics,
477 const struct xe_media_desc *media)
479 xe->info.graphics_verx100 = graphics->ver * 100 + graphics->rel;
482 xe->info.media_verx100 = media->ver * 100 + media->rel;
487 * GMD_ID platform: read IP version from hardware and select graphics descriptor
488 * based on the result.
490 static void handle_gmdid(struct xe_device *xe,
491 const struct xe_graphics_desc **graphics,
492 const struct xe_media_desc **media,
498 read_gmdid(xe, GMDID_GRAPHICS, &ver, graphics_revid);
500 for (int i = 0; i < ARRAY_SIZE(graphics_ip_map); i++) {
501 if (ver == graphics_ip_map[i].ver) {
502 xe->info.graphics_verx100 = ver;
503 *graphics = graphics_ip_map[i].ip;
509 if (!xe->info.graphics_verx100) {
510 drm_err(&xe->drm, "Hardware reports unknown graphics version %u.%02u\n",
511 ver / 100, ver % 100);
514 read_gmdid(xe, GMDID_MEDIA, &ver, media_revid);
516 /* Media may legitimately be fused off / not present */
520 for (int i = 0; i < ARRAY_SIZE(media_ip_map); i++) {
521 if (ver == media_ip_map[i].ver) {
522 xe->info.media_verx100 = ver;
523 *media = media_ip_map[i].ip;
529 if (!xe->info.media_verx100) {
530 drm_err(&xe->drm, "Hardware reports unknown media version %u.%02u\n",
531 ver / 100, ver % 100);
536 * Initialize device info content that only depends on static driver_data
537 * passed to the driver at probe time from PCI ID table.
539 static int xe_info_init_early(struct xe_device *xe,
540 const struct xe_device_desc *desc,
541 const struct xe_subplatform_desc *subplatform_desc)
545 xe->info.platform = desc->platform;
546 xe->info.subplatform = subplatform_desc ?
547 subplatform_desc->subplatform : XE_SUBPLATFORM_NONE;
549 xe->info.is_dgfx = desc->is_dgfx;
550 xe->info.has_heci_gscfi = desc->has_heci_gscfi;
551 xe->info.has_llc = desc->has_llc;
552 xe->info.has_mmio_ext = desc->has_mmio_ext;
553 xe->info.has_sriov = desc->has_sriov;
554 xe->info.skip_guc_pc = desc->skip_guc_pc;
555 xe->info.skip_mtcfg = desc->skip_mtcfg;
556 xe->info.skip_pcode = desc->skip_pcode;
558 xe->info.enable_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
559 xe_modparam.enable_display &&
562 err = xe_tile_init_early(xe_device_get_root_tile(xe), xe, 0);
570 * Initialize device info content that does require knowledge about
571 * graphics / media IP version.
572 * Make sure that GT / tile structures allocated by the driver match the data
573 * present in device info.
575 static int xe_info_init(struct xe_device *xe,
576 const struct xe_graphics_desc *graphics_desc,
577 const struct xe_media_desc *media_desc)
579 u32 graphics_gmdid_revid = 0, media_gmdid_revid = 0;
580 struct xe_tile *tile;
585 * If this platform supports GMD_ID, we'll detect the proper IP
586 * descriptor to use from hardware registers. desc->graphics will only
587 * ever be set at this point for platforms before GMD_ID. In that case
588 * the IP descriptions and versions are simply derived from that.
591 handle_pre_gmdid(xe, graphics_desc, media_desc);
592 xe->info.step = xe_step_pre_gmdid_get(xe);
594 xe_assert(xe, !media_desc);
595 handle_gmdid(xe, &graphics_desc, &media_desc,
596 &graphics_gmdid_revid, &media_gmdid_revid);
597 xe->info.step = xe_step_gmdid_get(xe,
598 graphics_gmdid_revid,
603 * If we couldn't detect the graphics IP, that's considered a fatal
604 * error and we should abort driver load. Failing to detect media
605 * IP is non-fatal; we'll just proceed without enabling media support.
610 xe->info.graphics_name = graphics_desc->name;
611 xe->info.media_name = media_desc ? media_desc->name : "none";
612 xe->info.tile_mmio_ext_size = graphics_desc->tile_mmio_ext_size;
614 xe->info.dma_mask_size = graphics_desc->dma_mask_size;
615 xe->info.vram_flags = graphics_desc->vram_flags;
616 xe->info.va_bits = graphics_desc->va_bits;
617 xe->info.vm_max_level = graphics_desc->vm_max_level;
618 xe->info.has_asid = graphics_desc->has_asid;
619 xe->info.has_flat_ccs = graphics_desc->has_flat_ccs;
620 xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation;
621 xe->info.has_usm = graphics_desc->has_usm;
624 * All platforms have at least one primary GT. Any platform with media
625 * version 13 or higher has an additional dedicated media GT. And
626 * depending on the graphics IP there may be additional "remote tiles."
627 * All of these together determine the overall GT count.
629 * FIXME: 'tile_count' here is misnamed since the rest of the driver
630 * treats it as the number of GTs rather than just the number of tiles.
632 xe->info.tile_count = 1 + graphics_desc->max_remote_tiles;
634 for_each_remote_tile(tile, xe, id) {
637 err = xe_tile_init_early(tile, xe, id);
642 for_each_tile(tile, xe, id) {
643 gt = tile->primary_gt;
644 gt->info.id = xe->info.gt_count++;
645 gt->info.type = XE_GT_TYPE_MAIN;
646 gt->info.__engine_mask = graphics_desc->hw_engine_mask;
647 if (MEDIA_VER(xe) < 13 && media_desc)
648 gt->info.__engine_mask |= media_desc->hw_engine_mask;
650 if (MEDIA_VER(xe) < 13 || !media_desc)
654 * Allocate and setup media GT for platforms with standalone
657 tile->media_gt = xe_gt_alloc(tile);
658 if (IS_ERR(tile->media_gt))
659 return PTR_ERR(tile->media_gt);
662 gt->info.type = XE_GT_TYPE_MEDIA;
663 gt->info.__engine_mask = media_desc->hw_engine_mask;
664 gt->mmio.adj_offset = MEDIA_GT_GSI_OFFSET;
665 gt->mmio.adj_limit = MEDIA_GT_GSI_LENGTH;
668 * FIXME: At the moment multi-tile and standalone media are
669 * mutually exclusive on current platforms. We'll need to
670 * come up with a better way to number GTs if we ever wind
671 * up with platforms that support both together.
673 drm_WARN_ON(&xe->drm, id != 0);
674 gt->info.id = xe->info.gt_count++;
680 static void xe_pci_remove(struct pci_dev *pdev)
682 struct xe_device *xe;
684 xe = pci_get_drvdata(pdev);
685 if (!xe) /* driver load aborted, nothing to cleanup */
688 xe_device_remove(xe);
689 xe_pm_runtime_fini(xe);
690 pci_set_drvdata(pdev, NULL);
693 static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
695 const struct xe_device_desc *desc = (const void *)ent->driver_data;
696 const struct xe_subplatform_desc *subplatform_desc;
697 struct xe_device *xe;
700 if (desc->require_force_probe && !id_forced(pdev->device)) {
702 "Your graphics device %04x is not officially supported\n"
703 "by xe driver in this kernel version. To force Xe probe,\n"
704 "use xe.force_probe='%04x' and i915.force_probe='!%04x'\n"
705 "module parameters or CONFIG_DRM_XE_FORCE_PROBE='%04x' and\n"
706 "CONFIG_DRM_I915_FORCE_PROBE='!%04x' configuration options.\n",
707 pdev->device, pdev->device, pdev->device,
708 pdev->device, pdev->device);
712 if (id_blocked(pdev->device)) {
713 dev_info(&pdev->dev, "Probe blocked for device [%04x:%04x].\n",
714 pdev->vendor, pdev->device);
718 if (xe_display_driver_probe_defer(pdev))
719 return -EPROBE_DEFER;
721 err = pcim_enable_device(pdev);
725 xe = xe_device_create(pdev, ent);
729 pci_set_drvdata(pdev, xe);
731 xe_pm_assert_unbounded_bridge(xe);
732 subplatform_desc = find_subplatform(xe, desc);
734 pci_set_master(pdev);
736 err = xe_info_init_early(xe, desc, subplatform_desc);
740 xe_sriov_probe_early(xe, desc->has_sriov);
742 err = xe_device_probe_early(xe);
746 err = xe_info_init(xe, desc->graphics, desc->media);
750 xe_display_probe(xe);
752 drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d gscfi:%d",
754 subplatform_desc ? subplatform_desc->name : "",
755 xe->info.devid, xe->info.revid,
757 xe->info.graphics_name,
758 xe->info.graphics_verx100 / 100,
759 xe->info.graphics_verx100 % 100,
761 xe->info.media_verx100 / 100,
762 xe->info.media_verx100 % 100,
763 str_yes_no(xe->info.enable_display),
764 xe->info.dma_mask_size, xe->info.tile_count,
765 xe->info.has_heci_gscfi);
767 drm_dbg(&xe->drm, "Stepping = (G:%s, M:%s, D:%s, B:%s)\n",
768 xe_step_name(xe->info.step.graphics),
769 xe_step_name(xe->info.step.media),
770 xe_step_name(xe->info.step.display),
771 xe_step_name(xe->info.step.basedie));
773 drm_dbg(&xe->drm, "SR-IOV support: %s (mode: %s)\n",
774 str_yes_no(xe_device_has_sriov(xe)),
775 xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
777 xe_pm_init_early(xe);
779 err = xe_device_probe(xe);
785 drm_dbg(&xe->drm, "d3cold: capable=%s\n",
786 str_yes_no(xe->d3cold.capable));
791 static void xe_pci_shutdown(struct pci_dev *pdev)
793 xe_device_shutdown(pdev_to_xe_device(pdev));
796 #ifdef CONFIG_PM_SLEEP
797 static void d3cold_toggle(struct pci_dev *pdev, enum toggle_d3cold toggle)
799 struct xe_device *xe = pdev_to_xe_device(pdev);
800 struct pci_dev *root_pdev;
802 if (!xe->d3cold.capable)
805 root_pdev = pcie_find_root_port(pdev);
811 pci_d3cold_disable(root_pdev);
814 pci_d3cold_enable(root_pdev);
819 static int xe_pci_suspend(struct device *dev)
821 struct pci_dev *pdev = to_pci_dev(dev);
824 err = xe_pm_suspend(pdev_to_xe_device(pdev));
829 * Enabling D3Cold is needed for S2Idle/S0ix.
830 * It is save to allow here since xe_pm_suspend has evicted
831 * the local memory and the direct complete optimization is disabled.
833 d3cold_toggle(pdev, D3COLD_ENABLE);
835 pci_save_state(pdev);
836 pci_disable_device(pdev);
841 static int xe_pci_resume(struct device *dev)
843 struct pci_dev *pdev = to_pci_dev(dev);
846 /* Give back the D3Cold decision to the runtime P M*/
847 d3cold_toggle(pdev, D3COLD_DISABLE);
849 err = pci_set_power_state(pdev, PCI_D0);
853 err = pci_enable_device(pdev);
857 pci_set_master(pdev);
859 err = xe_pm_resume(pdev_to_xe_device(pdev));
866 static int xe_pci_runtime_suspend(struct device *dev)
868 struct pci_dev *pdev = to_pci_dev(dev);
869 struct xe_device *xe = pdev_to_xe_device(pdev);
872 err = xe_pm_runtime_suspend(xe);
876 pci_save_state(pdev);
878 if (xe->d3cold.allowed) {
879 d3cold_toggle(pdev, D3COLD_ENABLE);
880 pci_disable_device(pdev);
881 pci_ignore_hotplug(pdev);
882 pci_set_power_state(pdev, PCI_D3cold);
884 d3cold_toggle(pdev, D3COLD_DISABLE);
885 pci_set_power_state(pdev, PCI_D3hot);
891 static int xe_pci_runtime_resume(struct device *dev)
893 struct pci_dev *pdev = to_pci_dev(dev);
894 struct xe_device *xe = pdev_to_xe_device(pdev);
897 err = pci_set_power_state(pdev, PCI_D0);
901 pci_restore_state(pdev);
903 if (xe->d3cold.allowed) {
904 err = pci_enable_device(pdev);
908 pci_set_master(pdev);
911 return xe_pm_runtime_resume(xe);
914 static int xe_pci_runtime_idle(struct device *dev)
916 struct pci_dev *pdev = to_pci_dev(dev);
917 struct xe_device *xe = pdev_to_xe_device(pdev);
919 xe_pm_d3cold_allowed_toggle(xe);
924 static const struct dev_pm_ops xe_pm_ops = {
925 SET_SYSTEM_SLEEP_PM_OPS(xe_pci_suspend, xe_pci_resume)
926 SET_RUNTIME_PM_OPS(xe_pci_runtime_suspend, xe_pci_runtime_resume, xe_pci_runtime_idle)
930 static struct pci_driver xe_pci_driver = {
932 .id_table = pciidlist,
933 .probe = xe_pci_probe,
934 .remove = xe_pci_remove,
935 .shutdown = xe_pci_shutdown,
936 #ifdef CONFIG_PM_SLEEP
937 .driver.pm = &xe_pm_ops,
941 int xe_register_pci_driver(void)
943 return pci_register_driver(&xe_pci_driver);
946 void xe_unregister_pci_driver(void)
948 pci_unregister_driver(&xe_pci_driver);
951 #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
952 #include "tests/xe_pci.c"